5 * Please do not include this file in generic code. There is currently
6 * no requirement for any architecture to implement anything held
12 #include <linux/smp.h>
16 #include <linux/linkage.h>
17 #include <linux/cache.h>
18 #include <linux/spinlock.h>
19 #include <linux/cpumask.h>
20 #include <linux/irqreturn.h>
23 #include <asm/ptrace.h>
28 * Bits 0-16 are reserved for the IRQF_* bits in linux/interrupt.h
32 #define IRQ_TYPE_NONE 0x00000000 /* Default, unspecified type */
33 #define IRQ_TYPE_EDGE_RISING 0x00000001 /* Edge rising type */
34 #define IRQ_TYPE_EDGE_FALLING 0x00000002 /* Edge falling type */
35 #define IRQ_TYPE_EDGE_BOTH (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)
36 #define IRQ_TYPE_LEVEL_HIGH 0x00000004 /* Level high type */
37 #define IRQ_TYPE_LEVEL_LOW 0x00000008 /* Level low type */
38 #define IRQ_TYPE_SENSE_MASK 0x0000000f /* Mask of the above */
39 #define IRQ_TYPE_PROBE 0x00000010 /* Probing in progress */
42 #define IRQ_INPROGRESS 0x00010000 /* IRQ handler active - do not enter! */
43 #define IRQ_DISABLED 0x00020000 /* IRQ disabled - do not enter! */
44 #define IRQ_PENDING 0x00040000 /* IRQ pending - replay on enable */
45 #define IRQ_REPLAY 0x00080000 /* IRQ has been replayed but not acked yet */
46 #define IRQ_AUTODETECT 0x00100000 /* IRQ is being autodetected */
47 #define IRQ_WAITING 0x00200000 /* IRQ not yet seen - for autodetection */
48 #define IRQ_LEVEL 0x00400000 /* IRQ level triggered */
49 #define IRQ_MASKED 0x00800000 /* IRQ masked - shouldn't be seen again */
50 #ifdef CONFIG_IRQ_PER_CPU
51 # define IRQ_PER_CPU 0x01000000 /* IRQ is per CPU */
52 # define CHECK_IRQ_PER_CPU(var) ((var) & IRQ_PER_CPU)
54 # define CHECK_IRQ_PER_CPU(var) 0
57 #define IRQ_NOPROBE 0x02000000 /* IRQ is not valid for probing */
58 #define IRQ_NOREQUEST 0x04000000 /* IRQ cannot be requested */
59 #define IRQ_NOAUTOEN 0x08000000 /* IRQ will not be enabled on request irq */
60 #define IRQ_DELAYED_DISABLE 0x10000000 /* IRQ disable (masking) happens delayed. */
62 struct proc_dir_entry
;
65 * struct irq_chip - hardware interrupt chip descriptor
67 * @name: name for /proc/interrupts
68 * @startup: start up the interrupt (defaults to ->enable if NULL)
69 * @shutdown: shut down the interrupt (defaults to ->disable if NULL)
70 * @enable: enable the interrupt (defaults to chip->unmask if NULL)
71 * @disable: disable the interrupt (defaults to chip->mask if NULL)
72 * @ack: start of a new interrupt
73 * @mask: mask an interrupt source
74 * @mask_ack: ack and mask an interrupt source
75 * @unmask: unmask an interrupt source
76 * @eoi: end of interrupt - chip level
77 * @end: end of interrupt - flow level
78 * @set_affinity: set the CPU affinity on SMP machines
79 * @retrigger: resend an IRQ to the CPU
80 * @set_type: set the flow type (IRQ_TYPE_LEVEL/etc.) of an IRQ
81 * @set_wake: enable/disable power-management wake-on of an IRQ
83 * @release: release function solely used by UML
84 * @typename: obsoleted by name, kept as migration helper
88 unsigned int (*startup
)(unsigned int irq
);
89 void (*shutdown
)(unsigned int irq
);
90 void (*enable
)(unsigned int irq
);
91 void (*disable
)(unsigned int irq
);
93 void (*ack
)(unsigned int irq
);
94 void (*mask
)(unsigned int irq
);
95 void (*mask_ack
)(unsigned int irq
);
96 void (*unmask
)(unsigned int irq
);
97 void (*eoi
)(unsigned int irq
);
99 void (*end
)(unsigned int irq
);
100 void (*set_affinity
)(unsigned int irq
, cpumask_t dest
);
101 int (*retrigger
)(unsigned int irq
);
102 int (*set_type
)(unsigned int irq
, unsigned int flow_type
);
103 int (*set_wake
)(unsigned int irq
, unsigned int on
);
105 /* Currently used only by UML, might disappear one day.*/
106 #ifdef CONFIG_IRQ_RELEASE_METHOD
107 void (*release
)(unsigned int irq
, void *dev_id
);
110 * For compatibility, ->typename is copied into ->name.
113 const char *typename
;
117 * struct irq_desc - interrupt descriptor
119 * @handle_irq: highlevel irq-events handler [if NULL, __do_IRQ()]
120 * @chip: low level interrupt hardware access
121 * @handler_data: per-IRQ data for the irq_chip methods
122 * @chip_data: platform-specific per-chip private data for the chip
123 * methods, to allow shared chip implementations
124 * @action: the irq action chain
125 * @status: status information
126 * @depth: disable-depth, for nested irq_disable() calls
127 * @irq_count: stats field to detect stalled irqs
128 * @irqs_unhandled: stats field for spurious unhandled interrupts
129 * @lock: locking for SMP
130 * @affinity: IRQ affinity on SMP
131 * @cpu: cpu index useful for balancing
132 * @pending_mask: pending rebalanced interrupts
133 * @move_irq: need to re-target IRQ destination
134 * @dir: /proc/irq/ procfs entry
135 * @affinity_entry: /proc/irq/smp_affinity procfs entry on SMP
137 * Pad this out to 32 bytes for cache and indexing reasons.
140 void fastcall (*handle_irq
)(unsigned int irq
,
141 struct irq_desc
*desc
,
142 struct pt_regs
*regs
);
143 struct irq_chip
*chip
;
146 struct irqaction
*action
; /* IRQ action list */
147 unsigned int status
; /* IRQ status */
149 unsigned int depth
; /* nested irq disables */
150 unsigned int irq_count
; /* For detecting broken IRQs */
151 unsigned int irqs_unhandled
;
157 #if defined(CONFIG_GENERIC_PENDING_IRQ) || defined(CONFIG_IRQBALANCE)
158 cpumask_t pending_mask
;
159 unsigned int move_irq
; /* need to re-target IRQ dest */
161 #ifdef CONFIG_PROC_FS
162 struct proc_dir_entry
*dir
;
164 } ____cacheline_aligned
;
166 extern struct irq_desc irq_desc
[NR_IRQS
];
169 * Migration helpers for obsolete names, they will go away:
171 #define hw_interrupt_type irq_chip
172 typedef struct irq_chip hw_irq_controller
;
173 #define no_irq_type no_irq_chip
174 typedef struct irq_desc irq_desc_t
;
177 * Pick up the arch-dependent methods:
179 #include <asm/hw_irq.h>
181 extern int setup_irq(unsigned int irq
, struct irqaction
*new);
183 #ifdef CONFIG_GENERIC_HARDIRQS
186 static inline void set_native_irq_info(int irq
, cpumask_t mask
)
188 irq_desc
[irq
].affinity
= mask
;
191 static inline void set_native_irq_info(int irq
, cpumask_t mask
)
198 #if defined(CONFIG_GENERIC_PENDING_IRQ) || defined(CONFIG_IRQBALANCE)
200 void set_pending_irq(unsigned int irq
, cpumask_t mask
);
201 void move_native_irq(int irq
);
203 #ifdef CONFIG_PCI_MSI
205 * Wonder why these are dummies?
206 * For e.g the set_ioapic_affinity_vector() calls the set_ioapic_affinity_irq()
207 * counter part after translating the vector to irq info. We need to perform
208 * this operation on the real irq, when we dont use vector, i.e when
209 * pci_use_vector() is false.
211 static inline void move_irq(int irq
)
215 static inline void set_irq_info(int irq
, cpumask_t mask
)
219 #else /* CONFIG_PCI_MSI */
221 static inline void move_irq(int irq
)
223 move_native_irq(irq
);
226 static inline void set_irq_info(int irq
, cpumask_t mask
)
228 set_native_irq_info(irq
, mask
);
231 #endif /* CONFIG_PCI_MSI */
233 #else /* CONFIG_GENERIC_PENDING_IRQ || CONFIG_IRQBALANCE */
235 static inline void move_irq(int irq
)
239 static inline void move_native_irq(int irq
)
243 static inline void set_pending_irq(unsigned int irq
, cpumask_t mask
)
247 static inline void set_irq_info(int irq
, cpumask_t mask
)
249 set_native_irq_info(irq
, mask
);
252 #endif /* CONFIG_GENERIC_PENDING_IRQ */
254 #else /* CONFIG_SMP */
257 #define move_native_irq(x)
259 #endif /* CONFIG_SMP */
261 #ifdef CONFIG_IRQBALANCE
262 extern void set_balance_irq_affinity(unsigned int irq
, cpumask_t mask
);
264 static inline void set_balance_irq_affinity(unsigned int irq
, cpumask_t mask
)
269 #ifdef CONFIG_AUTO_IRQ_AFFINITY
270 extern int select_smp_affinity(unsigned int irq
);
272 static inline int select_smp_affinity(unsigned int irq
)
278 extern int no_irq_affinity
;
280 /* Handle irq action chains: */
281 extern int handle_IRQ_event(unsigned int irq
, struct pt_regs
*regs
,
282 struct irqaction
*action
);
285 * Built-in IRQ handlers for various IRQ types,
286 * callable via desc->chip->handle_irq()
289 handle_level_irq(unsigned int irq
, struct irq_desc
*desc
, struct pt_regs
*regs
);
291 handle_fasteoi_irq(unsigned int irq
, struct irq_desc
*desc
,
292 struct pt_regs
*regs
);
294 handle_edge_irq(unsigned int irq
, struct irq_desc
*desc
, struct pt_regs
*regs
);
296 handle_simple_irq(unsigned int irq
, struct irq_desc
*desc
,
297 struct pt_regs
*regs
);
299 handle_percpu_irq(unsigned int irq
, struct irq_desc
*desc
,
300 struct pt_regs
*regs
);
302 handle_bad_irq(unsigned int irq
, struct irq_desc
*desc
, struct pt_regs
*regs
);
305 * Get a descriptive string for the highlevel handler, for
306 * /proc/interrupts output:
309 handle_irq_name(void fastcall (*handle
)(unsigned int, struct irq_desc
*,
313 * Monolithic do_IRQ implementation.
314 * (is an explicit fastcall, because i386 4KSTACKS calls it from assembly)
316 extern fastcall
unsigned int __do_IRQ(unsigned int irq
, struct pt_regs
*regs
);
319 * Architectures call this to let the generic IRQ layer
320 * handle an interrupt. If the descriptor is attached to an
321 * irqchip-style controller then we call the ->handle_irq() handler,
322 * and it calls __do_IRQ() if it's attached to an irqtype-style controller.
324 static inline void generic_handle_irq(unsigned int irq
, struct pt_regs
*regs
)
326 struct irq_desc
*desc
= irq_desc
+ irq
;
328 if (likely(desc
->handle_irq
))
329 desc
->handle_irq(irq
, desc
, regs
);
334 /* Handling of unhandled and spurious interrupts: */
335 extern void note_interrupt(unsigned int irq
, struct irq_desc
*desc
,
336 int action_ret
, struct pt_regs
*regs
);
338 /* Resending of interrupts :*/
339 void check_irq_resend(struct irq_desc
*desc
, unsigned int irq
);
341 /* Initialize /proc/irq/ */
342 extern void init_irq_proc(void);
344 /* Enable/disable irq debugging output: */
345 extern int noirqdebug_setup(char *str
);
347 /* Checks whether the interrupt can be requested by request_irq(): */
348 extern int can_request_irq(unsigned int irq
, unsigned long irqflags
);
350 /* Dummy irq-chip implementation: */
351 extern struct irq_chip no_irq_chip
;
354 set_irq_chip_and_handler(unsigned int irq
, struct irq_chip
*chip
,
355 void fastcall (*handle
)(unsigned int,
359 __set_irq_handler(unsigned int irq
,
360 void fastcall (*handle
)(unsigned int, struct irq_desc
*,
365 * Set a highlevel flow handler for a given IRQ:
368 set_irq_handler(unsigned int irq
,
369 void fastcall (*handle
)(unsigned int, struct irq_desc
*,
372 __set_irq_handler(irq
, handle
, 0);
376 * Set a highlevel chained flow handler for a given IRQ.
377 * (a chained handler is automatically enabled and set to
378 * IRQ_NOREQUEST and IRQ_NOPROBE)
381 set_irq_chained_handler(unsigned int irq
,
382 void fastcall (*handle
)(unsigned int, struct irq_desc
*,
385 __set_irq_handler(irq
, handle
, 1);
388 /* Set/get chip/data for an IRQ: */
390 extern int set_irq_chip(unsigned int irq
, struct irq_chip
*chip
);
391 extern int set_irq_data(unsigned int irq
, void *data
);
392 extern int set_irq_chip_data(unsigned int irq
, void *data
);
393 extern int set_irq_type(unsigned int irq
, unsigned int type
);
395 #define get_irq_chip(irq) (irq_desc[irq].chip)
396 #define get_irq_chip_data(irq) (irq_desc[irq].chip_data)
397 #define get_irq_data(irq) (irq_desc[irq].handler_data)
399 #endif /* CONFIG_GENERIC_HARDIRQS */
401 #endif /* !CONFIG_S390 */
403 #endif /* _LINUX_IRQ_H */