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[NETROM]: statistics fix
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / sound / oss / rme96xx.c
blob7609c68a89f44ca4fab2b2a4c9f915a29bcb72fe
1 /* (C) 2000 Guenter Geiger <geiger@debian.org>
2 with copy/pastes from the driver of Winfried Ritsch <ritsch@iem.kug.ac.at>
3 based on es1370.c
4
5
6
7 * 10 Jan 2001: 0.1 initial version
8 * 19 Jan 2001: 0.2 fixed bug in select()
9 * 27 Apr 2001: 0.3 more than one card usable
10 * 11 May 2001: 0.4 fixed for SMP, included into kernel source tree
11 * 17 May 2001: 0.5 draining code didn't work on new cards
12 * 18 May 2001: 0.6 remove synchronize_irq() call
13 * 17 Jul 2001: 0.7 updated xrmectrl to make it work for newer cards
14 * 2 feb 2002: 0.8 fixed pci device handling, see below for patches from Heiko (Thanks!)
15 Marcus Meissner <Marcus.Meissner@caldera.de>
16
17 Modifications - Heiko Purnhagen <purnhage@tnt.uni-hannover.de>
18 HP20020108 fixed handling of "large" read()
19 HP20020116 towards REV 1.5 support, based on ALSA's card-rme9652.c
20 HP20020118 made mixer ioctl and handling of devices>1 more safe
21 HP20020201 fixed handling of "large" read() properly
22 added REV 1.5 S/P-DIF receiver support
23 SNDCTL_DSP_SPEED now returns the actual speed
24 * 10 Aug 2002: added synchronize_irq() again
25
26 TODO:
27 - test more than one card --- done
28 - check for pci IOREGION (see es1370) in rme96xx_probe ??
29 - error detection
30 - mmap interface
31 - mixer mmap interface
32 - mixer ioctl
33 - get rid of noise upon first open (why ??)
34 - allow multiple open (at least for read)
35 - allow multiple open for non overlapping regions
36 - recheck the multiple devices part (offsets of different devices, etc)
37 - do decent draining in _release --- done
38 - SMP support
39 - what about using fragstotal>2 for small fragsize? (HP20020118)
40 - add support for AFMT_S32_LE
41 */
42
43 #ifndef RMEVERSION
44 #define RMEVERSION "0.8"
45 #endif
46
47 #include <linux/version.h>
48 #include <linux/module.h>
49 #include <linux/string.h>
50 #include <linux/sched.h>
51 #include <linux/sound.h>
52 #include <linux/soundcard.h>
53 #include <linux/pci.h>
54 #include <linux/smp_lock.h>
55 #include <linux/delay.h>
56 #include <linux/slab.h>
57 #include <linux/interrupt.h>
58 #include <linux/init.h>
59 #include <linux/interrupt.h>
60 #include <linux/poll.h>
61 #include <linux/wait.h>
62
63 #include <asm/dma.h>
64 #include <asm/page.h>
65
66 #include "rme96xx.h"
67
68 #define NR_DEVICE 2
69
70 static int devices = 1;
71 module_param(devices, int, 0);
72 MODULE_PARM_DESC(devices, "number of dsp devices allocated by the driver");
73
74
75 MODULE_AUTHOR("Guenter Geiger, geiger@debian.org");
76 MODULE_DESCRIPTION("RME9652/36 \"Hammerfall\" Driver");
77 MODULE_LICENSE("GPL");
78
79
80 #ifdef DEBUG
81 #define DBG(x) printk("RME_DEBUG:");x
82 #define COMM(x) printk("RME_COMM: " x "\n");
83 #else
84 #define DBG(x) while (0) {}
85 #define COMM(x)
86 #endif
87
88 /*--------------------------------------------------------------------------
89 Preporcessor Macros and Definitions
90 --------------------------------------------------------------------------*/
91
92 #define RME96xx_MAGIC 0x6473
93
94 /* Registers-Space in offsets from base address with 16MByte size */
95
96 #define RME96xx_IO_EXTENT 16l*1024l*1024l
97 #define RME96xx_CHANNELS_PER_CARD 26
98
99 /* Write - Register */
100
101 /* 0,4,8,12,16,20,24,28 ... hardware init (erasing fifo-pointer intern) */
102 #define RME96xx_num_of_init_regs 8
103
104 #define RME96xx_init_buffer (0/4)
105 #define RME96xx_play_buffer (32/4) /* pointer to 26x64kBit RAM from mainboard */
106 #define RME96xx_rec_buffer (36/4) /* pointer to 26x64kBit RAM from mainboard */
107 #define RME96xx_control_register (64/4) /* exact meaning see below */
108 #define RME96xx_irq_clear (96/4) /* irq acknowledge */
109 #define RME96xx_time_code (100/4) /* if used with alesis adat */
110 #define RME96xx_thru_base (128/4) /* 132...228 Thru for 26 channels */
111 #define RME96xx_thru_channels RME96xx_CHANNELS_PER_CARD
112
113 /* Read Register */
114
115 #define RME96xx_status_register 0 /* meaning see below */
116
117
118
119 /* Status Register: */
120 /* ------------------------------------------------------------------------ */
121 #define RME96xx_IRQ 0x0000001 /* IRQ is High if not reset by RMExx_irq_clear */
122 #define RME96xx_lock_2 0x0000002 /* ADAT 3-PLL: 1=locked, 0=unlocked */
123 #define RME96xx_lock_1 0x0000004 /* ADAT 2-PLL: 1=locked, 0=unlocked */
124 #define RME96xx_lock_0 0x0000008 /* ADAT 1-PLL: 1=locked, 0=unlocked */
125
126 #define RME96xx_fs48 0x0000010 /* sample rate 0 ...44.1/88.2, 1 ... 48/96 Khz */
127 #define RME96xx_wsel_rd 0x0000020 /* if Word-Clock is used and valid then 1 */
128 #define RME96xx_buf_pos1 0x0000040 /* Bit 6..15 : Position of buffer-pointer in 64Bytes-blocks */
129 #define RME96xx_buf_pos2 0x0000080 /* resolution +/- 1 64Byte/block (since 64Bytes bursts) */
130
131 #define RME96xx_buf_pos3 0x0000100 /* 10 bits = 1024 values */
132 #define RME96xx_buf_pos4 0x0000200 /* if we mask off the first 6 bits, we can take the status */
133 #define RME96xx_buf_pos5 0x0000400 /* register as sample counter in the hardware buffer */
134 #define RME96xx_buf_pos6 0x0000800
135
136 #define RME96xx_buf_pos7 0x0001000
137 #define RME96xx_buf_pos8 0x0002000
138 #define RME96xx_buf_pos9 0x0004000
139 #define RME96xx_buf_pos10 0x0008000
140
141 #define RME96xx_sync_2 0x0010000 /* if ADAT-IN3 synced to system clock */
142 #define RME96xx_sync_1 0x0020000 /* if ADAT-IN2 synced to system clock */
143 #define RME96xx_sync_0 0x0040000 /* if ADAT-IN1 synced to system clock */
144 #define RME96xx_DS_rd 0x0080000 /* 1=Double Speed, 0=Normal Speed */
145
146 #define RME96xx_tc_busy 0x0100000 /* 1=time-code copy in progress (960ms) */
147 #define RME96xx_tc_out 0x0200000 /* time-code out bit */
148 #define RME96xx_F_0 0x0400000 /* 000=64kHz, 100=88.2kHz, 011=96kHz */
149 #define RME96xx_F_1 0x0800000 /* 111=32kHz, 110=44.1kHz, 101=48kHz, */
150
151 #define RME96xx_F_2 0x1000000 /* 001=Rev 1.5+ external Crystal Chip */
152 #define RME96xx_ERF 0x2000000 /* Error-Flag of SDPIF Receiver (1=No Lock)*/
153 #define RME96xx_buffer_id 0x4000000 /* toggles by each interrupt on rec/play */
154 #define RME96xx_tc_valid 0x8000000 /* 1 = a signal is detected on time-code input */
155 #define RME96xx_SPDIF_READ 0x10000000 /* byte available from Rev 1.5+ SPDIF interface */
156
157 /* Status Register Fields */
158
159 #define RME96xx_lock (RME96xx_lock_0|RME96xx_lock_1|RME96xx_lock_2)
160 #define RME96xx_sync (RME96xx_sync_0|RME96xx_sync_1|RME96xx_sync_2)
161 #define RME96xx_F (RME96xx_F_0|RME96xx_F_1|RME96xx_F_2)
162 #define rme96xx_decode_spdif_rate(x) ((x)>>22)
163
164 /* Bit 6..15 : h/w buffer pointer */
165 #define RME96xx_buf_pos 0x000FFC0
166 /* Bits 31,30,29 are bits 5,4,3 of h/w pointer position on later
167 Rev G EEPROMS and Rev 1.5 cards or later.
168 */
169 #define RME96xx_REV15_buf_pos(x) ((((x)&0xE0000000)>>26)|((x)&RME96xx_buf_pos))
170
171
172 /* Control-Register: */
173 /*--------------------------------------------------------------------------------*/
174
175 #define RME96xx_start_bit 0x0001 /* start record/play */
176 #define RME96xx_latency0 0x0002 /* Buffer size / latency */
177 #define RME96xx_latency1 0x0004 /* buffersize = 512Bytes * 2^n */
178 #define RME96xx_latency2 0x0008 /* 0=64samples ... 7=8192samples */
179
180 #define RME96xx_Master 0x0010 /* Clock Mode 1=Master, 0=Slave/Auto */
181 #define RME96xx_IE 0x0020 /* Interupt Enable */
182 #define RME96xx_freq 0x0040 /* samplerate 0=44.1/88.2, 1=48/96 kHz*/
183 #define RME96xx_freq1 0x0080 /* samplerate 0=32 kHz, 1=other rates ??? (from ALSA, but may be wrong) */
184 #define RME96xx_DS 0x0100 /* double speed 0=44.1/48, 1=88.2/96 Khz */
185 #define RME96xx_PRO 0x0200 /* SPDIF-OUT 0=consumer, 1=professional */
186 #define RME96xx_EMP 0x0400 /* SPDIF-OUT emphasis 0=off, 1=on */
187 #define RME96xx_Dolby 0x0800 /* SPDIF-OUT non-audio bit 1=set, 0=unset */
188
189 #define RME96xx_opt_out 0x1000 /* use 1st optical OUT as SPDIF: 1=yes, 0=no */
190 #define RME96xx_wsel 0x2000 /* use Wordclock as sync (overwrites master) */
191 #define RME96xx_inp_0 0x4000 /* SPDIF-IN 00=optical (ADAT1), */
192 #define RME96xx_inp_1 0x8000 /* 01=coaxial (Cinch), 10=internal CDROM */
193
194 #define RME96xx_SyncRef0 0x10000 /* preferred sync-source in autosync */
195 #define RME96xx_SyncRef1 0x20000 /* 00=ADAT1, 01=ADAT2, 10=ADAT3, 11=SPDIF */
196
197 #define RME96xx_SPDIF_RESET (1<<18) /* Rev 1.5+: h/w SPDIF receiver */
198 #define RME96xx_SPDIF_SELECT (1<<19)
199 #define RME96xx_SPDIF_CLOCK (1<<20)
200 #define RME96xx_SPDIF_WRITE (1<<21)
201 #define RME96xx_ADAT1_INTERNAL (1<<22) /* Rev 1.5+: if set, internal CD connector carries ADAT */
202
203
204 #define RME96xx_ctrl_init (RME96xx_latency0 |\
205 RME96xx_Master |\
206 RME96xx_inp_1)
207
208
209
210 /* Control register fields and shortcuts */
211
212 #define RME96xx_latency (RME96xx_latency0|RME96xx_latency1|RME96xx_latency2)
213 #define RME96xx_inp (RME96xx_inp_0|RME96xx_inp_1)
214 #define RME96xx_SyncRef (RME96xx_SyncRef0|RME96xx_SyncRef1)
215 #define RME96xx_mixer_allowed (RME96xx_Master|RME96xx_PRO|RME96xx_EMP|RME96xx_Dolby|RME96xx_opt_out|RME96xx_wsel|RME96xx_inp|RME96xx_SyncRef|RME96xx_ADAT1_INTERNAL)
216
217 /* latency = 512Bytes * 2^n, where n is made from Bit3 ... Bit1 (??? HP20020201) */
218
219 #define RME96xx_SET_LATENCY(x) (((x)&0x7)<<1)
220 #define RME96xx_GET_LATENCY(x) (((x)>>1)&0x7)
221 #define RME96xx_SET_inp(x) (((x)&0x3)<<14)
222 #define RME96xx_GET_inp(x) (((x)>>14)&0x3)
223 #define RME96xx_SET_SyncRef(x) (((x)&0x3)<<17)
224 #define RME96xx_GET_SyncRef(x) (((x)>>17)&0x3)
225
226
227 /* buffer sizes */
228 #define RME96xx_BYTES_PER_SAMPLE 4 /* sizeof(u32) */
229 #define RME_16K 16*1024
230
231 #define RME96xx_DMA_MAX_SAMPLES (RME_16K)
232 #define RME96xx_DMA_MAX_SIZE (RME_16K * RME96xx_BYTES_PER_SAMPLE)
233 #define RME96xx_DMA_MAX_SIZE_ALL (RME96xx_DMA_MAX_SIZE * RME96xx_CHANNELS_PER_CARD)
234
235 #define RME96xx_NUM_OF_FRAGMENTS 2
236 #define RME96xx_FRAGMENT_MAX_SIZE (RME96xx_DMA_MAX_SIZE/2)
237 #define RME96xx_FRAGMENT_MAX_SAMPLES (RME96xx_DMA_MAX_SAMPLES/2)
238 #define RME96xx_MAX_LATENCY 7 /* 16k samples */
239
240
241 #define RME96xx_MAX_DEVS 4 /* we provide some OSS stereodevs */
242 #define RME96xx_MASK_DEVS 0x3 /* RME96xx_MAX_DEVS-1 */
243
244 #define RME_MESS "rme96xx:"
245 /*------------------------------------------------------------------------
246 Types, struct and function declarations
247 ------------------------------------------------------------------------*/
248
249
250 /* --------------------------------------------------------------------- */
251
252 static const char invalid_magic[] = KERN_CRIT RME_MESS" invalid magic value\n";
253
254 #define VALIDATE_STATE(s) \
255 ({ \
256 if (!(s) || (s)->magic != RME96xx_MAGIC) { \
257 printk(invalid_magic); \
258 return -ENXIO; \
259 } \
260 })
261
262 /* --------------------------------------------------------------------- */
263
264
265 static struct file_operations rme96xx_audio_fops;
266 static struct file_operations rme96xx_mixer_fops;
267 static int numcards;
268
269 typedef int32_t raw_sample_t;
270
271 typedef struct _rme96xx_info {
272
273 /* hardware settings */
274 int magic;
275 struct pci_dev * pcidev; /* pci_dev structure */
276 unsigned long __iomem *iobase;
277 unsigned int irq;
278
279 /* list of rme96xx devices */
280 struct list_head devs;
281
282 spinlock_t lock;
283
284 u32 *recbuf; /* memory for rec buffer */
285 u32 *playbuf; /* memory for play buffer */
286
287 u32 control_register;
288
289 u32 thru_bits; /* thru 1=on, 0=off channel 1=Bit1... channel 26= Bit26 */
290
291 int hw_rev; /* h/w rev * 10 (i.e. 1.5 has hw_rev = 15) */
292 char *card_name; /* hammerfall or hammerfall light names */
293
294 int open_count; /* unused ??? HP20020201 */
295
296 int rate;
297 int latency;
298 unsigned int fragsize;
299 int started;
300
301 int hwptr; /* can be negativ because of pci burst offset */
302 unsigned int hwbufid; /* set by interrupt, buffer which is written/read now */
303
304 struct dmabuf {
305
306 unsigned int format;
307 int formatshift;
308 int inchannels; /* number of channels for device */
309 int outchannels; /* number of channels for device */
310 int mono; /* if true, we play mono on 2 channels */
311 int inoffset; /* which channel is considered the first one */
312 int outoffset;
313
314 /* state */
315 int opened; /* open() made */
316 int started; /* first write/read */
317 int mmapped; /* mmap */
318 int open_mode;
319
320 struct _rme96xx_info *s;
321
322 /* pointer to read/write position in buffer */
323 unsigned readptr;
324 unsigned writeptr;
325
326 unsigned error; /* over/underruns cleared on sync again */
327
328 /* waiting and locking */
329 wait_queue_head_t wait;
330 struct semaphore open_sem;
331 wait_queue_head_t open_wait;
332
333 } dma[RME96xx_MAX_DEVS];
334
335 int dspnum[RME96xx_MAX_DEVS]; /* register with sound subsystem */
336 int mixer; /* register with sound subsystem */
337 } rme96xx_info;
338
339
340 /* fiddling with the card (first level hardware control) */
341
342 static inline void rme96xx_set_ctrl(rme96xx_info* s,int mask)
343 {
344
345 s->control_register|=mask;
346 writel(s->control_register,s->iobase + RME96xx_control_register);
347
348 }
349
350 static inline void rme96xx_unset_ctrl(rme96xx_info* s,int mask)
351 {
352
353 s->control_register&=(~mask);
354 writel(s->control_register,s->iobase + RME96xx_control_register);
355
356 }
357
358 static inline int rme96xx_get_sample_rate_status(rme96xx_info* s)
359 {
360 int val;
361 u32 status;
362 status = readl(s->iobase + RME96xx_status_register);
363 val = (status & RME96xx_fs48) ? 48000 : 44100;
364 if (status & RME96xx_DS_rd)
365 val *= 2;
366 return val;
367 }
368
369 static inline int rme96xx_get_sample_rate_ctrl(rme96xx_info* s)
370 {
371 int val;
372 val = (s->control_register & RME96xx_freq) ? 48000 : 44100;
373 if (s->control_register & RME96xx_DS)
374 val *= 2;
375 return val;
376 }
377
378
379 /* code from ALSA card-rme9652.c for rev 1.5 SPDIF receiver HP 20020201 */
380
381 static void rme96xx_spdif_set_bit (rme96xx_info* s, int mask, int onoff)
382 {
383 if (onoff)
384 s->control_register |= mask;
385 else
386 s->control_register &= ~mask;
387
388 writel(s->control_register,s->iobase + RME96xx_control_register);
389 }
390
391 static void rme96xx_spdif_write_byte (rme96xx_info* s, const int val)
392 {
393 long mask;
394 long i;
395
396 for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) {
397 if (val & mask)
398 rme96xx_spdif_set_bit (s, RME96xx_SPDIF_WRITE, 1);
399 else
400 rme96xx_spdif_set_bit (s, RME96xx_SPDIF_WRITE, 0);
401
402 rme96xx_spdif_set_bit (s, RME96xx_SPDIF_CLOCK, 1);
403 rme96xx_spdif_set_bit (s, RME96xx_SPDIF_CLOCK, 0);
404 }
405 }
406
407 static int rme96xx_spdif_read_byte (rme96xx_info* s)
408 {
409 long mask;
410 long val;
411 long i;
412
413 val = 0;
414
415 for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) {
416 rme96xx_spdif_set_bit (s, RME96xx_SPDIF_CLOCK, 1);
417 if (readl(s->iobase + RME96xx_status_register) & RME96xx_SPDIF_READ)
418 val |= mask;
419 rme96xx_spdif_set_bit (s, RME96xx_SPDIF_CLOCK, 0);
420 }
421
422 return val;
423 }
424
425 static void rme96xx_write_spdif_codec (rme96xx_info* s, const int address, const int data)
426 {
427 rme96xx_spdif_set_bit (s, RME96xx_SPDIF_SELECT, 1);
428 rme96xx_spdif_write_byte (s, 0x20);
429 rme96xx_spdif_write_byte (s, address);
430 rme96xx_spdif_write_byte (s, data);
431 rme96xx_spdif_set_bit (s, RME96xx_SPDIF_SELECT, 0);
432 }
433
434
435 static int rme96xx_spdif_read_codec (rme96xx_info* s, const int address)
436 {
437 int ret;
438
439 rme96xx_spdif_set_bit (s, RME96xx_SPDIF_SELECT, 1);
440 rme96xx_spdif_write_byte (s, 0x20);
441 rme96xx_spdif_write_byte (s, address);
442 rme96xx_spdif_set_bit (s, RME96xx_SPDIF_SELECT, 0);
443 rme96xx_spdif_set_bit (s, RME96xx_SPDIF_SELECT, 1);
444
445 rme96xx_spdif_write_byte (s, 0x21);
446 ret = rme96xx_spdif_read_byte (s);
447 rme96xx_spdif_set_bit (s, RME96xx_SPDIF_SELECT, 0);
448
449 return ret;
450 }
451
452 static void rme96xx_initialize_spdif_receiver (rme96xx_info* s)
453 {
454 /* XXX what unsets this ? */
455 /* no idea ??? HP 20020201 */
456
457 s->control_register |= RME96xx_SPDIF_RESET;
458
459 rme96xx_write_spdif_codec (s, 4, 0x40);
460 rme96xx_write_spdif_codec (s, 17, 0x13);
461 rme96xx_write_spdif_codec (s, 6, 0x02);
462 }
463
464 static inline int rme96xx_spdif_sample_rate (rme96xx_info *s, int *spdifrate)
465 {
466 unsigned int rate_bits;
467
468 *spdifrate = 0x1;
469 if (readl(s->iobase + RME96xx_status_register) & RME96xx_ERF) {
470 return -1; /* error condition */
471 }
472
473 if (s->hw_rev == 15) {
474
475 int x, y, ret;
476
477 x = rme96xx_spdif_read_codec (s, 30);
478
479 if (x != 0)
480 y = 48000 * 64 / x;
481 else
482 y = 0;
483
484 if (y > 30400 && y < 33600) {ret = 32000; *spdifrate = 0x7;}
485 else if (y > 41900 && y < 46000) {ret = 44100; *spdifrate = 0x6;}
486 else if (y > 46000 && y < 50400) {ret = 48000; *spdifrate = 0x5;}
487 else if (y > 60800 && y < 67200) {ret = 64000; *spdifrate = 0x0;}
488 else if (y > 83700 && y < 92000) {ret = 88200; *spdifrate = 0x4;}
489 else if (y > 92000 && y < 100000) {ret = 96000; *spdifrate = 0x3;}
490 else {ret = 0; *spdifrate = 0x1;}
491 return ret;
492 }
493
494 rate_bits = readl(s->iobase + RME96xx_status_register) & RME96xx_F;
495
496 switch (*spdifrate = rme96xx_decode_spdif_rate(rate_bits)) {
497 case 0x7:
498 return 32000;
499 break;
500
501 case 0x6:
502 return 44100;
503 break;
504
505 case 0x5:
506 return 48000;
507 break;
508
509 case 0x4:
510 return 88200;
511 break;
512
513 case 0x3:
514 return 96000;
515 break;
516
517 case 0x0:
518 return 64000;
519 break;
520
521 default:
522 /* was an ALSA warning ...
523 snd_printk("%s: unknown S/PDIF input rate (bits = 0x%x)\n",
524 s->card_name, rate_bits);
525 */
526 return 0;
527 break;
528 }
529 }
530
531 /* end of code from ALSA card-rme9652.c */
532
533
534
535 /* the hwbuf in the status register seems to have some jitter, to get rid of
536 it, we first only let the numbers grow, to be on the secure side we
537 subtract a certain amount RME96xx_BURSTBYTES from the resulting number */
538
539 /* the function returns the hardware pointer in bytes */
540 #define RME96xx_BURSTBYTES -64 /* bytes by which hwptr could be off */
541
542 static inline int rme96xx_gethwptr(rme96xx_info* s,int exact)
543 {
544 unsigned long flags;
545 if (exact) {
546 unsigned int hwp;
547 /* the hwptr seems to be rather unreliable :(, so we don't use it */
548 spin_lock_irqsave(&s->lock,flags);
549
550 hwp = readl(s->iobase + RME96xx_status_register) & 0xffc0;
551 s->hwptr = (hwp < s->hwptr) ? s->hwptr : hwp;
552 // s->hwptr = hwp;
553
554 spin_unlock_irqrestore(&s->lock,flags);
555 return (s->hwptr+RME96xx_BURSTBYTES) & ((s->fragsize<<1)-1);
556 }
557 return (s->hwbufid ? s->fragsize : 0);
558 }
559
560 static inline void rme96xx_setlatency(rme96xx_info* s,int l)
561 {
562 s->latency = l;
563 s->fragsize = 1<<(8+l);
564 rme96xx_unset_ctrl(s,RME96xx_latency);
565 rme96xx_set_ctrl(s,RME96xx_SET_LATENCY(l));
566 }
567
568
569 static void rme96xx_clearbufs(struct dmabuf* dma)
570 {
571 int i,j;
572 unsigned long flags;
573
574 /* clear dmabufs */
575 for(i=0;i<devices;i++) {
576 for (j=0;j<dma->outchannels + dma->mono;j++)
577 memset(&dma->s->playbuf[(dma->outoffset + j)*RME96xx_DMA_MAX_SAMPLES],
578 0, RME96xx_DMA_MAX_SIZE);
579 }
580 spin_lock_irqsave(&dma->s->lock,flags);
581 dma->writeptr = 0;
582 dma->readptr = 0;
583 spin_unlock_irqrestore(&dma->s->lock,flags);
584 }
585
586 static int rme96xx_startcard(rme96xx_info *s,int stop)
587 {
588 int i;
589 unsigned long flags;
590
591 COMM ("startcard");
592 if(s->control_register & RME96xx_IE){
593 /* disable interrupt first */
594
595 rme96xx_unset_ctrl( s,RME96xx_start_bit );
596 udelay(10);
597 rme96xx_unset_ctrl( s,RME96xx_IE);
598 spin_lock_irqsave(&s->lock,flags); /* timing is critical */
599 s->started = 0;
600 spin_unlock_irqrestore(&s->lock,flags);
601 if (stop) {
602 COMM("Sound card stopped");
603 return 1;
604 }
605 }
606 COMM ("interrupt disabled");
607 /* first initialize all pointers on card */
608 for(i=0;i<RME96xx_num_of_init_regs;i++){
609 writel(0,s->iobase + i);
610 udelay(10); /* ?? */
611 }
612 COMM ("regs cleaned");
613
614 spin_lock_irqsave(&s->lock,flags); /* timing is critical */
615 udelay(10);
616 s->started = 1;
617 s->hwptr = 0;
618 spin_unlock_irqrestore(&s->lock,flags);
619
620 rme96xx_set_ctrl( s, RME96xx_IE | RME96xx_start_bit);
621
622
623 COMM("Sound card started");
624
625 return 1;
626 }
627
628
629 static inline int rme96xx_getospace(struct dmabuf * dma, unsigned int hwp)
630 {
631 int cnt;
632 int swptr;
633 unsigned long flags;
634
635 spin_lock_irqsave(&dma->s->lock,flags);
636 swptr = dma->writeptr;
637 cnt = (hwp - swptr);
638
639 if (cnt < 0) {
640 cnt = ((dma->s->fragsize<<1) - swptr);
641 }
642 spin_unlock_irqrestore(&dma->s->lock,flags);
643 return cnt;
644 }
645
646 static inline int rme96xx_getispace(struct dmabuf * dma, unsigned int hwp)
647 {
648 int cnt;
649 int swptr;
650 unsigned long flags;
651
652 spin_lock_irqsave(&dma->s->lock,flags);
653 swptr = dma->readptr;
654 cnt = (hwp - swptr);
655
656 if (cnt < 0) {
657 cnt = ((dma->s->fragsize<<1) - swptr);
658 }
659 spin_unlock_irqrestore(&dma->s->lock,flags);
660 return cnt;
661 }
662
663
664 static inline int rme96xx_copyfromuser(struct dmabuf* dma,const char __user * buffer,int count,int hop)
665 {
666 int swptr = dma->writeptr;
667 switch (dma->format) {
668 case AFMT_S32_BLOCKED:
669 {
670 char __user * buf = (char __user *)buffer;
671 int cnt = count/dma->outchannels;
672 int i;
673 for (i=0;i < dma->outchannels;i++) {
674 char* hwbuf =(char*) &dma->s->playbuf[(dma->outoffset + i)*RME96xx_DMA_MAX_SAMPLES];
675 hwbuf+=swptr;
676
677 if (copy_from_user(hwbuf,buf, cnt))
678 return -1;
679 buf+=hop;
680 }
681 swptr+=cnt;
682 break;
683 }
684 case AFMT_S16_LE:
685 {
686 int i,j;
687 int cnt = count/dma->outchannels;
688 for (i=0;i < dma->outchannels + dma->mono;i++) {
689 short __user * sbuf = (short __user *)buffer + i*(!dma->mono);
690 short* hwbuf =(short*) &dma->s->playbuf[(dma->outoffset + i)*RME96xx_DMA_MAX_SAMPLES];
691 hwbuf+=(swptr>>1);
692 for (j=0;j<(cnt>>1);j++) {
693 hwbuf++; /* skip the low 16 bits */
694 __get_user(*hwbuf++,sbuf++);
695 sbuf+=(dma->outchannels-1);
696 }
697 }
698 swptr += (cnt<<1);
699 break;
700 }
701 default:
702 printk(RME_MESS" unsupported format\n");
703 return -1;
704 } /* switch */
705
706 swptr&=((dma->s->fragsize<<1) -1);
707 dma->writeptr = swptr;
708
709 return 0;
710 }
711
712 /* The count argument is the number of bytes */
713 static inline int rme96xx_copytouser(struct dmabuf* dma,const char __user* buffer,int count,int hop)
714 {
715 int swptr = dma->readptr;
716 switch (dma->format) {
717 case AFMT_S32_BLOCKED:
718 {
719 char __user * buf = (char __user *)buffer;
720 int cnt = count/dma->inchannels;
721 int i;
722
723 for (i=0;i < dma->inchannels;i++) {
724 char* hwbuf =(char*) &dma->s->recbuf[(dma->inoffset + i)*RME96xx_DMA_MAX_SAMPLES];
725 hwbuf+=swptr;
726
727 if (copy_to_user(buf,hwbuf,cnt))
728 return -1;
729 buf+=hop;
730 }
731 swptr+=cnt;
732 break;
733 }
734 case AFMT_S16_LE:
735 {
736 int i,j;
737 int cnt = count/dma->inchannels;
738 for (i=0;i < dma->inchannels;i++) {
739 short __user * sbuf = (short __user *)buffer + i;
740 short* hwbuf =(short*) &dma->s->recbuf[(dma->inoffset + i)*RME96xx_DMA_MAX_SAMPLES];
741 hwbuf+=(swptr>>1);
742 for (j=0;j<(cnt>>1);j++) {
743 hwbuf++;
744 __put_user(*hwbuf++,sbuf++);
745 sbuf+=(dma->inchannels-1);
746 }
747 }
748 swptr += (cnt<<1);
749 break;
750 }
751 default:
752 printk(RME_MESS" unsupported format\n");
753 return -1;
754 } /* switch */
755
756 swptr&=((dma->s->fragsize<<1) -1);
757 dma->readptr = swptr;
758 return 0;
759 }
760
761
762 static irqreturn_t rme96xx_interrupt(int irq, void *dev_id, struct pt_regs *regs)
763 {
764 int i;
765 rme96xx_info *s = (rme96xx_info *)dev_id;
766 struct dmabuf *db;
767 u32 status;
768 unsigned long flags;
769
770 status = readl(s->iobase + RME96xx_status_register);
771 if (!(status & RME96xx_IRQ)) {
772 return IRQ_NONE;
773 }
774
775 spin_lock_irqsave(&s->lock,flags);
776 writel(0,s->iobase + RME96xx_irq_clear);
777
778 s->hwbufid = (status & RME96xx_buffer_id)>>26;
779 if ((status & 0xffc0) <= 256) s->hwptr = 0;
780 for(i=0;i<devices;i++)
781 {
782 db = &(s->dma[i]);
783 if(db->started > 0)
784 wake_up(&(db->wait));
785 }
786 spin_unlock_irqrestore(&s->lock,flags);
787 return IRQ_HANDLED;
788 }
789
790
791
792 /*----------------------------------------------------------------------------
793 PCI detection and module initialization stuff
794 ----------------------------------------------------------------------------*/
795
796 static void* busmaster_malloc(int size) {
797 int pg; /* 2 s exponent of memory size */
798 char *buf;
799
800 DBG(printk("kernel malloc pages ..\n"));
801
802 for (pg = 0; PAGE_SIZE * (1 << pg) < size; pg++);
803
804 buf = (char *) __get_free_pages(GFP_KERNEL | GFP_DMA, pg);
805
806 if (buf) {
807 struct page* page, *last_page;
808
809 page = virt_to_page(buf);
810 last_page = page + (1 << pg);
811 DBG(printk("setting reserved bit\n"));
812 while (page < last_page) {
813 SetPageReserved(page);
814 page++;
815 }
816 return buf;
817 }
818 DBG(printk("allocated %ld",(long)buf));
819 return NULL;
820 }
821
822 static void busmaster_free(void* ptr,int size) {
823 int pg;
824 struct page* page, *last_page;
825
826 if (ptr == NULL)
827 return;
828
829 for (pg = 0; PAGE_SIZE * (1 << pg) < size; pg++);
830
831 page = virt_to_page(ptr);
832 last_page = page + (1 << pg);
833 while (page < last_page) {
834 ClearPageReserved(page);
835 page++;
836 }
837 DBG(printk("freeing pages\n"));
838 free_pages((unsigned long) ptr, pg);
839 DBG(printk("done\n"));
840 }
841
842 /* initialize those parts of the info structure which are not pci detectable resources */
843
844 static int rme96xx_dmabuf_init(rme96xx_info * s,struct dmabuf* dma,int ioffset,int ooffset) {
845
846 init_MUTEX(&dma->open_sem);
847 init_waitqueue_head(&dma->open_wait);
848 init_waitqueue_head(&dma->wait);
849 dma->s = s;
850 dma->error = 0;
851
852 dma->format = AFMT_S32_BLOCKED;
853 dma->formatshift = 0;
854 dma->inchannels = dma->outchannels = 1;
855 dma->inoffset = ioffset;
856 dma->outoffset = ooffset;
857
858 dma->opened=0;
859 dma->started=0;
860 dma->mmapped=0;
861 dma->open_mode=0;
862 dma->mono=0;
863
864 rme96xx_clearbufs(dma);
865 return 0;
866 }
867
868
869 static int rme96xx_init(rme96xx_info* s)
870 {
871 int i;
872 int status;
873 unsigned short rev;
874
875 DBG(printk("%s\n", __FUNCTION__));
876 numcards++;
877
878 s->magic = RME96xx_MAGIC;
879
880 spin_lock_init(&s->lock);
881
882 COMM ("setup busmaster memory")
883 s->recbuf = busmaster_malloc(RME96xx_DMA_MAX_SIZE_ALL);
884 s->playbuf = busmaster_malloc(RME96xx_DMA_MAX_SIZE_ALL);
885
886 if (!s->recbuf || !s->playbuf) {
887 printk(KERN_ERR RME_MESS" Unable to allocate busmaster memory\n");
888 return -ENODEV;
889 }
890
891 COMM ("setting rec and playbuffers")
892
893 writel((u32) virt_to_bus(s->recbuf),s->iobase + RME96xx_rec_buffer);
894 writel((u32) virt_to_bus(s->playbuf),s->iobase + RME96xx_play_buffer);
895
896 COMM ("initializing control register")
897 rme96xx_unset_ctrl(s,0xffffffff);
898 rme96xx_set_ctrl(s,RME96xx_ctrl_init);
899
900
901 COMM ("setup devices")
902 for (i=0;i < devices;i++) {
903 struct dmabuf * dma = &s->dma[i];
904 rme96xx_dmabuf_init(s,dma,2*i,2*i);
905 }
906
907 /* code from ALSA card-rme9652.c HP 20020201 */
908 /* Determine the h/w rev level of the card. This seems like
909 a particularly kludgy way to encode it, but its what RME
910 chose to do, so we follow them ...
911 */
912
913 status = readl(s->iobase + RME96xx_status_register);
914 if (rme96xx_decode_spdif_rate(status&RME96xx_F) == 1) {
915 s->hw_rev = 15;
916 } else {
917 s->hw_rev = 11;
918 }
919
920 /* Differentiate between the standard Hammerfall, and the
921 "Light", which does not have the expansion board. This
922 method comes from information received from Mathhias
923 Clausen at RME. Display the EEPROM and h/w revID where
924 relevant.
925 */
926
927 pci_read_config_word(s->pcidev, PCI_CLASS_REVISION, &rev);
928 switch (rev & 0xff) {
929 case 8: /* original eprom */
930 if (s->hw_rev == 15) {
931 s->card_name = "RME Digi9636 (Rev 1.5)";
932 } else {
933 s->card_name = "RME Digi9636";
934 }
935 break;
936 case 9: /* W36_G EPROM */
937 s->card_name = "RME Digi9636 (Rev G)";
938 break;
939 case 4: /* W52_G EPROM */
940 s->card_name = "RME Digi9652 (Rev G)";
941 break;
942 default:
943 case 3: /* original eprom */
944 if (s->hw_rev == 15) {
945 s->card_name = "RME Digi9652 (Rev 1.5)";
946 } else {
947 s->card_name = "RME Digi9652";
948 }
949 break;
950 }
951
952 printk(KERN_INFO RME_MESS" detected %s (hw_rev %d)\n",s->card_name,s->hw_rev);
953
954 if (s->hw_rev == 15)
955 rme96xx_initialize_spdif_receiver (s);
956
957 s->started = 0;
958 rme96xx_setlatency(s,7);
959
960 printk(KERN_INFO RME_MESS" card %d initialized\n",numcards);
961 return 0;
962 }
963
964
965 /* open uses this to figure out which device was opened .. this seems to be
966 unnecessary complex */
967
968 static LIST_HEAD(devs);
969
970 static int __devinit rme96xx_probe(struct pci_dev *pcidev, const struct pci_device_id *pciid)
971 {
972 int i;
973 rme96xx_info *s;
974
975 DBG(printk("%s\n", __FUNCTION__));
976
977 if (pcidev->irq == 0)
978 return -1;
979 if (!pci_dma_supported(pcidev, 0xffffffff)) {
980 printk(KERN_WARNING RME_MESS" architecture does not support 32bit PCI busmaster DMA\n");
981 return -1;
982 }
983 if (!(s = kmalloc(sizeof(rme96xx_info), GFP_KERNEL))) {
984 printk(KERN_WARNING RME_MESS" out of memory\n");
985 return -1;
986 }
987 memset(s, 0, sizeof(rme96xx_info));
988
989 s->pcidev = pcidev;
990 s->iobase = ioremap(pci_resource_start(pcidev, 0),RME96xx_IO_EXTENT);
991 s->irq = pcidev->irq;
992
993 DBG(printk("remapped iobase: %lx irq %d\n",(long)s->iobase,s->irq));
994
995 if (pci_enable_device(pcidev))
996 goto err_irq;
997 if (request_irq(s->irq, rme96xx_interrupt, SA_SHIRQ, "rme96xx", s)) {
998 printk(KERN_ERR RME_MESS" irq %u in use\n", s->irq);
999 goto err_irq;
1000 }
1001
1002 /* initialize the card */
1003
1004 i = 0;
1005 if (rme96xx_init(s) < 0) {
1006 printk(KERN_ERR RME_MESS" initialization failed\n");
1007 goto err_devices;
1008 }
1009 for (i=0;i<devices;i++) {
1010 if ((s->dspnum[i] = register_sound_dsp(&rme96xx_audio_fops, -1)) < 0)
1011 goto err_devices;
1012 }
1013
1014 if ((s->mixer = register_sound_mixer(&rme96xx_mixer_fops, -1)) < 0)
1015 goto err_devices;
1016
1017 pci_set_drvdata(pcidev, s);
1018 pcidev->dma_mask = 0xffffffff; /* ????? */
1019 /* put it into driver list */
1020 list_add_tail(&s->devs, &devs);
1021
1022 DBG(printk("initialization successful\n"));
1023 return 0;
1024
1025 /* error handler */
1026 err_devices:
1027 while (i--)
1028 unregister_sound_dsp(s->dspnum[i]);
1029 free_irq(s->irq,s);
1030 err_irq:
1031 kfree(s);
1032 return -1;
1033 }
1034
1035
1036 static void __devexit rme96xx_remove(struct pci_dev *dev)
1037 {
1038 int i;
1039 rme96xx_info *s = pci_get_drvdata(dev);
1040
1041 if (!s) {
1042 printk(KERN_ERR"device structure not valid\n");
1043 return ;
1044 }
1045
1046 if (s->started) rme96xx_startcard(s,0);
1047
1048 i = devices;
1049 while (i) {
1050 i--;
1051 unregister_sound_dsp(s->dspnum[i]);
1052 }
1053
1054 unregister_sound_mixer(s->mixer);
1055 synchronize_irq(s->irq);
1056 free_irq(s->irq,s);
1057 busmaster_free(s->recbuf,RME96xx_DMA_MAX_SIZE_ALL);
1058 busmaster_free(s->playbuf,RME96xx_DMA_MAX_SIZE_ALL);
1059 kfree(s);
1060 pci_set_drvdata(dev, NULL);
1061 }
1062
1063
1064 #ifndef PCI_VENDOR_ID_RME
1065 #define PCI_VENDOR_ID_RME 0x10ee
1066 #endif
1067 #ifndef PCI_DEVICE_ID_RME9652
1068 #define PCI_DEVICE_ID_RME9652 0x3fc4
1069 #endif
1070 #ifndef PCI_ANY_ID
1071 #define PCI_ANY_ID 0
1072 #endif
1073
1074 static struct pci_device_id id_table[] = {
1075 {
1076 .vendor = PCI_VENDOR_ID_RME,
1077 .device = PCI_DEVICE_ID_RME9652,
1078 .subvendor = PCI_ANY_ID,
1079 .subdevice = PCI_ANY_ID,
1080 },
1081 { 0, },
1082 };
1083
1084 MODULE_DEVICE_TABLE(pci, id_table);
1085
1086 static struct pci_driver rme96xx_driver = {
1087 .name = "rme96xx",
1088 .id_table = id_table,
1089 .probe = rme96xx_probe,
1090 .remove = __devexit_p(rme96xx_remove),
1091 };
1092
1093 static int __init init_rme96xx(void)
1094 {
1095 printk(KERN_INFO RME_MESS" version "RMEVERSION" time " __TIME__ " " __DATE__ "\n");
1096 devices = ((devices-1) & RME96xx_MASK_DEVS) + 1;
1097 printk(KERN_INFO RME_MESS" reserving %d dsp device(s)\n",devices);
1098 numcards = 0;
1099 return pci_module_init(&rme96xx_driver);
1100 }
1101
1102 static void __exit cleanup_rme96xx(void)
1103 {
1104 printk(KERN_INFO RME_MESS" unloading\n");
1105 pci_unregister_driver(&rme96xx_driver);
1106 }
1107
1108 module_init(init_rme96xx);
1109 module_exit(cleanup_rme96xx);
1110
1111
1112
1113
1114
1115 /*--------------------------------------------------------------------------
1116 Implementation of file operations
1117 ---------------------------------------------------------------------------*/
1118
1119 #define RME96xx_FMT (AFMT_S16_LE|AFMT_U8|AFMT_S32_BLOCKED)
1120 /* AFTM_U8 is not (yet?) supported ... HP20020201 */
1121
1122 static int rme96xx_ioctl(struct inode *in, struct file *file, unsigned int cmd, unsigned long arg)
1123 {
1124 struct dmabuf * dma = (struct dmabuf *)file->private_data;
1125 rme96xx_info *s = dma->s;
1126 unsigned long flags;
1127 audio_buf_info abinfo;
1128 count_info cinfo;
1129 int count;
1130 int val = 0;
1131 void __user *argp = (void __user *)arg;
1132 int __user *p = argp;
1133
1134 VALIDATE_STATE(s);
1135
1136 DBG(printk("ioctl %ud\n",cmd));
1137
1138 switch (cmd) {
1139 case OSS_GETVERSION:
1140 return put_user(SOUND_VERSION, p);
1141
1142 case SNDCTL_DSP_SYNC:
1143 #if 0
1144 if (file->f_mode & FMODE_WRITE)
1145 return drain_dac2(s, 0/*file->f_flags & O_NONBLOCK*/);
1146 #endif
1147 return 0;
1148
1149 case SNDCTL_DSP_SETDUPLEX:
1150 return 0;
1151
1152 case SNDCTL_DSP_GETCAPS:
1153 return put_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP, p);
1154
1155 case SNDCTL_DSP_RESET:
1156 // rme96xx_clearbufs(dma);
1157 return 0;
1158
1159 case SNDCTL_DSP_SPEED:
1160 if (get_user(val, p))
1161 return -EFAULT;
1162 if (val >= 0) {
1163 /* generally it's not a problem if we change the speed
1164 if (dma->open_mode & (~file->f_mode) & (FMODE_READ|FMODE_WRITE))
1165 return -EINVAL;
1166 */
1167 spin_lock_irqsave(&s->lock, flags);
1168
1169 switch (val) {
1170 case 44100:
1171 case 88200:
1172 rme96xx_unset_ctrl(s,RME96xx_freq);
1173 break;
1174 case 48000:
1175 case 96000:
1176 rme96xx_set_ctrl(s,RME96xx_freq);
1177 break;
1178 /* just report current rate as default
1179 e.g. use 0 to "select" current digital input rate
1180 default:
1181 rme96xx_unset_ctrl(s,RME96xx_freq);
1182 val = 44100;
1183 */
1184 }
1185 if (val > 50000)
1186 rme96xx_set_ctrl(s,RME96xx_DS);
1187 else
1188 rme96xx_unset_ctrl(s,RME96xx_DS);
1189 /* set val to actual value HP 20020201 */
1190 /* NOTE: if not "Sync Master", reported rate might be not yet "updated" ... but I don't want to insert a long udelay() here */
1191 if ((s->control_register & RME96xx_Master) && !(s->control_register & RME96xx_wsel))
1192 val = rme96xx_get_sample_rate_ctrl(s);
1193 else
1194 val = rme96xx_get_sample_rate_status(s);
1195 s->rate = val;
1196 spin_unlock_irqrestore(&s->lock, flags);
1197 }
1198 DBG(printk("speed set to %d\n",val));
1199 return put_user(val, p);
1200
1201 case SNDCTL_DSP_STEREO: /* this plays a mono file on two channels */
1202 if (get_user(val, p))
1203 return -EFAULT;
1204
1205 if (!val) {
1206 DBG(printk("setting to mono\n"));
1207 dma->mono=1;
1208 dma->inchannels = 1;
1209 dma->outchannels = 1;
1210 }
1211 else {
1212 DBG(printk("setting to stereo\n"));
1213 dma->mono = 0;
1214 dma->inchannels = 2;
1215 dma->outchannels = 2;
1216 }
1217 return 0;
1218 case SNDCTL_DSP_CHANNELS:
1219 /* remember to check for resonable offset/channel pairs here */
1220 if (get_user(val, p))
1221 return -EFAULT;
1222
1223 if (file->f_mode & FMODE_WRITE) {
1224 if (val > 0 && (dma->outoffset + val) <= RME96xx_CHANNELS_PER_CARD)
1225 dma->outchannels = val;
1226 else
1227 dma->outchannels = val = 2;
1228 DBG(printk("setting to outchannels %d\n",val));
1229 }
1230 if (file->f_mode & FMODE_READ) {
1231 if (val > 0 && (dma->inoffset + val) <= RME96xx_CHANNELS_PER_CARD)
1232 dma->inchannels = val;
1233 else
1234 dma->inchannels = val = 2;
1235 DBG(printk("setting to inchannels %d\n",val));
1236 }
1237
1238 dma->mono=0;
1239
1240 return put_user(val, p);
1241
1242 case SNDCTL_DSP_GETFMTS: /* Returns a mask */
1243 return put_user(RME96xx_FMT, p);
1244
1245 case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
1246 DBG(printk("setting to format %x\n",val));
1247 if (get_user(val, p))
1248 return -EFAULT;
1249 if (val != AFMT_QUERY) {
1250 if (val & RME96xx_FMT)
1251 dma->format = val;
1252 switch (dma->format) {
1253 case AFMT_S16_LE:
1254 dma->formatshift=1;
1255 break;
1256 case AFMT_S32_BLOCKED:
1257 dma->formatshift=0;
1258 break;
1259 }
1260 }
1261 return put_user(dma->format, p);
1262
1263 case SNDCTL_DSP_POST:
1264 return 0;
1265
1266 case SNDCTL_DSP_GETTRIGGER:
1267 val = 0;
1268 #if 0
1269 if (file->f_mode & FMODE_READ && s->ctrl & CTRL_ADC_EN)
1270 val |= PCM_ENABLE_INPUT;
1271 if (file->f_mode & FMODE_WRITE && s->ctrl & CTRL_DAC2_EN)
1272 val |= PCM_ENABLE_OUTPUT;
1273 #endif
1274 return put_user(val, p);
1275
1276 case SNDCTL_DSP_SETTRIGGER:
1277 if (get_user(val, p))
1278 return -EFAULT;
1279 #if 0
1280 if (file->f_mode & FMODE_READ) {
1281 if (val & PCM_ENABLE_INPUT) {
1282 if (!s->dma_adc.ready && (ret = prog_dmabuf_adc(s)))
1283 return ret;
1284 start_adc(s);
1285 } else
1286 stop_adc(s);
1287 }
1288 if (file->f_mode & FMODE_WRITE) {
1289 if (val & PCM_ENABLE_OUTPUT) {
1290 if (!s->dma_dac2.ready && (ret = prog_dmabuf_dac2(s)))
1291 return ret;
1292 start_dac2(s);
1293 } else
1294 stop_dac2(s);
1295 }
1296 #endif
1297 return 0;
1298
1299 case SNDCTL_DSP_GETOSPACE:
1300 if (!(file->f_mode & FMODE_WRITE))
1301 return -EINVAL;
1302
1303 val = rme96xx_gethwptr(dma->s,0);
1304
1305
1306 count = rme96xx_getospace(dma,val);
1307 if (!s->started) count = s->fragsize*2;
1308 abinfo.fragsize =(s->fragsize*dma->outchannels)>>dma->formatshift;
1309 abinfo.bytes = (count*dma->outchannels)>>dma->formatshift;
1310 abinfo.fragstotal = 2;
1311 abinfo.fragments = (count > s->fragsize);
1312
1313 return copy_to_user(argp, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1314
1315 case SNDCTL_DSP_GETISPACE:
1316 if (!(file->f_mode & FMODE_READ))
1317 return -EINVAL;
1318
1319 val = rme96xx_gethwptr(dma->s,0);
1320
1321 count = rme96xx_getispace(dma,val);
1322
1323 abinfo.fragsize = (s->fragsize*dma->inchannels)>>dma->formatshift;
1324 abinfo.bytes = (count*dma->inchannels)>>dma->formatshift;
1325 abinfo.fragstotal = 2;
1326 abinfo.fragments = count > s->fragsize;
1327 return copy_to_user(argp, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1328
1329 case SNDCTL_DSP_NONBLOCK:
1330 file->f_flags |= O_NONBLOCK;
1331 return 0;
1332
1333 case SNDCTL_DSP_GETODELAY: /* What should this exactly do ? ,
1334 ATM it is just abinfo.bytes */
1335 if (!(file->f_mode & FMODE_WRITE))
1336 return -EINVAL;
1337
1338 val = rme96xx_gethwptr(dma->s,0);
1339 count = val - dma->readptr;
1340 if (count < 0)
1341 count += s->fragsize<<1;
1342
1343 return put_user(count, p);
1344
1345
1346 /* check out how to use mmaped mode (can only be blocked !!!) */
1347 case SNDCTL_DSP_GETIPTR:
1348 if (!(file->f_mode & FMODE_READ))
1349 return -EINVAL;
1350 val = rme96xx_gethwptr(dma->s,0);
1351 spin_lock_irqsave(&s->lock,flags);
1352 cinfo.bytes = s->fragsize<<1;
1353 count = val - dma->readptr;
1354 if (count < 0)
1355 count += s->fragsize<<1;
1356
1357 cinfo.blocks = (count > s->fragsize);
1358 cinfo.ptr = val;
1359 if (dma->mmapped)
1360 dma->readptr &= s->fragsize<<1;
1361 spin_unlock_irqrestore(&s->lock,flags);
1362
1363 if (copy_to_user(argp, &cinfo, sizeof(cinfo)))
1364 return -EFAULT;
1365 return 0;
1366
1367 case SNDCTL_DSP_GETOPTR:
1368 if (!(file->f_mode & FMODE_READ))
1369 return -EINVAL;
1370 val = rme96xx_gethwptr(dma->s,0);
1371 spin_lock_irqsave(&s->lock,flags);
1372 cinfo.bytes = s->fragsize<<1;
1373 count = val - dma->writeptr;
1374 if (count < 0)
1375 count += s->fragsize<<1;
1376
1377 cinfo.blocks = (count > s->fragsize);
1378 cinfo.ptr = val;
1379 if (dma->mmapped)
1380 dma->writeptr &= s->fragsize<<1;
1381 spin_unlock_irqrestore(&s->lock,flags);
1382 if (copy_to_user(argp, &cinfo, sizeof(cinfo)))
1383 return -EFAULT;
1384 return 0;
1385 case SNDCTL_DSP_GETBLKSIZE:
1386 return put_user(s->fragsize, p);
1387
1388 case SNDCTL_DSP_SETFRAGMENT:
1389 if (get_user(val, p))
1390 return -EFAULT;
1391 val&=0xffff;
1392 val -= 7;
1393 if (val < 0) val = 0;
1394 if (val > 7) val = 7;
1395 rme96xx_setlatency(s,val);
1396 return 0;
1397
1398 case SNDCTL_DSP_SUBDIVIDE:
1399 #if 0
1400 if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) ||
1401 (file->f_mode & FMODE_WRITE && s->dma_dac2.subdivision))
1402 return -EINVAL;
1403 if (get_user(val, p))
1404 return -EFAULT;
1405 if (val != 1 && val != 2 && val != 4)
1406 return -EINVAL;
1407 if (file->f_mode & FMODE_READ)
1408 s->dma_adc.subdivision = val;
1409 if (file->f_mode & FMODE_WRITE)
1410 s->dma_dac2.subdivision = val;
1411 #endif
1412 return 0;
1413
1414 case SOUND_PCM_READ_RATE:
1415 /* HP20020201 */
1416 s->rate = rme96xx_get_sample_rate_status(s);
1417 return put_user(s->rate, p);
1418
1419 case SOUND_PCM_READ_CHANNELS:
1420 return put_user(dma->outchannels, p);
1421
1422 case SOUND_PCM_READ_BITS:
1423 switch (dma->format) {
1424 case AFMT_S32_BLOCKED:
1425 val = 32;
1426 break;
1427 case AFMT_S16_LE:
1428 val = 16;
1429 break;
1430 }
1431 return put_user(val, p);
1432
1433 case SOUND_PCM_WRITE_FILTER:
1434 case SNDCTL_DSP_SETSYNCRO:
1435 case SOUND_PCM_READ_FILTER:
1436 return -EINVAL;
1437
1438 }
1439
1440
1441 return -ENODEV;
1442 }
1443
1444
1445
1446 static int rme96xx_open(struct inode *in, struct file *f)
1447 {
1448 int minor = iminor(in);
1449 struct list_head *list;
1450 int devnum;
1451 rme96xx_info *s;
1452 struct dmabuf* dma;
1453 DECLARE_WAITQUEUE(wait, current);
1454
1455 DBG(printk("device num %d open\n",devnum));
1456
1457 nonseekable_open(in, f);
1458 for (list = devs.next; ; list = list->next) {
1459 if (list == &devs)
1460 return -ENODEV;
1461 s = list_entry(list, rme96xx_info, devs);
1462 for (devnum=0; devnum<devices; devnum++)
1463 if (!((s->dspnum[devnum] ^ minor) & ~0xf))
1464 break;
1465 if (devnum<devices)
1466 break;
1467 }
1468 VALIDATE_STATE(s);
1469
1470 dma = &s->dma[devnum];
1471 f->private_data = dma;
1472 /* wait for device to become free */
1473 down(&dma->open_sem);
1474 while (dma->open_mode & f->f_mode) {
1475 if (f->f_flags & O_NONBLOCK) {
1476 up(&dma->open_sem);
1477 return -EBUSY;
1478 }
1479 add_wait_queue(&dma->open_wait, &wait);
1480 __set_current_state(TASK_INTERRUPTIBLE);
1481 up(&dma->open_sem);
1482 schedule();
1483 remove_wait_queue(&dma->open_wait, &wait);
1484 set_current_state(TASK_RUNNING);
1485 if (signal_pending(current))
1486 return -ERESTARTSYS;
1487 down(&dma->open_sem);
1488 }
1489
1490 COMM ("hardware open")
1491
1492 if (!dma->opened) rme96xx_dmabuf_init(dma->s,dma,dma->inoffset,dma->outoffset);
1493
1494 dma->open_mode |= (f->f_mode & (FMODE_READ | FMODE_WRITE));
1495 dma->opened = 1;
1496 up(&dma->open_sem);
1497
1498 DBG(printk("device num %d open finished\n",devnum));
1499 return 0;
1500 }
1501
1502 static int rme96xx_release(struct inode *in, struct file *file)
1503 {
1504 struct dmabuf * dma = (struct dmabuf*) file->private_data;
1505 /* int hwp; ... was unused HP20020201 */
1506 DBG(printk("%s\n", __FUNCTION__));
1507
1508 COMM ("draining")
1509 if (dma->open_mode & FMODE_WRITE) {
1510 #if 0 /* Why doesn't this work with some cards ?? */
1511 hwp = rme96xx_gethwptr(dma->s,0);
1512 while (rme96xx_getospace(dma,hwp)) {
1513 interruptible_sleep_on(&(dma->wait));
1514 hwp = rme96xx_gethwptr(dma->s,0);
1515 }
1516 #endif
1517 rme96xx_clearbufs(dma);
1518 }
1519
1520 dma->open_mode &= (~file->f_mode) & (FMODE_READ|FMODE_WRITE);
1521
1522 if (!(dma->open_mode & (FMODE_READ|FMODE_WRITE))) {
1523 dma->opened = 0;
1524 if (dma->s->started) rme96xx_startcard(dma->s,1);
1525 }
1526
1527 wake_up(&dma->open_wait);
1528 up(&dma->open_sem);
1529
1530 return 0;
1531 }
1532
1533
1534 static ssize_t rme96xx_write(struct file *file, const char __user *buffer, size_t count, loff_t *ppos)
1535 {
1536 struct dmabuf *dma = (struct dmabuf *)file->private_data;
1537 ssize_t ret = 0;
1538 int cnt; /* number of bytes from "buffer" that will/can be used */
1539 int hop = count/dma->outchannels;
1540 int hwp;
1541 int exact = (file->f_flags & O_NONBLOCK);
1542
1543
1544 if(dma == NULL || (dma->s) == NULL)
1545 return -ENXIO;
1546
1547 if (dma->mmapped || !dma->opened)
1548 return -ENXIO;
1549
1550 if (!access_ok(VERIFY_READ, buffer, count))
1551 return -EFAULT;
1552
1553 if (! (dma->open_mode & FMODE_WRITE))
1554 return -ENXIO;
1555
1556 if (!dma->s->started) rme96xx_startcard(dma->s,exact);
1557 hwp = rme96xx_gethwptr(dma->s,0);
1558
1559 if(!(dma->started)){
1560 COMM ("first write")
1561
1562 dma->readptr = hwp;
1563 dma->writeptr = hwp;
1564 dma->started = 1;
1565 }
1566
1567 while (count > 0) {
1568 cnt = rme96xx_getospace(dma,hwp);
1569 cnt>>=dma->formatshift;
1570 cnt*=dma->outchannels;
1571 if (cnt > count)
1572 cnt = count;
1573
1574 if (cnt != 0) {
1575 if (rme96xx_copyfromuser(dma,buffer,cnt,hop))
1576 return ret ? ret : -EFAULT;
1577 count -= cnt;
1578 buffer += cnt;
1579 ret += cnt;
1580 if (count == 0) return ret;
1581 }
1582 if (file->f_flags & O_NONBLOCK)
1583 return ret ? ret : -EAGAIN;
1584
1585 if ((hwp - dma->writeptr) <= 0) {
1586 interruptible_sleep_on(&(dma->wait));
1587
1588 if (signal_pending(current))
1589 return ret ? ret : -ERESTARTSYS;
1590 }
1591
1592 hwp = rme96xx_gethwptr(dma->s,exact);
1593
1594 }; /* count > 0 */
1595
1596 return ret;
1597 }
1598
1599 static ssize_t rme96xx_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos)
1600 {
1601 struct dmabuf *dma = (struct dmabuf *)file->private_data;
1602 ssize_t ret = 0;
1603 int cnt; /* number of bytes from "buffer" that will/can be used */
1604 int hop = count/dma->inchannels;
1605 int hwp;
1606 int exact = (file->f_flags & O_NONBLOCK);
1607
1608
1609 if(dma == NULL || (dma->s) == NULL)
1610 return -ENXIO;
1611
1612 if (dma->mmapped || !dma->opened)
1613 return -ENXIO;
1614
1615 if (!access_ok(VERIFY_WRITE, buffer, count))
1616 return -EFAULT;
1617
1618 if (! (dma->open_mode & FMODE_READ))
1619 return -ENXIO;
1620
1621 if (!dma->s->started) rme96xx_startcard(dma->s,exact);
1622 hwp = rme96xx_gethwptr(dma->s,0);
1623
1624 if(!(dma->started)){
1625 COMM ("first read")
1626
1627 dma->writeptr = hwp;
1628 dma->readptr = hwp;
1629 dma->started = 1;
1630 }
1631
1632 while (count > 0) {
1633 cnt = rme96xx_getispace(dma,hwp);
1634 cnt>>=dma->formatshift;
1635 cnt*=dma->inchannels;
1636
1637 if (cnt > count)
1638 cnt = count;
1639
1640 if (cnt != 0) {
1641
1642 if (rme96xx_copytouser(dma,buffer,cnt,hop))
1643 return ret ? ret : -EFAULT;
1644
1645 count -= cnt;
1646 buffer += cnt;
1647 ret += cnt;
1648 if (count == 0) return ret;
1649 }
1650 if (file->f_flags & O_NONBLOCK)
1651 return ret ? ret : -EAGAIN;
1652
1653 if ((hwp - dma->readptr) <= 0) {
1654 interruptible_sleep_on(&(dma->wait));
1655
1656 if (signal_pending(current))
1657 return ret ? ret : -ERESTARTSYS;
1658 }
1659 hwp = rme96xx_gethwptr(dma->s,exact);
1660
1661 }; /* count > 0 */
1662
1663 return ret;
1664 }
1665
1666 static int rm96xx_mmap(struct file *file, struct vm_area_struct *vma) {
1667 struct dmabuf *dma = (struct dmabuf *)file->private_data;
1668 rme96xx_info* s = dma->s;
1669 unsigned long size;
1670
1671 VALIDATE_STATE(s);
1672 lock_kernel();
1673
1674 if (vma->vm_pgoff != 0) {
1675 unlock_kernel();
1676 return -EINVAL;
1677 }
1678 size = vma->vm_end - vma->vm_start;
1679 if (size > RME96xx_DMA_MAX_SIZE) {
1680 unlock_kernel();
1681 return -EINVAL;
1682 }
1683
1684
1685 if (vma->vm_flags & VM_WRITE) {
1686 if (!s->started) rme96xx_startcard(s,1);
1687
1688 if (remap_pfn_range(vma, vma->vm_start, virt_to_phys(s->playbuf + dma->outoffset*RME96xx_DMA_MAX_SIZE) >> PAGE_SHIFT, size, vma->vm_page_prot)) {
1689 unlock_kernel();
1690 return -EAGAIN;
1691 }
1692 }
1693 else if (vma->vm_flags & VM_READ) {
1694 if (!s->started) rme96xx_startcard(s,1);
1695 if (remap_pfn_range(vma, vma->vm_start, virt_to_phys(s->playbuf + dma->inoffset*RME96xx_DMA_MAX_SIZE) >> PAGE_SHIFT, size, vma->vm_page_prot)) {
1696 unlock_kernel();
1697 return -EAGAIN;
1698 }
1699 } else {
1700 unlock_kernel();
1701 return -EINVAL;
1702 }
1703
1704
1705 /* this is the mapping */
1706 vma->vm_flags &= ~VM_IO;
1707 dma->mmapped = 1;
1708 unlock_kernel();
1709 return 0;
1710 }
1711
1712 static unsigned int rme96xx_poll(struct file *file, struct poll_table_struct *wait)
1713 {
1714 struct dmabuf *dma = (struct dmabuf *)file->private_data;
1715 rme96xx_info* s = dma->s;
1716 unsigned int mask = 0;
1717 unsigned int hwp,cnt;
1718
1719 DBG(printk("rme96xx poll_wait ...\n"));
1720 VALIDATE_STATE(s);
1721
1722 if (!s->started) {
1723 mask |= POLLOUT | POLLWRNORM;
1724 }
1725 poll_wait(file, &dma->wait, wait);
1726
1727 hwp = rme96xx_gethwptr(dma->s,0);
1728
1729 DBG(printk("rme96xx poll: ..cnt %d > %d\n",cnt,s->fragsize));
1730
1731 cnt = rme96xx_getispace(dma,hwp);
1732
1733 if (file->f_mode & FMODE_READ)
1734 if (cnt > 0)
1735 mask |= POLLIN | POLLRDNORM;
1736
1737
1738
1739 cnt = rme96xx_getospace(dma,hwp);
1740
1741 if (file->f_mode & FMODE_WRITE)
1742 if (cnt > 0)
1743 mask |= POLLOUT | POLLWRNORM;
1744
1745
1746 // printk("rme96xx poll_wait ...%d > %d\n",rme96xx_getospace(dma,hwp),rme96xx_getispace(dma,hwp));
1747
1748 return mask;
1749 }
1750
1751
1752 static struct file_operations rme96xx_audio_fops = {
1753 .owner = THIS_MODULE,
1754 .read = rme96xx_read,
1755 .write = rme96xx_write,
1756 .poll = rme96xx_poll,
1757 .ioctl = rme96xx_ioctl,
1758 .mmap = rm96xx_mmap,
1759 .open = rme96xx_open,
1760 .release = rme96xx_release
1761 };
1762
1763 static int rme96xx_mixer_open(struct inode *inode, struct file *file)
1764 {
1765 int minor = iminor(inode);
1766 struct list_head *list;
1767 rme96xx_info *s;
1768
1769 COMM ("mixer open");
1770
1771 nonseekable_open(inode, file);
1772 for (list = devs.next; ; list = list->next) {
1773 if (list == &devs)
1774 return -ENODEV;
1775 s = list_entry(list, rme96xx_info, devs);
1776 if (s->mixer== minor)
1777 break;
1778 }
1779 VALIDATE_STATE(s);
1780 file->private_data = s;
1781
1782 COMM ("mixer opened")
1783 return 0;
1784 }
1785
1786 static int rme96xx_mixer_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1787 {
1788 rme96xx_info *s = (rme96xx_info *)file->private_data;
1789 u32 status;
1790 int spdifrate;
1791 void __user *argp = (void __user *)arg;
1792 int __user *p = argp;
1793
1794 status = readl(s->iobase + RME96xx_status_register);
1795 /* hack to convert rev 1.5 SPDIF rate to "crystalrate" format HP 20020201 */
1796 rme96xx_spdif_sample_rate(s,&spdifrate);
1797 status = (status & ~RME96xx_F) | ((spdifrate<<22) & RME96xx_F);
1798
1799 VALIDATE_STATE(s);
1800 if (cmd == SOUND_MIXER_PRIVATE1) {
1801 rme_mixer mixer;
1802 if (copy_from_user(&mixer,argp,sizeof(mixer)))
1803 return -EFAULT;
1804
1805 mixer.devnr &= RME96xx_MASK_DEVS;
1806 if (mixer.devnr >= devices)
1807 mixer.devnr = devices-1;
1808 if (file->f_mode & FMODE_WRITE && !s->dma[mixer.devnr].opened) {
1809 /* modify only if device not open */
1810 if (mixer.o_offset < 0)
1811 mixer.o_offset = 0;
1812 if (mixer.o_offset >= RME96xx_CHANNELS_PER_CARD)
1813 mixer.o_offset = RME96xx_CHANNELS_PER_CARD-1;
1814 if (mixer.i_offset < 0)
1815 mixer.i_offset = 0;
1816 if (mixer.i_offset >= RME96xx_CHANNELS_PER_CARD)
1817 mixer.i_offset = RME96xx_CHANNELS_PER_CARD-1;
1818 s->dma[mixer.devnr].outoffset = mixer.o_offset;
1819 s->dma[mixer.devnr].inoffset = mixer.i_offset;
1820 }
1821
1822 mixer.o_offset = s->dma[mixer.devnr].outoffset;
1823 mixer.i_offset = s->dma[mixer.devnr].inoffset;
1824
1825 return copy_to_user(argp, &mixer, sizeof(mixer)) ? -EFAULT : 0;
1826 }
1827 if (cmd == SOUND_MIXER_PRIVATE2) {
1828 return put_user(status, p);
1829 }
1830 if (cmd == SOUND_MIXER_PRIVATE3) {
1831 u32 control;
1832 if (copy_from_user(&control,argp,sizeof(control)))
1833 return -EFAULT;
1834 if (file->f_mode & FMODE_WRITE) {
1835 s->control_register &= ~RME96xx_mixer_allowed;
1836 s->control_register |= control & RME96xx_mixer_allowed;
1837 writel(control,s->iobase + RME96xx_control_register);
1838 }
1839
1840 return put_user(s->control_register, p);
1841 }
1842 return -1;
1843 }
1844
1845
1846
1847 static int rme96xx_mixer_release(struct inode *inode, struct file *file)
1848 {
1849 return 0;
1850 }
1851
1852 static /*const*/ struct file_operations rme96xx_mixer_fops = {
1853 .owner = THIS_MODULE,
1854 .ioctl = rme96xx_mixer_ioctl,
1855 .open = rme96xx_mixer_open,
1856 .release = rme96xx_mixer_release,
1857 };
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree