Merge commit 'v3.3-rc1' into stable/for-linus-fixes-3.3
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / rtc / rtc-sa1100.c
blob4595d3e645a7358676b5409b8ced918f306e07c2
1 /*
2 * Real Time Clock interface for StrongARM SA1x00 and XScale PXA2xx
4 * Copyright (c) 2000 Nils Faerber
6 * Based on rtc.c by Paul Gortmaker
8 * Original Driver by Nils Faerber <nils@kernelconcepts.de>
10 * Modifications from:
11 * CIH <cih@coventive.com>
12 * Nicolas Pitre <nico@fluxnic.net>
13 * Andrew Christian <andrew.christian@hp.com>
15 * Converted to the RTC subsystem and Driver Model
16 * by Richard Purdie <rpurdie@rpsys.net>
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License
20 * as published by the Free Software Foundation; either version
21 * 2 of the License, or (at your option) any later version.
24 #include <linux/platform_device.h>
25 #include <linux/module.h>
26 #include <linux/rtc.h>
27 #include <linux/init.h>
28 #include <linux/fs.h>
29 #include <linux/interrupt.h>
30 #include <linux/pm.h>
31 #include <linux/slab.h>
32 #include <linux/clk.h>
33 #include <linux/io.h>
35 #include <mach/hardware.h>
36 #include <asm/irq.h>
38 #define RTC_DEF_DIVIDER (32768 - 1)
39 #define RTC_DEF_TRIM 0
40 #define RTC_FREQ 1024
42 #define RCNR 0x00 /* RTC Count Register */
43 #define RTAR 0x04 /* RTC Alarm Register */
44 #define RTSR 0x08 /* RTC Status Register */
45 #define RTTR 0x0c /* RTC Timer Trim Register */
47 #define RTSR_HZE (1 << 3) /* HZ interrupt enable */
48 #define RTSR_ALE (1 << 2) /* RTC alarm interrupt enable */
49 #define RTSR_HZ (1 << 1) /* HZ rising-edge detected */
50 #define RTSR_AL (1 << 0) /* RTC alarm detected */
52 #define rtc_readl(sa1100_rtc, reg) \
53 readl_relaxed((sa1100_rtc)->base + (reg))
54 #define rtc_writel(sa1100_rtc, reg, value) \
55 writel_relaxed((value), (sa1100_rtc)->base + (reg))
57 struct sa1100_rtc {
58 struct resource *ress;
59 void __iomem *base;
60 struct clk *clk;
61 int irq_1Hz;
62 int irq_Alrm;
63 struct rtc_device *rtc;
64 spinlock_t lock; /* Protects this structure */
67 * Calculate the next alarm time given the requested alarm time mask
68 * and the current time.
70 static void rtc_next_alarm_time(struct rtc_time *next, struct rtc_time *now,
71 struct rtc_time *alrm)
73 unsigned long next_time;
74 unsigned long now_time;
76 next->tm_year = now->tm_year;
77 next->tm_mon = now->tm_mon;
78 next->tm_mday = now->tm_mday;
79 next->tm_hour = alrm->tm_hour;
80 next->tm_min = alrm->tm_min;
81 next->tm_sec = alrm->tm_sec;
83 rtc_tm_to_time(now, &now_time);
84 rtc_tm_to_time(next, &next_time);
86 if (next_time < now_time) {
87 /* Advance one day */
88 next_time += 60 * 60 * 24;
89 rtc_time_to_tm(next_time, next);
93 static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id)
95 struct platform_device *pdev = to_platform_device(dev_id);
96 struct sa1100_rtc *sa1100_rtc = platform_get_drvdata(pdev);
97 unsigned int rtsr;
98 unsigned long events = 0;
100 spin_lock(&sa1100_rtc->lock);
102 /* clear interrupt sources */
103 rtsr = rtc_readl(sa1100_rtc, RTSR);
104 rtc_writel(sa1100_rtc, RTSR, 0);
106 /* Fix for a nasty initialization problem the in SA11xx RTSR register.
107 * See also the comments in sa1100_rtc_probe(). */
108 if (rtsr & (RTSR_ALE | RTSR_HZE)) {
109 /* This is the original code, before there was the if test
110 * above. This code does not clear interrupts that were not
111 * enabled. */
112 rtc_writel(sa1100_rtc, RTSR, (RTSR_AL | RTSR_HZ) & (rtsr >> 2));
113 } else {
114 /* For some reason, it is possible to enter this routine
115 * without interruptions enabled, it has been tested with
116 * several units (Bug in SA11xx chip?).
118 * This situation leads to an infinite "loop" of interrupt
119 * routine calling and as a result the processor seems to
120 * lock on its first call to open(). */
121 rtc_writel(sa1100_rtc, RTSR, (RTSR_AL | RTSR_HZ));
124 /* clear alarm interrupt if it has occurred */
125 if (rtsr & RTSR_AL)
126 rtsr &= ~RTSR_ALE;
127 rtc_writel(sa1100_rtc, RTSR, rtsr & (RTSR_ALE | RTSR_HZE));
129 /* update irq data & counter */
130 if (rtsr & RTSR_AL)
131 events |= RTC_AF | RTC_IRQF;
132 if (rtsr & RTSR_HZ)
133 events |= RTC_UF | RTC_IRQF;
135 rtc_update_irq(sa1100_rtc->rtc, 1, events);
137 spin_unlock(&sa1100_rtc->lock);
139 return IRQ_HANDLED;
142 static int sa1100_rtc_open(struct device *dev)
144 struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
145 int ret;
147 ret = request_irq(sa1100_rtc->irq_1Hz, sa1100_rtc_interrupt,
148 IRQF_DISABLED, "rtc 1Hz", dev);
149 if (ret) {
150 dev_err(dev, "IRQ %d already in use.\n", sa1100_rtc->irq_1Hz);
151 goto fail_ui;
153 ret = request_irq(sa1100_rtc->irq_Alrm, sa1100_rtc_interrupt,
154 IRQF_DISABLED, "rtc Alrm", dev);
155 if (ret) {
156 dev_err(dev, "IRQ %d already in use.\n", sa1100_rtc->irq_Alrm);
157 goto fail_ai;
159 sa1100_rtc->rtc->max_user_freq = RTC_FREQ;
160 rtc_irq_set_freq(sa1100_rtc->rtc, NULL, RTC_FREQ);
162 return 0;
164 fail_ai:
165 free_irq(sa1100_rtc->irq_1Hz, dev);
166 fail_ui:
167 return ret;
170 static void sa1100_rtc_release(struct device *dev)
172 struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
174 spin_lock_irq(&sa1100_rtc->lock);
175 rtc_writel(sa1100_rtc, RTSR, 0);
176 spin_unlock_irq(&sa1100_rtc->lock);
178 free_irq(sa1100_rtc->irq_Alrm, dev);
179 free_irq(sa1100_rtc->irq_1Hz, dev);
182 static int sa1100_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
184 struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
185 unsigned int rtsr;
187 spin_lock_irq(&sa1100_rtc->lock);
189 rtsr = rtc_readl(sa1100_rtc, RTSR);
190 if (enabled)
191 rtsr |= RTSR_ALE;
192 else
193 rtsr &= ~RTSR_ALE;
194 rtc_writel(sa1100_rtc, RTSR, rtsr);
196 spin_unlock_irq(&sa1100_rtc->lock);
197 return 0;
200 static int sa1100_rtc_read_time(struct device *dev, struct rtc_time *tm)
202 struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
204 rtc_time_to_tm(rtc_readl(sa1100_rtc, RCNR), tm);
205 return 0;
208 static int sa1100_rtc_set_time(struct device *dev, struct rtc_time *tm)
210 struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
211 unsigned long time;
212 int ret;
214 ret = rtc_tm_to_time(tm, &time);
215 if (ret == 0)
216 rtc_writel(sa1100_rtc, RCNR, time);
217 return ret;
220 static int sa1100_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
222 struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
223 unsigned long time;
224 unsigned int rtsr;
226 time = rtc_readl(sa1100_rtc, RCNR);
227 rtc_time_to_tm(time, &alrm->time);
228 rtsr = rtc_readl(sa1100_rtc, RTSR);
229 alrm->enabled = (rtsr & RTSR_ALE) ? 1 : 0;
230 alrm->pending = (rtsr & RTSR_AL) ? 1 : 0;
231 return 0;
234 static int sa1100_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
236 struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
237 struct rtc_time now_tm, alarm_tm;
238 unsigned long time, alarm;
239 unsigned int rtsr;
241 spin_lock_irq(&sa1100_rtc->lock);
243 time = rtc_readl(sa1100_rtc, RCNR);
244 rtc_time_to_tm(time, &now_tm);
245 rtc_next_alarm_time(&alarm_tm, &now_tm, &alrm->time);
246 rtc_tm_to_time(&alarm_tm, &alarm);
247 rtc_writel(sa1100_rtc, RTAR, alarm);
249 rtsr = rtc_readl(sa1100_rtc, RTSR);
250 if (alrm->enabled)
251 rtsr |= RTSR_ALE;
252 else
253 rtsr &= ~RTSR_ALE;
254 rtc_writel(sa1100_rtc, RTSR, rtsr);
256 spin_unlock_irq(&sa1100_rtc->lock);
258 return 0;
261 static int sa1100_rtc_proc(struct device *dev, struct seq_file *seq)
263 struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
265 seq_printf(seq, "trim/divider\t\t: 0x%08x\n",
266 rtc_readl(sa1100_rtc, RTTR));
267 seq_printf(seq, "RTSR\t\t\t: 0x%08x\n",
268 rtc_readl(sa1100_rtc, RTSR));
269 return 0;
272 static const struct rtc_class_ops sa1100_rtc_ops = {
273 .open = sa1100_rtc_open,
274 .release = sa1100_rtc_release,
275 .read_time = sa1100_rtc_read_time,
276 .set_time = sa1100_rtc_set_time,
277 .read_alarm = sa1100_rtc_read_alarm,
278 .set_alarm = sa1100_rtc_set_alarm,
279 .proc = sa1100_rtc_proc,
280 .alarm_irq_enable = sa1100_rtc_alarm_irq_enable,
283 static int sa1100_rtc_probe(struct platform_device *pdev)
285 struct sa1100_rtc *sa1100_rtc;
286 unsigned int rttr;
287 int ret;
289 sa1100_rtc = kzalloc(sizeof(struct sa1100_rtc), GFP_KERNEL);
290 if (!sa1100_rtc)
291 return -ENOMEM;
293 spin_lock_init(&sa1100_rtc->lock);
294 platform_set_drvdata(pdev, sa1100_rtc);
296 ret = -ENXIO;
297 sa1100_rtc->ress = platform_get_resource(pdev, IORESOURCE_MEM, 0);
298 if (!sa1100_rtc->ress) {
299 dev_err(&pdev->dev, "No I/O memory resource defined\n");
300 goto err_ress;
303 sa1100_rtc->irq_1Hz = platform_get_irq(pdev, 0);
304 if (sa1100_rtc->irq_1Hz < 0) {
305 dev_err(&pdev->dev, "No 1Hz IRQ resource defined\n");
306 goto err_ress;
308 sa1100_rtc->irq_Alrm = platform_get_irq(pdev, 1);
309 if (sa1100_rtc->irq_Alrm < 0) {
310 dev_err(&pdev->dev, "No alarm IRQ resource defined\n");
311 goto err_ress;
314 ret = -ENOMEM;
315 sa1100_rtc->base = ioremap(sa1100_rtc->ress->start,
316 resource_size(sa1100_rtc->ress));
317 if (!sa1100_rtc->base) {
318 dev_err(&pdev->dev, "Unable to map pxa RTC I/O memory\n");
319 goto err_map;
322 sa1100_rtc->clk = clk_get(&pdev->dev, NULL);
323 if (IS_ERR(sa1100_rtc->clk)) {
324 dev_err(&pdev->dev, "failed to find rtc clock source\n");
325 ret = PTR_ERR(sa1100_rtc->clk);
326 goto err_clk;
328 clk_prepare(sa1100_rtc->clk);
329 clk_enable(sa1100_rtc->clk);
332 * According to the manual we should be able to let RTTR be zero
333 * and then a default diviser for a 32.768KHz clock is used.
334 * Apparently this doesn't work, at least for my SA1110 rev 5.
335 * If the clock divider is uninitialized then reset it to the
336 * default value to get the 1Hz clock.
338 if (rtc_readl(sa1100_rtc, RTTR) == 0) {
339 rttr = RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16);
340 rtc_writel(sa1100_rtc, RTTR, rttr);
341 dev_warn(&pdev->dev, "warning: initializing default clock"
342 " divider/trim value\n");
343 /* The current RTC value probably doesn't make sense either */
344 rtc_writel(sa1100_rtc, RCNR, 0);
347 device_init_wakeup(&pdev->dev, 1);
349 sa1100_rtc->rtc = rtc_device_register(pdev->name, &pdev->dev,
350 &sa1100_rtc_ops, THIS_MODULE);
351 if (IS_ERR(sa1100_rtc->rtc)) {
352 dev_err(&pdev->dev, "Failed to register RTC device -> %d\n",
353 ret);
354 goto err_rtc_reg;
356 /* Fix for a nasty initialization problem the in SA11xx RTSR register.
357 * See also the comments in sa1100_rtc_interrupt().
359 * Sometimes bit 1 of the RTSR (RTSR_HZ) will wake up 1, which means an
360 * interrupt pending, even though interrupts were never enabled.
361 * In this case, this bit it must be reset before enabling
362 * interruptions to avoid a nonexistent interrupt to occur.
364 * In principle, the same problem would apply to bit 0, although it has
365 * never been observed to happen.
367 * This issue is addressed both here and in sa1100_rtc_interrupt().
368 * If the issue is not addressed here, in the times when the processor
369 * wakes up with the bit set there will be one spurious interrupt.
371 * The issue is also dealt with in sa1100_rtc_interrupt() to be on the
372 * safe side, once the condition that lead to this strange
373 * initialization is unknown and could in principle happen during
374 * normal processing.
376 * Notice that clearing bit 1 and 0 is accomplished by writting ONES to
377 * the corresponding bits in RTSR. */
378 rtc_writel(sa1100_rtc, RTSR, (RTSR_AL | RTSR_HZ));
380 return 0;
382 err_rtc_reg:
383 err_clk:
384 iounmap(sa1100_rtc->base);
385 err_ress:
386 err_map:
387 kfree(sa1100_rtc);
388 return ret;
391 static int sa1100_rtc_remove(struct platform_device *pdev)
393 struct sa1100_rtc *sa1100_rtc = platform_get_drvdata(pdev);
395 rtc_device_unregister(sa1100_rtc->rtc);
396 clk_disable(sa1100_rtc->clk);
397 clk_unprepare(sa1100_rtc->clk);
398 iounmap(sa1100_rtc->base);
399 return 0;
402 #ifdef CONFIG_PM
403 static int sa1100_rtc_suspend(struct device *dev)
405 struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
407 if (device_may_wakeup(dev))
408 enable_irq_wake(sa1100_rtc->irq_Alrm);
409 return 0;
412 static int sa1100_rtc_resume(struct device *dev)
414 struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev);
416 if (device_may_wakeup(dev))
417 disable_irq_wake(sa1100_rtc->irq_Alrm);
418 return 0;
421 static const struct dev_pm_ops sa1100_rtc_pm_ops = {
422 .suspend = sa1100_rtc_suspend,
423 .resume = sa1100_rtc_resume,
425 #endif
427 static struct platform_driver sa1100_rtc_driver = {
428 .probe = sa1100_rtc_probe,
429 .remove = sa1100_rtc_remove,
430 .driver = {
431 .name = "sa1100-rtc",
432 #ifdef CONFIG_PM
433 .pm = &sa1100_rtc_pm_ops,
434 #endif
438 module_platform_driver(sa1100_rtc_driver);
440 MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>");
441 MODULE_DESCRIPTION("SA11x0/PXA2xx Realtime Clock Driver (RTC)");
442 MODULE_LICENSE("GPL");
443 MODULE_ALIAS("platform:sa1100-rtc");