score: Add support for Sunplus S+core architecture
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / score / kernel / irq.c
blob55474e8e97258dc9dda1afe7bacbb1a38a10a2f1
1 /*
2 * arch/score/kernel/irq.c
4 * Score Processor version.
6 * Copyright (C) 2009 Sunplus Core Technology Co., Ltd.
7 * Chen Liqin <liqin.chen@sunplusct.com>
8 * Lennox Wu <lennox.wu@sunplusct.com>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, see the file COPYING, or write
22 * to the Free Software Foundation, Inc.,
23 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
26 #include <linux/interrupt.h>
27 #include <linux/kernel_stat.h>
28 #include <linux/seq_file.h>
30 #include <asm/io.h>
33 * handles all normal device IRQs
35 asmlinkage void do_IRQ(int irq)
37 irq_enter();
38 generic_handle_irq(irq);
39 irq_exit();
42 static void score_mask(unsigned int irq_nr)
44 unsigned int irq_source = 63 - irq_nr;
46 if (irq_source < 32)
47 __raw_writel((__raw_readl((void *)P_INT_MASKL) | \
48 (1 << irq_source)), (void *)P_INT_MASKL);
49 else
50 __raw_writel((__raw_readl((void *)P_INT_MASKH) | \
51 (1 << (irq_source - 32))), (void *)P_INT_MASKH);
54 static void score_unmask(unsigned int irq_nr)
56 unsigned int irq_source = 63 - irq_nr;
58 if (irq_source < 32)
59 __raw_writel((__raw_readl((void *)P_INT_MASKL) & \
60 ~(1 << irq_source)), (void *)P_INT_MASKL);
61 else
62 __raw_writel((__raw_readl((void *)P_INT_MASKH) & \
63 ~(1 << (irq_source - 32))), (void *)P_INT_MASKH);
66 struct irq_chip score_irq_chip = {
67 .name = "Score7-level",
68 .mask = score_mask,
69 .mask_ack = score_mask,
70 .unmask = score_unmask,
74 * initialise the interrupt system
76 void __init init_IRQ(void)
78 int index;
79 unsigned long target_addr;
81 for (index = 0; index < NR_IRQS; ++index)
82 set_irq_chip_and_handler(index, &score_irq_chip,
83 handle_level_irq);
85 for (target_addr = IRQ_VECTOR_BASE_ADDR;
86 target_addr <= IRQ_VECTOR_END_ADDR;
87 target_addr += IRQ_VECTOR_SIZE)
88 memcpy((void *)target_addr, \
89 interrupt_exception_vector, IRQ_VECTOR_SIZE);
91 __raw_writel(0xffffffff, (void *)P_INT_MASKL);
92 __raw_writel(0xffffffff, (void *)P_INT_MASKH);
94 __asm__ __volatile__(
95 "mtcr %0, cr3\n\t"
96 : : "r" (EXCEPTION_VECTOR_BASE_ADDR | \
97 VECTOR_ADDRESS_OFFSET_MODE16));
101 * Generic, controller-independent functions:
103 int show_interrupts(struct seq_file *p, void *v)
105 int i = *(loff_t *)v, cpu;
106 struct irqaction *action;
107 unsigned long flags;
109 if (i == 0) {
110 seq_puts(p, " ");
111 for_each_online_cpu(cpu)
112 seq_printf(p, "CPU%d ", cpu);
113 seq_putc(p, '\n');
116 if (i < NR_IRQS) {
117 spin_lock_irqsave(&irq_desc[i].lock, flags);
118 action = irq_desc[i].action;
119 if (!action)
120 goto unlock;
122 seq_printf(p, "%3d: ", i);
123 seq_printf(p, "%10u ", kstat_irqs(i));
124 seq_printf(p, " %8s", irq_desc[i].chip->name ? : "-");
125 seq_printf(p, " %s", action->name);
126 for (action = action->next; action; action = action->next)
127 seq_printf(p, ", %s", action->name);
129 seq_putc(p, '\n');
130 unlock:
131 spin_unlock_irqrestore(&irq_desc[i].lock, flags);
134 return 0;