include/asm-sh/mmu_context.h

   1 /*
   2  * Copyright (C) 1999 Niibe Yutaka
   3  * Copyright (C) 2003 - 2006 Paul Mundt
   4  *
   5  * ASID handling idea taken from MIPS implementation.
   6  */
   7 #ifndef __ASM_SH_MMU_CONTEXT_H
   8 #define __ASM_SH_MMU_CONTEXT_H
   9 #ifdef __KERNEL__
  10
  11 #include <asm/cpu/mmu_context.h>
  12 #include <asm/tlbflush.h>
  13 #include <asm/uaccess.h>
  14 #include <asm/io.h>
  15
  16 /*
  17  * The MMU "context" consists of two things:
  18  *    (a) TLB cache version (or round, cycle whatever expression you like)
  19  *    (b) ASID (Address Space IDentifier)
  20  */
  21
  22 #define MMU_CONTEXT_ASID_MASK           0x000000ff
  23 #define MMU_CONTEXT_VERSION_MASK        0xffffff00
  24 #define MMU_CONTEXT_FIRST_VERSION       0x00000100
  25 #define NO_CONTEXT                      0
  26
  27 /* ASID is 8-bit value, so it can't be 0x100 */
  28 #define MMU_NO_ASID                     0x100
  29
  30 #define cpu_context(cpu, mm)    ((mm)->context.id[cpu])
  31 #define cpu_asid(cpu, mm)       (cpu_context((cpu), (mm)) & \
  32                                  MMU_CONTEXT_ASID_MASK)
  33 #define asid_cache(cpu)         (cpu_data[cpu].asid_cache)
  34
  35 /*
  36  * Virtual Page Number mask
  37  */
  38 #define MMU_VPN_MASK    0xfffff000
  39
  40 #ifdef CONFIG_MMU
  41 /*
  42  * Get MMU context if needed.
  43  */
  44 static inline void get_mmu_context(struct mm_struct *mm, unsigned int cpu)
  45 {
  46         unsigned long asid = asid_cache(cpu);
  47
  48         /* Check if we have old version of context. */
  49         if (((cpu_context(cpu, mm) ^ asid) & MMU_CONTEXT_VERSION_MASK) == 0)
  50                 /* It's up to date, do nothing */
  51                 return;
  52
  53         /* It's old, we need to get new context with new version. */
  54         if (!(++asid & MMU_CONTEXT_ASID_MASK)) {
  55                 /*
  56                  * We exhaust ASID of this version.
  57                  * Flush all TLB and start new cycle.
  58                  */
  59                 flush_tlb_all();
  60
  61                 /*
  62                  * Fix version; Note that we avoid version #0
  63                  * to distingush NO_CONTEXT.
  64                  */
  65                 if (!asid)
  66                         asid = MMU_CONTEXT_FIRST_VERSION;
  67         }
  68
  69         cpu_context(cpu, mm) = asid_cache(cpu) = asid;
  70 }
  71
  72 /*
  73  * Initialize the context related info for a new mm_struct
  74  * instance.
  75  */
  76 static inline int init_new_context(struct task_struct *tsk,
  77                                    struct mm_struct *mm)
  78 {
  79         int i;
  80
  81         for (i = 0; i < num_online_cpus(); i++)
  82                 cpu_context(i, mm) = NO_CONTEXT;
  83
  84         return 0;
  85 }
  86
  87 /*
  88  * Destroy context related info for an mm_struct that is about
  89  * to be put to rest.
  90  */
  91 static inline void destroy_context(struct mm_struct *mm)
  92 {
  93         /* Do nothing */
  94 }
  95
  96 static inline void set_asid(unsigned long asid)
  97 {
  98         unsigned long __dummy;
  99
 100         __asm__ __volatile__ ("mov.l    %2, %0\n\t"
 101                               "and      %3, %0\n\t"
 102                               "or       %1, %0\n\t"
 103                               "mov.l    %0, %2"
 104                               : "=&r" (__dummy)
 105                               : "r" (asid), "m" (__m(MMU_PTEH)),
 106                                 "r" (0xffffff00));
 107 }
 108
 109 static inline unsigned long get_asid(void)
 110 {
 111         unsigned long asid;
 112
 113         __asm__ __volatile__ ("mov.l    %1, %0"
 114                               : "=r" (asid)
 115                               : "m" (__m(MMU_PTEH)));
 116         asid &= MMU_CONTEXT_ASID_MASK;
 117         return asid;
 118 }
 119
 120 /*
 121  * After we have set current->mm to a new value, this activates
 122  * the context for the new mm so we see the new mappings.
 123  */
 124 static inline void activate_context(struct mm_struct *mm, unsigned int cpu)
 125 {
 126         get_mmu_context(mm, cpu);
 127         set_asid(cpu_asid(cpu, mm));
 128 }
 129
 130 /* MMU_TTB is used for optimizing the fault handling. */
 131 static inline void set_TTB(pgd_t *pgd)
 132 {
 133         ctrl_outl((unsigned long)pgd, MMU_TTB);
 134 }
 135
 136 static inline pgd_t *get_TTB(void)
 137 {
 138         return (pgd_t *)ctrl_inl(MMU_TTB);
 139 }
 140
 141 static inline void switch_mm(struct mm_struct *prev,
 142                              struct mm_struct *next,
 143                              struct task_struct *tsk)
 144 {
 145         unsigned int cpu = smp_processor_id();
 146
 147         if (likely(prev != next)) {
 148                 cpu_set(cpu, next->cpu_vm_mask);
 149                 set_TTB(next->pgd);
 150                 activate_context(next, cpu);
 151         } else
 152                 if (!cpu_test_and_set(cpu, next->cpu_vm_mask))
 153                         activate_context(next, cpu);
 154 }
 155
 156 #define deactivate_mm(tsk,mm)   do { } while (0)
 157
 158 #define activate_mm(prev, next) \
 159         switch_mm((prev),(next),NULL)
 160
 161 static inline void
 162 enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
 163 {
 164 }
 165 #else /* !CONFIG_MMU */
 166 #define get_mmu_context(mm)             do { } while (0)
 167 #define init_new_context(tsk,mm)        (0)
 168 #define destroy_context(mm)             do { } while (0)
 169 #define set_asid(asid)                  do { } while (0)
 170 #define get_asid()                      (0)
 171 #define activate_context(mm,cpu)        do { } while (0)
 172 #define switch_mm(prev,next,tsk)        do { } while (0)
 173 #define deactivate_mm(tsk,mm)           do { } while (0)
 174 #define activate_mm(prev,next)          do { } while (0)
 175 #define enter_lazy_tlb(mm,tsk)          do { } while (0)
 176 #endif /* CONFIG_MMU */
 177
 178 #if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4)
 179 /*
 180  * If this processor has an MMU, we need methods to turn it off/on ..
 181  * paging_init() will also have to be updated for the processor in
 182  * question.
 183  */
 184 static inline void enable_mmu(void)
 185 {
 186         unsigned int cpu = smp_processor_id();
 187
 188         /* Enable MMU */
 189         ctrl_outl(MMU_CONTROL_INIT, MMUCR);
 190         ctrl_barrier();
 191
 192         if (asid_cache(cpu) == NO_CONTEXT)
 193                 asid_cache(cpu) = MMU_CONTEXT_FIRST_VERSION;
 194
 195         set_asid(asid_cache(cpu) & MMU_CONTEXT_ASID_MASK);
 196 }
 197
 198 static inline void disable_mmu(void)
 199 {
 200         unsigned long cr;
 201
 202         cr = ctrl_inl(MMUCR);
 203         cr &= ~MMU_CONTROL_INIT;
 204         ctrl_outl(cr, MMUCR);
 205
 206         ctrl_barrier();
 207 }
 208 #else
 209 /*
 210  * MMU control handlers for processors lacking memory
 211  * management hardware.
 212  */
 213 #define enable_mmu()    do { BUG(); } while (0)
 214 #define disable_mmu()   do { BUG(); } while (0)
 215 #endif
 216
 217 #endif /* __KERNEL__ */
 218 #endif /* __ASM_SH_MMU_CONTEXT_H */