[PATCH] i386: clockevents fix breakage on Geode/Cyrix PIT implementations
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / include / asm-sh / cache.h
blob9a3cb6ba9d156622d0738be6fd18ba224de9cf4c
1 /* $Id: cache.h,v 1.6 2004/03/11 18:08:05 lethal Exp $
3 * include/asm-sh/cache.h
5 * Copyright 1999 (C) Niibe Yutaka
6 * Copyright 2002, 2003 (C) Paul Mundt
7 */
8 #ifndef __ASM_SH_CACHE_H
9 #define __ASM_SH_CACHE_H
10 #ifdef __KERNEL__
12 #include <asm/cpu/cache.h>
14 #define SH_CACHE_VALID 1
15 #define SH_CACHE_UPDATED 2
16 #define SH_CACHE_COMBINED 4
17 #define SH_CACHE_ASSOC 8
19 #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
20 #define SMP_CACHE_BYTES L1_CACHE_BYTES
22 #define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1))
24 #ifndef __ASSEMBLY__
25 struct cache_info {
26 unsigned int ways; /* Number of cache ways */
27 unsigned int sets; /* Number of cache sets */
28 unsigned int linesz; /* Cache line size (bytes) */
30 unsigned int way_size; /* sets * line size */
33 * way_incr is the address offset for accessing the next way
34 * in memory mapped cache array ops.
36 unsigned int way_incr;
37 unsigned int entry_shift;
38 unsigned int entry_mask;
41 * Compute a mask which selects the address bits which overlap between
42 * 1. those used to select the cache set during indexing
43 * 2. those in the physical page number.
45 unsigned int alias_mask;
47 unsigned int n_aliases; /* Number of aliases */
49 unsigned long flags;
51 #endif /* __ASSEMBLY__ */
52 #endif /* __KERNEL__ */
53 #endif /* __ASM_SH_CACHE_H */