2 * pata_sis.c - SiS ATA driver
4 * (C) 2005 Red Hat <alan@redhat.com>
6 * Based upon linux/drivers/ide/pci/sis5513.c
7 * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org>
8 * Copyright (C) 2002 Lionel Bouton <Lionel.Bouton@inet6.fr>, Maintainer
9 * Copyright (C) 2003 Vojtech Pavlik <vojtech@suse.cz>
10 * SiS Taiwan : for direct support and hardware.
11 * Daniela Engert : for initial ATA100 advices and numerous others.
12 * John Fremlin, Manfred Spraul, Dave Morgan, Peter Kjellerstedt :
13 * for checking code correctness, providing patches.
14 * Original tests and design on the SiS620 chipset.
15 * ATA100 tests and design on the SiS735 chipset.
16 * ATA16/33 support from specs
17 * ATA133 support for SiS961/962 by L.C. Chang <lcchang@sis.com.tw>
21 * Check MWDMA on drives that don't support MWDMA speed pio cycles ?
25 #include <linux/kernel.h>
26 #include <linux/module.h>
27 #include <linux/pci.h>
28 #include <linux/init.h>
29 #include <linux/blkdev.h>
30 #include <linux/delay.h>
31 #include <linux/device.h>
32 #include <scsi/scsi_host.h>
33 #include <linux/libata.h>
34 #include <linux/ata.h>
37 #define DRV_NAME "pata_sis"
38 #define DRV_VERSION "0.5.1"
41 u16 device
; /* PCI host ID */
42 const struct ata_port_info
*info
; /* Info block */
43 /* Probably add family, cable detect type etc here to clean
53 static const struct sis_laptop sis_laptop
[] = {
54 /* devid, subvendor, subdev */
55 { 0x5513, 0x1043, 0x1107 }, /* ASUS A6K */
60 static int sis_short_ata40(struct pci_dev
*dev
)
62 const struct sis_laptop
*lap
= &sis_laptop
[0];
65 if (lap
->device
== dev
->device
&&
66 lap
->subvendor
== dev
->subsystem_vendor
&&
67 lap
->subdevice
== dev
->subsystem_device
)
76 * sis_old_port_base - return PCI configuration base for dev
79 * Returns the base of the PCI configuration registers for this port
83 static int sis_old_port_base(struct ata_device
*adev
)
85 return 0x40 + (4 * adev
->ap
->port_no
) + (2 * adev
->devno
);
89 * sis_133_cable_detect - check for 40/80 pin
91 * @deadline: deadline jiffies for the operation
93 * Perform cable detection for the later UDMA133 capable
97 static int sis_133_cable_detect(struct ata_port
*ap
)
99 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
102 /* The top bit of this register is the cable detect bit */
103 pci_read_config_word(pdev
, 0x50 + 2 * ap
->port_no
, &tmp
);
104 if ((tmp
& 0x8000) && !sis_short_ata40(pdev
))
105 return ATA_CBL_PATA40
;
106 return ATA_CBL_PATA80
;
110 * sis_66_cable_detect - check for 40/80 pin
112 * @deadline: deadline jiffies for the operation
114 * Perform cable detection on the UDMA66, UDMA100 and early UDMA133
115 * SiS IDE controllers.
118 static int sis_66_cable_detect(struct ata_port
*ap
)
120 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
123 /* Older chips keep cable detect in bits 4/5 of reg 0x48 */
124 pci_read_config_byte(pdev
, 0x48, &tmp
);
126 if ((tmp
& 0x10) && !sis_short_ata40(pdev
))
127 return ATA_CBL_PATA40
;
128 return ATA_CBL_PATA80
;
133 * sis_pre_reset - probe begin
135 * @deadline: deadline jiffies for the operation
137 * Set up cable type and use generic probe init
140 static int sis_pre_reset(struct ata_port
*ap
, unsigned long deadline
)
142 static const struct pci_bits sis_enable_bits
[] = {
143 { 0x4aU
, 1U, 0x02UL
, 0x02UL
}, /* port 0 */
144 { 0x4aU
, 1U, 0x04UL
, 0x04UL
}, /* port 1 */
147 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
149 if (!pci_test_config_bits(pdev
, &sis_enable_bits
[ap
->port_no
]))
152 /* Clear the FIFO settings. We can't enable the FIFO until
153 we know we are poking at a disk */
154 pci_write_config_byte(pdev
, 0x4B, 0);
155 return ata_std_prereset(ap
, deadline
);
160 * sis_error_handler - Probe specified port on PATA host controller
164 * None (inherited from caller).
167 static void sis_error_handler(struct ata_port
*ap
)
169 ata_bmdma_drive_eh(ap
, sis_pre_reset
, ata_std_softreset
, NULL
, ata_std_postreset
);
173 * sis_set_fifo - Set RWP fifo bits for this device
177 * SIS chipsets implement prefetch/postwrite bits for each device
178 * on both channels. This functionality is not ATAPI compatible and
179 * must be configured according to the class of device present
182 static void sis_set_fifo(struct ata_port
*ap
, struct ata_device
*adev
)
184 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
188 mask
<<= (2 * ap
->port_no
);
189 mask
<<= adev
->devno
;
191 /* This holds various bits including the FIFO control */
192 pci_read_config_byte(pdev
, 0x4B, &fifoctrl
);
195 /* Enable for ATA (disk) only */
196 if (adev
->class == ATA_DEV_ATA
)
198 pci_write_config_byte(pdev
, 0x4B, fifoctrl
);
202 * sis_old_set_piomode - Initialize host controller PATA PIO timings
203 * @ap: Port whose timings we are configuring
204 * @adev: Device we are configuring for.
206 * Set PIO mode for device, in host controller PCI config space. This
207 * function handles PIO set up for all chips that are pre ATA100 and
208 * also early ATA100 devices.
211 * None (inherited from caller).
214 static void sis_old_set_piomode (struct ata_port
*ap
, struct ata_device
*adev
)
216 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
217 int port
= sis_old_port_base(adev
);
219 int speed
= adev
->pio_mode
- XFER_PIO_0
;
221 const u8 active
[] = { 0x00, 0x07, 0x04, 0x03, 0x01 };
222 const u8 recovery
[] = { 0x00, 0x06, 0x04, 0x03, 0x03 };
224 sis_set_fifo(ap
, adev
);
226 pci_read_config_byte(pdev
, port
, &t1
);
227 pci_read_config_byte(pdev
, port
+ 1, &t2
);
229 t1
&= ~0x0F; /* Clear active/recovery timings */
233 t2
|= recovery
[speed
];
235 pci_write_config_byte(pdev
, port
, t1
);
236 pci_write_config_byte(pdev
, port
+ 1, t2
);
240 * sis_100_set_pioode - Initialize host controller PATA PIO timings
241 * @ap: Port whose timings we are configuring
242 * @adev: Device we are configuring for.
244 * Set PIO mode for device, in host controller PCI config space. This
245 * function handles PIO set up for ATA100 devices and early ATA133.
248 * None (inherited from caller).
251 static void sis_100_set_piomode (struct ata_port
*ap
, struct ata_device
*adev
)
253 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
254 int port
= sis_old_port_base(adev
);
255 int speed
= adev
->pio_mode
- XFER_PIO_0
;
257 const u8 actrec
[] = { 0x00, 0x67, 0x44, 0x33, 0x31 };
259 sis_set_fifo(ap
, adev
);
261 pci_write_config_byte(pdev
, port
, actrec
[speed
]);
265 * sis_133_set_pioode - Initialize host controller PATA PIO timings
266 * @ap: Port whose timings we are configuring
267 * @adev: Device we are configuring for.
269 * Set PIO mode for device, in host controller PCI config space. This
270 * function handles PIO set up for the later ATA133 devices.
273 * None (inherited from caller).
276 static void sis_133_set_piomode (struct ata_port
*ap
, struct ata_device
*adev
)
278 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
282 int speed
= adev
->pio_mode
- XFER_PIO_0
;
284 const u32 timing133
[] = {
285 0x28269000, /* Recovery << 24 | Act << 16 | Ini << 12 */
291 const u32 timing100
[] = {
292 0x1E1C6000, /* Recovery << 24 | Act << 16 | Ini << 12 */
299 sis_set_fifo(ap
, adev
);
301 /* If bit 14 is set then the registers are mapped at 0x70 not 0x40 */
302 pci_read_config_dword(pdev
, 0x54, ®54
);
303 if (reg54
& 0x40000000)
305 port
+= 8 * ap
->port_no
+ 4 * adev
->devno
;
307 pci_read_config_dword(pdev
, port
, &t1
);
308 t1
&= 0xC0C00FFF; /* Mask out timing */
310 if (t1
& 0x08) /* 100 or 133 ? */
311 t1
|= timing133
[speed
];
313 t1
|= timing100
[speed
];
314 pci_write_config_byte(pdev
, port
, t1
);
318 * sis_old_set_dmamode - Initialize host controller PATA DMA timings
319 * @ap: Port whose timings we are configuring
320 * @adev: Device to program
322 * Set UDMA/MWDMA mode for device, in host controller PCI config space.
323 * Handles pre UDMA and UDMA33 devices. Supports MWDMA as well unlike
324 * the old ide/pci driver.
327 * None (inherited from caller).
330 static void sis_old_set_dmamode (struct ata_port
*ap
, struct ata_device
*adev
)
332 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
333 int speed
= adev
->dma_mode
- XFER_MW_DMA_0
;
334 int drive_pci
= sis_old_port_base(adev
);
337 const u16 mwdma_bits
[] = { 0x707, 0x202, 0x202 };
338 const u16 udma_bits
[] = { 0xE000, 0xC000, 0xA000 };
340 pci_read_config_word(pdev
, drive_pci
, &timing
);
342 if (adev
->dma_mode
< XFER_UDMA_0
) {
343 /* bits 3-0 hold recovery timing bits 8-10 active timing and
344 the higer bits are dependant on the device */
346 timing
|= mwdma_bits
[speed
];
347 pci_write_config_word(pdev
, drive_pci
, timing
);
349 /* Bit 15 is UDMA on/off, bit 13-14 are cycle time */
350 speed
= adev
->dma_mode
- XFER_UDMA_0
;
352 timing
|= udma_bits
[speed
];
357 * sis_66_set_dmamode - Initialize host controller PATA DMA timings
358 * @ap: Port whose timings we are configuring
359 * @adev: Device to program
361 * Set UDMA/MWDMA mode for device, in host controller PCI config space.
362 * Handles UDMA66 and early UDMA100 devices. Supports MWDMA as well unlike
363 * the old ide/pci driver.
366 * None (inherited from caller).
369 static void sis_66_set_dmamode (struct ata_port
*ap
, struct ata_device
*adev
)
371 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
372 int speed
= adev
->dma_mode
- XFER_MW_DMA_0
;
373 int drive_pci
= sis_old_port_base(adev
);
376 const u16 mwdma_bits
[] = { 0x707, 0x202, 0x202 };
377 const u16 udma_bits
[] = { 0xF000, 0xD000, 0xB000, 0xA000, 0x9000};
379 pci_read_config_word(pdev
, drive_pci
, &timing
);
381 if (adev
->dma_mode
< XFER_UDMA_0
) {
382 /* bits 3-0 hold recovery timing bits 8-10 active timing and
383 the higer bits are dependant on the device, bit 15 udma */
385 timing
|= mwdma_bits
[speed
];
387 /* Bit 15 is UDMA on/off, bit 12-14 are cycle time */
388 speed
= adev
->dma_mode
- XFER_UDMA_0
;
390 timing
|= udma_bits
[speed
];
392 pci_write_config_word(pdev
, drive_pci
, timing
);
396 * sis_100_set_dmamode - Initialize host controller PATA DMA timings
397 * @ap: Port whose timings we are configuring
398 * @adev: Device to program
400 * Set UDMA/MWDMA mode for device, in host controller PCI config space.
401 * Handles UDMA66 and early UDMA100 devices.
404 * None (inherited from caller).
407 static void sis_100_set_dmamode (struct ata_port
*ap
, struct ata_device
*adev
)
409 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
410 int speed
= adev
->dma_mode
- XFER_MW_DMA_0
;
411 int drive_pci
= sis_old_port_base(adev
);
414 const u8 udma_bits
[] = { 0x8B, 0x87, 0x85, 0x83, 0x82, 0x81};
416 pci_read_config_byte(pdev
, drive_pci
+ 1, &timing
);
418 if (adev
->dma_mode
< XFER_UDMA_0
) {
419 /* NOT SUPPORTED YET: NEED DATA SHEET. DITTO IN OLD DRIVER */
421 /* Bit 7 is UDMA on/off, bit 0-3 are cycle time */
422 speed
= adev
->dma_mode
- XFER_UDMA_0
;
424 timing
|= udma_bits
[speed
];
426 pci_write_config_byte(pdev
, drive_pci
+ 1, timing
);
430 * sis_133_early_set_dmamode - Initialize host controller PATA DMA timings
431 * @ap: Port whose timings we are configuring
432 * @adev: Device to program
434 * Set UDMA/MWDMA mode for device, in host controller PCI config space.
435 * Handles early SiS 961 bridges. Supports MWDMA as well unlike
436 * the old ide/pci driver.
439 * None (inherited from caller).
442 static void sis_133_early_set_dmamode (struct ata_port
*ap
, struct ata_device
*adev
)
444 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
445 int speed
= adev
->dma_mode
- XFER_MW_DMA_0
;
446 int drive_pci
= sis_old_port_base(adev
);
448 /* Low 4 bits are timing */
449 static const u8 udma_bits
[] = { 0x8F, 0x8A, 0x87, 0x85, 0x83, 0x82, 0x81};
451 pci_read_config_byte(pdev
, drive_pci
+ 1, &timing
);
453 if (adev
->dma_mode
< XFER_UDMA_0
) {
454 /* NOT SUPPORTED YET: NEED DATA SHEET. DITTO IN OLD DRIVER */
456 /* Bit 7 is UDMA on/off, bit 0-3 are cycle time */
457 speed
= adev
->dma_mode
- XFER_UDMA_0
;
459 timing
|= udma_bits
[speed
];
461 pci_write_config_byte(pdev
, drive_pci
+ 1, timing
);
465 * sis_133_set_dmamode - Initialize host controller PATA DMA timings
466 * @ap: Port whose timings we are configuring
467 * @adev: Device to program
469 * Set UDMA/MWDMA mode for device, in host controller PCI config space.
470 * Handles early SiS 961 bridges. Supports MWDMA as well unlike
471 * the old ide/pci driver.
474 * None (inherited from caller).
477 static void sis_133_set_dmamode (struct ata_port
*ap
, struct ata_device
*adev
)
479 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
480 int speed
= adev
->dma_mode
- XFER_MW_DMA_0
;
485 /* bits 4- cycle time 8 - cvs time */
486 static const u32 timing_u100
[] = { 0x6B0, 0x470, 0x350, 0x140, 0x120, 0x110, 0x000 };
487 static const u32 timing_u133
[] = { 0x9F0, 0x6A0, 0x470, 0x250, 0x230, 0x220, 0x210 };
489 /* If bit 14 is set then the registers are mapped at 0x70 not 0x40 */
490 pci_read_config_dword(pdev
, 0x54, ®54
);
491 if (reg54
& 0x40000000)
493 port
+= (8 * ap
->port_no
) + (4 * adev
->devno
);
495 pci_read_config_dword(pdev
, port
, &t1
);
497 if (adev
->dma_mode
< XFER_UDMA_0
) {
499 /* FIXME: need data sheet to add MWDMA here. Also lacking on
502 speed
= adev
->dma_mode
- XFER_UDMA_0
;
503 /* if & 8 no UDMA133 - need info for ... */
507 t1
|= timing_u133
[speed
];
509 t1
|= timing_u100
[speed
];
511 pci_write_config_dword(pdev
, port
, t1
);
514 static struct scsi_host_template sis_sht
= {
515 .module
= THIS_MODULE
,
517 .ioctl
= ata_scsi_ioctl
,
518 .queuecommand
= ata_scsi_queuecmd
,
519 .can_queue
= ATA_DEF_QUEUE
,
520 .this_id
= ATA_SHT_THIS_ID
,
521 .sg_tablesize
= LIBATA_MAX_PRD
,
522 .cmd_per_lun
= ATA_SHT_CMD_PER_LUN
,
523 .emulated
= ATA_SHT_EMULATED
,
524 .use_clustering
= ATA_SHT_USE_CLUSTERING
,
525 .proc_name
= DRV_NAME
,
526 .dma_boundary
= ATA_DMA_BOUNDARY
,
527 .slave_configure
= ata_scsi_slave_config
,
528 .slave_destroy
= ata_scsi_slave_destroy
,
529 .bios_param
= ata_std_bios_param
,
532 static const struct ata_port_operations sis_133_ops
= {
533 .port_disable
= ata_port_disable
,
534 .set_piomode
= sis_133_set_piomode
,
535 .set_dmamode
= sis_133_set_dmamode
,
536 .mode_filter
= ata_pci_default_filter
,
538 .tf_load
= ata_tf_load
,
539 .tf_read
= ata_tf_read
,
540 .check_status
= ata_check_status
,
541 .exec_command
= ata_exec_command
,
542 .dev_select
= ata_std_dev_select
,
544 .freeze
= ata_bmdma_freeze
,
545 .thaw
= ata_bmdma_thaw
,
546 .error_handler
= sis_error_handler
,
547 .post_internal_cmd
= ata_bmdma_post_internal_cmd
,
548 .cable_detect
= sis_133_cable_detect
,
550 .bmdma_setup
= ata_bmdma_setup
,
551 .bmdma_start
= ata_bmdma_start
,
552 .bmdma_stop
= ata_bmdma_stop
,
553 .bmdma_status
= ata_bmdma_status
,
554 .qc_prep
= ata_qc_prep
,
555 .qc_issue
= ata_qc_issue_prot
,
556 .data_xfer
= ata_data_xfer
,
558 .irq_handler
= ata_interrupt
,
559 .irq_clear
= ata_bmdma_irq_clear
,
560 .irq_on
= ata_irq_on
,
561 .irq_ack
= ata_irq_ack
,
563 .port_start
= ata_port_start
,
566 static const struct ata_port_operations sis_133_for_sata_ops
= {
567 .port_disable
= ata_port_disable
,
568 .set_piomode
= sis_133_set_piomode
,
569 .set_dmamode
= sis_133_set_dmamode
,
570 .mode_filter
= ata_pci_default_filter
,
572 .tf_load
= ata_tf_load
,
573 .tf_read
= ata_tf_read
,
574 .check_status
= ata_check_status
,
575 .exec_command
= ata_exec_command
,
576 .dev_select
= ata_std_dev_select
,
578 .freeze
= ata_bmdma_freeze
,
579 .thaw
= ata_bmdma_thaw
,
580 .error_handler
= ata_bmdma_error_handler
,
581 .post_internal_cmd
= ata_bmdma_post_internal_cmd
,
582 .cable_detect
= sis_133_cable_detect
,
584 .bmdma_setup
= ata_bmdma_setup
,
585 .bmdma_start
= ata_bmdma_start
,
586 .bmdma_stop
= ata_bmdma_stop
,
587 .bmdma_status
= ata_bmdma_status
,
588 .qc_prep
= ata_qc_prep
,
589 .qc_issue
= ata_qc_issue_prot
,
590 .data_xfer
= ata_data_xfer
,
592 .irq_handler
= ata_interrupt
,
593 .irq_clear
= ata_bmdma_irq_clear
,
594 .irq_on
= ata_irq_on
,
595 .irq_ack
= ata_irq_ack
,
597 .port_start
= ata_port_start
,
600 static const struct ata_port_operations sis_133_early_ops
= {
601 .port_disable
= ata_port_disable
,
602 .set_piomode
= sis_100_set_piomode
,
603 .set_dmamode
= sis_133_early_set_dmamode
,
604 .mode_filter
= ata_pci_default_filter
,
606 .tf_load
= ata_tf_load
,
607 .tf_read
= ata_tf_read
,
608 .check_status
= ata_check_status
,
609 .exec_command
= ata_exec_command
,
610 .dev_select
= ata_std_dev_select
,
612 .freeze
= ata_bmdma_freeze
,
613 .thaw
= ata_bmdma_thaw
,
614 .error_handler
= sis_error_handler
,
615 .post_internal_cmd
= ata_bmdma_post_internal_cmd
,
616 .cable_detect
= sis_66_cable_detect
,
618 .bmdma_setup
= ata_bmdma_setup
,
619 .bmdma_start
= ata_bmdma_start
,
620 .bmdma_stop
= ata_bmdma_stop
,
621 .bmdma_status
= ata_bmdma_status
,
622 .qc_prep
= ata_qc_prep
,
623 .qc_issue
= ata_qc_issue_prot
,
624 .data_xfer
= ata_data_xfer
,
626 .irq_handler
= ata_interrupt
,
627 .irq_clear
= ata_bmdma_irq_clear
,
628 .irq_on
= ata_irq_on
,
629 .irq_ack
= ata_irq_ack
,
631 .port_start
= ata_port_start
,
634 static const struct ata_port_operations sis_100_ops
= {
635 .port_disable
= ata_port_disable
,
636 .set_piomode
= sis_100_set_piomode
,
637 .set_dmamode
= sis_100_set_dmamode
,
638 .mode_filter
= ata_pci_default_filter
,
640 .tf_load
= ata_tf_load
,
641 .tf_read
= ata_tf_read
,
642 .check_status
= ata_check_status
,
643 .exec_command
= ata_exec_command
,
644 .dev_select
= ata_std_dev_select
,
646 .freeze
= ata_bmdma_freeze
,
647 .thaw
= ata_bmdma_thaw
,
648 .error_handler
= sis_error_handler
,
649 .post_internal_cmd
= ata_bmdma_post_internal_cmd
,
650 .cable_detect
= sis_66_cable_detect
,
652 .bmdma_setup
= ata_bmdma_setup
,
653 .bmdma_start
= ata_bmdma_start
,
654 .bmdma_stop
= ata_bmdma_stop
,
655 .bmdma_status
= ata_bmdma_status
,
656 .qc_prep
= ata_qc_prep
,
657 .qc_issue
= ata_qc_issue_prot
,
658 .data_xfer
= ata_data_xfer
,
660 .irq_handler
= ata_interrupt
,
661 .irq_clear
= ata_bmdma_irq_clear
,
662 .irq_on
= ata_irq_on
,
663 .irq_ack
= ata_irq_ack
,
665 .port_start
= ata_port_start
,
668 static const struct ata_port_operations sis_66_ops
= {
669 .port_disable
= ata_port_disable
,
670 .set_piomode
= sis_old_set_piomode
,
671 .set_dmamode
= sis_66_set_dmamode
,
672 .mode_filter
= ata_pci_default_filter
,
674 .tf_load
= ata_tf_load
,
675 .tf_read
= ata_tf_read
,
676 .check_status
= ata_check_status
,
677 .exec_command
= ata_exec_command
,
678 .dev_select
= ata_std_dev_select
,
679 .cable_detect
= sis_66_cable_detect
,
681 .freeze
= ata_bmdma_freeze
,
682 .thaw
= ata_bmdma_thaw
,
683 .error_handler
= sis_error_handler
,
684 .post_internal_cmd
= ata_bmdma_post_internal_cmd
,
686 .bmdma_setup
= ata_bmdma_setup
,
687 .bmdma_start
= ata_bmdma_start
,
688 .bmdma_stop
= ata_bmdma_stop
,
689 .bmdma_status
= ata_bmdma_status
,
690 .qc_prep
= ata_qc_prep
,
691 .qc_issue
= ata_qc_issue_prot
,
692 .data_xfer
= ata_data_xfer
,
694 .irq_handler
= ata_interrupt
,
695 .irq_clear
= ata_bmdma_irq_clear
,
696 .irq_on
= ata_irq_on
,
697 .irq_ack
= ata_irq_ack
,
699 .port_start
= ata_port_start
,
702 static const struct ata_port_operations sis_old_ops
= {
703 .port_disable
= ata_port_disable
,
704 .set_piomode
= sis_old_set_piomode
,
705 .set_dmamode
= sis_old_set_dmamode
,
706 .mode_filter
= ata_pci_default_filter
,
708 .tf_load
= ata_tf_load
,
709 .tf_read
= ata_tf_read
,
710 .check_status
= ata_check_status
,
711 .exec_command
= ata_exec_command
,
712 .dev_select
= ata_std_dev_select
,
714 .freeze
= ata_bmdma_freeze
,
715 .thaw
= ata_bmdma_thaw
,
716 .error_handler
= sis_error_handler
,
717 .post_internal_cmd
= ata_bmdma_post_internal_cmd
,
718 .cable_detect
= ata_cable_40wire
,
720 .bmdma_setup
= ata_bmdma_setup
,
721 .bmdma_start
= ata_bmdma_start
,
722 .bmdma_stop
= ata_bmdma_stop
,
723 .bmdma_status
= ata_bmdma_status
,
724 .qc_prep
= ata_qc_prep
,
725 .qc_issue
= ata_qc_issue_prot
,
726 .data_xfer
= ata_data_xfer
,
728 .irq_handler
= ata_interrupt
,
729 .irq_clear
= ata_bmdma_irq_clear
,
730 .irq_on
= ata_irq_on
,
731 .irq_ack
= ata_irq_ack
,
733 .port_start
= ata_port_start
,
736 static const struct ata_port_info sis_info
= {
738 .flags
= ATA_FLAG_SLAVE_POSS
,
739 .pio_mask
= 0x1f, /* pio0-4 */
742 .port_ops
= &sis_old_ops
,
744 static const struct ata_port_info sis_info33
= {
746 .flags
= ATA_FLAG_SLAVE_POSS
,
747 .pio_mask
= 0x1f, /* pio0-4 */
749 .udma_mask
= ATA_UDMA2
, /* UDMA 33 */
750 .port_ops
= &sis_old_ops
,
752 static const struct ata_port_info sis_info66
= {
754 .flags
= ATA_FLAG_SLAVE_POSS
,
755 .pio_mask
= 0x1f, /* pio0-4 */
756 .udma_mask
= ATA_UDMA4
, /* UDMA 66 */
757 .port_ops
= &sis_66_ops
,
759 static const struct ata_port_info sis_info100
= {
761 .flags
= ATA_FLAG_SLAVE_POSS
,
762 .pio_mask
= 0x1f, /* pio0-4 */
763 .udma_mask
= ATA_UDMA5
,
764 .port_ops
= &sis_100_ops
,
766 static const struct ata_port_info sis_info100_early
= {
768 .flags
= ATA_FLAG_SLAVE_POSS
,
769 .udma_mask
= ATA_UDMA5
,
770 .pio_mask
= 0x1f, /* pio0-4 */
771 .port_ops
= &sis_66_ops
,
773 static const struct ata_port_info sis_info133
= {
775 .flags
= ATA_FLAG_SLAVE_POSS
,
776 .pio_mask
= 0x1f, /* pio0-4 */
777 .udma_mask
= ATA_UDMA6
,
778 .port_ops
= &sis_133_ops
,
780 const struct ata_port_info sis_info133_for_sata
= {
782 .flags
= ATA_FLAG_SLAVE_POSS
| ATA_FLAG_SRST
,
783 .pio_mask
= 0x1f, /* pio0-4 */
784 .udma_mask
= ATA_UDMA6
,
785 .port_ops
= &sis_133_for_sata_ops
,
787 static const struct ata_port_info sis_info133_early
= {
789 .flags
= ATA_FLAG_SLAVE_POSS
,
790 .pio_mask
= 0x1f, /* pio0-4 */
791 .udma_mask
= ATA_UDMA6
,
792 .port_ops
= &sis_133_early_ops
,
795 /* Privately shared with the SiS180 SATA driver, not for use elsewhere */
796 EXPORT_SYMBOL_GPL(sis_info133_for_sata
);
798 static void sis_fixup(struct pci_dev
*pdev
, struct sis_chipset
*sis
)
803 if (sis
->info
== &sis_info133
) {
804 pci_read_config_word(pdev
, 0x50, ®w
);
806 pci_write_config_word(pdev
, 0x50, regw
& ~0x08);
807 pci_read_config_word(pdev
, 0x52, ®w
);
809 pci_write_config_word(pdev
, 0x52, regw
& ~0x08);
813 if (sis
->info
== &sis_info133_early
|| sis
->info
== &sis_info100
) {
815 pci_write_config_byte(pdev
, PCI_LATENCY_TIMER
, 0x80);
816 /* Set compatibility bit */
817 pci_read_config_byte(pdev
, 0x49, ®
);
819 pci_write_config_byte(pdev
, 0x49, reg
| 0x01);
823 if (sis
->info
== &sis_info66
|| sis
->info
== &sis_info100_early
) {
825 pci_write_config_byte(pdev
, PCI_LATENCY_TIMER
, 0x80);
826 /* Set compatibility bit */
827 pci_read_config_byte(pdev
, 0x52, ®
);
829 pci_write_config_byte(pdev
, 0x52, reg
| 0x04);
833 if (sis
->info
== &sis_info33
) {
834 pci_read_config_byte(pdev
, PCI_CLASS_PROG
, ®
);
835 if (( reg
& 0x0F ) != 0x00)
836 pci_write_config_byte(pdev
, PCI_CLASS_PROG
, reg
& 0xF0);
837 /* Fall through to ATA16 fixup below */
840 if (sis
->info
== &sis_info
|| sis
->info
== &sis_info33
) {
841 /* force per drive recovery and active timings
842 needed on ATA_33 and below chips */
843 pci_read_config_byte(pdev
, 0x52, ®
);
845 pci_write_config_byte(pdev
, 0x52, reg
|0x08);
853 * sis_init_one - Register SiS ATA PCI device with kernel services
854 * @pdev: PCI device to register
855 * @ent: Entry in sis_pci_tbl matching with @pdev
857 * Called from kernel PCI layer. We probe for combined mode (sigh),
858 * and then hand over control to libata, for it to do the rest.
861 * Inherited from PCI layer (may sleep).
864 * Zero on success, or -ERRNO value.
867 static int sis_init_one (struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
869 static int printed_version
;
870 struct ata_port_info port
;
871 const struct ata_port_info
*ppi
[] = { &port
, NULL
};
872 struct pci_dev
*host
= NULL
;
873 struct sis_chipset
*chipset
= NULL
;
874 struct sis_chipset
*sets
;
876 static struct sis_chipset sis_chipsets
[] = {
878 { 0x0968, &sis_info133
},
879 { 0x0966, &sis_info133
},
880 { 0x0965, &sis_info133
},
881 { 0x0745, &sis_info100
},
882 { 0x0735, &sis_info100
},
883 { 0x0733, &sis_info100
},
884 { 0x0635, &sis_info100
},
885 { 0x0633, &sis_info100
},
887 { 0x0730, &sis_info100_early
}, /* 100 with ATA 66 layout */
888 { 0x0550, &sis_info100_early
}, /* 100 with ATA 66 layout */
890 { 0x0640, &sis_info66
},
891 { 0x0630, &sis_info66
},
892 { 0x0620, &sis_info66
},
893 { 0x0540, &sis_info66
},
894 { 0x0530, &sis_info66
},
896 { 0x5600, &sis_info33
},
897 { 0x5598, &sis_info33
},
898 { 0x5597, &sis_info33
},
899 { 0x5591, &sis_info33
},
900 { 0x5582, &sis_info33
},
901 { 0x5581, &sis_info33
},
903 { 0x5596, &sis_info
},
904 { 0x5571, &sis_info
},
905 { 0x5517, &sis_info
},
906 { 0x5511, &sis_info
},
910 static struct sis_chipset sis133_early
= {
911 0x0, &sis_info133_early
913 static struct sis_chipset sis133
= {
916 static struct sis_chipset sis100_early
= {
917 0x0, &sis_info100_early
919 static struct sis_chipset sis100
= {
923 if (!printed_version
++)
924 dev_printk(KERN_DEBUG
, &pdev
->dev
,
925 "version " DRV_VERSION
"\n");
927 /* We have to find the bridge first */
929 for (sets
= &sis_chipsets
[0]; sets
->device
; sets
++) {
930 host
= pci_get_device(PCI_VENDOR_ID_SI
, sets
->device
, NULL
);
932 chipset
= sets
; /* Match found */
933 if (sets
->device
== 0x630) { /* SIS630 */
934 if (host
->revision
>= 0x30) /* 630 ET */
935 chipset
= &sis100_early
;
941 /* Look for concealed bridges */
942 if (chipset
== NULL
) {
947 /* Disable ID masking and register remapping then
948 see what the real ID is */
950 pci_read_config_dword(pdev
, 0x54, &idemisc
);
951 pci_write_config_dword(pdev
, 0x54, idemisc
& 0x7fffffff);
952 pci_read_config_word(pdev
, PCI_DEVICE_ID
, &trueid
);
953 pci_write_config_dword(pdev
, 0x54, idemisc
);
956 case 0x5518: /* SIS 962/963 */
958 if ((idemisc
& 0x40000000) == 0) {
959 pci_write_config_dword(pdev
, 0x54, idemisc
| 0x40000000);
960 printk(KERN_INFO
"SIS5513: Switching to 5513 register mapping\n");
963 case 0x0180: /* SIS 965/965L */
966 case 0x1180: /* SIS 966/966L */
973 if (chipset
== NULL
) {
974 struct pci_dev
*lpc_bridge
;
979 /* Try the second unmasking technique */
980 pci_read_config_byte(pdev
, 0x4a, &idecfg
);
981 pci_write_config_byte(pdev
, 0x4a, idecfg
| 0x10);
982 pci_read_config_word(pdev
, PCI_DEVICE_ID
, &trueid
);
983 pci_write_config_byte(pdev
, 0x4a, idecfg
);
987 lpc_bridge
= pci_get_slot(pdev
->bus
, 0x10); /* Bus 0 Dev 2 Fn 0 */
988 if (lpc_bridge
== NULL
)
990 pci_read_config_byte(pdev
, 0x49, &prefctl
);
991 pci_dev_put(lpc_bridge
);
993 if (lpc_bridge
->revision
== 0x10 && (prefctl
& 0x80)) {
994 chipset
= &sis133_early
;
1003 /* No chipset info, no support */
1004 if (chipset
== NULL
)
1007 port
= *chipset
->info
;
1008 port
.private_data
= chipset
;
1010 sis_fixup(pdev
, chipset
);
1012 return ata_pci_init_one(pdev
, ppi
);
1015 static const struct pci_device_id sis_pci_tbl
[] = {
1016 { PCI_VDEVICE(SI
, 0x5513), }, /* SiS 5513 */
1017 { PCI_VDEVICE(SI
, 0x5518), }, /* SiS 5518 */
1018 { PCI_VDEVICE(SI
, 0x1180), }, /* SiS 1180 */
1023 static struct pci_driver sis_pci_driver
= {
1025 .id_table
= sis_pci_tbl
,
1026 .probe
= sis_init_one
,
1027 .remove
= ata_pci_remove_one
,
1029 .suspend
= ata_pci_device_suspend
,
1030 .resume
= ata_pci_device_resume
,
1034 static int __init
sis_init(void)
1036 return pci_register_driver(&sis_pci_driver
);
1039 static void __exit
sis_exit(void)
1041 pci_unregister_driver(&sis_pci_driver
);
1044 module_init(sis_init
);
1045 module_exit(sis_exit
);
1047 MODULE_AUTHOR("Alan Cox");
1048 MODULE_DESCRIPTION("SCSI low-level driver for SiS ATA");
1049 MODULE_LICENSE("GPL");
1050 MODULE_DEVICE_TABLE(pci
, sis_pci_tbl
);
1051 MODULE_VERSION(DRV_VERSION
);