2 * include/asm-powerpc/paca.h
4 * This control block defines the PACA which defines the processor
5 * specific data for each logical processor on the system.
6 * There are some pointers defined that are utilized by PLIC.
8 * C 2001 PPC 64 Team, IBM Corp
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version
13 * 2 of the License, or (at your option) any later version.
15 #ifndef _ASM_POWERPC_PACA_H
16 #define _ASM_POWERPC_PACA_H
19 #include <linux/config.h>
20 #include <asm/types.h>
21 #include <asm/lppaca.h>
24 register struct paca_struct
*local_paca
asm("r13");
25 #define get_paca() local_paca
30 * Defines the layout of the paca.
32 * This structure is not directly accessed by firmware or the service
33 * processor except for the first two pointers that point to the
34 * lppaca area and the ItLpRegSave area for this CPU. The lppaca
35 * object is currently contained within the PACA but it doesn't need
40 * Because hw_cpu_id, unlike other paca fields, is accessed
41 * routinely from other CPUs (from the IRQ code), we stick to
42 * read-only (after boot) fields in the first cacheline to
43 * avoid cacheline bouncing.
47 * MAGIC: These first two pointers can't be moved - they're
48 * accessed by the firmware
50 struct lppaca
*lppaca_ptr
; /* Pointer to LpPaca for PLIC */
51 #ifdef CONFIG_PPC_ISERIES
52 void *reg_save_ptr
; /* Pointer to LpRegSave for PLIC */
53 #endif /* CONFIG_PPC_ISERIES */
56 * MAGIC: the spinlock functions in arch/ppc64/lib/locks.c
57 * load lock_token and paca_index with a single lwz
58 * instruction. They must travel together and be properly
61 u16 lock_token
; /* Constant 0x8000, used in locks */
62 u16 paca_index
; /* Logical processor number */
64 u64 kernel_toc
; /* Kernel TOC address */
65 u64 stab_real
; /* Absolute address of segment table */
66 u64 stab_addr
; /* Virtual address of segment table */
67 void *emergency_sp
; /* pointer to emergency stack */
68 s16 hw_cpu_id
; /* Physical processor number */
69 u8 cpu_start
; /* At startup, processor spins until */
70 /* this becomes non-zero. */
73 * Now, starting in cacheline 2, the exception save areas
75 /* used for most interrupts/exceptions */
76 u64 exgen
[10] __attribute__((aligned(0x80)));
77 u64 exmc
[10]; /* used for machine checks */
78 u64 exslb
[10]; /* used for SLB/segment table misses
79 * on the linear mapping */
80 #ifdef CONFIG_PPC_64K_PAGES
82 #endif /* CONFIG_PPC_64K_PAGES */
85 u16 slb_cache
[SLB_CACHE_ENTRIES
];
89 * then miscellaneous read-write fields
91 struct task_struct
*__current
; /* Pointer to current */
92 u64 kstack
; /* Saved Kernel stack addr */
93 u64 stab_rr
; /* stab/slb round-robin counter */
94 u64 saved_r1
; /* r1 save for RTAS calls */
95 u64 saved_msr
; /* MSR saved here by enter_rtas */
96 u8 proc_enabled
; /* irq soft-enable flag */
99 * iSeries structure which the hypervisor knows about -
100 * this structure should not cross a page boundary.
101 * The vpa_init/register_vpa call is now known to fail if the
102 * lppaca structure crosses a page boundary.
103 * The lppaca is also used on POWER5 pSeries boxes.
104 * The lppaca is 640 bytes long, and cannot readily change
105 * since the hypervisor knows its layout, so a 1kB
106 * alignment will suffice to ensure that it doesn't
107 * cross a page boundary.
109 struct lppaca lppaca
__attribute__((__aligned__(0x400)));
112 extern struct paca_struct paca
[];
114 #endif /* __KERNEL__ */
115 #endif /* _ASM_POWERPC_PACA_H */