EHCI: workaround for MosChip controller bug
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / usb / host / ehci-q.c
blob4e4066c35a09f35330aabea000ddb13cfbb0d68e
1 /*
2 * Copyright (C) 2001-2004 by David Brownell
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software Foundation,
16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 /* this file is part of ehci-hcd.c */
21 /*-------------------------------------------------------------------------*/
24 * EHCI hardware queue manipulation ... the core. QH/QTD manipulation.
26 * Control, bulk, and interrupt traffic all use "qh" lists. They list "qtd"
27 * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
28 * buffers needed for the larger number). We use one QH per endpoint, queue
29 * multiple urbs (all three types) per endpoint. URBs may need several qtds.
31 * ISO traffic uses "ISO TD" (itd, and sitd) records, and (along with
32 * interrupts) needs careful scheduling. Performance improvements can be
33 * an ongoing challenge. That's in "ehci-sched.c".
35 * USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
36 * or otherwise through transaction translators (TTs) in USB 2.0 hubs using
37 * (b) special fields in qh entries or (c) split iso entries. TTs will
38 * buffer low/full speed data so the host collects it at high speed.
41 /*-------------------------------------------------------------------------*/
43 /* fill a qtd, returning how much of the buffer we were able to queue up */
45 static int
46 qtd_fill(struct ehci_hcd *ehci, struct ehci_qtd *qtd, dma_addr_t buf,
47 size_t len, int token, int maxpacket)
49 int i, count;
50 u64 addr = buf;
52 /* one buffer entry per 4K ... first might be short or unaligned */
53 qtd->hw_buf[0] = cpu_to_hc32(ehci, (u32)addr);
54 qtd->hw_buf_hi[0] = cpu_to_hc32(ehci, (u32)(addr >> 32));
55 count = 0x1000 - (buf & 0x0fff); /* rest of that page */
56 if (likely (len < count)) /* ... iff needed */
57 count = len;
58 else {
59 buf += 0x1000;
60 buf &= ~0x0fff;
62 /* per-qtd limit: from 16K to 20K (best alignment) */
63 for (i = 1; count < len && i < 5; i++) {
64 addr = buf;
65 qtd->hw_buf[i] = cpu_to_hc32(ehci, (u32)addr);
66 qtd->hw_buf_hi[i] = cpu_to_hc32(ehci,
67 (u32)(addr >> 32));
68 buf += 0x1000;
69 if ((count + 0x1000) < len)
70 count += 0x1000;
71 else
72 count = len;
75 /* short packets may only terminate transfers */
76 if (count != len)
77 count -= (count % maxpacket);
79 qtd->hw_token = cpu_to_hc32(ehci, (count << 16) | token);
80 qtd->length = count;
82 return count;
85 /*-------------------------------------------------------------------------*/
87 static inline void
88 qh_update (struct ehci_hcd *ehci, struct ehci_qh *qh, struct ehci_qtd *qtd)
90 struct ehci_qh_hw *hw = qh->hw;
92 /* writes to an active overlay are unsafe */
93 BUG_ON(qh->qh_state != QH_STATE_IDLE);
95 hw->hw_qtd_next = QTD_NEXT(ehci, qtd->qtd_dma);
96 hw->hw_alt_next = EHCI_LIST_END(ehci);
98 /* Except for control endpoints, we make hardware maintain data
99 * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
100 * and set the pseudo-toggle in udev. Only usb_clear_halt() will
101 * ever clear it.
103 if (!(hw->hw_info1 & cpu_to_hc32(ehci, 1 << 14))) {
104 unsigned is_out, epnum;
106 is_out = qh->is_out;
107 epnum = (hc32_to_cpup(ehci, &hw->hw_info1) >> 8) & 0x0f;
108 if (unlikely (!usb_gettoggle (qh->dev, epnum, is_out))) {
109 hw->hw_token &= ~cpu_to_hc32(ehci, QTD_TOGGLE);
110 usb_settoggle (qh->dev, epnum, is_out, 1);
114 hw->hw_token &= cpu_to_hc32(ehci, QTD_TOGGLE | QTD_STS_PING);
117 /* if it weren't for a common silicon quirk (writing the dummy into the qh
118 * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
119 * recovery (including urb dequeue) would need software changes to a QH...
121 static void
122 qh_refresh (struct ehci_hcd *ehci, struct ehci_qh *qh)
124 struct ehci_qtd *qtd;
126 if (list_empty (&qh->qtd_list))
127 qtd = qh->dummy;
128 else {
129 qtd = list_entry (qh->qtd_list.next,
130 struct ehci_qtd, qtd_list);
131 /* first qtd may already be partially processed */
132 if (cpu_to_hc32(ehci, qtd->qtd_dma) == qh->hw->hw_current)
133 qtd = NULL;
136 if (qtd)
137 qh_update (ehci, qh, qtd);
140 /*-------------------------------------------------------------------------*/
142 static void qh_link_async(struct ehci_hcd *ehci, struct ehci_qh *qh);
144 static void ehci_clear_tt_buffer_complete(struct usb_hcd *hcd,
145 struct usb_host_endpoint *ep)
147 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
148 struct ehci_qh *qh = ep->hcpriv;
149 unsigned long flags;
151 spin_lock_irqsave(&ehci->lock, flags);
152 qh->clearing_tt = 0;
153 if (qh->qh_state == QH_STATE_IDLE && !list_empty(&qh->qtd_list)
154 && ehci->rh_state == EHCI_RH_RUNNING)
155 qh_link_async(ehci, qh);
156 spin_unlock_irqrestore(&ehci->lock, flags);
159 static void ehci_clear_tt_buffer(struct ehci_hcd *ehci, struct ehci_qh *qh,
160 struct urb *urb, u32 token)
163 /* If an async split transaction gets an error or is unlinked,
164 * the TT buffer may be left in an indeterminate state. We
165 * have to clear the TT buffer.
167 * Note: this routine is never called for Isochronous transfers.
169 if (urb->dev->tt && !usb_pipeint(urb->pipe) && !qh->clearing_tt) {
170 #ifdef DEBUG
171 struct usb_device *tt = urb->dev->tt->hub;
172 dev_dbg(&tt->dev,
173 "clear tt buffer port %d, a%d ep%d t%08x\n",
174 urb->dev->ttport, urb->dev->devnum,
175 usb_pipeendpoint(urb->pipe), token);
176 #endif /* DEBUG */
177 if (!ehci_is_TDI(ehci)
178 || urb->dev->tt->hub !=
179 ehci_to_hcd(ehci)->self.root_hub) {
180 if (usb_hub_clear_tt_buffer(urb) == 0)
181 qh->clearing_tt = 1;
182 } else {
184 /* REVISIT ARC-derived cores don't clear the root
185 * hub TT buffer in this way...
191 static int qtd_copy_status (
192 struct ehci_hcd *ehci,
193 struct urb *urb,
194 size_t length,
195 u32 token
198 int status = -EINPROGRESS;
200 /* count IN/OUT bytes, not SETUP (even short packets) */
201 if (likely (QTD_PID (token) != 2))
202 urb->actual_length += length - QTD_LENGTH (token);
204 /* don't modify error codes */
205 if (unlikely(urb->unlinked))
206 return status;
208 /* force cleanup after short read; not always an error */
209 if (unlikely (IS_SHORT_READ (token)))
210 status = -EREMOTEIO;
212 /* serious "can't proceed" faults reported by the hardware */
213 if (token & QTD_STS_HALT) {
214 if (token & QTD_STS_BABBLE) {
215 /* FIXME "must" disable babbling device's port too */
216 status = -EOVERFLOW;
217 /* CERR nonzero + halt --> stall */
218 } else if (QTD_CERR(token)) {
219 status = -EPIPE;
221 /* In theory, more than one of the following bits can be set
222 * since they are sticky and the transaction is retried.
223 * Which to test first is rather arbitrary.
225 } else if (token & QTD_STS_MMF) {
226 /* fs/ls interrupt xfer missed the complete-split */
227 status = -EPROTO;
228 } else if (token & QTD_STS_DBE) {
229 status = (QTD_PID (token) == 1) /* IN ? */
230 ? -ENOSR /* hc couldn't read data */
231 : -ECOMM; /* hc couldn't write data */
232 } else if (token & QTD_STS_XACT) {
233 /* timeout, bad CRC, wrong PID, etc */
234 ehci_dbg(ehci, "devpath %s ep%d%s 3strikes\n",
235 urb->dev->devpath,
236 usb_pipeendpoint(urb->pipe),
237 usb_pipein(urb->pipe) ? "in" : "out");
238 status = -EPROTO;
239 } else { /* unknown */
240 status = -EPROTO;
243 ehci_vdbg (ehci,
244 "dev%d ep%d%s qtd token %08x --> status %d\n",
245 usb_pipedevice (urb->pipe),
246 usb_pipeendpoint (urb->pipe),
247 usb_pipein (urb->pipe) ? "in" : "out",
248 token, status);
251 return status;
254 static void
255 ehci_urb_done(struct ehci_hcd *ehci, struct urb *urb, int status)
256 __releases(ehci->lock)
257 __acquires(ehci->lock)
259 if (likely (urb->hcpriv != NULL)) {
260 struct ehci_qh *qh = (struct ehci_qh *) urb->hcpriv;
262 /* S-mask in a QH means it's an interrupt urb */
263 if ((qh->hw->hw_info2 & cpu_to_hc32(ehci, QH_SMASK)) != 0) {
265 /* ... update hc-wide periodic stats (for usbfs) */
266 ehci_to_hcd(ehci)->self.bandwidth_int_reqs--;
268 qh_put (qh);
271 if (unlikely(urb->unlinked)) {
272 COUNT(ehci->stats.unlink);
273 } else {
274 /* report non-error and short read status as zero */
275 if (status == -EINPROGRESS || status == -EREMOTEIO)
276 status = 0;
277 COUNT(ehci->stats.complete);
280 #ifdef EHCI_URB_TRACE
281 ehci_dbg (ehci,
282 "%s %s urb %p ep%d%s status %d len %d/%d\n",
283 __func__, urb->dev->devpath, urb,
284 usb_pipeendpoint (urb->pipe),
285 usb_pipein (urb->pipe) ? "in" : "out",
286 status,
287 urb->actual_length, urb->transfer_buffer_length);
288 #endif
290 /* complete() can reenter this HCD */
291 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
292 spin_unlock (&ehci->lock);
293 usb_hcd_giveback_urb(ehci_to_hcd(ehci), urb, status);
294 spin_lock (&ehci->lock);
297 static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh);
298 static void unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh);
300 static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh);
303 * Process and free completed qtds for a qh, returning URBs to drivers.
304 * Chases up to qh->hw_current. Returns number of completions called,
305 * indicating how much "real" work we did.
307 static unsigned
308 qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh)
310 struct ehci_qtd *last, *end = qh->dummy;
311 struct list_head *entry, *tmp;
312 int last_status;
313 int stopped;
314 unsigned count = 0;
315 u8 state;
316 struct ehci_qh_hw *hw = qh->hw;
318 if (unlikely (list_empty (&qh->qtd_list)))
319 return count;
321 /* completions (or tasks on other cpus) must never clobber HALT
322 * till we've gone through and cleaned everything up, even when
323 * they add urbs to this qh's queue or mark them for unlinking.
325 * NOTE: unlinking expects to be done in queue order.
327 * It's a bug for qh->qh_state to be anything other than
328 * QH_STATE_IDLE, unless our caller is scan_async() or
329 * scan_periodic().
331 state = qh->qh_state;
332 qh->qh_state = QH_STATE_COMPLETING;
333 stopped = (state == QH_STATE_IDLE);
335 rescan:
336 last = NULL;
337 last_status = -EINPROGRESS;
338 qh->needs_rescan = 0;
340 /* remove de-activated QTDs from front of queue.
341 * after faults (including short reads), cleanup this urb
342 * then let the queue advance.
343 * if queue is stopped, handles unlinks.
345 list_for_each_safe (entry, tmp, &qh->qtd_list) {
346 struct ehci_qtd *qtd;
347 struct urb *urb;
348 u32 token = 0;
350 qtd = list_entry (entry, struct ehci_qtd, qtd_list);
351 urb = qtd->urb;
353 /* clean up any state from previous QTD ...*/
354 if (last) {
355 if (likely (last->urb != urb)) {
356 ehci_urb_done(ehci, last->urb, last_status);
357 count++;
358 last_status = -EINPROGRESS;
360 ehci_qtd_free (ehci, last);
361 last = NULL;
364 /* ignore urbs submitted during completions we reported */
365 if (qtd == end)
366 break;
368 /* hardware copies qtd out of qh overlay */
369 rmb ();
370 token = hc32_to_cpu(ehci, qtd->hw_token);
372 /* always clean up qtds the hc de-activated */
373 retry_xacterr:
374 if ((token & QTD_STS_ACTIVE) == 0) {
376 /* on STALL, error, and short reads this urb must
377 * complete and all its qtds must be recycled.
379 if ((token & QTD_STS_HALT) != 0) {
381 /* retry transaction errors until we
382 * reach the software xacterr limit
384 if ((token & QTD_STS_XACT) &&
385 QTD_CERR(token) == 0 &&
386 ++qh->xacterrs < QH_XACTERR_MAX &&
387 !urb->unlinked) {
388 ehci_dbg(ehci,
389 "detected XactErr len %zu/%zu retry %d\n",
390 qtd->length - QTD_LENGTH(token), qtd->length, qh->xacterrs);
392 /* reset the token in the qtd and the
393 * qh overlay (which still contains
394 * the qtd) so that we pick up from
395 * where we left off
397 token &= ~QTD_STS_HALT;
398 token |= QTD_STS_ACTIVE |
399 (EHCI_TUNE_CERR << 10);
400 qtd->hw_token = cpu_to_hc32(ehci,
401 token);
402 wmb();
403 hw->hw_token = cpu_to_hc32(ehci,
404 token);
405 goto retry_xacterr;
407 stopped = 1;
409 /* magic dummy for some short reads; qh won't advance.
410 * that silicon quirk can kick in with this dummy too.
412 * other short reads won't stop the queue, including
413 * control transfers (status stage handles that) or
414 * most other single-qtd reads ... the queue stops if
415 * URB_SHORT_NOT_OK was set so the driver submitting
416 * the urbs could clean it up.
418 } else if (IS_SHORT_READ (token)
419 && !(qtd->hw_alt_next
420 & EHCI_LIST_END(ehci))) {
421 stopped = 1;
424 /* stop scanning when we reach qtds the hc is using */
425 } else if (likely (!stopped
426 && ehci->rh_state == EHCI_RH_RUNNING)) {
427 break;
429 /* scan the whole queue for unlinks whenever it stops */
430 } else {
431 stopped = 1;
433 /* cancel everything if we halt, suspend, etc */
434 if (ehci->rh_state != EHCI_RH_RUNNING)
435 last_status = -ESHUTDOWN;
437 /* this qtd is active; skip it unless a previous qtd
438 * for its urb faulted, or its urb was canceled.
440 else if (last_status == -EINPROGRESS && !urb->unlinked)
441 continue;
443 /* qh unlinked; token in overlay may be most current */
444 if (state == QH_STATE_IDLE
445 && cpu_to_hc32(ehci, qtd->qtd_dma)
446 == hw->hw_current) {
447 token = hc32_to_cpu(ehci, hw->hw_token);
449 /* An unlink may leave an incomplete
450 * async transaction in the TT buffer.
451 * We have to clear it.
453 ehci_clear_tt_buffer(ehci, qh, urb, token);
457 /* unless we already know the urb's status, collect qtd status
458 * and update count of bytes transferred. in common short read
459 * cases with only one data qtd (including control transfers),
460 * queue processing won't halt. but with two or more qtds (for
461 * example, with a 32 KB transfer), when the first qtd gets a
462 * short read the second must be removed by hand.
464 if (last_status == -EINPROGRESS) {
465 last_status = qtd_copy_status(ehci, urb,
466 qtd->length, token);
467 if (last_status == -EREMOTEIO
468 && (qtd->hw_alt_next
469 & EHCI_LIST_END(ehci)))
470 last_status = -EINPROGRESS;
472 /* As part of low/full-speed endpoint-halt processing
473 * we must clear the TT buffer (11.17.5).
475 if (unlikely(last_status != -EINPROGRESS &&
476 last_status != -EREMOTEIO)) {
477 /* The TT's in some hubs malfunction when they
478 * receive this request following a STALL (they
479 * stop sending isochronous packets). Since a
480 * STALL can't leave the TT buffer in a busy
481 * state (if you believe Figures 11-48 - 11-51
482 * in the USB 2.0 spec), we won't clear the TT
483 * buffer in this case. Strictly speaking this
484 * is a violation of the spec.
486 if (last_status != -EPIPE)
487 ehci_clear_tt_buffer(ehci, qh, urb,
488 token);
492 /* if we're removing something not at the queue head,
493 * patch the hardware queue pointer.
495 if (stopped && qtd->qtd_list.prev != &qh->qtd_list) {
496 last = list_entry (qtd->qtd_list.prev,
497 struct ehci_qtd, qtd_list);
498 last->hw_next = qtd->hw_next;
501 /* remove qtd; it's recycled after possible urb completion */
502 list_del (&qtd->qtd_list);
503 last = qtd;
505 /* reinit the xacterr counter for the next qtd */
506 qh->xacterrs = 0;
509 /* last urb's completion might still need calling */
510 if (likely (last != NULL)) {
511 ehci_urb_done(ehci, last->urb, last_status);
512 count++;
513 ehci_qtd_free (ehci, last);
516 /* Do we need to rescan for URBs dequeued during a giveback? */
517 if (unlikely(qh->needs_rescan)) {
518 /* If the QH is already unlinked, do the rescan now. */
519 if (state == QH_STATE_IDLE)
520 goto rescan;
522 /* Otherwise we have to wait until the QH is fully unlinked.
523 * Our caller will start an unlink if qh->needs_rescan is
524 * set. But if an unlink has already started, nothing needs
525 * to be done.
527 if (state != QH_STATE_LINKED)
528 qh->needs_rescan = 0;
531 /* restore original state; caller must unlink or relink */
532 qh->qh_state = state;
534 /* be sure the hardware's done with the qh before refreshing
535 * it after fault cleanup, or recovering from silicon wrongly
536 * overlaying the dummy qtd (which reduces DMA chatter).
538 if (stopped != 0 || hw->hw_qtd_next == EHCI_LIST_END(ehci)) {
539 switch (state) {
540 case QH_STATE_IDLE:
541 qh_refresh(ehci, qh);
542 break;
543 case QH_STATE_LINKED:
544 /* We won't refresh a QH that's linked (after the HC
545 * stopped the queue). That avoids a race:
546 * - HC reads first part of QH;
547 * - CPU updates that first part and the token;
548 * - HC reads rest of that QH, including token
549 * Result: HC gets an inconsistent image, and then
550 * DMAs to/from the wrong memory (corrupting it).
552 * That should be rare for interrupt transfers,
553 * except maybe high bandwidth ...
556 /* Tell the caller to start an unlink */
557 qh->needs_rescan = 1;
558 break;
559 /* otherwise, unlink already started */
563 return count;
566 /*-------------------------------------------------------------------------*/
568 // high bandwidth multiplier, as encoded in highspeed endpoint descriptors
569 #define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
570 // ... and packet size, for any kind of endpoint descriptor
571 #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
574 * reverse of qh_urb_transaction: free a list of TDs.
575 * used for cleanup after errors, before HC sees an URB's TDs.
577 static void qtd_list_free (
578 struct ehci_hcd *ehci,
579 struct urb *urb,
580 struct list_head *qtd_list
582 struct list_head *entry, *temp;
584 list_for_each_safe (entry, temp, qtd_list) {
585 struct ehci_qtd *qtd;
587 qtd = list_entry (entry, struct ehci_qtd, qtd_list);
588 list_del (&qtd->qtd_list);
589 ehci_qtd_free (ehci, qtd);
594 * create a list of filled qtds for this URB; won't link into qh.
596 static struct list_head *
597 qh_urb_transaction (
598 struct ehci_hcd *ehci,
599 struct urb *urb,
600 struct list_head *head,
601 gfp_t flags
603 struct ehci_qtd *qtd, *qtd_prev;
604 dma_addr_t buf;
605 int len, this_sg_len, maxpacket;
606 int is_input;
607 u32 token;
608 int i;
609 struct scatterlist *sg;
612 * URBs map to sequences of QTDs: one logical transaction
614 qtd = ehci_qtd_alloc (ehci, flags);
615 if (unlikely (!qtd))
616 return NULL;
617 list_add_tail (&qtd->qtd_list, head);
618 qtd->urb = urb;
620 token = QTD_STS_ACTIVE;
621 token |= (EHCI_TUNE_CERR << 10);
622 /* for split transactions, SplitXState initialized to zero */
624 len = urb->transfer_buffer_length;
625 is_input = usb_pipein (urb->pipe);
626 if (usb_pipecontrol (urb->pipe)) {
627 /* SETUP pid */
628 qtd_fill(ehci, qtd, urb->setup_dma,
629 sizeof (struct usb_ctrlrequest),
630 token | (2 /* "setup" */ << 8), 8);
632 /* ... and always at least one more pid */
633 token ^= QTD_TOGGLE;
634 qtd_prev = qtd;
635 qtd = ehci_qtd_alloc (ehci, flags);
636 if (unlikely (!qtd))
637 goto cleanup;
638 qtd->urb = urb;
639 qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
640 list_add_tail (&qtd->qtd_list, head);
642 /* for zero length DATA stages, STATUS is always IN */
643 if (len == 0)
644 token |= (1 /* "in" */ << 8);
648 * data transfer stage: buffer setup
650 i = urb->num_sgs;
651 if (len > 0 && i > 0) {
652 sg = urb->sg;
653 buf = sg_dma_address(sg);
655 /* urb->transfer_buffer_length may be smaller than the
656 * size of the scatterlist (or vice versa)
658 this_sg_len = min_t(int, sg_dma_len(sg), len);
659 } else {
660 sg = NULL;
661 buf = urb->transfer_dma;
662 this_sg_len = len;
665 if (is_input)
666 token |= (1 /* "in" */ << 8);
667 /* else it's already initted to "out" pid (0 << 8) */
669 maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
672 * buffer gets wrapped in one or more qtds;
673 * last one may be "short" (including zero len)
674 * and may serve as a control status ack
676 for (;;) {
677 int this_qtd_len;
679 this_qtd_len = qtd_fill(ehci, qtd, buf, this_sg_len, token,
680 maxpacket);
681 this_sg_len -= this_qtd_len;
682 len -= this_qtd_len;
683 buf += this_qtd_len;
686 * short reads advance to a "magic" dummy instead of the next
687 * qtd ... that forces the queue to stop, for manual cleanup.
688 * (this will usually be overridden later.)
690 if (is_input)
691 qtd->hw_alt_next = ehci->async->hw->hw_alt_next;
693 /* qh makes control packets use qtd toggle; maybe switch it */
694 if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
695 token ^= QTD_TOGGLE;
697 if (likely(this_sg_len <= 0)) {
698 if (--i <= 0 || len <= 0)
699 break;
700 sg = sg_next(sg);
701 buf = sg_dma_address(sg);
702 this_sg_len = min_t(int, sg_dma_len(sg), len);
705 qtd_prev = qtd;
706 qtd = ehci_qtd_alloc (ehci, flags);
707 if (unlikely (!qtd))
708 goto cleanup;
709 qtd->urb = urb;
710 qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
711 list_add_tail (&qtd->qtd_list, head);
715 * unless the caller requires manual cleanup after short reads,
716 * have the alt_next mechanism keep the queue running after the
717 * last data qtd (the only one, for control and most other cases).
719 if (likely ((urb->transfer_flags & URB_SHORT_NOT_OK) == 0
720 || usb_pipecontrol (urb->pipe)))
721 qtd->hw_alt_next = EHCI_LIST_END(ehci);
724 * control requests may need a terminating data "status" ack;
725 * other OUT ones may need a terminating short packet
726 * (zero length).
728 if (likely (urb->transfer_buffer_length != 0)) {
729 int one_more = 0;
731 if (usb_pipecontrol (urb->pipe)) {
732 one_more = 1;
733 token ^= 0x0100; /* "in" <--> "out" */
734 token |= QTD_TOGGLE; /* force DATA1 */
735 } else if (usb_pipeout(urb->pipe)
736 && (urb->transfer_flags & URB_ZERO_PACKET)
737 && !(urb->transfer_buffer_length % maxpacket)) {
738 one_more = 1;
740 if (one_more) {
741 qtd_prev = qtd;
742 qtd = ehci_qtd_alloc (ehci, flags);
743 if (unlikely (!qtd))
744 goto cleanup;
745 qtd->urb = urb;
746 qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
747 list_add_tail (&qtd->qtd_list, head);
749 /* never any data in such packets */
750 qtd_fill(ehci, qtd, 0, 0, token, 0);
754 /* by default, enable interrupt on urb completion */
755 if (likely (!(urb->transfer_flags & URB_NO_INTERRUPT)))
756 qtd->hw_token |= cpu_to_hc32(ehci, QTD_IOC);
757 return head;
759 cleanup:
760 qtd_list_free (ehci, urb, head);
761 return NULL;
764 /*-------------------------------------------------------------------------*/
766 // Would be best to create all qh's from config descriptors,
767 // when each interface/altsetting is established. Unlink
768 // any previous qh and cancel its urbs first; endpoints are
769 // implicitly reset then (data toggle too).
770 // That'd mean updating how usbcore talks to HCDs. (2.7?)
774 * Each QH holds a qtd list; a QH is used for everything except iso.
776 * For interrupt urbs, the scheduler must set the microframe scheduling
777 * mask(s) each time the QH gets scheduled. For highspeed, that's
778 * just one microframe in the s-mask. For split interrupt transactions
779 * there are additional complications: c-mask, maybe FSTNs.
781 static struct ehci_qh *
782 qh_make (
783 struct ehci_hcd *ehci,
784 struct urb *urb,
785 gfp_t flags
787 struct ehci_qh *qh = ehci_qh_alloc (ehci, flags);
788 u32 info1 = 0, info2 = 0;
789 int is_input, type;
790 int maxp = 0;
791 struct usb_tt *tt = urb->dev->tt;
792 struct ehci_qh_hw *hw;
794 if (!qh)
795 return qh;
798 * init endpoint/device data for this QH
800 info1 |= usb_pipeendpoint (urb->pipe) << 8;
801 info1 |= usb_pipedevice (urb->pipe) << 0;
803 is_input = usb_pipein (urb->pipe);
804 type = usb_pipetype (urb->pipe);
805 maxp = usb_maxpacket (urb->dev, urb->pipe, !is_input);
807 /* 1024 byte maxpacket is a hardware ceiling. High bandwidth
808 * acts like up to 3KB, but is built from smaller packets.
810 if (max_packet(maxp) > 1024) {
811 ehci_dbg(ehci, "bogus qh maxpacket %d\n", max_packet(maxp));
812 goto done;
815 /* Compute interrupt scheduling parameters just once, and save.
816 * - allowing for high bandwidth, how many nsec/uframe are used?
817 * - split transactions need a second CSPLIT uframe; same question
818 * - splits also need a schedule gap (for full/low speed I/O)
819 * - qh has a polling interval
821 * For control/bulk requests, the HC or TT handles these.
823 if (type == PIPE_INTERRUPT) {
824 qh->usecs = NS_TO_US(usb_calc_bus_time(USB_SPEED_HIGH,
825 is_input, 0,
826 hb_mult(maxp) * max_packet(maxp)));
827 qh->start = NO_FRAME;
828 qh->stamp = ehci->periodic_stamp;
830 if (urb->dev->speed == USB_SPEED_HIGH) {
831 qh->c_usecs = 0;
832 qh->gap_uf = 0;
834 qh->period = urb->interval >> 3;
835 if (qh->period == 0 && urb->interval != 1) {
836 /* NOTE interval 2 or 4 uframes could work.
837 * But interval 1 scheduling is simpler, and
838 * includes high bandwidth.
840 urb->interval = 1;
841 } else if (qh->period > ehci->periodic_size) {
842 qh->period = ehci->periodic_size;
843 urb->interval = qh->period << 3;
845 } else {
846 int think_time;
848 /* gap is f(FS/LS transfer times) */
849 qh->gap_uf = 1 + usb_calc_bus_time (urb->dev->speed,
850 is_input, 0, maxp) / (125 * 1000);
852 /* FIXME this just approximates SPLIT/CSPLIT times */
853 if (is_input) { // SPLIT, gap, CSPLIT+DATA
854 qh->c_usecs = qh->usecs + HS_USECS (0);
855 qh->usecs = HS_USECS (1);
856 } else { // SPLIT+DATA, gap, CSPLIT
857 qh->usecs += HS_USECS (1);
858 qh->c_usecs = HS_USECS (0);
861 think_time = tt ? tt->think_time : 0;
862 qh->tt_usecs = NS_TO_US (think_time +
863 usb_calc_bus_time (urb->dev->speed,
864 is_input, 0, max_packet (maxp)));
865 qh->period = urb->interval;
866 if (qh->period > ehci->periodic_size) {
867 qh->period = ehci->periodic_size;
868 urb->interval = qh->period;
873 /* support for tt scheduling, and access to toggles */
874 qh->dev = urb->dev;
876 /* using TT? */
877 switch (urb->dev->speed) {
878 case USB_SPEED_LOW:
879 info1 |= (1 << 12); /* EPS "low" */
880 /* FALL THROUGH */
882 case USB_SPEED_FULL:
883 /* EPS 0 means "full" */
884 if (type != PIPE_INTERRUPT)
885 info1 |= (EHCI_TUNE_RL_TT << 28);
886 if (type == PIPE_CONTROL) {
887 info1 |= (1 << 27); /* for TT */
888 info1 |= 1 << 14; /* toggle from qtd */
890 info1 |= maxp << 16;
892 info2 |= (EHCI_TUNE_MULT_TT << 30);
894 /* Some Freescale processors have an erratum in which the
895 * port number in the queue head was 0..N-1 instead of 1..N.
897 if (ehci_has_fsl_portno_bug(ehci))
898 info2 |= (urb->dev->ttport-1) << 23;
899 else
900 info2 |= urb->dev->ttport << 23;
902 /* set the address of the TT; for TDI's integrated
903 * root hub tt, leave it zeroed.
905 if (tt && tt->hub != ehci_to_hcd(ehci)->self.root_hub)
906 info2 |= tt->hub->devnum << 16;
908 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets c-mask } */
910 break;
912 case USB_SPEED_HIGH: /* no TT involved */
913 info1 |= (2 << 12); /* EPS "high" */
914 if (type == PIPE_CONTROL) {
915 info1 |= (EHCI_TUNE_RL_HS << 28);
916 info1 |= 64 << 16; /* usb2 fixed maxpacket */
917 info1 |= 1 << 14; /* toggle from qtd */
918 info2 |= (EHCI_TUNE_MULT_HS << 30);
919 } else if (type == PIPE_BULK) {
920 info1 |= (EHCI_TUNE_RL_HS << 28);
921 /* The USB spec says that high speed bulk endpoints
922 * always use 512 byte maxpacket. But some device
923 * vendors decided to ignore that, and MSFT is happy
924 * to help them do so. So now people expect to use
925 * such nonconformant devices with Linux too; sigh.
927 info1 |= max_packet(maxp) << 16;
928 info2 |= (EHCI_TUNE_MULT_HS << 30);
929 } else { /* PIPE_INTERRUPT */
930 info1 |= max_packet (maxp) << 16;
931 info2 |= hb_mult (maxp) << 30;
933 break;
934 default:
935 dbg ("bogus dev %p speed %d", urb->dev, urb->dev->speed);
936 done:
937 qh_put (qh);
938 return NULL;
941 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets s-mask } */
943 /* init as live, toggle clear, advance to dummy */
944 qh->qh_state = QH_STATE_IDLE;
945 hw = qh->hw;
946 hw->hw_info1 = cpu_to_hc32(ehci, info1);
947 hw->hw_info2 = cpu_to_hc32(ehci, info2);
948 qh->is_out = !is_input;
949 usb_settoggle (urb->dev, usb_pipeendpoint (urb->pipe), !is_input, 1);
950 qh_refresh (ehci, qh);
951 return qh;
954 /*-------------------------------------------------------------------------*/
956 /* move qh (and its qtds) onto async queue; maybe enable queue. */
958 static void qh_link_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
960 __hc32 dma = QH_NEXT(ehci, qh->qh_dma);
961 struct ehci_qh *head;
963 /* Don't link a QH if there's a Clear-TT-Buffer pending */
964 if (unlikely(qh->clearing_tt))
965 return;
967 WARN_ON(qh->qh_state != QH_STATE_IDLE);
969 /* (re)start the async schedule? */
970 head = ehci->async;
971 timer_action_done (ehci, TIMER_ASYNC_OFF);
972 if (!head->qh_next.qh) {
973 u32 cmd = ehci_readl(ehci, &ehci->regs->command);
975 if (!(cmd & CMD_ASE)) {
976 /* in case a clear of CMD_ASE didn't take yet */
977 (void)handshake(ehci, &ehci->regs->status,
978 STS_ASS, 0, 150);
979 cmd |= CMD_ASE;
980 ehci_writel(ehci, cmd, &ehci->regs->command);
981 /* posted write need not be known to HC yet ... */
985 /* clear halt and/or toggle; and maybe recover from silicon quirk */
986 qh_refresh(ehci, qh);
988 /* splice right after start */
989 qh->qh_next = head->qh_next;
990 qh->hw->hw_next = head->hw->hw_next;
991 wmb ();
993 head->qh_next.qh = qh;
994 head->hw->hw_next = dma;
996 qh_get(qh);
997 qh->xacterrs = 0;
998 qh->qh_state = QH_STATE_LINKED;
999 /* qtd completions reported later by interrupt */
1002 /*-------------------------------------------------------------------------*/
1005 * For control/bulk/interrupt, return QH with these TDs appended.
1006 * Allocates and initializes the QH if necessary.
1007 * Returns null if it can't allocate a QH it needs to.
1008 * If the QH has TDs (urbs) already, that's great.
1010 static struct ehci_qh *qh_append_tds (
1011 struct ehci_hcd *ehci,
1012 struct urb *urb,
1013 struct list_head *qtd_list,
1014 int epnum,
1015 void **ptr
1018 struct ehci_qh *qh = NULL;
1019 __hc32 qh_addr_mask = cpu_to_hc32(ehci, 0x7f);
1021 qh = (struct ehci_qh *) *ptr;
1022 if (unlikely (qh == NULL)) {
1023 /* can't sleep here, we have ehci->lock... */
1024 qh = qh_make (ehci, urb, GFP_ATOMIC);
1025 *ptr = qh;
1027 if (likely (qh != NULL)) {
1028 struct ehci_qtd *qtd;
1030 if (unlikely (list_empty (qtd_list)))
1031 qtd = NULL;
1032 else
1033 qtd = list_entry (qtd_list->next, struct ehci_qtd,
1034 qtd_list);
1036 /* control qh may need patching ... */
1037 if (unlikely (epnum == 0)) {
1039 /* usb_reset_device() briefly reverts to address 0 */
1040 if (usb_pipedevice (urb->pipe) == 0)
1041 qh->hw->hw_info1 &= ~qh_addr_mask;
1044 /* just one way to queue requests: swap with the dummy qtd.
1045 * only hc or qh_refresh() ever modify the overlay.
1047 if (likely (qtd != NULL)) {
1048 struct ehci_qtd *dummy;
1049 dma_addr_t dma;
1050 __hc32 token;
1052 /* to avoid racing the HC, use the dummy td instead of
1053 * the first td of our list (becomes new dummy). both
1054 * tds stay deactivated until we're done, when the
1055 * HC is allowed to fetch the old dummy (4.10.2).
1057 token = qtd->hw_token;
1058 qtd->hw_token = HALT_BIT(ehci);
1060 dummy = qh->dummy;
1062 dma = dummy->qtd_dma;
1063 *dummy = *qtd;
1064 dummy->qtd_dma = dma;
1066 list_del (&qtd->qtd_list);
1067 list_add (&dummy->qtd_list, qtd_list);
1068 list_splice_tail(qtd_list, &qh->qtd_list);
1070 ehci_qtd_init(ehci, qtd, qtd->qtd_dma);
1071 qh->dummy = qtd;
1073 /* hc must see the new dummy at list end */
1074 dma = qtd->qtd_dma;
1075 qtd = list_entry (qh->qtd_list.prev,
1076 struct ehci_qtd, qtd_list);
1077 qtd->hw_next = QTD_NEXT(ehci, dma);
1079 /* let the hc process these next qtds */
1080 wmb ();
1081 dummy->hw_token = token;
1083 urb->hcpriv = qh_get (qh);
1086 return qh;
1089 /*-------------------------------------------------------------------------*/
1091 static int
1092 submit_async (
1093 struct ehci_hcd *ehci,
1094 struct urb *urb,
1095 struct list_head *qtd_list,
1096 gfp_t mem_flags
1098 int epnum;
1099 unsigned long flags;
1100 struct ehci_qh *qh = NULL;
1101 int rc;
1103 epnum = urb->ep->desc.bEndpointAddress;
1105 #ifdef EHCI_URB_TRACE
1107 struct ehci_qtd *qtd;
1108 qtd = list_entry(qtd_list->next, struct ehci_qtd, qtd_list);
1109 ehci_dbg(ehci,
1110 "%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n",
1111 __func__, urb->dev->devpath, urb,
1112 epnum & 0x0f, (epnum & USB_DIR_IN) ? "in" : "out",
1113 urb->transfer_buffer_length,
1114 qtd, urb->ep->hcpriv);
1116 #endif
1118 spin_lock_irqsave (&ehci->lock, flags);
1119 if (unlikely(!HCD_HW_ACCESSIBLE(ehci_to_hcd(ehci)))) {
1120 rc = -ESHUTDOWN;
1121 goto done;
1123 rc = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
1124 if (unlikely(rc))
1125 goto done;
1127 qh = qh_append_tds(ehci, urb, qtd_list, epnum, &urb->ep->hcpriv);
1128 if (unlikely(qh == NULL)) {
1129 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
1130 rc = -ENOMEM;
1131 goto done;
1134 /* Control/bulk operations through TTs don't need scheduling,
1135 * the HC and TT handle it when the TT has a buffer ready.
1137 if (likely (qh->qh_state == QH_STATE_IDLE))
1138 qh_link_async(ehci, qh);
1139 done:
1140 spin_unlock_irqrestore (&ehci->lock, flags);
1141 if (unlikely (qh == NULL))
1142 qtd_list_free (ehci, urb, qtd_list);
1143 return rc;
1146 /*-------------------------------------------------------------------------*/
1148 /* the async qh for the qtds being reclaimed are now unlinked from the HC */
1150 static void end_unlink_async (struct ehci_hcd *ehci)
1152 struct ehci_qh *qh = ehci->reclaim;
1153 struct ehci_qh *next;
1155 iaa_watchdog_done(ehci);
1157 // qh->hw_next = cpu_to_hc32(qh->qh_dma);
1158 qh->qh_state = QH_STATE_IDLE;
1159 qh->qh_next.qh = NULL;
1160 qh_put (qh); // refcount from reclaim
1162 /* other unlink(s) may be pending (in QH_STATE_UNLINK_WAIT) */
1163 next = qh->reclaim;
1164 ehci->reclaim = next;
1165 qh->reclaim = NULL;
1167 qh_completions (ehci, qh);
1169 if (!list_empty(&qh->qtd_list) && ehci->rh_state == EHCI_RH_RUNNING) {
1170 qh_link_async (ehci, qh);
1171 } else {
1172 /* it's not free to turn the async schedule on/off; leave it
1173 * active but idle for a while once it empties.
1175 if (ehci->rh_state == EHCI_RH_RUNNING
1176 && ehci->async->qh_next.qh == NULL)
1177 timer_action (ehci, TIMER_ASYNC_OFF);
1179 qh_put(qh); /* refcount from async list */
1181 if (next) {
1182 ehci->reclaim = NULL;
1183 start_unlink_async (ehci, next);
1186 if (ehci->has_synopsys_hc_bug)
1187 ehci_writel(ehci, (u32) ehci->async->qh_dma,
1188 &ehci->regs->async_next);
1191 /* makes sure the async qh will become idle */
1192 /* caller must own ehci->lock */
1194 static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
1196 int cmd = ehci_readl(ehci, &ehci->regs->command);
1197 struct ehci_qh *prev;
1199 #ifdef DEBUG
1200 assert_spin_locked(&ehci->lock);
1201 if (ehci->reclaim
1202 || (qh->qh_state != QH_STATE_LINKED
1203 && qh->qh_state != QH_STATE_UNLINK_WAIT)
1205 BUG ();
1206 #endif
1208 /* stop async schedule right now? */
1209 if (unlikely (qh == ehci->async)) {
1210 /* can't get here without STS_ASS set */
1211 if (ehci->rh_state != EHCI_RH_HALTED
1212 && !ehci->reclaim) {
1213 /* ... and CMD_IAAD clear */
1214 ehci_writel(ehci, cmd & ~CMD_ASE,
1215 &ehci->regs->command);
1216 wmb ();
1217 // handshake later, if we need to
1218 timer_action_done (ehci, TIMER_ASYNC_OFF);
1220 return;
1223 qh->qh_state = QH_STATE_UNLINK;
1224 ehci->reclaim = qh = qh_get (qh);
1226 prev = ehci->async;
1227 while (prev->qh_next.qh != qh)
1228 prev = prev->qh_next.qh;
1230 prev->hw->hw_next = qh->hw->hw_next;
1231 prev->qh_next = qh->qh_next;
1232 if (ehci->qh_scan_next == qh)
1233 ehci->qh_scan_next = qh->qh_next.qh;
1234 wmb ();
1236 /* If the controller isn't running, we don't have to wait for it */
1237 if (unlikely(ehci->rh_state != EHCI_RH_RUNNING)) {
1238 /* if (unlikely (qh->reclaim != 0))
1239 * this will recurse, probably not much
1241 end_unlink_async (ehci);
1242 return;
1245 cmd |= CMD_IAAD;
1246 ehci_writel(ehci, cmd, &ehci->regs->command);
1247 (void)ehci_readl(ehci, &ehci->regs->command);
1248 iaa_watchdog_start(ehci);
1251 /*-------------------------------------------------------------------------*/
1253 static void scan_async (struct ehci_hcd *ehci)
1255 bool stopped;
1256 struct ehci_qh *qh;
1257 enum ehci_timer_action action = TIMER_IO_WATCHDOG;
1259 timer_action_done (ehci, TIMER_ASYNC_SHRINK);
1260 stopped = (ehci->rh_state != EHCI_RH_RUNNING);
1262 ehci->qh_scan_next = ehci->async->qh_next.qh;
1263 while (ehci->qh_scan_next) {
1264 qh = ehci->qh_scan_next;
1265 ehci->qh_scan_next = qh->qh_next.qh;
1266 rescan:
1267 /* clean any finished work for this qh */
1268 if (!list_empty(&qh->qtd_list)) {
1269 int temp;
1272 * Unlinks could happen here; completion reporting
1273 * drops the lock. That's why ehci->qh_scan_next
1274 * always holds the next qh to scan; if the next qh
1275 * gets unlinked then ehci->qh_scan_next is adjusted
1276 * in start_unlink_async().
1278 qh = qh_get(qh);
1279 temp = qh_completions(ehci, qh);
1280 if (qh->needs_rescan)
1281 unlink_async(ehci, qh);
1282 qh->unlink_time = jiffies + EHCI_SHRINK_JIFFIES;
1283 qh_put(qh);
1284 if (temp != 0)
1285 goto rescan;
1288 /* unlink idle entries, reducing DMA usage as well
1289 * as HCD schedule-scanning costs. delay for any qh
1290 * we just scanned, there's a not-unusual case that it
1291 * doesn't stay idle for long.
1292 * (plus, avoids some kind of re-activation race.)
1294 if (list_empty(&qh->qtd_list)
1295 && qh->qh_state == QH_STATE_LINKED) {
1296 if (!ehci->reclaim && (stopped ||
1297 time_after_eq(jiffies, qh->unlink_time)))
1298 start_unlink_async(ehci, qh);
1299 else
1300 action = TIMER_ASYNC_SHRINK;
1303 if (action == TIMER_ASYNC_SHRINK)
1304 timer_action (ehci, TIMER_ASYNC_SHRINK);