include/asm-mips/processor.h

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * Copyright (C) 1994 Waldorf GMBH
   7  * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2001, 2002, 2003 Ralf Baechle
   8  * Copyright (C) 1996 Paul M. Antoine
   9  * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
  10  */
  11 #ifndef _ASM_PROCESSOR_H
  12 #define _ASM_PROCESSOR_H
  13
  14 #include <linux/config.h>
  15 #include <linux/cpumask.h>
  16 #include <linux/threads.h>
  17
  18 #include <asm/cachectl.h>
  19 #include <asm/cpu.h>
  20 #include <asm/cpu-info.h>
  21 #include <asm/mipsregs.h>
  22 #include <asm/prefetch.h>
  23 #include <asm/system.h>
  24
  25 /*
  26  * Return current * instruction pointer ("program counter").
  27  */
  28 #define current_text_addr() ({ __label__ _l; _l: &&_l;})
  29
  30 /*
  31  * System setup and hardware flags..
  32  */
  33 extern void (*cpu_wait)(void);
  34
  35 extern unsigned int vced_count, vcei_count;
  36
  37 #ifdef CONFIG_32BIT
  38 /*
  39  * User space process size: 2GB. This is hardcoded into a few places,
  40  * so don't change it unless you know what you are doing.
  41  */
  42 #define TASK_SIZE       0x7fff8000UL
  43
  44 /*
  45  * This decides where the kernel will search for a free chunk of vm
  46  * space during mmap's.
  47  */
  48 #define TASK_UNMAPPED_BASE      (PAGE_ALIGN(TASK_SIZE / 3))
  49 #endif
  50
  51 #ifdef CONFIG_64BIT
  52 /*
  53  * User space process size: 1TB. This is hardcoded into a few places,
  54  * so don't change it unless you know what you are doing.  TASK_SIZE
  55  * is limited to 1TB by the R4000 architecture; R10000 and better can
  56  * support 16TB; the architectural reserve for future expansion is
  57  * 8192EB ...
  58  */
  59 #define TASK_SIZE32     0x7fff8000UL
  60 #define TASK_SIZE       0x10000000000UL
  61
  62 /*
  63  * This decides where the kernel will search for a free chunk of vm
  64  * space during mmap's.
  65  */
  66 #define TASK_UNMAPPED_BASE      ((current->thread.mflags & MF_32BIT_ADDR) ? \
  67         PAGE_ALIGN(TASK_SIZE32 / 3) : PAGE_ALIGN(TASK_SIZE / 3))
  68 #endif
  69
  70 #define NUM_FPU_REGS    32
  71
  72 typedef __u64 fpureg_t;
  73
  74 struct mips_fpu_hard_struct {
  75         fpureg_t        fpr[NUM_FPU_REGS];
  76         unsigned int    fcr31;
  77 };
  78
  79 /*
  80  * It would be nice to add some more fields for emulator statistics, but there
  81  * are a number of fixed offsets in offset.h and elsewhere that would have to
  82  * be recalculated by hand.  So the additional information will be private to
  83  * the FPU emulator for now.  See asm-mips/fpu_emulator.h.
  84  */
  85
  86 struct mips_fpu_soft_struct {
  87         fpureg_t        fpr[NUM_FPU_REGS];
  88         unsigned int    fcr31;
  89 };
  90
  91 union mips_fpu_union {
  92         struct mips_fpu_hard_struct hard;
  93         struct mips_fpu_soft_struct soft;
  94 };
  95
  96 #define INIT_FPU { \
  97         {{0,},} \
  98 }
  99
 100 #define NUM_DSP_REGS   6
 101
 102 typedef __u32 dspreg_t;
 103
 104 struct mips_dsp_state {
 105         dspreg_t        dspr[NUM_DSP_REGS];
 106         unsigned int    dspcontrol;
 107 };
 108
 109 #define INIT_DSP {{0,},}
 110
 111 #define INIT_CPUMASK { \
 112         {0,} \
 113 }
 114
 115 typedef struct {
 116         unsigned long seg;
 117 } mm_segment_t;
 118
 119 #define ARCH_MIN_TASKALIGN      8
 120
 121 struct mips_abi;
 122
 123 /*
 124  * If you change thread_struct remember to change the #defines below too!
 125  */
 126 struct thread_struct {
 127         /* Saved main processor registers. */
 128         unsigned long reg16;
 129         unsigned long reg17, reg18, reg19, reg20, reg21, reg22, reg23;
 130         unsigned long reg29, reg30, reg31;
 131
 132         /* Saved cp0 stuff. */
 133         unsigned long cp0_status;
 134
 135         /* Saved fpu/fpu emulator stuff. */
 136         union mips_fpu_union fpu;
 137 #ifdef CONFIG_MIPS_MT_FPAFF
 138         /* Emulated instruction count */
 139         unsigned long emulated_fp;
 140         /* Saved per-thread scheduler affinity mask */
 141         cpumask_t user_cpus_allowed;
 142 #endif /* CONFIG_MIPS_MT_FPAFF */
 143
 144         /* Saved state of the DSP ASE, if available. */
 145         struct mips_dsp_state dsp;
 146
 147         /* Other stuff associated with the thread. */
 148         unsigned long cp0_badvaddr;     /* Last user fault */
 149         unsigned long cp0_baduaddr;     /* Last kernel fault accessing USEG */
 150         unsigned long error_code;
 151         unsigned long trap_no;
 152 #define MF_FIXADE       1               /* Fix address errors in software */
 153 #define MF_LOGADE       2               /* Log address errors to syslog */
 154 #define MF_32BIT_REGS   4               /* also implies 16/32 fprs */
 155 #define MF_32BIT_ADDR   8               /* 32-bit address space (o32/n32) */
 156 #define MF_FPUBOUND     0x10            /* thread bound to FPU-full CPU set */
 157         unsigned long mflags;
 158         unsigned long irix_trampoline;  /* Wheee... */
 159         unsigned long irix_oldctx;
 160         struct mips_abi *abi;
 161 };
 162
 163 #define MF_ABI_MASK     (MF_32BIT_REGS | MF_32BIT_ADDR)
 164 #define MF_O32          (MF_32BIT_REGS | MF_32BIT_ADDR)
 165 #define MF_N32          MF_32BIT_ADDR
 166 #define MF_N64          0
 167
 168 #ifdef CONFIG_MIPS_MT_FPAFF
 169 #define FPAFF_INIT 0, INIT_CPUMASK,
 170 #else
 171 #define FPAFF_INIT
 172 #endif /* CONFIG_MIPS_MT_FPAFF */
 173
 174 #define INIT_THREAD  { \
 175         /* \
 176          * saved main processor registers \
 177          */ \
 178         0, 0, 0, 0, 0, 0, 0, 0, \
 179                        0, 0, 0, \
 180         /* \
 181          * saved cp0 stuff \
 182          */ \
 183         0, \
 184         /* \
 185          * saved fpu/fpu emulator stuff \
 186          */ \
 187         INIT_FPU, \
 188         /* \
 189          * fpu affinity state (null if not FPAFF) \
 190          */ \
 191         FPAFF_INIT \
 192         /* \
 193          * saved dsp/dsp emulator stuff \
 194          */ \
 195         INIT_DSP, \
 196         /* \
 197          * Other stuff associated with the process \
 198          */ \
 199         0, 0, 0, 0, \
 200         /* \
 201          * For now the default is to fix address errors \
 202          */ \
 203         MF_FIXADE, 0, 0 \
 204 }
 205
 206 struct task_struct;
 207
 208 /* Free all resources held by a thread. */
 209 #define release_thread(thread) do { } while(0)
 210
 211 /* Prepare to copy thread state - unlazy all lazy status */
 212 #define prepare_to_copy(tsk)    do { } while (0)
 213
 214 extern long kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
 215
 216 extern unsigned long thread_saved_pc(struct task_struct *tsk);
 217
 218 /*
 219  * Do necessary setup to start up a newly executed thread.
 220  */
 221 extern void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp);
 222
 223 unsigned long get_wchan(struct task_struct *p);
 224
 225 #define __KSTK_TOS(tsk) ((unsigned long)task_stack_page(tsk) + THREAD_SIZE - 32)
 226 #define task_pt_regs(tsk) ((struct pt_regs *)__KSTK_TOS(tsk) - 1)
 227 #define KSTK_EIP(tsk) (task_pt_regs(tsk)->cp0_epc)
 228 #define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[29])
 229 #define KSTK_STATUS(tsk) (task_pt_regs(tsk)->cp0_status)
 230
 231 #define cpu_relax()     barrier()
 232
 233 /*
 234  * Return_address is a replacement for __builtin_return_address(count)
 235  * which on certain architectures cannot reasonably be implemented in GCC
 236  * (MIPS, Alpha) or is unuseable with -fomit-frame-pointer (i386).
 237  * Note that __builtin_return_address(x>=1) is forbidden because GCC
 238  * aborts compilation on some CPUs.  It's simply not possible to unwind
 239  * some CPU's stackframes.
 240  *
 241  * __builtin_return_address works only for non-leaf functions.  We avoid the
 242  * overhead of a function call by forcing the compiler to save the return
 243  * address register on the stack.
 244  */
 245 #define return_address() ({__asm__ __volatile__("":::"$31");__builtin_return_address(0);})
 246
 247 #ifdef CONFIG_CPU_HAS_PREFETCH
 248
 249 #define ARCH_HAS_PREFETCH
 250
 251 extern inline void prefetch(const void *addr)
 252 {
 253         __asm__ __volatile__(
 254         "       .set    mips4           \n"
 255         "       pref    %0, (%1)        \n"
 256         "       .set    mips0           \n"
 257         :
 258         : "i" (Pref_Load), "r" (addr));
 259 }
 260
 261 #endif
 262
 263 #endif /* _ASM_PROCESSOR_H */