2 * include/asm-sh/processor.h
4 * Copyright (C) 1999, 2000 Niibe Yutaka
5 * Copyright (C) 2002, 2003 Paul Mundt
8 #ifndef __ASM_SH_PROCESSOR_H
9 #define __ASM_SH_PROCESSOR_H
12 #include <linux/compiler.h>
14 #include <asm/types.h>
15 #include <asm/cache.h>
16 #include <asm/ptrace.h>
17 #include <asm/cpu-features.h>
20 * Default implementation of macro that returns current
21 * instruction pointer ("program counter").
23 #define current_text_addr() ({ void *pc; __asm__("mova 1f, %0\n1:":"=z" (pc)); pc; })
25 /* Core Processor Version Register */
26 #define CCN_PVR 0xff000030
27 #define CCN_CVR 0xff000040
28 #define CCN_PRR 0xff000044
31 * CPU type and hardware bug flags. Kept separately for each CPU.
33 * Each one of these also needs a CONFIG_CPU_SUBTYPE_xxx entry
34 * in arch/sh/mm/Kconfig, as well as an entry in arch/sh/kernel/setup.c
35 * for parsing the subtype in get_cpu_subtype().
45 CPU_SH7705
, CPU_SH7706
, CPU_SH7707
,
46 CPU_SH7708
, CPU_SH7708S
, CPU_SH7708R
,
47 CPU_SH7709
, CPU_SH7709A
, CPU_SH7710
, CPU_SH7712
,
48 CPU_SH7720
, CPU_SH7729
,
51 CPU_SH7750
, CPU_SH7750S
, CPU_SH7750R
, CPU_SH7751
, CPU_SH7751R
,
52 CPU_SH7760
, CPU_ST40RA
, CPU_ST40GX1
, CPU_SH4_202
, CPU_SH4_501
,
55 CPU_SH7770
, CPU_SH7780
, CPU_SH7781
, CPU_SH7785
, CPU_SHX3
,
58 CPU_SH7343
, CPU_SH7722
,
66 unsigned long loops_per_jiffy
;
67 unsigned long asid_cache
;
69 struct cache_info icache
; /* Primary I-cache */
70 struct cache_info dcache
; /* Primary D-cache */
71 struct cache_info scache
; /* Secondary cache */
74 } __attribute__ ((aligned(SMP_CACHE_BYTES
)));
76 extern struct sh_cpuinfo cpu_data
[];
77 #define boot_cpu_data cpu_data[0]
78 #define current_cpu_data cpu_data[smp_processor_id()]
79 #define raw_current_cpu_data cpu_data[raw_smp_processor_id()]
82 * User space process size: 2GB.
84 * Since SH7709 and SH7750 have "area 7", we can't use 0x7c000000--0x7fffffff
86 #define TASK_SIZE 0x7c000000UL
88 /* This decides where the kernel will search for a free chunk of vm
89 * space during mmap's.
91 #define TASK_UNMAPPED_BASE (TASK_SIZE / 3)
97 * When it's set, it means the processor doesn't have right to use FPU,
98 * and it results exception when the floating operation is executed.
101 * Interrupt level mask
103 #define SR_FD 0x00008000
104 #define SR_DSP 0x00001000
105 #define SR_IMASK 0x000000f0
108 * FPU structure and data
111 struct sh_fpu_hard_struct
{
112 unsigned long fp_regs
[16];
113 unsigned long xfp_regs
[16];
117 long status
; /* software status information */
120 /* Dummy fpu emulator */
121 struct sh_fpu_soft_struct
{
122 unsigned long fp_regs
[16];
123 unsigned long xfp_regs
[16];
127 unsigned char lookahead
;
128 unsigned long entry_pc
;
132 struct sh_fpu_hard_struct hard
;
133 struct sh_fpu_soft_struct soft
;
136 struct thread_struct
{
137 /* Saved registers when thread is descheduled */
141 /* Hardware debugging registers */
142 unsigned long ubc_pc
;
144 /* floating point info */
145 union sh_fpu_union fpu
;
152 /* Count of active tasks with UBC settings */
153 extern int ubc_usercnt
;
155 #define INIT_THREAD { \
156 .sp = sizeof(init_stack) + (long) &init_stack, \
160 * Do necessary setup to start up a newly executed thread.
162 #define start_thread(regs, new_pc, new_sp) \
165 regs->sr = SR_FD; /* User mode. */ \
167 regs->regs[15] = new_sp
169 /* Forward declaration, a strange C thing */
173 /* Free all resources held by a thread. */
174 extern void release_thread(struct task_struct
*);
176 /* Prepare to copy thread state - unlazy all lazy status */
177 #define prepare_to_copy(tsk) do { } while (0)
180 * create a kernel thread without removing it from tasklists
182 extern int kernel_thread(int (*fn
)(void *), void * arg
, unsigned long flags
);
184 /* Copy and release all segment info associated with a VM */
185 #define copy_segments(p, mm) do { } while(0)
186 #define release_segments(mm) do { } while(0)
189 * FPU lazy state save handling.
192 static __inline__
void disable_fpu(void)
194 unsigned long __dummy
;
196 /* Set FD flag in SR */
197 __asm__
__volatile__("stc sr, %0\n\t"
204 static __inline__
void enable_fpu(void)
206 unsigned long __dummy
;
208 /* Clear out FD flag in SR */
209 __asm__
__volatile__("stc sr, %0\n\t"
216 static __inline__
void release_fpu(struct pt_regs
*regs
)
221 static __inline__
void grab_fpu(struct pt_regs
*regs
)
226 extern void save_fpu(struct task_struct
*__tsk
, struct pt_regs
*regs
);
228 #define unlazy_fpu(tsk, regs) do { \
229 if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { \
230 save_fpu(tsk, regs); \
234 #define clear_fpu(tsk, regs) do { \
235 if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { \
236 clear_tsk_thread_flag(tsk, TIF_USEDFPU); \
241 /* Double presision, NANS as NANS, rounding to nearest, no exceptions */
242 #define FPSCR_INIT 0x00080000
244 #define FPSCR_CAUSE_MASK 0x0001f000 /* Cause bits */
245 #define FPSCR_FLAG_MASK 0x0000007c /* Flag bits */
248 * Return saved PC of a blocked thread.
250 #define thread_saved_pc(tsk) (tsk->thread.pc)
252 void show_trace(struct task_struct
*tsk
, unsigned long *sp
,
253 struct pt_regs
*regs
);
254 extern unsigned long get_wchan(struct task_struct
*p
);
256 #define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc)
257 #define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[15])
259 #define cpu_sleep() __asm__ __volatile__ ("sleep" : : : "memory")
260 #define cpu_relax() barrier()
262 #if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH3) || \
263 defined(CONFIG_CPU_SH4)
264 #define PREFETCH_STRIDE L1_CACHE_BYTES
265 #define ARCH_HAS_PREFETCH
266 #define ARCH_HAS_PREFETCHW
267 static inline void prefetch(void *x
)
269 __asm__
__volatile__ ("pref @%0\n\t" : : "r" (x
) : "memory");
272 #define prefetchw(x) prefetch(x)
275 #ifdef CONFIG_VSYSCALL
276 extern int vsyscall_init(void);
278 #define vsyscall_init() do { } while (0)
281 /* arch/sh/kernel/setup.c */
282 const char *get_cpu_subtype(struct sh_cpuinfo
*c
);
284 #endif /* __KERNEL__ */
285 #endif /* __ASM_SH_PROCESSOR_H */