3 * Copyright 2004 BEAM Ltd.
4 * Copyright 2002 Tungsten Graphics, Inc.
5 * Copyright 2005 Thomas Hellstrom.
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * BEAM LTD, TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
24 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
25 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
26 * DEALINGS IN THE SOFTWARE.
29 * Terry Barnaby <terry1@beam.ltd.uk>
30 * Keith Whitwell <keith@tungstengraphics.com>
31 * Thomas Hellstrom <unichrome@shipmail.org>
33 * This code provides standard DRM access to the Via Unichrome / Pro Vertical blank
34 * interrupt, as well as an infrastructure to handle other interrupts of the chip.
35 * The refresh rate is also calculated for video playback sync purposes.
43 #define VIA_REG_INTERRUPT 0x200
45 /* VIA_REG_INTERRUPT */
46 #define VIA_IRQ_GLOBAL (1 << 31)
47 #define VIA_IRQ_VBLANK_ENABLE (1 << 19)
48 #define VIA_IRQ_VBLANK_PENDING (1 << 3)
49 #define VIA_IRQ_HQV0_ENABLE (1 << 11)
50 #define VIA_IRQ_HQV1_ENABLE (1 << 25)
51 #define VIA_IRQ_HQV0_PENDING (1 << 9)
52 #define VIA_IRQ_HQV1_PENDING (1 << 10)
53 #define VIA_IRQ_DMA0_DD_ENABLE (1 << 20)
54 #define VIA_IRQ_DMA0_TD_ENABLE (1 << 21)
55 #define VIA_IRQ_DMA1_DD_ENABLE (1 << 22)
56 #define VIA_IRQ_DMA1_TD_ENABLE (1 << 23)
57 #define VIA_IRQ_DMA0_DD_PENDING (1 << 4)
58 #define VIA_IRQ_DMA0_TD_PENDING (1 << 5)
59 #define VIA_IRQ_DMA1_DD_PENDING (1 << 6)
60 #define VIA_IRQ_DMA1_TD_PENDING (1 << 7)
64 * Device-specific IRQs go here. This type might need to be extended with
65 * the register if there are multiple IRQ control registers.
66 * Currently we activate the HQV interrupts of Unichrome Pro group A.
69 static maskarray_t via_pro_group_a_irqs
[] = {
70 {VIA_IRQ_HQV0_ENABLE
, VIA_IRQ_HQV0_PENDING
, 0x000003D0, 0x00008010,
72 {VIA_IRQ_HQV1_ENABLE
, VIA_IRQ_HQV1_PENDING
, 0x000013D0, 0x00008010,
74 {VIA_IRQ_DMA0_TD_ENABLE
, VIA_IRQ_DMA0_TD_PENDING
, VIA_PCI_DMA_CSR0
,
75 VIA_DMA_CSR_TA
| VIA_DMA_CSR_TD
, 0x00000008},
76 {VIA_IRQ_DMA1_TD_ENABLE
, VIA_IRQ_DMA1_TD_PENDING
, VIA_PCI_DMA_CSR1
,
77 VIA_DMA_CSR_TA
| VIA_DMA_CSR_TD
, 0x00000008},
79 static int via_num_pro_group_a
=
80 sizeof(via_pro_group_a_irqs
) / sizeof(maskarray_t
);
81 static int via_irqmap_pro_group_a
[] = {0, 1, -1, 2, -1, 3};
83 static maskarray_t via_unichrome_irqs
[] = {
84 {VIA_IRQ_DMA0_TD_ENABLE
, VIA_IRQ_DMA0_TD_PENDING
, VIA_PCI_DMA_CSR0
,
85 VIA_DMA_CSR_TA
| VIA_DMA_CSR_TD
, 0x00000008},
86 {VIA_IRQ_DMA1_TD_ENABLE
, VIA_IRQ_DMA1_TD_PENDING
, VIA_PCI_DMA_CSR1
,
87 VIA_DMA_CSR_TA
| VIA_DMA_CSR_TD
, 0x00000008}
89 static int via_num_unichrome
= sizeof(via_unichrome_irqs
) / sizeof(maskarray_t
);
90 static int via_irqmap_unichrome
[] = {-1, -1, -1, 0, -1, 1};
92 static unsigned time_diff(struct timeval
*now
, struct timeval
*then
)
94 return (now
->tv_usec
>= then
->tv_usec
) ?
95 now
->tv_usec
- then
->tv_usec
:
96 1000000 - (then
->tv_usec
- now
->tv_usec
);
99 irqreturn_t
via_driver_irq_handler(DRM_IRQ_ARGS
)
101 struct drm_device
*dev
= (struct drm_device
*) arg
;
102 drm_via_private_t
*dev_priv
= (drm_via_private_t
*) dev
->dev_private
;
105 struct timeval cur_vblank
;
106 drm_via_irq_t
*cur_irq
= dev_priv
->via_irqs
;
109 status
= VIA_READ(VIA_REG_INTERRUPT
);
110 if (status
& VIA_IRQ_VBLANK_PENDING
) {
111 atomic_inc(&dev
->vbl_received
);
112 if (!(atomic_read(&dev
->vbl_received
) & 0x0F)) {
113 do_gettimeofday(&cur_vblank
);
114 if (dev_priv
->last_vblank_valid
) {
115 dev_priv
->usec_per_vblank
=
116 time_diff(&cur_vblank
,
117 &dev_priv
->last_vblank
) >> 4;
119 dev_priv
->last_vblank
= cur_vblank
;
120 dev_priv
->last_vblank_valid
= 1;
122 if (!(atomic_read(&dev
->vbl_received
) & 0xFF)) {
123 DRM_DEBUG("US per vblank is: %u\n",
124 dev_priv
->usec_per_vblank
);
126 DRM_WAKEUP(&dev
->vbl_queue
);
127 drm_vbl_send_signals(dev
);
131 for (i
= 0; i
< dev_priv
->num_irqs
; ++i
) {
132 if (status
& cur_irq
->pending_mask
) {
133 atomic_inc(&cur_irq
->irq_received
);
134 DRM_WAKEUP(&cur_irq
->irq_queue
);
136 if (dev_priv
->irq_map
[drm_via_irq_dma0_td
] == i
) {
137 via_dmablit_handler(dev
, 0, 1);
138 } else if (dev_priv
->irq_map
[drm_via_irq_dma1_td
] == i
) {
139 via_dmablit_handler(dev
, 1, 1);
145 /* Acknowlege interrupts */
146 VIA_WRITE(VIA_REG_INTERRUPT
, status
);
154 static __inline__
void viadrv_acknowledge_irqs(drm_via_private_t
* dev_priv
)
159 /* Acknowlege interrupts */
160 status
= VIA_READ(VIA_REG_INTERRUPT
);
161 VIA_WRITE(VIA_REG_INTERRUPT
, status
|
162 dev_priv
->irq_pending_mask
);
166 int via_driver_vblank_wait(struct drm_device
* dev
, unsigned int *sequence
)
168 drm_via_private_t
*dev_priv
= (drm_via_private_t
*) dev
->dev_private
;
169 unsigned int cur_vblank
;
174 DRM_ERROR("called with no initialization\n");
178 viadrv_acknowledge_irqs(dev_priv
);
180 /* Assume that the user has missed the current sequence number
181 * by about a day rather than she wants to wait for years
182 * using vertical blanks...
185 DRM_WAIT_ON(ret
, dev
->vbl_queue
, 3 * DRM_HZ
,
186 (((cur_vblank
= atomic_read(&dev
->vbl_received
)) -
187 *sequence
) <= (1 << 23)));
189 *sequence
= cur_vblank
;
194 via_driver_irq_wait(struct drm_device
* dev
, unsigned int irq
, int force_sequence
,
195 unsigned int *sequence
)
197 drm_via_private_t
*dev_priv
= (drm_via_private_t
*) dev
->dev_private
;
198 unsigned int cur_irq_sequence
;
199 drm_via_irq_t
*cur_irq
;
207 DRM_ERROR("called with no initialization\n");
211 if (irq
>= drm_via_irq_num
) {
212 DRM_ERROR("Trying to wait on unknown irq %d\n", irq
);
216 real_irq
= dev_priv
->irq_map
[irq
];
219 DRM_ERROR("Video IRQ %d not available on this hardware.\n",
224 masks
= dev_priv
->irq_masks
;
225 cur_irq
= dev_priv
->via_irqs
+ real_irq
;
227 if (masks
[real_irq
][2] && !force_sequence
) {
228 DRM_WAIT_ON(ret
, cur_irq
->irq_queue
, 3 * DRM_HZ
,
229 ((VIA_READ(masks
[irq
][2]) & masks
[irq
][3]) ==
231 cur_irq_sequence
= atomic_read(&cur_irq
->irq_received
);
233 DRM_WAIT_ON(ret
, cur_irq
->irq_queue
, 3 * DRM_HZ
,
234 (((cur_irq_sequence
=
235 atomic_read(&cur_irq
->irq_received
)) -
236 *sequence
) <= (1 << 23)));
238 *sequence
= cur_irq_sequence
;
246 void via_driver_irq_preinstall(struct drm_device
* dev
)
248 drm_via_private_t
*dev_priv
= (drm_via_private_t
*) dev
->dev_private
;
250 drm_via_irq_t
*cur_irq
;
253 DRM_DEBUG("dev_priv: %p\n", dev_priv
);
255 cur_irq
= dev_priv
->via_irqs
;
257 dev_priv
->irq_enable_mask
= VIA_IRQ_VBLANK_ENABLE
;
258 dev_priv
->irq_pending_mask
= VIA_IRQ_VBLANK_PENDING
;
260 if (dev_priv
->chipset
== VIA_PRO_GROUP_A
||
261 dev_priv
->chipset
== VIA_DX9_0
) {
262 dev_priv
->irq_masks
= via_pro_group_a_irqs
;
263 dev_priv
->num_irqs
= via_num_pro_group_a
;
264 dev_priv
->irq_map
= via_irqmap_pro_group_a
;
266 dev_priv
->irq_masks
= via_unichrome_irqs
;
267 dev_priv
->num_irqs
= via_num_unichrome
;
268 dev_priv
->irq_map
= via_irqmap_unichrome
;
271 for (i
= 0; i
< dev_priv
->num_irqs
; ++i
) {
272 atomic_set(&cur_irq
->irq_received
, 0);
273 cur_irq
->enable_mask
= dev_priv
->irq_masks
[i
][0];
274 cur_irq
->pending_mask
= dev_priv
->irq_masks
[i
][1];
275 DRM_INIT_WAITQUEUE(&cur_irq
->irq_queue
);
276 dev_priv
->irq_enable_mask
|= cur_irq
->enable_mask
;
277 dev_priv
->irq_pending_mask
|= cur_irq
->pending_mask
;
280 DRM_DEBUG("Initializing IRQ %d\n", i
);
283 dev_priv
->last_vblank_valid
= 0;
285 /* Clear VSync interrupt regs */
286 status
= VIA_READ(VIA_REG_INTERRUPT
);
287 VIA_WRITE(VIA_REG_INTERRUPT
, status
&
288 ~(dev_priv
->irq_enable_mask
));
290 /* Clear bits if they're already high */
291 viadrv_acknowledge_irqs(dev_priv
);
295 void via_driver_irq_postinstall(struct drm_device
* dev
)
297 drm_via_private_t
*dev_priv
= (drm_via_private_t
*) dev
->dev_private
;
302 status
= VIA_READ(VIA_REG_INTERRUPT
);
303 VIA_WRITE(VIA_REG_INTERRUPT
, status
| VIA_IRQ_GLOBAL
304 | dev_priv
->irq_enable_mask
);
306 /* Some magic, oh for some data sheets ! */
308 VIA_WRITE8(0x83d4, 0x11);
309 VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) | 0x30);
314 void via_driver_irq_uninstall(struct drm_device
* dev
)
316 drm_via_private_t
*dev_priv
= (drm_via_private_t
*) dev
->dev_private
;
322 /* Some more magic, oh for some data sheets ! */
324 VIA_WRITE8(0x83d4, 0x11);
325 VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) & ~0x30);
327 status
= VIA_READ(VIA_REG_INTERRUPT
);
328 VIA_WRITE(VIA_REG_INTERRUPT
, status
&
329 ~(VIA_IRQ_VBLANK_ENABLE
| dev_priv
->irq_enable_mask
));
333 int via_wait_irq(struct drm_device
*dev
, void *data
, struct drm_file
*file_priv
)
335 drm_via_irqwait_t
*irqwait
= data
;
338 drm_via_private_t
*dev_priv
= (drm_via_private_t
*) dev
->dev_private
;
339 drm_via_irq_t
*cur_irq
= dev_priv
->via_irqs
;
345 if (irqwait
->request
.irq
>= dev_priv
->num_irqs
) {
346 DRM_ERROR("Trying to wait on unknown irq %d\n",
347 irqwait
->request
.irq
);
351 cur_irq
+= irqwait
->request
.irq
;
353 switch (irqwait
->request
.type
& ~VIA_IRQ_FLAGS_MASK
) {
354 case VIA_IRQ_RELATIVE
:
355 irqwait
->request
.sequence
+= atomic_read(&cur_irq
->irq_received
);
356 irqwait
->request
.type
&= ~_DRM_VBLANK_RELATIVE
;
357 case VIA_IRQ_ABSOLUTE
:
363 if (irqwait
->request
.type
& VIA_IRQ_SIGNAL
) {
364 DRM_ERROR("Signals on Via IRQs not implemented yet.\n");
368 force_sequence
= (irqwait
->request
.type
& VIA_IRQ_FORCE_SEQUENCE
);
370 ret
= via_driver_irq_wait(dev
, irqwait
->request
.irq
, force_sequence
,
371 &irqwait
->request
.sequence
);
372 do_gettimeofday(&now
);
373 irqwait
->reply
.tval_sec
= now
.tv_sec
;
374 irqwait
->reply
.tval_usec
= now
.tv_usec
;