drivers/char/drm/ati_pcigart.c

   1 /**
   2  * \file ati_pcigart.c
   3  * ATI PCI GART support
   4  *
   5  * \author Gareth Hughes <gareth@valinux.com>
   6  */
   7
   8 /*
   9  * Created: Wed Dec 13 21:52:19 2000 by gareth@valinux.com
  10  *
  11  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
  12  * All Rights Reserved.
  13  *
  14  * Permission is hereby granted, free of charge, to any person obtaining a
  15  * copy of this software and associated documentation files (the "Software"),
  16  * to deal in the Software without restriction, including without limitation
  17  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  18  * and/or sell copies of the Software, and to permit persons to whom the
  19  * Software is furnished to do so, subject to the following conditions:
  20  *
  21  * The above copyright notice and this permission notice (including the next
  22  * paragraph) shall be included in all copies or substantial portions of the
  23  * Software.
  24  *
  25  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  26  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  27  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  28  * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  29  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  30  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  31  * DEALINGS IN THE SOFTWARE.
  32  */
  33
  34 #include "drmP.h"
  35
  36 # define ATI_PCIGART_PAGE_SIZE          4096    /**< PCI GART page size */
  37
  38 static int drm_ati_alloc_pcigart_table(struct drm_device *dev,
  39                                        struct drm_ati_pcigart_info *gart_info)
  40 {
  41         gart_info->table_handle = drm_pci_alloc(dev, gart_info->table_size,
  42                                                 PAGE_SIZE,
  43                                                 gart_info->table_mask);
  44         if (gart_info->table_handle == NULL)
  45                 return -ENOMEM;
  46
  47         return 0;
  48 }
  49
  50 static void drm_ati_free_pcigart_table(struct drm_device *dev,
  51                                        struct drm_ati_pcigart_info *gart_info)
  52 {
  53         drm_pci_free(dev, gart_info->table_handle);
  54         gart_info->table_handle = NULL;
  55 }
  56
  57 int drm_ati_pcigart_cleanup(struct drm_device *dev, struct drm_ati_pcigart_info *gart_info)
  58 {
  59         struct drm_sg_mem *entry = dev->sg;
  60         unsigned long pages;
  61         int i;
  62         int max_pages;
  63
  64         /* we need to support large memory configurations */
  65         if (!entry) {
  66                 DRM_ERROR("no scatter/gather memory!\n");
  67                 return 0;
  68         }
  69
  70         if (gart_info->bus_addr) {
  71
  72                 max_pages = (gart_info->table_size / sizeof(u32));
  73                 pages = (entry->pages <= max_pages)
  74                   ? entry->pages : max_pages;
  75
  76                 for (i = 0; i < pages; i++) {
  77                         if (!entry->busaddr[i])
  78                                 break;
  79                         pci_unmap_single(dev->pdev, entry->busaddr[i],
  80                                          PAGE_SIZE, PCI_DMA_TODEVICE);
  81                 }
  82
  83                 if (gart_info->gart_table_location == DRM_ATI_GART_MAIN)
  84                         gart_info->bus_addr = 0;
  85         }
  86
  87         if (gart_info->gart_table_location == DRM_ATI_GART_MAIN &&
  88             gart_info->table_handle) {
  89                 drm_ati_free_pcigart_table(dev, gart_info);
  90         }
  91
  92         return 1;
  93 }
  94 EXPORT_SYMBOL(drm_ati_pcigart_cleanup);
  95
  96 int drm_ati_pcigart_init(struct drm_device *dev, struct drm_ati_pcigart_info *gart_info)
  97 {
  98         struct drm_sg_mem *entry = dev->sg;
  99         void *address = NULL;
 100         unsigned long pages;
 101         u32 *pci_gart, page_base;
 102         dma_addr_t bus_address = 0;
 103         int i, j, ret = 0;
 104         int max_pages;
 105
 106         if (!entry) {
 107                 DRM_ERROR("no scatter/gather memory!\n");
 108                 goto done;
 109         }
 110
 111         if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) {
 112                 DRM_DEBUG("PCI: no table in VRAM: using normal RAM\n");
 113
 114                 ret = drm_ati_alloc_pcigart_table(dev, gart_info);
 115                 if (ret) {
 116                         DRM_ERROR("cannot allocate PCI GART page!\n");
 117                         goto done;
 118                 }
 119
 120                 address = gart_info->table_handle->vaddr;
 121                 bus_address = gart_info->table_handle->busaddr;
 122         } else {
 123                 address = gart_info->addr;
 124                 bus_address = gart_info->bus_addr;
 125                 DRM_DEBUG("PCI: Gart Table: VRAM %08LX mapped at %08lX\n",
 126                           (unsigned long long)bus_address,
 127                           (unsigned long)address);
 128         }
 129
 130         pci_gart = (u32 *) address;
 131
 132         max_pages = (gart_info->table_size / sizeof(u32));
 133         pages = (entry->pages <= max_pages)
 134             ? entry->pages : max_pages;
 135
 136         memset(pci_gart, 0, max_pages * sizeof(u32));
 137
 138         for (i = 0; i < pages; i++) {
 139                 /* we need to support large memory configurations */
 140                 entry->busaddr[i] = pci_map_single(dev->pdev,
 141                                                    page_address(entry->
 142                                                                 pagelist[i]),
 143                                                    PAGE_SIZE, PCI_DMA_TODEVICE);
 144                 if (entry->busaddr[i] == 0) {
 145                         DRM_ERROR("unable to map PCIGART pages!\n");
 146                         drm_ati_pcigart_cleanup(dev, gart_info);
 147                         address = NULL;
 148                         bus_address = 0;
 149                         goto done;
 150                 }
 151                 page_base = (u32) entry->busaddr[i];
 152
 153                 for (j = 0; j < (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE); j++) {
 154                         switch(gart_info->gart_reg_if) {
 155                         case DRM_ATI_GART_IGP:
 156                                 *pci_gart = cpu_to_le32((page_base) | 0xc);
 157                                 break;
 158                         case DRM_ATI_GART_PCIE:
 159                                 *pci_gart = cpu_to_le32((page_base >> 8) | 0xc);
 160                                 break;
 161                         default:
 162                         case DRM_ATI_GART_PCI:
 163                                 *pci_gart = cpu_to_le32(page_base);
 164                                 break;
 165                         }
 166                         pci_gart++;
 167                         page_base += ATI_PCIGART_PAGE_SIZE;
 168                 }
 169         }
 170
 171         if (gart_info->gart_table_location == DRM_ATI_GART_MAIN)
 172                 dma_sync_single_for_device(&dev->pdev->dev,
 173                                            bus_address,
 174                                            max_pages * sizeof(u32),
 175                                            PCI_DMA_TODEVICE);
 176
 177         ret = 1;
 178
 179 #if defined(__i386__) || defined(__x86_64__)
 180         wbinvd();
 181 #else
 182         mb();
 183 #endif
 184
 185       done:
 186         gart_info->addr = address;
 187         gart_info->bus_addr = bus_address;
 188         return ret;
 189 }
 190 EXPORT_SYMBOL(drm_ati_pcigart_init);