2 * RTC class driver for "CMOS RTC": PCs, ACPI, etc
4 * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c)
5 * Copyright (C) 2006 David Brownell (convert to new framework)
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
14 * The original "cmos clock" chip was an MC146818 chip, now obsolete.
15 * That defined the register interface now provided by all PCs, some
16 * non-PC systems, and incorporated into ACPI. Modern PC chipsets
17 * integrate an MC146818 clone in their southbridge, and boards use
18 * that instead of discrete clones like the DS12887 or M48T86. There
19 * are also clones that connect using the LPC bus.
21 * That register API is also used directly by various other drivers
22 * (notably for integrated NVRAM), infrastructure (x86 has code to
23 * bypass the RTC framework, directly reading the RTC during boot
24 * and updating minutes/seconds for systems using NTP synch) and
25 * utilities (like userspace 'hwclock', if no /dev node exists).
27 * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with
28 * interrupts disabled, holding the global rtc_lock, to exclude those
29 * other drivers and utilities on correctly configured systems.
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/init.h>
34 #include <linux/interrupt.h>
35 #include <linux/spinlock.h>
36 #include <linux/platform_device.h>
37 #include <linux/mod_devicetable.h>
39 /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
40 #include <asm-generic/rtc.h>
43 struct rtc_device
*rtc
;
46 struct resource
*iomem
;
48 void (*wake_on
)(struct device
*);
49 void (*wake_off
)(struct device
*);
54 /* newer hardware extends the original register set */
60 /* both platform and pnp busses use negative numbers for invalid irqs */
61 #define is_valid_irq(n) ((n) >= 0)
63 static const char driver_name
[] = "rtc_cmos";
65 /* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear;
66 * always mask it against the irq enable bits in RTC_CONTROL. Bit values
67 * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both.
69 #define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF)
71 static inline int is_intr(u8 rtc_intr
)
73 if (!(rtc_intr
& RTC_IRQF
))
75 return rtc_intr
& RTC_IRQMASK
;
78 /*----------------------------------------------------------------*/
80 /* Much modern x86 hardware has HPETs (10+ MHz timers) which, because
81 * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly
82 * used in a broken "legacy replacement" mode. The breakage includes
83 * HPET #1 hijacking the IRQ for this RTC, and being unavailable for
86 * When that broken mode is in use, platform glue provides a partial
87 * emulation of hardware RTC IRQ facilities using HPET #1. We don't
88 * want to use HPET for anything except those IRQs though...
90 #ifdef CONFIG_HPET_EMULATE_RTC
94 static inline int is_hpet_enabled(void)
99 static inline int hpet_mask_rtc_irq_bit(unsigned long mask
)
104 static inline int hpet_set_rtc_irq_bit(unsigned long mask
)
110 hpet_set_alarm_time(unsigned char hrs
, unsigned char min
, unsigned char sec
)
115 static inline int hpet_set_periodic_freq(unsigned long freq
)
120 static inline int hpet_rtc_dropped_irq(void)
125 static inline int hpet_rtc_timer_init(void)
130 extern irq_handler_t hpet_rtc_interrupt
;
132 static inline int hpet_register_irq_handler(irq_handler_t handler
)
137 static inline int hpet_unregister_irq_handler(irq_handler_t handler
)
144 /*----------------------------------------------------------------*/
146 static int cmos_read_time(struct device
*dev
, struct rtc_time
*t
)
148 /* REVISIT: if the clock has a "century" register, use
149 * that instead of the heuristic in get_rtc_time().
150 * That'll make Y3K compatility (year > 2070) easy!
156 static int cmos_set_time(struct device
*dev
, struct rtc_time
*t
)
158 /* REVISIT: set the "century" register if available
160 * NOTE: this ignores the issue whereby updating the seconds
161 * takes effect exactly 500ms after we write the register.
162 * (Also queueing and other delays before we get this far.)
164 return set_rtc_time(t
);
167 static int cmos_read_alarm(struct device
*dev
, struct rtc_wkalrm
*t
)
169 struct cmos_rtc
*cmos
= dev_get_drvdata(dev
);
170 unsigned char rtc_control
;
172 if (!is_valid_irq(cmos
->irq
))
175 /* Basic alarms only support hour, minute, and seconds fields.
176 * Some also support day and month, for alarms up to a year in
179 t
->time
.tm_mday
= -1;
182 spin_lock_irq(&rtc_lock
);
183 t
->time
.tm_sec
= CMOS_READ(RTC_SECONDS_ALARM
);
184 t
->time
.tm_min
= CMOS_READ(RTC_MINUTES_ALARM
);
185 t
->time
.tm_hour
= CMOS_READ(RTC_HOURS_ALARM
);
187 if (cmos
->day_alrm
) {
188 /* ignore upper bits on readback per ACPI spec */
189 t
->time
.tm_mday
= CMOS_READ(cmos
->day_alrm
) & 0x3f;
190 if (!t
->time
.tm_mday
)
191 t
->time
.tm_mday
= -1;
193 if (cmos
->mon_alrm
) {
194 t
->time
.tm_mon
= CMOS_READ(cmos
->mon_alrm
);
200 rtc_control
= CMOS_READ(RTC_CONTROL
);
201 spin_unlock_irq(&rtc_lock
);
203 /* REVISIT this assumes PC style usage: always BCD */
205 if (((unsigned)t
->time
.tm_sec
) < 0x60)
206 t
->time
.tm_sec
= BCD2BIN(t
->time
.tm_sec
);
209 if (((unsigned)t
->time
.tm_min
) < 0x60)
210 t
->time
.tm_min
= BCD2BIN(t
->time
.tm_min
);
213 if (((unsigned)t
->time
.tm_hour
) < 0x24)
214 t
->time
.tm_hour
= BCD2BIN(t
->time
.tm_hour
);
216 t
->time
.tm_hour
= -1;
218 if (cmos
->day_alrm
) {
219 if (((unsigned)t
->time
.tm_mday
) <= 0x31)
220 t
->time
.tm_mday
= BCD2BIN(t
->time
.tm_mday
);
222 t
->time
.tm_mday
= -1;
223 if (cmos
->mon_alrm
) {
224 if (((unsigned)t
->time
.tm_mon
) <= 0x12)
225 t
->time
.tm_mon
= BCD2BIN(t
->time
.tm_mon
) - 1;
230 t
->time
.tm_year
= -1;
232 t
->enabled
= !!(rtc_control
& RTC_AIE
);
238 static void cmos_checkintr(struct cmos_rtc
*cmos
, unsigned char rtc_control
)
240 unsigned char rtc_intr
;
242 /* NOTE after changing RTC_xIE bits we always read INTR_FLAGS;
243 * allegedly some older rtcs need that to handle irqs properly
245 rtc_intr
= CMOS_READ(RTC_INTR_FLAGS
);
247 if (is_hpet_enabled())
250 rtc_intr
&= (rtc_control
& RTC_IRQMASK
) | RTC_IRQF
;
251 if (is_intr(rtc_intr
))
252 rtc_update_irq(cmos
->rtc
, 1, rtc_intr
);
255 static void cmos_irq_enable(struct cmos_rtc
*cmos
, unsigned char mask
)
257 unsigned char rtc_control
;
259 /* flush any pending IRQ status, notably for update irqs,
260 * before we enable new IRQs
262 rtc_control
= CMOS_READ(RTC_CONTROL
);
263 cmos_checkintr(cmos
, rtc_control
);
266 CMOS_WRITE(rtc_control
, RTC_CONTROL
);
267 hpet_set_rtc_irq_bit(mask
);
269 cmos_checkintr(cmos
, rtc_control
);
272 static void cmos_irq_disable(struct cmos_rtc
*cmos
, unsigned char mask
)
274 unsigned char rtc_control
;
276 rtc_control
= CMOS_READ(RTC_CONTROL
);
277 rtc_control
&= ~mask
;
278 CMOS_WRITE(rtc_control
, RTC_CONTROL
);
279 hpet_mask_rtc_irq_bit(mask
);
281 cmos_checkintr(cmos
, rtc_control
);
284 static int cmos_set_alarm(struct device
*dev
, struct rtc_wkalrm
*t
)
286 struct cmos_rtc
*cmos
= dev_get_drvdata(dev
);
287 unsigned char mon
, mday
, hrs
, min
, sec
;
289 if (!is_valid_irq(cmos
->irq
))
292 /* REVISIT this assumes PC style usage: always BCD */
294 /* Writing 0xff means "don't care" or "match all". */
296 mon
= t
->time
.tm_mon
+ 1;
297 mon
= (mon
<= 12) ? BIN2BCD(mon
) : 0xff;
299 mday
= t
->time
.tm_mday
;
300 mday
= (mday
>= 1 && mday
<= 31) ? BIN2BCD(mday
) : 0xff;
302 hrs
= t
->time
.tm_hour
;
303 hrs
= (hrs
< 24) ? BIN2BCD(hrs
) : 0xff;
305 min
= t
->time
.tm_min
;
306 min
= (min
< 60) ? BIN2BCD(min
) : 0xff;
308 sec
= t
->time
.tm_sec
;
309 sec
= (sec
< 60) ? BIN2BCD(sec
) : 0xff;
311 spin_lock_irq(&rtc_lock
);
313 /* next rtc irq must not be from previous alarm setting */
314 cmos_irq_disable(cmos
, RTC_AIE
);
317 CMOS_WRITE(hrs
, RTC_HOURS_ALARM
);
318 CMOS_WRITE(min
, RTC_MINUTES_ALARM
);
319 CMOS_WRITE(sec
, RTC_SECONDS_ALARM
);
321 /* the system may support an "enhanced" alarm */
322 if (cmos
->day_alrm
) {
323 CMOS_WRITE(mday
, cmos
->day_alrm
);
325 CMOS_WRITE(mon
, cmos
->mon_alrm
);
328 /* FIXME the HPET alarm glue currently ignores day_alrm
331 hpet_set_alarm_time(t
->time
.tm_hour
, t
->time
.tm_min
, t
->time
.tm_sec
);
334 cmos_irq_enable(cmos
, RTC_AIE
);
336 spin_unlock_irq(&rtc_lock
);
341 static int cmos_irq_set_freq(struct device
*dev
, int freq
)
343 struct cmos_rtc
*cmos
= dev_get_drvdata(dev
);
347 if (!is_valid_irq(cmos
->irq
))
350 /* 0 = no irqs; 1 = 2^15 Hz ... 15 = 2^0 Hz */
356 spin_lock_irqsave(&rtc_lock
, flags
);
357 hpet_set_periodic_freq(freq
);
358 CMOS_WRITE(RTC_REF_CLCK_32KHZ
| f
, RTC_FREQ_SELECT
);
359 spin_unlock_irqrestore(&rtc_lock
, flags
);
364 static int cmos_irq_set_state(struct device
*dev
, int enabled
)
366 struct cmos_rtc
*cmos
= dev_get_drvdata(dev
);
369 if (!is_valid_irq(cmos
->irq
))
372 spin_lock_irqsave(&rtc_lock
, flags
);
375 cmos_irq_enable(cmos
, RTC_PIE
);
377 cmos_irq_disable(cmos
, RTC_PIE
);
379 spin_unlock_irqrestore(&rtc_lock
, flags
);
383 #if defined(CONFIG_RTC_INTF_DEV) || defined(CONFIG_RTC_INTF_DEV_MODULE)
386 cmos_rtc_ioctl(struct device
*dev
, unsigned int cmd
, unsigned long arg
)
388 struct cmos_rtc
*cmos
= dev_get_drvdata(dev
);
396 if (!is_valid_irq(cmos
->irq
))
399 /* PIE ON/OFF is handled by cmos_irq_set_state() */
404 spin_lock_irqsave(&rtc_lock
, flags
);
406 case RTC_AIE_OFF
: /* alarm off */
407 cmos_irq_disable(cmos
, RTC_AIE
);
409 case RTC_AIE_ON
: /* alarm on */
410 cmos_irq_enable(cmos
, RTC_AIE
);
412 case RTC_UIE_OFF
: /* update off */
413 cmos_irq_disable(cmos
, RTC_UIE
);
415 case RTC_UIE_ON
: /* update on */
416 cmos_irq_enable(cmos
, RTC_UIE
);
419 spin_unlock_irqrestore(&rtc_lock
, flags
);
424 #define cmos_rtc_ioctl NULL
427 #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE)
429 static int cmos_procfs(struct device
*dev
, struct seq_file
*seq
)
431 struct cmos_rtc
*cmos
= dev_get_drvdata(dev
);
432 unsigned char rtc_control
, valid
;
434 spin_lock_irq(&rtc_lock
);
435 rtc_control
= CMOS_READ(RTC_CONTROL
);
436 valid
= CMOS_READ(RTC_VALID
);
437 spin_unlock_irq(&rtc_lock
);
439 /* NOTE: at least ICH6 reports battery status using a different
440 * (non-RTC) bit; and SQWE is ignored on many current systems.
442 return seq_printf(seq
,
443 "periodic_IRQ\t: %s\n"
445 "HPET_emulated\t: %s\n"
446 // "square_wave\t: %s\n"
449 "periodic_freq\t: %d\n"
450 "batt_status\t: %s\n",
451 (rtc_control
& RTC_PIE
) ? "yes" : "no",
452 (rtc_control
& RTC_UIE
) ? "yes" : "no",
453 is_hpet_enabled() ? "yes" : "no",
454 // (rtc_control & RTC_SQWE) ? "yes" : "no",
455 // (rtc_control & RTC_DM_BINARY) ? "no" : "yes",
456 (rtc_control
& RTC_DST_EN
) ? "yes" : "no",
458 (valid
& RTC_VRT
) ? "okay" : "dead");
462 #define cmos_procfs NULL
465 static const struct rtc_class_ops cmos_rtc_ops
= {
466 .ioctl
= cmos_rtc_ioctl
,
467 .read_time
= cmos_read_time
,
468 .set_time
= cmos_set_time
,
469 .read_alarm
= cmos_read_alarm
,
470 .set_alarm
= cmos_set_alarm
,
472 .irq_set_freq
= cmos_irq_set_freq
,
473 .irq_set_state
= cmos_irq_set_state
,
476 /*----------------------------------------------------------------*/
479 * All these chips have at least 64 bytes of address space, shared by
480 * RTC registers and NVRAM. Most of those bytes of NVRAM are used
481 * by boot firmware. Modern chips have 128 or 256 bytes.
484 #define NVRAM_OFFSET (RTC_REG_D + 1)
487 cmos_nvram_read(struct kobject
*kobj
, struct bin_attribute
*attr
,
488 char *buf
, loff_t off
, size_t count
)
492 if (unlikely(off
>= attr
->size
))
494 if ((off
+ count
) > attr
->size
)
495 count
= attr
->size
- off
;
497 spin_lock_irq(&rtc_lock
);
498 for (retval
= 0, off
+= NVRAM_OFFSET
; count
--; retval
++, off
++)
499 *buf
++ = CMOS_READ(off
);
500 spin_unlock_irq(&rtc_lock
);
506 cmos_nvram_write(struct kobject
*kobj
, struct bin_attribute
*attr
,
507 char *buf
, loff_t off
, size_t count
)
509 struct cmos_rtc
*cmos
;
512 cmos
= dev_get_drvdata(container_of(kobj
, struct device
, kobj
));
513 if (unlikely(off
>= attr
->size
))
515 if ((off
+ count
) > attr
->size
)
516 count
= attr
->size
- off
;
518 /* NOTE: on at least PCs and Ataris, the boot firmware uses a
519 * checksum on part of the NVRAM data. That's currently ignored
520 * here. If userspace is smart enough to know what fields of
521 * NVRAM to update, updating checksums is also part of its job.
523 spin_lock_irq(&rtc_lock
);
524 for (retval
= 0, off
+= NVRAM_OFFSET
; count
--; retval
++, off
++) {
525 /* don't trash RTC registers */
526 if (off
== cmos
->day_alrm
527 || off
== cmos
->mon_alrm
528 || off
== cmos
->century
)
531 CMOS_WRITE(*buf
++, off
);
533 spin_unlock_irq(&rtc_lock
);
538 static struct bin_attribute nvram
= {
541 .mode
= S_IRUGO
| S_IWUSR
,
542 .owner
= THIS_MODULE
,
545 .read
= cmos_nvram_read
,
546 .write
= cmos_nvram_write
,
547 /* size gets set up later */
550 /*----------------------------------------------------------------*/
552 static struct cmos_rtc cmos_rtc
;
554 static irqreturn_t
cmos_interrupt(int irq
, void *p
)
559 spin_lock(&rtc_lock
);
561 /* When the HPET interrupt handler calls us, the interrupt
562 * status is passed as arg1 instead of the irq number. But
563 * always clear irq status, even when HPET is in the way.
565 * Note that HPET and RTC are almost certainly out of phase,
566 * giving different IRQ status ...
568 irqstat
= CMOS_READ(RTC_INTR_FLAGS
);
569 rtc_control
= CMOS_READ(RTC_CONTROL
);
570 if (is_hpet_enabled())
571 irqstat
= (unsigned long)irq
& 0xF0;
572 irqstat
&= (rtc_control
& RTC_IRQMASK
) | RTC_IRQF
;
574 /* All Linux RTC alarms should be treated as if they were oneshot.
575 * Similar code may be needed in system wakeup paths, in case the
576 * alarm woke the system.
578 if (irqstat
& RTC_AIE
) {
579 rtc_control
&= ~RTC_AIE
;
580 CMOS_WRITE(rtc_control
, RTC_CONTROL
);
581 hpet_mask_rtc_irq_bit(RTC_AIE
);
583 CMOS_READ(RTC_INTR_FLAGS
);
585 spin_unlock(&rtc_lock
);
587 if (is_intr(irqstat
)) {
588 rtc_update_irq(p
, 1, irqstat
);
598 #define INITSECTION __init
601 static int INITSECTION
602 cmos_do_probe(struct device
*dev
, struct resource
*ports
, int rtc_irq
)
604 struct cmos_rtc_board_info
*info
= dev
->platform_data
;
606 unsigned char rtc_control
;
607 unsigned address_space
;
609 /* there can be only one ... */
616 /* Claim I/O ports ASAP, minimizing conflict with legacy driver.
618 * REVISIT non-x86 systems may instead use memory space resources
619 * (needing ioremap etc), not i/o space resources like this ...
621 ports
= request_region(ports
->start
,
622 ports
->end
+ 1 - ports
->start
,
625 dev_dbg(dev
, "i/o registers already in use\n");
629 cmos_rtc
.irq
= rtc_irq
;
630 cmos_rtc
.iomem
= ports
;
632 /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM
633 * driver did, but don't reject unknown configs. Old hardware
634 * won't address 128 bytes, and for now we ignore the way newer
635 * chips can address 256 bytes (using two more i/o ports).
637 #if defined(CONFIG_ATARI)
639 #elif defined(__i386__) || defined(__x86_64__) || defined(__arm__)
642 #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
646 /* For ACPI systems extension info comes from the FADT. On others,
647 * board specific setup provides it as appropriate. Systems where
648 * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and
649 * some almost-clones) can provide hooks to make that behave.
651 * Note that ACPI doesn't preclude putting these registers into
652 * "extended" areas of the chip, including some that we won't yet
653 * expect CMOS_READ and friends to handle.
656 if (info
->rtc_day_alarm
&& info
->rtc_day_alarm
< 128)
657 cmos_rtc
.day_alrm
= info
->rtc_day_alarm
;
658 if (info
->rtc_mon_alarm
&& info
->rtc_mon_alarm
< 128)
659 cmos_rtc
.mon_alrm
= info
->rtc_mon_alarm
;
660 if (info
->rtc_century
&& info
->rtc_century
< 128)
661 cmos_rtc
.century
= info
->rtc_century
;
663 if (info
->wake_on
&& info
->wake_off
) {
664 cmos_rtc
.wake_on
= info
->wake_on
;
665 cmos_rtc
.wake_off
= info
->wake_off
;
669 cmos_rtc
.rtc
= rtc_device_register(driver_name
, dev
,
670 &cmos_rtc_ops
, THIS_MODULE
);
671 if (IS_ERR(cmos_rtc
.rtc
)) {
672 retval
= PTR_ERR(cmos_rtc
.rtc
);
677 dev_set_drvdata(dev
, &cmos_rtc
);
678 rename_region(ports
, cmos_rtc
.rtc
->dev
.bus_id
);
680 spin_lock_irq(&rtc_lock
);
682 /* force periodic irq to CMOS reset default of 1024Hz;
684 * REVISIT it's been reported that at least one x86_64 ALI mobo
685 * doesn't use 32KHz here ... for portability we might need to
686 * do something about other clock frequencies.
688 cmos_rtc
.rtc
->irq_freq
= 1024;
689 hpet_set_periodic_freq(cmos_rtc
.rtc
->irq_freq
);
690 CMOS_WRITE(RTC_REF_CLCK_32KHZ
| 0x06, RTC_FREQ_SELECT
);
693 cmos_irq_disable(&cmos_rtc
, RTC_PIE
| RTC_AIE
| RTC_UIE
);
695 rtc_control
= CMOS_READ(RTC_CONTROL
);
697 spin_unlock_irq(&rtc_lock
);
699 /* FIXME teach the alarm code how to handle binary mode;
700 * <asm-generic/rtc.h> doesn't know 12-hour mode either.
702 if (!(rtc_control
& RTC_24H
) || (rtc_control
& (RTC_DM_BINARY
))) {
703 dev_dbg(dev
, "only 24-hr BCD mode supported\n");
708 if (is_valid_irq(rtc_irq
)) {
709 irq_handler_t rtc_cmos_int_handler
;
711 if (is_hpet_enabled()) {
714 rtc_cmos_int_handler
= hpet_rtc_interrupt
;
715 err
= hpet_register_irq_handler(cmos_interrupt
);
717 printk(KERN_WARNING
"hpet_register_irq_handler "
718 " failed in rtc_init().");
722 rtc_cmos_int_handler
= cmos_interrupt
;
724 retval
= request_irq(rtc_irq
, rtc_cmos_int_handler
,
725 IRQF_DISABLED
, cmos_rtc
.rtc
->dev
.bus_id
,
728 dev_dbg(dev
, "IRQ %d is already in use\n", rtc_irq
);
732 hpet_rtc_timer_init();
734 /* export at least the first block of NVRAM */
735 nvram
.size
= address_space
- NVRAM_OFFSET
;
736 retval
= sysfs_create_bin_file(&dev
->kobj
, &nvram
);
738 dev_dbg(dev
, "can't create nvram file? %d\n", retval
);
742 pr_info("%s: alarms up to one %s%s%s\n",
743 cmos_rtc
.rtc
->dev
.bus_id
,
744 is_valid_irq(rtc_irq
)
750 cmos_rtc
.century
? ", y3k" : "",
751 is_hpet_enabled() ? ", hpet irqs" : "");
756 if (is_valid_irq(rtc_irq
))
757 free_irq(rtc_irq
, cmos_rtc
.rtc
);
760 rtc_device_unregister(cmos_rtc
.rtc
);
762 release_region(ports
->start
, ports
->end
+ 1 - ports
->start
);
766 static void cmos_do_shutdown(void)
768 spin_lock_irq(&rtc_lock
);
769 cmos_irq_disable(&cmos_rtc
, RTC_IRQMASK
);
770 spin_unlock_irq(&rtc_lock
);
773 static void __exit
cmos_do_remove(struct device
*dev
)
775 struct cmos_rtc
*cmos
= dev_get_drvdata(dev
);
776 struct resource
*ports
;
780 sysfs_remove_bin_file(&dev
->kobj
, &nvram
);
782 if (is_valid_irq(cmos
->irq
)) {
783 free_irq(cmos
->irq
, cmos
->rtc
);
784 hpet_unregister_irq_handler(cmos_interrupt
);
787 rtc_device_unregister(cmos
->rtc
);
791 release_region(ports
->start
, ports
->end
+ 1 - ports
->start
);
795 dev_set_drvdata(dev
, NULL
);
800 static int cmos_suspend(struct device
*dev
, pm_message_t mesg
)
802 struct cmos_rtc
*cmos
= dev_get_drvdata(dev
);
803 int do_wake
= device_may_wakeup(dev
);
806 /* only the alarm might be a wakeup event source */
807 spin_lock_irq(&rtc_lock
);
808 cmos
->suspend_ctrl
= tmp
= CMOS_READ(RTC_CONTROL
);
809 if (tmp
& (RTC_PIE
|RTC_AIE
|RTC_UIE
)) {
813 mask
= RTC_IRQMASK
& ~RTC_AIE
;
817 CMOS_WRITE(tmp
, RTC_CONTROL
);
818 hpet_mask_rtc_irq_bit(mask
);
820 cmos_checkintr(cmos
, tmp
);
822 spin_unlock_irq(&rtc_lock
);
825 cmos
->enabled_wake
= 1;
829 enable_irq_wake(cmos
->irq
);
832 pr_debug("%s: suspend%s, ctrl %02x\n",
833 cmos_rtc
.rtc
->dev
.bus_id
,
834 (tmp
& RTC_AIE
) ? ", alarm may wake" : "",
840 static int cmos_resume(struct device
*dev
)
842 struct cmos_rtc
*cmos
= dev_get_drvdata(dev
);
843 unsigned char tmp
= cmos
->suspend_ctrl
;
845 /* re-enable any irqs previously active */
846 if (tmp
& RTC_IRQMASK
) {
849 if (cmos
->enabled_wake
) {
853 disable_irq_wake(cmos
->irq
);
854 cmos
->enabled_wake
= 0;
857 spin_lock_irq(&rtc_lock
);
859 CMOS_WRITE(tmp
, RTC_CONTROL
);
860 hpet_set_rtc_irq_bit(tmp
& RTC_IRQMASK
);
862 mask
= CMOS_READ(RTC_INTR_FLAGS
);
863 mask
&= (tmp
& RTC_IRQMASK
) | RTC_IRQF
;
864 if (!is_hpet_enabled() || !is_intr(mask
))
867 /* force one-shot behavior if HPET blocked
868 * the wake alarm's irq
870 rtc_update_irq(cmos
->rtc
, 1, mask
);
872 hpet_mask_rtc_irq_bit(RTC_AIE
);
873 } while (mask
& RTC_AIE
);
874 spin_unlock_irq(&rtc_lock
);
877 pr_debug("%s: resume, ctrl %02x\n",
878 cmos_rtc
.rtc
->dev
.bus_id
,
885 #define cmos_suspend NULL
886 #define cmos_resume NULL
889 /*----------------------------------------------------------------*/
891 /* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus.
892 * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs
893 * probably list them in similar PNPBIOS tables; so PNP is more common.
895 * We don't use legacy "poke at the hardware" probing. Ancient PCs that
896 * predate even PNPBIOS should set up platform_bus devices.
901 #include <linux/pnp.h>
904 cmos_pnp_probe(struct pnp_dev
*pnp
, const struct pnp_device_id
*id
)
906 /* REVISIT paranoia argues for a shutdown notifier, since PNP
907 * drivers can't provide shutdown() methods to disable IRQs.
908 * Or better yet, fix PNP to allow those methods...
910 if (pnp_port_start(pnp
,0) == 0x70 && !pnp_irq_valid(pnp
,0))
911 /* Some machines contain a PNP entry for the RTC, but
912 * don't define the IRQ. It should always be safe to
913 * hardcode it in these cases
915 return cmos_do_probe(&pnp
->dev
,
916 pnp_get_resource(pnp
, IORESOURCE_IO
, 0), 8);
918 return cmos_do_probe(&pnp
->dev
,
919 pnp_get_resource(pnp
, IORESOURCE_IO
, 0),
923 static void __exit
cmos_pnp_remove(struct pnp_dev
*pnp
)
925 cmos_do_remove(&pnp
->dev
);
930 static int cmos_pnp_suspend(struct pnp_dev
*pnp
, pm_message_t mesg
)
932 return cmos_suspend(&pnp
->dev
, mesg
);
935 static int cmos_pnp_resume(struct pnp_dev
*pnp
)
937 return cmos_resume(&pnp
->dev
);
941 #define cmos_pnp_suspend NULL
942 #define cmos_pnp_resume NULL
946 static const struct pnp_device_id rtc_ids
[] = {
947 { .id
= "PNP0b00", },
948 { .id
= "PNP0b01", },
949 { .id
= "PNP0b02", },
952 MODULE_DEVICE_TABLE(pnp
, rtc_ids
);
954 static struct pnp_driver cmos_pnp_driver
= {
955 .name
= (char *) driver_name
,
957 .probe
= cmos_pnp_probe
,
958 .remove
= __exit_p(cmos_pnp_remove
),
960 /* flag ensures resume() gets called, and stops syslog spam */
961 .flags
= PNP_DRIVER_RES_DO_NOT_CHANGE
,
962 .suspend
= cmos_pnp_suspend
,
963 .resume
= cmos_pnp_resume
,
966 #endif /* CONFIG_PNP */
968 /*----------------------------------------------------------------*/
970 /* Platform setup should have set up an RTC device, when PNP is
971 * unavailable ... this could happen even on (older) PCs.
974 static int __init
cmos_platform_probe(struct platform_device
*pdev
)
976 return cmos_do_probe(&pdev
->dev
,
977 platform_get_resource(pdev
, IORESOURCE_IO
, 0),
978 platform_get_irq(pdev
, 0));
981 static int __exit
cmos_platform_remove(struct platform_device
*pdev
)
983 cmos_do_remove(&pdev
->dev
);
987 static void cmos_platform_shutdown(struct platform_device
*pdev
)
992 /* work with hotplug and coldplug */
993 MODULE_ALIAS("platform:rtc_cmos");
995 static struct platform_driver cmos_platform_driver
= {
996 .remove
= __exit_p(cmos_platform_remove
),
997 .shutdown
= cmos_platform_shutdown
,
999 .name
= (char *) driver_name
,
1000 .suspend
= cmos_suspend
,
1001 .resume
= cmos_resume
,
1005 static int __init
cmos_init(void)
1008 if (pnp_platform_devices
)
1009 return pnp_register_driver(&cmos_pnp_driver
);
1011 return platform_driver_probe(&cmos_platform_driver
,
1012 cmos_platform_probe
);
1014 return platform_driver_probe(&cmos_platform_driver
,
1015 cmos_platform_probe
);
1016 #endif /* CONFIG_PNP */
1018 module_init(cmos_init
);
1020 static void __exit
cmos_exit(void)
1023 if (pnp_platform_devices
)
1024 pnp_unregister_driver(&cmos_pnp_driver
);
1026 platform_driver_unregister(&cmos_platform_driver
);
1028 platform_driver_unregister(&cmos_platform_driver
);
1029 #endif /* CONFIG_PNP */
1031 module_exit(cmos_exit
);
1034 MODULE_AUTHOR("David Brownell");
1035 MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs");
1036 MODULE_LICENSE("GPL");