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KVM: Fix PDPTR reloading on CR4 writes
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / x86 / kvm / x86.c
blobcfc2641e0b231388ab1c2b02f00c03f1c7e0afb5
1 /*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * derived from drivers/kvm/kvm_main.c
5 *
6 * Copyright (C) 2006 Qumranet, Inc.
7 *
8 * Authors:
9 * Avi Kivity <avi@qumranet.com>
10 * Yaniv Kamay <yaniv@qumranet.com>
11 *
12 * This work is licensed under the terms of the GNU GPL, version 2. See
13 * the COPYING file in the top-level directory.
14 *
15 */
16
17 #include <linux/kvm_host.h>
18 #include "irq.h"
19 #include "mmu.h"
20 #include "i8254.h"
21 #include "tss.h"
22
23 #include <linux/clocksource.h>
24 #include <linux/kvm.h>
25 #include <linux/fs.h>
26 #include <linux/vmalloc.h>
27 #include <linux/module.h>
28 #include <linux/mman.h>
29 #include <linux/highmem.h>
30
31 #include <asm/uaccess.h>
32 #include <asm/msr.h>
33 #include <asm/desc.h>
34
35 #define MAX_IO_MSRS 256
36 #define CR0_RESERVED_BITS \
37 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
38 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
39 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
40 #define CR4_RESERVED_BITS \
41 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
42 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
43 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
44 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
45
46 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
47 /* EFER defaults:
48 * - enable syscall per default because its emulated by KVM
49 * - enable LME and LMA per default on 64 bit KVM
50 */
51 #ifdef CONFIG_X86_64
52 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
53 #else
54 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
55 #endif
56
57 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
58 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
59
60 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
61 struct kvm_cpuid_entry2 __user *entries);
62
63 struct kvm_x86_ops *kvm_x86_ops;
64
65 struct kvm_stats_debugfs_item debugfs_entries[] = {
66 { "pf_fixed", VCPU_STAT(pf_fixed) },
67 { "pf_guest", VCPU_STAT(pf_guest) },
68 { "tlb_flush", VCPU_STAT(tlb_flush) },
69 { "invlpg", VCPU_STAT(invlpg) },
70 { "exits", VCPU_STAT(exits) },
71 { "io_exits", VCPU_STAT(io_exits) },
72 { "mmio_exits", VCPU_STAT(mmio_exits) },
73 { "signal_exits", VCPU_STAT(signal_exits) },
74 { "irq_window", VCPU_STAT(irq_window_exits) },
75 { "nmi_window", VCPU_STAT(nmi_window_exits) },
76 { "halt_exits", VCPU_STAT(halt_exits) },
77 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
78 { "hypercalls", VCPU_STAT(hypercalls) },
79 { "request_irq", VCPU_STAT(request_irq_exits) },
80 { "irq_exits", VCPU_STAT(irq_exits) },
81 { "host_state_reload", VCPU_STAT(host_state_reload) },
82 { "efer_reload", VCPU_STAT(efer_reload) },
83 { "fpu_reload", VCPU_STAT(fpu_reload) },
84 { "insn_emulation", VCPU_STAT(insn_emulation) },
85 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
86 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
87 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
88 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
89 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
90 { "mmu_flooded", VM_STAT(mmu_flooded) },
91 { "mmu_recycled", VM_STAT(mmu_recycled) },
92 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
93 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
94 { "largepages", VM_STAT(lpages) },
95 { NULL }
96 };
97
98
99 unsigned long segment_base(u16 selector)
100 {
101 struct descriptor_table gdt;
102 struct desc_struct *d;
103 unsigned long table_base;
104 unsigned long v;
105
106 if (selector == 0)
107 return 0;
108
109 asm("sgdt %0" : "=m"(gdt));
110 table_base = gdt.base;
111
112 if (selector & 4) { /* from ldt */
113 u16 ldt_selector;
114
115 asm("sldt %0" : "=g"(ldt_selector));
116 table_base = segment_base(ldt_selector);
117 }
118 d = (struct desc_struct *)(table_base + (selector & ~7));
119 v = d->base0 | ((unsigned long)d->base1 << 16) |
120 ((unsigned long)d->base2 << 24);
121 #ifdef CONFIG_X86_64
122 if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
123 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
124 #endif
125 return v;
126 }
127 EXPORT_SYMBOL_GPL(segment_base);
128
129 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
130 {
131 if (irqchip_in_kernel(vcpu->kvm))
132 return vcpu->arch.apic_base;
133 else
134 return vcpu->arch.apic_base;
135 }
136 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
137
138 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
139 {
140 /* TODO: reserve bits check */
141 if (irqchip_in_kernel(vcpu->kvm))
142 kvm_lapic_set_base(vcpu, data);
143 else
144 vcpu->arch.apic_base = data;
145 }
146 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
147
148 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
149 {
150 WARN_ON(vcpu->arch.exception.pending);
151 vcpu->arch.exception.pending = true;
152 vcpu->arch.exception.has_error_code = false;
153 vcpu->arch.exception.nr = nr;
154 }
155 EXPORT_SYMBOL_GPL(kvm_queue_exception);
156
157 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
158 u32 error_code)
159 {
160 ++vcpu->stat.pf_guest;
161 if (vcpu->arch.exception.pending) {
162 if (vcpu->arch.exception.nr == PF_VECTOR) {
163 printk(KERN_DEBUG "kvm: inject_page_fault:"
164 " double fault 0x%lx\n", addr);
165 vcpu->arch.exception.nr = DF_VECTOR;
166 vcpu->arch.exception.error_code = 0;
167 } else if (vcpu->arch.exception.nr == DF_VECTOR) {
168 /* triple fault -> shutdown */
169 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
170 }
171 return;
172 }
173 vcpu->arch.cr2 = addr;
174 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
175 }
176
177 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
178 {
179 vcpu->arch.nmi_pending = 1;
180 }
181 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
182
183 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
184 {
185 WARN_ON(vcpu->arch.exception.pending);
186 vcpu->arch.exception.pending = true;
187 vcpu->arch.exception.has_error_code = true;
188 vcpu->arch.exception.nr = nr;
189 vcpu->arch.exception.error_code = error_code;
190 }
191 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
192
193 static void __queue_exception(struct kvm_vcpu *vcpu)
194 {
195 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
196 vcpu->arch.exception.has_error_code,
197 vcpu->arch.exception.error_code);
198 }
199
200 /*
201 * Load the pae pdptrs. Return true is they are all valid.
202 */
203 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
204 {
205 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
206 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
207 int i;
208 int ret;
209 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
210
211 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
212 offset * sizeof(u64), sizeof(pdpte));
213 if (ret < 0) {
214 ret = 0;
215 goto out;
216 }
217 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
218 if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) {
219 ret = 0;
220 goto out;
221 }
222 }
223 ret = 1;
224
225 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
226 out:
227
228 return ret;
229 }
230 EXPORT_SYMBOL_GPL(load_pdptrs);
231
232 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
233 {
234 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
235 bool changed = true;
236 int r;
237
238 if (is_long_mode(vcpu) || !is_pae(vcpu))
239 return false;
240
241 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
242 if (r < 0)
243 goto out;
244 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
245 out:
246
247 return changed;
248 }
249
250 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
251 {
252 if (cr0 & CR0_RESERVED_BITS) {
253 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
254 cr0, vcpu->arch.cr0);
255 kvm_inject_gp(vcpu, 0);
256 return;
257 }
258
259 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
260 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
261 kvm_inject_gp(vcpu, 0);
262 return;
263 }
264
265 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
266 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
267 "and a clear PE flag\n");
268 kvm_inject_gp(vcpu, 0);
269 return;
270 }
271
272 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
273 #ifdef CONFIG_X86_64
274 if ((vcpu->arch.shadow_efer & EFER_LME)) {
275 int cs_db, cs_l;
276
277 if (!is_pae(vcpu)) {
278 printk(KERN_DEBUG "set_cr0: #GP, start paging "
279 "in long mode while PAE is disabled\n");
280 kvm_inject_gp(vcpu, 0);
281 return;
282 }
283 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
284 if (cs_l) {
285 printk(KERN_DEBUG "set_cr0: #GP, start paging "
286 "in long mode while CS.L == 1\n");
287 kvm_inject_gp(vcpu, 0);
288 return;
289
290 }
291 } else
292 #endif
293 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
294 printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
295 "reserved bits\n");
296 kvm_inject_gp(vcpu, 0);
297 return;
298 }
299
300 }
301
302 kvm_x86_ops->set_cr0(vcpu, cr0);
303 vcpu->arch.cr0 = cr0;
304
305 kvm_mmu_reset_context(vcpu);
306 return;
307 }
308 EXPORT_SYMBOL_GPL(kvm_set_cr0);
309
310 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
311 {
312 kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
313 KVMTRACE_1D(LMSW, vcpu,
314 (u32)((vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f)),
315 handler);
316 }
317 EXPORT_SYMBOL_GPL(kvm_lmsw);
318
319 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
320 {
321 unsigned long old_cr4 = vcpu->arch.cr4;
322 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
323
324 if (cr4 & CR4_RESERVED_BITS) {
325 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
326 kvm_inject_gp(vcpu, 0);
327 return;
328 }
329
330 if (is_long_mode(vcpu)) {
331 if (!(cr4 & X86_CR4_PAE)) {
332 printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
333 "in long mode\n");
334 kvm_inject_gp(vcpu, 0);
335 return;
336 }
337 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
338 && ((cr4 ^ old_cr4) & pdptr_bits)
339 && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
340 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
341 kvm_inject_gp(vcpu, 0);
342 return;
343 }
344
345 if (cr4 & X86_CR4_VMXE) {
346 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
347 kvm_inject_gp(vcpu, 0);
348 return;
349 }
350 kvm_x86_ops->set_cr4(vcpu, cr4);
351 vcpu->arch.cr4 = cr4;
352 kvm_mmu_reset_context(vcpu);
353 }
354 EXPORT_SYMBOL_GPL(kvm_set_cr4);
355
356 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
357 {
358 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
359 kvm_mmu_flush_tlb(vcpu);
360 return;
361 }
362
363 if (is_long_mode(vcpu)) {
364 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
365 printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
366 kvm_inject_gp(vcpu, 0);
367 return;
368 }
369 } else {
370 if (is_pae(vcpu)) {
371 if (cr3 & CR3_PAE_RESERVED_BITS) {
372 printk(KERN_DEBUG
373 "set_cr3: #GP, reserved bits\n");
374 kvm_inject_gp(vcpu, 0);
375 return;
376 }
377 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
378 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
379 "reserved bits\n");
380 kvm_inject_gp(vcpu, 0);
381 return;
382 }
383 }
384 /*
385 * We don't check reserved bits in nonpae mode, because
386 * this isn't enforced, and VMware depends on this.
387 */
388 }
389
390 /*
391 * Does the new cr3 value map to physical memory? (Note, we
392 * catch an invalid cr3 even in real-mode, because it would
393 * cause trouble later on when we turn on paging anyway.)
394 *
395 * A real CPU would silently accept an invalid cr3 and would
396 * attempt to use it - with largely undefined (and often hard
397 * to debug) behavior on the guest side.
398 */
399 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
400 kvm_inject_gp(vcpu, 0);
401 else {
402 vcpu->arch.cr3 = cr3;
403 vcpu->arch.mmu.new_cr3(vcpu);
404 }
405 }
406 EXPORT_SYMBOL_GPL(kvm_set_cr3);
407
408 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
409 {
410 if (cr8 & CR8_RESERVED_BITS) {
411 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
412 kvm_inject_gp(vcpu, 0);
413 return;
414 }
415 if (irqchip_in_kernel(vcpu->kvm))
416 kvm_lapic_set_tpr(vcpu, cr8);
417 else
418 vcpu->arch.cr8 = cr8;
419 }
420 EXPORT_SYMBOL_GPL(kvm_set_cr8);
421
422 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
423 {
424 if (irqchip_in_kernel(vcpu->kvm))
425 return kvm_lapic_get_cr8(vcpu);
426 else
427 return vcpu->arch.cr8;
428 }
429 EXPORT_SYMBOL_GPL(kvm_get_cr8);
430
431 /*
432 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
433 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
434 *
435 * This list is modified at module load time to reflect the
436 * capabilities of the host cpu.
437 */
438 static u32 msrs_to_save[] = {
439 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
440 MSR_K6_STAR,
441 #ifdef CONFIG_X86_64
442 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
443 #endif
444 MSR_IA32_TIME_STAMP_COUNTER, MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
445 MSR_IA32_PERF_STATUS,
446 };
447
448 static unsigned num_msrs_to_save;
449
450 static u32 emulated_msrs[] = {
451 MSR_IA32_MISC_ENABLE,
452 };
453
454 static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
455 {
456 if (efer & efer_reserved_bits) {
457 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
458 efer);
459 kvm_inject_gp(vcpu, 0);
460 return;
461 }
462
463 if (is_paging(vcpu)
464 && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
465 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
466 kvm_inject_gp(vcpu, 0);
467 return;
468 }
469
470 kvm_x86_ops->set_efer(vcpu, efer);
471
472 efer &= ~EFER_LMA;
473 efer |= vcpu->arch.shadow_efer & EFER_LMA;
474
475 vcpu->arch.shadow_efer = efer;
476 }
477
478 void kvm_enable_efer_bits(u64 mask)
479 {
480 efer_reserved_bits &= ~mask;
481 }
482 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
483
484
485 /*
486 * Writes msr value into into the appropriate "register".
487 * Returns 0 on success, non-0 otherwise.
488 * Assumes vcpu_load() was already called.
489 */
490 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
491 {
492 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
493 }
494
495 /*
496 * Adapt set_msr() to msr_io()'s calling convention
497 */
498 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
499 {
500 return kvm_set_msr(vcpu, index, *data);
501 }
502
503 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
504 {
505 static int version;
506 struct pvclock_wall_clock wc;
507 struct timespec now, sys, boot;
508
509 if (!wall_clock)
510 return;
511
512 version++;
513
514 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
515
516 /*
517 * The guest calculates current wall clock time by adding
518 * system time (updated by kvm_write_guest_time below) to the
519 * wall clock specified here. guest system time equals host
520 * system time for us, thus we must fill in host boot time here.
521 */
522 now = current_kernel_time();
523 ktime_get_ts(&sys);
524 boot = ns_to_timespec(timespec_to_ns(&now) - timespec_to_ns(&sys));
525
526 wc.sec = boot.tv_sec;
527 wc.nsec = boot.tv_nsec;
528 wc.version = version;
529
530 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
531
532 version++;
533 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
534 }
535
536 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
537 {
538 uint32_t quotient, remainder;
539
540 /* Don't try to replace with do_div(), this one calculates
541 * "(dividend << 32) / divisor" */
542 __asm__ ( "divl %4"
543 : "=a" (quotient), "=d" (remainder)
544 : "0" (0), "1" (dividend), "r" (divisor) );
545 return quotient;
546 }
547
548 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
549 {
550 uint64_t nsecs = 1000000000LL;
551 int32_t shift = 0;
552 uint64_t tps64;
553 uint32_t tps32;
554
555 tps64 = tsc_khz * 1000LL;
556 while (tps64 > nsecs*2) {
557 tps64 >>= 1;
558 shift--;
559 }
560
561 tps32 = (uint32_t)tps64;
562 while (tps32 <= (uint32_t)nsecs) {
563 tps32 <<= 1;
564 shift++;
565 }
566
567 hv_clock->tsc_shift = shift;
568 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
569
570 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
571 __FUNCTION__, tsc_khz, hv_clock->tsc_shift,
572 hv_clock->tsc_to_system_mul);
573 }
574
575 static void kvm_write_guest_time(struct kvm_vcpu *v)
576 {
577 struct timespec ts;
578 unsigned long flags;
579 struct kvm_vcpu_arch *vcpu = &v->arch;
580 void *shared_kaddr;
581
582 if ((!vcpu->time_page))
583 return;
584
585 if (unlikely(vcpu->hv_clock_tsc_khz != tsc_khz)) {
586 kvm_set_time_scale(tsc_khz, &vcpu->hv_clock);
587 vcpu->hv_clock_tsc_khz = tsc_khz;
588 }
589
590 /* Keep irq disabled to prevent changes to the clock */
591 local_irq_save(flags);
592 kvm_get_msr(v, MSR_IA32_TIME_STAMP_COUNTER,
593 &vcpu->hv_clock.tsc_timestamp);
594 ktime_get_ts(&ts);
595 local_irq_restore(flags);
596
597 /* With all the info we got, fill in the values */
598
599 vcpu->hv_clock.system_time = ts.tv_nsec +
600 (NSEC_PER_SEC * (u64)ts.tv_sec);
601 /*
602 * The interface expects us to write an even number signaling that the
603 * update is finished. Since the guest won't see the intermediate
604 * state, we just increase by 2 at the end.
605 */
606 vcpu->hv_clock.version += 2;
607
608 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
609
610 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
611 sizeof(vcpu->hv_clock));
612
613 kunmap_atomic(shared_kaddr, KM_USER0);
614
615 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
616 }
617
618 static bool msr_mtrr_valid(unsigned msr)
619 {
620 switch (msr) {
621 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
622 case MSR_MTRRfix64K_00000:
623 case MSR_MTRRfix16K_80000:
624 case MSR_MTRRfix16K_A0000:
625 case MSR_MTRRfix4K_C0000:
626 case MSR_MTRRfix4K_C8000:
627 case MSR_MTRRfix4K_D0000:
628 case MSR_MTRRfix4K_D8000:
629 case MSR_MTRRfix4K_E0000:
630 case MSR_MTRRfix4K_E8000:
631 case MSR_MTRRfix4K_F0000:
632 case MSR_MTRRfix4K_F8000:
633 case MSR_MTRRdefType:
634 case MSR_IA32_CR_PAT:
635 return true;
636 case 0x2f8:
637 return true;
638 }
639 return false;
640 }
641
642 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
643 {
644 if (!msr_mtrr_valid(msr))
645 return 1;
646
647 vcpu->arch.mtrr[msr - 0x200] = data;
648 return 0;
649 }
650
651 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
652 {
653 switch (msr) {
654 case MSR_EFER:
655 set_efer(vcpu, data);
656 break;
657 case MSR_IA32_MC0_STATUS:
658 pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
659 __func__, data);
660 break;
661 case MSR_IA32_MCG_STATUS:
662 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
663 __func__, data);
664 break;
665 case MSR_IA32_MCG_CTL:
666 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_CTL 0x%llx, nop\n",
667 __func__, data);
668 break;
669 case MSR_IA32_UCODE_REV:
670 case MSR_IA32_UCODE_WRITE:
671 break;
672 case 0x200 ... 0x2ff:
673 return set_msr_mtrr(vcpu, msr, data);
674 case MSR_IA32_APICBASE:
675 kvm_set_apic_base(vcpu, data);
676 break;
677 case MSR_IA32_MISC_ENABLE:
678 vcpu->arch.ia32_misc_enable_msr = data;
679 break;
680 case MSR_KVM_WALL_CLOCK:
681 vcpu->kvm->arch.wall_clock = data;
682 kvm_write_wall_clock(vcpu->kvm, data);
683 break;
684 case MSR_KVM_SYSTEM_TIME: {
685 if (vcpu->arch.time_page) {
686 kvm_release_page_dirty(vcpu->arch.time_page);
687 vcpu->arch.time_page = NULL;
688 }
689
690 vcpu->arch.time = data;
691
692 /* we verify if the enable bit is set... */
693 if (!(data & 1))
694 break;
695
696 /* ...but clean it before doing the actual write */
697 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
698
699 down_read(&current->mm->mmap_sem);
700 vcpu->arch.time_page =
701 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
702 up_read(&current->mm->mmap_sem);
703
704 if (is_error_page(vcpu->arch.time_page)) {
705 kvm_release_page_clean(vcpu->arch.time_page);
706 vcpu->arch.time_page = NULL;
707 }
708
709 kvm_write_guest_time(vcpu);
710 break;
711 }
712 default:
713 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n", msr, data);
714 return 1;
715 }
716 return 0;
717 }
718 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
719
720
721 /*
722 * Reads an msr value (of 'msr_index') into 'pdata'.
723 * Returns 0 on success, non-0 otherwise.
724 * Assumes vcpu_load() was already called.
725 */
726 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
727 {
728 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
729 }
730
731 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
732 {
733 if (!msr_mtrr_valid(msr))
734 return 1;
735
736 *pdata = vcpu->arch.mtrr[msr - 0x200];
737 return 0;
738 }
739
740 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
741 {
742 u64 data;
743
744 switch (msr) {
745 case 0xc0010010: /* SYSCFG */
746 case 0xc0010015: /* HWCR */
747 case MSR_IA32_PLATFORM_ID:
748 case MSR_IA32_P5_MC_ADDR:
749 case MSR_IA32_P5_MC_TYPE:
750 case MSR_IA32_MC0_CTL:
751 case MSR_IA32_MCG_STATUS:
752 case MSR_IA32_MCG_CAP:
753 case MSR_IA32_MCG_CTL:
754 case MSR_IA32_MC0_MISC:
755 case MSR_IA32_MC0_MISC+4:
756 case MSR_IA32_MC0_MISC+8:
757 case MSR_IA32_MC0_MISC+12:
758 case MSR_IA32_MC0_MISC+16:
759 case MSR_IA32_MC0_MISC+20:
760 case MSR_IA32_UCODE_REV:
761 case MSR_IA32_EBL_CR_POWERON:
762 data = 0;
763 break;
764 case MSR_MTRRcap:
765 data = 0x500 | KVM_NR_VAR_MTRR;
766 break;
767 case 0x200 ... 0x2ff:
768 return get_msr_mtrr(vcpu, msr, pdata);
769 case 0xcd: /* fsb frequency */
770 data = 3;
771 break;
772 case MSR_IA32_APICBASE:
773 data = kvm_get_apic_base(vcpu);
774 break;
775 case MSR_IA32_MISC_ENABLE:
776 data = vcpu->arch.ia32_misc_enable_msr;
777 break;
778 case MSR_IA32_PERF_STATUS:
779 /* TSC increment by tick */
780 data = 1000ULL;
781 /* CPU multiplier */
782 data |= (((uint64_t)4ULL) << 40);
783 break;
784 case MSR_EFER:
785 data = vcpu->arch.shadow_efer;
786 break;
787 case MSR_KVM_WALL_CLOCK:
788 data = vcpu->kvm->arch.wall_clock;
789 break;
790 case MSR_KVM_SYSTEM_TIME:
791 data = vcpu->arch.time;
792 break;
793 default:
794 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
795 return 1;
796 }
797 *pdata = data;
798 return 0;
799 }
800 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
801
802 /*
803 * Read or write a bunch of msrs. All parameters are kernel addresses.
804 *
805 * @return number of msrs set successfully.
806 */
807 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
808 struct kvm_msr_entry *entries,
809 int (*do_msr)(struct kvm_vcpu *vcpu,
810 unsigned index, u64 *data))
811 {
812 int i;
813
814 vcpu_load(vcpu);
815
816 down_read(&vcpu->kvm->slots_lock);
817 for (i = 0; i < msrs->nmsrs; ++i)
818 if (do_msr(vcpu, entries[i].index, &entries[i].data))
819 break;
820 up_read(&vcpu->kvm->slots_lock);
821
822 vcpu_put(vcpu);
823
824 return i;
825 }
826
827 /*
828 * Read or write a bunch of msrs. Parameters are user addresses.
829 *
830 * @return number of msrs set successfully.
831 */
832 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
833 int (*do_msr)(struct kvm_vcpu *vcpu,
834 unsigned index, u64 *data),
835 int writeback)
836 {
837 struct kvm_msrs msrs;
838 struct kvm_msr_entry *entries;
839 int r, n;
840 unsigned size;
841
842 r = -EFAULT;
843 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
844 goto out;
845
846 r = -E2BIG;
847 if (msrs.nmsrs >= MAX_IO_MSRS)
848 goto out;
849
850 r = -ENOMEM;
851 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
852 entries = vmalloc(size);
853 if (!entries)
854 goto out;
855
856 r = -EFAULT;
857 if (copy_from_user(entries, user_msrs->entries, size))
858 goto out_free;
859
860 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
861 if (r < 0)
862 goto out_free;
863
864 r = -EFAULT;
865 if (writeback && copy_to_user(user_msrs->entries, entries, size))
866 goto out_free;
867
868 r = n;
869
870 out_free:
871 vfree(entries);
872 out:
873 return r;
874 }
875
876 int kvm_dev_ioctl_check_extension(long ext)
877 {
878 int r;
879
880 switch (ext) {
881 case KVM_CAP_IRQCHIP:
882 case KVM_CAP_HLT:
883 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
884 case KVM_CAP_USER_MEMORY:
885 case KVM_CAP_SET_TSS_ADDR:
886 case KVM_CAP_EXT_CPUID:
887 case KVM_CAP_CLOCKSOURCE:
888 case KVM_CAP_PIT:
889 case KVM_CAP_NOP_IO_DELAY:
890 case KVM_CAP_MP_STATE:
891 case KVM_CAP_SYNC_MMU:
892 r = 1;
893 break;
894 case KVM_CAP_COALESCED_MMIO:
895 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
896 break;
897 case KVM_CAP_VAPIC:
898 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
899 break;
900 case KVM_CAP_NR_VCPUS:
901 r = KVM_MAX_VCPUS;
902 break;
903 case KVM_CAP_NR_MEMSLOTS:
904 r = KVM_MEMORY_SLOTS;
905 break;
906 case KVM_CAP_PV_MMU:
907 r = !tdp_enabled;
908 break;
909 default:
910 r = 0;
911 break;
912 }
913 return r;
914
915 }
916
917 long kvm_arch_dev_ioctl(struct file *filp,
918 unsigned int ioctl, unsigned long arg)
919 {
920 void __user *argp = (void __user *)arg;
921 long r;
922
923 switch (ioctl) {
924 case KVM_GET_MSR_INDEX_LIST: {
925 struct kvm_msr_list __user *user_msr_list = argp;
926 struct kvm_msr_list msr_list;
927 unsigned n;
928
929 r = -EFAULT;
930 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
931 goto out;
932 n = msr_list.nmsrs;
933 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
934 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
935 goto out;
936 r = -E2BIG;
937 if (n < num_msrs_to_save)
938 goto out;
939 r = -EFAULT;
940 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
941 num_msrs_to_save * sizeof(u32)))
942 goto out;
943 if (copy_to_user(user_msr_list->indices
944 + num_msrs_to_save * sizeof(u32),
945 &emulated_msrs,
946 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
947 goto out;
948 r = 0;
949 break;
950 }
951 case KVM_GET_SUPPORTED_CPUID: {
952 struct kvm_cpuid2 __user *cpuid_arg = argp;
953 struct kvm_cpuid2 cpuid;
954
955 r = -EFAULT;
956 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
957 goto out;
958 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
959 cpuid_arg->entries);
960 if (r)
961 goto out;
962
963 r = -EFAULT;
964 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
965 goto out;
966 r = 0;
967 break;
968 }
969 default:
970 r = -EINVAL;
971 }
972 out:
973 return r;
974 }
975
976 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
977 {
978 kvm_x86_ops->vcpu_load(vcpu, cpu);
979 kvm_write_guest_time(vcpu);
980 }
981
982 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
983 {
984 kvm_x86_ops->vcpu_put(vcpu);
985 kvm_put_guest_fpu(vcpu);
986 }
987
988 static int is_efer_nx(void)
989 {
990 unsigned long long efer = 0;
991
992 rdmsrl_safe(MSR_EFER, &efer);
993 return efer & EFER_NX;
994 }
995
996 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
997 {
998 int i;
999 struct kvm_cpuid_entry2 *e, *entry;
1000
1001 entry = NULL;
1002 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1003 e = &vcpu->arch.cpuid_entries[i];
1004 if (e->function == 0x80000001) {
1005 entry = e;
1006 break;
1007 }
1008 }
1009 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1010 entry->edx &= ~(1 << 20);
1011 printk(KERN_INFO "kvm: guest NX capability removed\n");
1012 }
1013 }
1014
1015 /* when an old userspace process fills a new kernel module */
1016 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1017 struct kvm_cpuid *cpuid,
1018 struct kvm_cpuid_entry __user *entries)
1019 {
1020 int r, i;
1021 struct kvm_cpuid_entry *cpuid_entries;
1022
1023 r = -E2BIG;
1024 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1025 goto out;
1026 r = -ENOMEM;
1027 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1028 if (!cpuid_entries)
1029 goto out;
1030 r = -EFAULT;
1031 if (copy_from_user(cpuid_entries, entries,
1032 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1033 goto out_free;
1034 for (i = 0; i < cpuid->nent; i++) {
1035 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1036 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1037 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1038 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1039 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1040 vcpu->arch.cpuid_entries[i].index = 0;
1041 vcpu->arch.cpuid_entries[i].flags = 0;
1042 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1043 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1044 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1045 }
1046 vcpu->arch.cpuid_nent = cpuid->nent;
1047 cpuid_fix_nx_cap(vcpu);
1048 r = 0;
1049
1050 out_free:
1051 vfree(cpuid_entries);
1052 out:
1053 return r;
1054 }
1055
1056 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1057 struct kvm_cpuid2 *cpuid,
1058 struct kvm_cpuid_entry2 __user *entries)
1059 {
1060 int r;
1061
1062 r = -E2BIG;
1063 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1064 goto out;
1065 r = -EFAULT;
1066 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1067 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1068 goto out;
1069 vcpu->arch.cpuid_nent = cpuid->nent;
1070 return 0;
1071
1072 out:
1073 return r;
1074 }
1075
1076 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1077 struct kvm_cpuid2 *cpuid,
1078 struct kvm_cpuid_entry2 __user *entries)
1079 {
1080 int r;
1081
1082 r = -E2BIG;
1083 if (cpuid->nent < vcpu->arch.cpuid_nent)
1084 goto out;
1085 r = -EFAULT;
1086 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1087 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1088 goto out;
1089 return 0;
1090
1091 out:
1092 cpuid->nent = vcpu->arch.cpuid_nent;
1093 return r;
1094 }
1095
1096 static inline u32 bit(int bitno)
1097 {
1098 return 1 << (bitno & 31);
1099 }
1100
1101 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1102 u32 index)
1103 {
1104 entry->function = function;
1105 entry->index = index;
1106 cpuid_count(entry->function, entry->index,
1107 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1108 entry->flags = 0;
1109 }
1110
1111 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1112 u32 index, int *nent, int maxnent)
1113 {
1114 const u32 kvm_supported_word0_x86_features = bit(X86_FEATURE_FPU) |
1115 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
1116 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
1117 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
1118 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
1119 bit(X86_FEATURE_SEP) | bit(X86_FEATURE_PGE) |
1120 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
1121 bit(X86_FEATURE_CLFLSH) | bit(X86_FEATURE_MMX) |
1122 bit(X86_FEATURE_FXSR) | bit(X86_FEATURE_XMM) |
1123 bit(X86_FEATURE_XMM2) | bit(X86_FEATURE_SELFSNOOP);
1124 const u32 kvm_supported_word1_x86_features = bit(X86_FEATURE_FPU) |
1125 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
1126 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
1127 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
1128 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
1129 bit(X86_FEATURE_PGE) |
1130 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
1131 bit(X86_FEATURE_MMX) | bit(X86_FEATURE_FXSR) |
1132 bit(X86_FEATURE_SYSCALL) |
1133 (bit(X86_FEATURE_NX) && is_efer_nx()) |
1134 #ifdef CONFIG_X86_64
1135 bit(X86_FEATURE_LM) |
1136 #endif
1137 bit(X86_FEATURE_MMXEXT) |
1138 bit(X86_FEATURE_3DNOWEXT) |
1139 bit(X86_FEATURE_3DNOW);
1140 const u32 kvm_supported_word3_x86_features =
1141 bit(X86_FEATURE_XMM3) | bit(X86_FEATURE_CX16);
1142 const u32 kvm_supported_word6_x86_features =
1143 bit(X86_FEATURE_LAHF_LM) | bit(X86_FEATURE_CMP_LEGACY);
1144
1145 /* all func 2 cpuid_count() should be called on the same cpu */
1146 get_cpu();
1147 do_cpuid_1_ent(entry, function, index);
1148 ++*nent;
1149
1150 switch (function) {
1151 case 0:
1152 entry->eax = min(entry->eax, (u32)0xb);
1153 break;
1154 case 1:
1155 entry->edx &= kvm_supported_word0_x86_features;
1156 entry->ecx &= kvm_supported_word3_x86_features;
1157 break;
1158 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1159 * may return different values. This forces us to get_cpu() before
1160 * issuing the first command, and also to emulate this annoying behavior
1161 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1162 case 2: {
1163 int t, times = entry->eax & 0xff;
1164
1165 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1166 for (t = 1; t < times && *nent < maxnent; ++t) {
1167 do_cpuid_1_ent(&entry[t], function, 0);
1168 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1169 ++*nent;
1170 }
1171 break;
1172 }
1173 /* function 4 and 0xb have additional index. */
1174 case 4: {
1175 int i, cache_type;
1176
1177 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1178 /* read more entries until cache_type is zero */
1179 for (i = 1; *nent < maxnent; ++i) {
1180 cache_type = entry[i - 1].eax & 0x1f;
1181 if (!cache_type)
1182 break;
1183 do_cpuid_1_ent(&entry[i], function, i);
1184 entry[i].flags |=
1185 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1186 ++*nent;
1187 }
1188 break;
1189 }
1190 case 0xb: {
1191 int i, level_type;
1192
1193 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1194 /* read more entries until level_type is zero */
1195 for (i = 1; *nent < maxnent; ++i) {
1196 level_type = entry[i - 1].ecx & 0xff;
1197 if (!level_type)
1198 break;
1199 do_cpuid_1_ent(&entry[i], function, i);
1200 entry[i].flags |=
1201 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1202 ++*nent;
1203 }
1204 break;
1205 }
1206 case 0x80000000:
1207 entry->eax = min(entry->eax, 0x8000001a);
1208 break;
1209 case 0x80000001:
1210 entry->edx &= kvm_supported_word1_x86_features;
1211 entry->ecx &= kvm_supported_word6_x86_features;
1212 break;
1213 }
1214 put_cpu();
1215 }
1216
1217 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
1218 struct kvm_cpuid_entry2 __user *entries)
1219 {
1220 struct kvm_cpuid_entry2 *cpuid_entries;
1221 int limit, nent = 0, r = -E2BIG;
1222 u32 func;
1223
1224 if (cpuid->nent < 1)
1225 goto out;
1226 r = -ENOMEM;
1227 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1228 if (!cpuid_entries)
1229 goto out;
1230
1231 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1232 limit = cpuid_entries[0].eax;
1233 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1234 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1235 &nent, cpuid->nent);
1236 r = -E2BIG;
1237 if (nent >= cpuid->nent)
1238 goto out_free;
1239
1240 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1241 limit = cpuid_entries[nent - 1].eax;
1242 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1243 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1244 &nent, cpuid->nent);
1245 r = -EFAULT;
1246 if (copy_to_user(entries, cpuid_entries,
1247 nent * sizeof(struct kvm_cpuid_entry2)))
1248 goto out_free;
1249 cpuid->nent = nent;
1250 r = 0;
1251
1252 out_free:
1253 vfree(cpuid_entries);
1254 out:
1255 return r;
1256 }
1257
1258 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1259 struct kvm_lapic_state *s)
1260 {
1261 vcpu_load(vcpu);
1262 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
1263 vcpu_put(vcpu);
1264
1265 return 0;
1266 }
1267
1268 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1269 struct kvm_lapic_state *s)
1270 {
1271 vcpu_load(vcpu);
1272 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
1273 kvm_apic_post_state_restore(vcpu);
1274 vcpu_put(vcpu);
1275
1276 return 0;
1277 }
1278
1279 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1280 struct kvm_interrupt *irq)
1281 {
1282 if (irq->irq < 0 || irq->irq >= 256)
1283 return -EINVAL;
1284 if (irqchip_in_kernel(vcpu->kvm))
1285 return -ENXIO;
1286 vcpu_load(vcpu);
1287
1288 set_bit(irq->irq, vcpu->arch.irq_pending);
1289 set_bit(irq->irq / BITS_PER_LONG, &vcpu->arch.irq_summary);
1290
1291 vcpu_put(vcpu);
1292
1293 return 0;
1294 }
1295
1296 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1297 struct kvm_tpr_access_ctl *tac)
1298 {
1299 if (tac->flags)
1300 return -EINVAL;
1301 vcpu->arch.tpr_access_reporting = !!tac->enabled;
1302 return 0;
1303 }
1304
1305 long kvm_arch_vcpu_ioctl(struct file *filp,
1306 unsigned int ioctl, unsigned long arg)
1307 {
1308 struct kvm_vcpu *vcpu = filp->private_data;
1309 void __user *argp = (void __user *)arg;
1310 int r;
1311 struct kvm_lapic_state *lapic = NULL;
1312
1313 switch (ioctl) {
1314 case KVM_GET_LAPIC: {
1315 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1316
1317 r = -ENOMEM;
1318 if (!lapic)
1319 goto out;
1320 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
1321 if (r)
1322 goto out;
1323 r = -EFAULT;
1324 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
1325 goto out;
1326 r = 0;
1327 break;
1328 }
1329 case KVM_SET_LAPIC: {
1330 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1331 r = -ENOMEM;
1332 if (!lapic)
1333 goto out;
1334 r = -EFAULT;
1335 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
1336 goto out;
1337 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
1338 if (r)
1339 goto out;
1340 r = 0;
1341 break;
1342 }
1343 case KVM_INTERRUPT: {
1344 struct kvm_interrupt irq;
1345
1346 r = -EFAULT;
1347 if (copy_from_user(&irq, argp, sizeof irq))
1348 goto out;
1349 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
1350 if (r)
1351 goto out;
1352 r = 0;
1353 break;
1354 }
1355 case KVM_SET_CPUID: {
1356 struct kvm_cpuid __user *cpuid_arg = argp;
1357 struct kvm_cpuid cpuid;
1358
1359 r = -EFAULT;
1360 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1361 goto out;
1362 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
1363 if (r)
1364 goto out;
1365 break;
1366 }
1367 case KVM_SET_CPUID2: {
1368 struct kvm_cpuid2 __user *cpuid_arg = argp;
1369 struct kvm_cpuid2 cpuid;
1370
1371 r = -EFAULT;
1372 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1373 goto out;
1374 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
1375 cpuid_arg->entries);
1376 if (r)
1377 goto out;
1378 break;
1379 }
1380 case KVM_GET_CPUID2: {
1381 struct kvm_cpuid2 __user *cpuid_arg = argp;
1382 struct kvm_cpuid2 cpuid;
1383
1384 r = -EFAULT;
1385 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1386 goto out;
1387 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
1388 cpuid_arg->entries);
1389 if (r)
1390 goto out;
1391 r = -EFAULT;
1392 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1393 goto out;
1394 r = 0;
1395 break;
1396 }
1397 case KVM_GET_MSRS:
1398 r = msr_io(vcpu, argp, kvm_get_msr, 1);
1399 break;
1400 case KVM_SET_MSRS:
1401 r = msr_io(vcpu, argp, do_set_msr, 0);
1402 break;
1403 case KVM_TPR_ACCESS_REPORTING: {
1404 struct kvm_tpr_access_ctl tac;
1405
1406 r = -EFAULT;
1407 if (copy_from_user(&tac, argp, sizeof tac))
1408 goto out;
1409 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
1410 if (r)
1411 goto out;
1412 r = -EFAULT;
1413 if (copy_to_user(argp, &tac, sizeof tac))
1414 goto out;
1415 r = 0;
1416 break;
1417 };
1418 case KVM_SET_VAPIC_ADDR: {
1419 struct kvm_vapic_addr va;
1420
1421 r = -EINVAL;
1422 if (!irqchip_in_kernel(vcpu->kvm))
1423 goto out;
1424 r = -EFAULT;
1425 if (copy_from_user(&va, argp, sizeof va))
1426 goto out;
1427 r = 0;
1428 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
1429 break;
1430 }
1431 default:
1432 r = -EINVAL;
1433 }
1434 out:
1435 if (lapic)
1436 kfree(lapic);
1437 return r;
1438 }
1439
1440 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
1441 {
1442 int ret;
1443
1444 if (addr > (unsigned int)(-3 * PAGE_SIZE))
1445 return -1;
1446 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
1447 return ret;
1448 }
1449
1450 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
1451 u32 kvm_nr_mmu_pages)
1452 {
1453 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
1454 return -EINVAL;
1455
1456 down_write(&kvm->slots_lock);
1457
1458 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
1459 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
1460
1461 up_write(&kvm->slots_lock);
1462 return 0;
1463 }
1464
1465 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
1466 {
1467 return kvm->arch.n_alloc_mmu_pages;
1468 }
1469
1470 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
1471 {
1472 int i;
1473 struct kvm_mem_alias *alias;
1474
1475 for (i = 0; i < kvm->arch.naliases; ++i) {
1476 alias = &kvm->arch.aliases[i];
1477 if (gfn >= alias->base_gfn
1478 && gfn < alias->base_gfn + alias->npages)
1479 return alias->target_gfn + gfn - alias->base_gfn;
1480 }
1481 return gfn;
1482 }
1483
1484 /*
1485 * Set a new alias region. Aliases map a portion of physical memory into
1486 * another portion. This is useful for memory windows, for example the PC
1487 * VGA region.
1488 */
1489 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
1490 struct kvm_memory_alias *alias)
1491 {
1492 int r, n;
1493 struct kvm_mem_alias *p;
1494
1495 r = -EINVAL;
1496 /* General sanity checks */
1497 if (alias->memory_size & (PAGE_SIZE - 1))
1498 goto out;
1499 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
1500 goto out;
1501 if (alias->slot >= KVM_ALIAS_SLOTS)
1502 goto out;
1503 if (alias->guest_phys_addr + alias->memory_size
1504 < alias->guest_phys_addr)
1505 goto out;
1506 if (alias->target_phys_addr + alias->memory_size
1507 < alias->target_phys_addr)
1508 goto out;
1509
1510 down_write(&kvm->slots_lock);
1511 spin_lock(&kvm->mmu_lock);
1512
1513 p = &kvm->arch.aliases[alias->slot];
1514 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
1515 p->npages = alias->memory_size >> PAGE_SHIFT;
1516 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
1517
1518 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
1519 if (kvm->arch.aliases[n - 1].npages)
1520 break;
1521 kvm->arch.naliases = n;
1522
1523 spin_unlock(&kvm->mmu_lock);
1524 kvm_mmu_zap_all(kvm);
1525
1526 up_write(&kvm->slots_lock);
1527
1528 return 0;
1529
1530 out:
1531 return r;
1532 }
1533
1534 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1535 {
1536 int r;
1537
1538 r = 0;
1539 switch (chip->chip_id) {
1540 case KVM_IRQCHIP_PIC_MASTER:
1541 memcpy(&chip->chip.pic,
1542 &pic_irqchip(kvm)->pics[0],
1543 sizeof(struct kvm_pic_state));
1544 break;
1545 case KVM_IRQCHIP_PIC_SLAVE:
1546 memcpy(&chip->chip.pic,
1547 &pic_irqchip(kvm)->pics[1],
1548 sizeof(struct kvm_pic_state));
1549 break;
1550 case KVM_IRQCHIP_IOAPIC:
1551 memcpy(&chip->chip.ioapic,
1552 ioapic_irqchip(kvm),
1553 sizeof(struct kvm_ioapic_state));
1554 break;
1555 default:
1556 r = -EINVAL;
1557 break;
1558 }
1559 return r;
1560 }
1561
1562 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1563 {
1564 int r;
1565
1566 r = 0;
1567 switch (chip->chip_id) {
1568 case KVM_IRQCHIP_PIC_MASTER:
1569 memcpy(&pic_irqchip(kvm)->pics[0],
1570 &chip->chip.pic,
1571 sizeof(struct kvm_pic_state));
1572 break;
1573 case KVM_IRQCHIP_PIC_SLAVE:
1574 memcpy(&pic_irqchip(kvm)->pics[1],
1575 &chip->chip.pic,
1576 sizeof(struct kvm_pic_state));
1577 break;
1578 case KVM_IRQCHIP_IOAPIC:
1579 memcpy(ioapic_irqchip(kvm),
1580 &chip->chip.ioapic,
1581 sizeof(struct kvm_ioapic_state));
1582 break;
1583 default:
1584 r = -EINVAL;
1585 break;
1586 }
1587 kvm_pic_update_irq(pic_irqchip(kvm));
1588 return r;
1589 }
1590
1591 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1592 {
1593 int r = 0;
1594
1595 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
1596 return r;
1597 }
1598
1599 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1600 {
1601 int r = 0;
1602
1603 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
1604 kvm_pit_load_count(kvm, 0, ps->channels[0].count);
1605 return r;
1606 }
1607
1608 /*
1609 * Get (and clear) the dirty memory log for a memory slot.
1610 */
1611 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
1612 struct kvm_dirty_log *log)
1613 {
1614 int r;
1615 int n;
1616 struct kvm_memory_slot *memslot;
1617 int is_dirty = 0;
1618
1619 down_write(&kvm->slots_lock);
1620
1621 r = kvm_get_dirty_log(kvm, log, &is_dirty);
1622 if (r)
1623 goto out;
1624
1625 /* If nothing is dirty, don't bother messing with page tables. */
1626 if (is_dirty) {
1627 kvm_mmu_slot_remove_write_access(kvm, log->slot);
1628 kvm_flush_remote_tlbs(kvm);
1629 memslot = &kvm->memslots[log->slot];
1630 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
1631 memset(memslot->dirty_bitmap, 0, n);
1632 }
1633 r = 0;
1634 out:
1635 up_write(&kvm->slots_lock);
1636 return r;
1637 }
1638
1639 long kvm_arch_vm_ioctl(struct file *filp,
1640 unsigned int ioctl, unsigned long arg)
1641 {
1642 struct kvm *kvm = filp->private_data;
1643 void __user *argp = (void __user *)arg;
1644 int r = -EINVAL;
1645 /*
1646 * This union makes it completely explicit to gcc-3.x
1647 * that these two variables' stack usage should be
1648 * combined, not added together.
1649 */
1650 union {
1651 struct kvm_pit_state ps;
1652 struct kvm_memory_alias alias;
1653 } u;
1654
1655 switch (ioctl) {
1656 case KVM_SET_TSS_ADDR:
1657 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
1658 if (r < 0)
1659 goto out;
1660 break;
1661 case KVM_SET_MEMORY_REGION: {
1662 struct kvm_memory_region kvm_mem;
1663 struct kvm_userspace_memory_region kvm_userspace_mem;
1664
1665 r = -EFAULT;
1666 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
1667 goto out;
1668 kvm_userspace_mem.slot = kvm_mem.slot;
1669 kvm_userspace_mem.flags = kvm_mem.flags;
1670 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
1671 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
1672 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
1673 if (r)
1674 goto out;
1675 break;
1676 }
1677 case KVM_SET_NR_MMU_PAGES:
1678 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
1679 if (r)
1680 goto out;
1681 break;
1682 case KVM_GET_NR_MMU_PAGES:
1683 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
1684 break;
1685 case KVM_SET_MEMORY_ALIAS:
1686 r = -EFAULT;
1687 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
1688 goto out;
1689 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
1690 if (r)
1691 goto out;
1692 break;
1693 case KVM_CREATE_IRQCHIP:
1694 r = -ENOMEM;
1695 kvm->arch.vpic = kvm_create_pic(kvm);
1696 if (kvm->arch.vpic) {
1697 r = kvm_ioapic_init(kvm);
1698 if (r) {
1699 kfree(kvm->arch.vpic);
1700 kvm->arch.vpic = NULL;
1701 goto out;
1702 }
1703 } else
1704 goto out;
1705 break;
1706 case KVM_CREATE_PIT:
1707 r = -ENOMEM;
1708 kvm->arch.vpit = kvm_create_pit(kvm);
1709 if (kvm->arch.vpit)
1710 r = 0;
1711 break;
1712 case KVM_IRQ_LINE: {
1713 struct kvm_irq_level irq_event;
1714
1715 r = -EFAULT;
1716 if (copy_from_user(&irq_event, argp, sizeof irq_event))
1717 goto out;
1718 if (irqchip_in_kernel(kvm)) {
1719 mutex_lock(&kvm->lock);
1720 if (irq_event.irq < 16)
1721 kvm_pic_set_irq(pic_irqchip(kvm),
1722 irq_event.irq,
1723 irq_event.level);
1724 kvm_ioapic_set_irq(kvm->arch.vioapic,
1725 irq_event.irq,
1726 irq_event.level);
1727 mutex_unlock(&kvm->lock);
1728 r = 0;
1729 }
1730 break;
1731 }
1732 case KVM_GET_IRQCHIP: {
1733 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1734 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
1735
1736 r = -ENOMEM;
1737 if (!chip)
1738 goto out;
1739 r = -EFAULT;
1740 if (copy_from_user(chip, argp, sizeof *chip))
1741 goto get_irqchip_out;
1742 r = -ENXIO;
1743 if (!irqchip_in_kernel(kvm))
1744 goto get_irqchip_out;
1745 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
1746 if (r)
1747 goto get_irqchip_out;
1748 r = -EFAULT;
1749 if (copy_to_user(argp, chip, sizeof *chip))
1750 goto get_irqchip_out;
1751 r = 0;
1752 get_irqchip_out:
1753 kfree(chip);
1754 if (r)
1755 goto out;
1756 break;
1757 }
1758 case KVM_SET_IRQCHIP: {
1759 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1760 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
1761
1762 r = -ENOMEM;
1763 if (!chip)
1764 goto out;
1765 r = -EFAULT;
1766 if (copy_from_user(chip, argp, sizeof *chip))
1767 goto set_irqchip_out;
1768 r = -ENXIO;
1769 if (!irqchip_in_kernel(kvm))
1770 goto set_irqchip_out;
1771 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
1772 if (r)
1773 goto set_irqchip_out;
1774 r = 0;
1775 set_irqchip_out:
1776 kfree(chip);
1777 if (r)
1778 goto out;
1779 break;
1780 }
1781 case KVM_GET_PIT: {
1782 r = -EFAULT;
1783 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
1784 goto out;
1785 r = -ENXIO;
1786 if (!kvm->arch.vpit)
1787 goto out;
1788 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
1789 if (r)
1790 goto out;
1791 r = -EFAULT;
1792 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
1793 goto out;
1794 r = 0;
1795 break;
1796 }
1797 case KVM_SET_PIT: {
1798 r = -EFAULT;
1799 if (copy_from_user(&u.ps, argp, sizeof u.ps))
1800 goto out;
1801 r = -ENXIO;
1802 if (!kvm->arch.vpit)
1803 goto out;
1804 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
1805 if (r)
1806 goto out;
1807 r = 0;
1808 break;
1809 }
1810 default:
1811 ;
1812 }
1813 out:
1814 return r;
1815 }
1816
1817 static void kvm_init_msr_list(void)
1818 {
1819 u32 dummy[2];
1820 unsigned i, j;
1821
1822 for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
1823 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
1824 continue;
1825 if (j < i)
1826 msrs_to_save[j] = msrs_to_save[i];
1827 j++;
1828 }
1829 num_msrs_to_save = j;
1830 }
1831
1832 /*
1833 * Only apic need an MMIO device hook, so shortcut now..
1834 */
1835 static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
1836 gpa_t addr, int len,
1837 int is_write)
1838 {
1839 struct kvm_io_device *dev;
1840
1841 if (vcpu->arch.apic) {
1842 dev = &vcpu->arch.apic->dev;
1843 if (dev->in_range(dev, addr, len, is_write))
1844 return dev;
1845 }
1846 return NULL;
1847 }
1848
1849
1850 static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
1851 gpa_t addr, int len,
1852 int is_write)
1853 {
1854 struct kvm_io_device *dev;
1855
1856 dev = vcpu_find_pervcpu_dev(vcpu, addr, len, is_write);
1857 if (dev == NULL)
1858 dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr, len,
1859 is_write);
1860 return dev;
1861 }
1862
1863 int emulator_read_std(unsigned long addr,
1864 void *val,
1865 unsigned int bytes,
1866 struct kvm_vcpu *vcpu)
1867 {
1868 void *data = val;
1869 int r = X86EMUL_CONTINUE;
1870
1871 while (bytes) {
1872 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
1873 unsigned offset = addr & (PAGE_SIZE-1);
1874 unsigned tocopy = min(bytes, (unsigned)PAGE_SIZE - offset);
1875 int ret;
1876
1877 if (gpa == UNMAPPED_GVA) {
1878 r = X86EMUL_PROPAGATE_FAULT;
1879 goto out;
1880 }
1881 ret = kvm_read_guest(vcpu->kvm, gpa, data, tocopy);
1882 if (ret < 0) {
1883 r = X86EMUL_UNHANDLEABLE;
1884 goto out;
1885 }
1886
1887 bytes -= tocopy;
1888 data += tocopy;
1889 addr += tocopy;
1890 }
1891 out:
1892 return r;
1893 }
1894 EXPORT_SYMBOL_GPL(emulator_read_std);
1895
1896 static int emulator_read_emulated(unsigned long addr,
1897 void *val,
1898 unsigned int bytes,
1899 struct kvm_vcpu *vcpu)
1900 {
1901 struct kvm_io_device *mmio_dev;
1902 gpa_t gpa;
1903
1904 if (vcpu->mmio_read_completed) {
1905 memcpy(val, vcpu->mmio_data, bytes);
1906 vcpu->mmio_read_completed = 0;
1907 return X86EMUL_CONTINUE;
1908 }
1909
1910 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
1911
1912 /* For APIC access vmexit */
1913 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
1914 goto mmio;
1915
1916 if (emulator_read_std(addr, val, bytes, vcpu)
1917 == X86EMUL_CONTINUE)
1918 return X86EMUL_CONTINUE;
1919 if (gpa == UNMAPPED_GVA)
1920 return X86EMUL_PROPAGATE_FAULT;
1921
1922 mmio:
1923 /*
1924 * Is this MMIO handled locally?
1925 */
1926 mutex_lock(&vcpu->kvm->lock);
1927 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 0);
1928 if (mmio_dev) {
1929 kvm_iodevice_read(mmio_dev, gpa, bytes, val);
1930 mutex_unlock(&vcpu->kvm->lock);
1931 return X86EMUL_CONTINUE;
1932 }
1933 mutex_unlock(&vcpu->kvm->lock);
1934
1935 vcpu->mmio_needed = 1;
1936 vcpu->mmio_phys_addr = gpa;
1937 vcpu->mmio_size = bytes;
1938 vcpu->mmio_is_write = 0;
1939
1940 return X86EMUL_UNHANDLEABLE;
1941 }
1942
1943 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
1944 const void *val, int bytes)
1945 {
1946 int ret;
1947
1948 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
1949 if (ret < 0)
1950 return 0;
1951 kvm_mmu_pte_write(vcpu, gpa, val, bytes);
1952 return 1;
1953 }
1954
1955 static int emulator_write_emulated_onepage(unsigned long addr,
1956 const void *val,
1957 unsigned int bytes,
1958 struct kvm_vcpu *vcpu)
1959 {
1960 struct kvm_io_device *mmio_dev;
1961 gpa_t gpa;
1962
1963 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
1964
1965 if (gpa == UNMAPPED_GVA) {
1966 kvm_inject_page_fault(vcpu, addr, 2);
1967 return X86EMUL_PROPAGATE_FAULT;
1968 }
1969
1970 /* For APIC access vmexit */
1971 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
1972 goto mmio;
1973
1974 if (emulator_write_phys(vcpu, gpa, val, bytes))
1975 return X86EMUL_CONTINUE;
1976
1977 mmio:
1978 /*
1979 * Is this MMIO handled locally?
1980 */
1981 mutex_lock(&vcpu->kvm->lock);
1982 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 1);
1983 if (mmio_dev) {
1984 kvm_iodevice_write(mmio_dev, gpa, bytes, val);
1985 mutex_unlock(&vcpu->kvm->lock);
1986 return X86EMUL_CONTINUE;
1987 }
1988 mutex_unlock(&vcpu->kvm->lock);
1989
1990 vcpu->mmio_needed = 1;
1991 vcpu->mmio_phys_addr = gpa;
1992 vcpu->mmio_size = bytes;
1993 vcpu->mmio_is_write = 1;
1994 memcpy(vcpu->mmio_data, val, bytes);
1995
1996 return X86EMUL_CONTINUE;
1997 }
1998
1999 int emulator_write_emulated(unsigned long addr,
2000 const void *val,
2001 unsigned int bytes,
2002 struct kvm_vcpu *vcpu)
2003 {
2004 /* Crossing a page boundary? */
2005 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
2006 int rc, now;
2007
2008 now = -addr & ~PAGE_MASK;
2009 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
2010 if (rc != X86EMUL_CONTINUE)
2011 return rc;
2012 addr += now;
2013 val += now;
2014 bytes -= now;
2015 }
2016 return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
2017 }
2018 EXPORT_SYMBOL_GPL(emulator_write_emulated);
2019
2020 static int emulator_cmpxchg_emulated(unsigned long addr,
2021 const void *old,
2022 const void *new,
2023 unsigned int bytes,
2024 struct kvm_vcpu *vcpu)
2025 {
2026 static int reported;
2027
2028 if (!reported) {
2029 reported = 1;
2030 printk(KERN_WARNING "kvm: emulating exchange as write\n");
2031 }
2032 #ifndef CONFIG_X86_64
2033 /* guests cmpxchg8b have to be emulated atomically */
2034 if (bytes == 8) {
2035 gpa_t gpa;
2036 struct page *page;
2037 char *kaddr;
2038 u64 val;
2039
2040 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2041
2042 if (gpa == UNMAPPED_GVA ||
2043 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2044 goto emul_write;
2045
2046 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
2047 goto emul_write;
2048
2049 val = *(u64 *)new;
2050
2051 down_read(&current->mm->mmap_sem);
2052 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2053 up_read(&current->mm->mmap_sem);
2054
2055 kaddr = kmap_atomic(page, KM_USER0);
2056 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
2057 kunmap_atomic(kaddr, KM_USER0);
2058 kvm_release_page_dirty(page);
2059 }
2060 emul_write:
2061 #endif
2062
2063 return emulator_write_emulated(addr, new, bytes, vcpu);
2064 }
2065
2066 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
2067 {
2068 return kvm_x86_ops->get_segment_base(vcpu, seg);
2069 }
2070
2071 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
2072 {
2073 return X86EMUL_CONTINUE;
2074 }
2075
2076 int emulate_clts(struct kvm_vcpu *vcpu)
2077 {
2078 KVMTRACE_0D(CLTS, vcpu, handler);
2079 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
2080 return X86EMUL_CONTINUE;
2081 }
2082
2083 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
2084 {
2085 struct kvm_vcpu *vcpu = ctxt->vcpu;
2086
2087 switch (dr) {
2088 case 0 ... 3:
2089 *dest = kvm_x86_ops->get_dr(vcpu, dr);
2090 return X86EMUL_CONTINUE;
2091 default:
2092 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr);
2093 return X86EMUL_UNHANDLEABLE;
2094 }
2095 }
2096
2097 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
2098 {
2099 unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
2100 int exception;
2101
2102 kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
2103 if (exception) {
2104 /* FIXME: better handling */
2105 return X86EMUL_UNHANDLEABLE;
2106 }
2107 return X86EMUL_CONTINUE;
2108 }
2109
2110 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
2111 {
2112 u8 opcodes[4];
2113 unsigned long rip = vcpu->arch.rip;
2114 unsigned long rip_linear;
2115
2116 if (!printk_ratelimit())
2117 return;
2118
2119 rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
2120
2121 emulator_read_std(rip_linear, (void *)opcodes, 4, vcpu);
2122
2123 printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
2124 context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
2125 }
2126 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
2127
2128 static struct x86_emulate_ops emulate_ops = {
2129 .read_std = emulator_read_std,
2130 .read_emulated = emulator_read_emulated,
2131 .write_emulated = emulator_write_emulated,
2132 .cmpxchg_emulated = emulator_cmpxchg_emulated,
2133 };
2134
2135 int emulate_instruction(struct kvm_vcpu *vcpu,
2136 struct kvm_run *run,
2137 unsigned long cr2,
2138 u16 error_code,
2139 int emulation_type)
2140 {
2141 int r;
2142 struct decode_cache *c;
2143
2144 vcpu->arch.mmio_fault_cr2 = cr2;
2145 kvm_x86_ops->cache_regs(vcpu);
2146
2147 vcpu->mmio_is_write = 0;
2148 vcpu->arch.pio.string = 0;
2149
2150 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
2151 int cs_db, cs_l;
2152 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
2153
2154 vcpu->arch.emulate_ctxt.vcpu = vcpu;
2155 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
2156 vcpu->arch.emulate_ctxt.mode =
2157 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
2158 ? X86EMUL_MODE_REAL : cs_l
2159 ? X86EMUL_MODE_PROT64 : cs_db
2160 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
2161
2162 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2163
2164 /* Reject the instructions other than VMCALL/VMMCALL when
2165 * try to emulate invalid opcode */
2166 c = &vcpu->arch.emulate_ctxt.decode;
2167 if ((emulation_type & EMULTYPE_TRAP_UD) &&
2168 (!(c->twobyte && c->b == 0x01 &&
2169 (c->modrm_reg == 0 || c->modrm_reg == 3) &&
2170 c->modrm_mod == 3 && c->modrm_rm == 1)))
2171 return EMULATE_FAIL;
2172
2173 ++vcpu->stat.insn_emulation;
2174 if (r) {
2175 ++vcpu->stat.insn_emulation_fail;
2176 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2177 return EMULATE_DONE;
2178 return EMULATE_FAIL;
2179 }
2180 }
2181
2182 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2183
2184 if (vcpu->arch.pio.string)
2185 return EMULATE_DO_MMIO;
2186
2187 if ((r || vcpu->mmio_is_write) && run) {
2188 run->exit_reason = KVM_EXIT_MMIO;
2189 run->mmio.phys_addr = vcpu->mmio_phys_addr;
2190 memcpy(run->mmio.data, vcpu->mmio_data, 8);
2191 run->mmio.len = vcpu->mmio_size;
2192 run->mmio.is_write = vcpu->mmio_is_write;
2193 }
2194
2195 if (r) {
2196 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2197 return EMULATE_DONE;
2198 if (!vcpu->mmio_needed) {
2199 kvm_report_emulation_failure(vcpu, "mmio");
2200 return EMULATE_FAIL;
2201 }
2202 return EMULATE_DO_MMIO;
2203 }
2204
2205 kvm_x86_ops->decache_regs(vcpu);
2206 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
2207
2208 if (vcpu->mmio_is_write) {
2209 vcpu->mmio_needed = 0;
2210 return EMULATE_DO_MMIO;
2211 }
2212
2213 return EMULATE_DONE;
2214 }
2215 EXPORT_SYMBOL_GPL(emulate_instruction);
2216
2217 static void free_pio_guest_pages(struct kvm_vcpu *vcpu)
2218 {
2219 int i;
2220
2221 for (i = 0; i < ARRAY_SIZE(vcpu->arch.pio.guest_pages); ++i)
2222 if (vcpu->arch.pio.guest_pages[i]) {
2223 kvm_release_page_dirty(vcpu->arch.pio.guest_pages[i]);
2224 vcpu->arch.pio.guest_pages[i] = NULL;
2225 }
2226 }
2227
2228 static int pio_copy_data(struct kvm_vcpu *vcpu)
2229 {
2230 void *p = vcpu->arch.pio_data;
2231 void *q;
2232 unsigned bytes;
2233 int nr_pages = vcpu->arch.pio.guest_pages[1] ? 2 : 1;
2234
2235 q = vmap(vcpu->arch.pio.guest_pages, nr_pages, VM_READ|VM_WRITE,
2236 PAGE_KERNEL);
2237 if (!q) {
2238 free_pio_guest_pages(vcpu);
2239 return -ENOMEM;
2240 }
2241 q += vcpu->arch.pio.guest_page_offset;
2242 bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
2243 if (vcpu->arch.pio.in)
2244 memcpy(q, p, bytes);
2245 else
2246 memcpy(p, q, bytes);
2247 q -= vcpu->arch.pio.guest_page_offset;
2248 vunmap(q);
2249 free_pio_guest_pages(vcpu);
2250 return 0;
2251 }
2252
2253 int complete_pio(struct kvm_vcpu *vcpu)
2254 {
2255 struct kvm_pio_request *io = &vcpu->arch.pio;
2256 long delta;
2257 int r;
2258
2259 kvm_x86_ops->cache_regs(vcpu);
2260
2261 if (!io->string) {
2262 if (io->in)
2263 memcpy(&vcpu->arch.regs[VCPU_REGS_RAX], vcpu->arch.pio_data,
2264 io->size);
2265 } else {
2266 if (io->in) {
2267 r = pio_copy_data(vcpu);
2268 if (r) {
2269 kvm_x86_ops->cache_regs(vcpu);
2270 return r;
2271 }
2272 }
2273
2274 delta = 1;
2275 if (io->rep) {
2276 delta *= io->cur_count;
2277 /*
2278 * The size of the register should really depend on
2279 * current address size.
2280 */
2281 vcpu->arch.regs[VCPU_REGS_RCX] -= delta;
2282 }
2283 if (io->down)
2284 delta = -delta;
2285 delta *= io->size;
2286 if (io->in)
2287 vcpu->arch.regs[VCPU_REGS_RDI] += delta;
2288 else
2289 vcpu->arch.regs[VCPU_REGS_RSI] += delta;
2290 }
2291
2292 kvm_x86_ops->decache_regs(vcpu);
2293
2294 io->count -= io->cur_count;
2295 io->cur_count = 0;
2296
2297 return 0;
2298 }
2299
2300 static void kernel_pio(struct kvm_io_device *pio_dev,
2301 struct kvm_vcpu *vcpu,
2302 void *pd)
2303 {
2304 /* TODO: String I/O for in kernel device */
2305
2306 mutex_lock(&vcpu->kvm->lock);
2307 if (vcpu->arch.pio.in)
2308 kvm_iodevice_read(pio_dev, vcpu->arch.pio.port,
2309 vcpu->arch.pio.size,
2310 pd);
2311 else
2312 kvm_iodevice_write(pio_dev, vcpu->arch.pio.port,
2313 vcpu->arch.pio.size,
2314 pd);
2315 mutex_unlock(&vcpu->kvm->lock);
2316 }
2317
2318 static void pio_string_write(struct kvm_io_device *pio_dev,
2319 struct kvm_vcpu *vcpu)
2320 {
2321 struct kvm_pio_request *io = &vcpu->arch.pio;
2322 void *pd = vcpu->arch.pio_data;
2323 int i;
2324
2325 mutex_lock(&vcpu->kvm->lock);
2326 for (i = 0; i < io->cur_count; i++) {
2327 kvm_iodevice_write(pio_dev, io->port,
2328 io->size,
2329 pd);
2330 pd += io->size;
2331 }
2332 mutex_unlock(&vcpu->kvm->lock);
2333 }
2334
2335 static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
2336 gpa_t addr, int len,
2337 int is_write)
2338 {
2339 return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr, len, is_write);
2340 }
2341
2342 int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2343 int size, unsigned port)
2344 {
2345 struct kvm_io_device *pio_dev;
2346
2347 vcpu->run->exit_reason = KVM_EXIT_IO;
2348 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2349 vcpu->run->io.size = vcpu->arch.pio.size = size;
2350 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2351 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
2352 vcpu->run->io.port = vcpu->arch.pio.port = port;
2353 vcpu->arch.pio.in = in;
2354 vcpu->arch.pio.string = 0;
2355 vcpu->arch.pio.down = 0;
2356 vcpu->arch.pio.guest_page_offset = 0;
2357 vcpu->arch.pio.rep = 0;
2358
2359 if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2360 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2361 handler);
2362 else
2363 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2364 handler);
2365
2366 kvm_x86_ops->cache_regs(vcpu);
2367 memcpy(vcpu->arch.pio_data, &vcpu->arch.regs[VCPU_REGS_RAX], 4);
2368
2369 kvm_x86_ops->skip_emulated_instruction(vcpu);
2370
2371 pio_dev = vcpu_find_pio_dev(vcpu, port, size, !in);
2372 if (pio_dev) {
2373 kernel_pio(pio_dev, vcpu, vcpu->arch.pio_data);
2374 complete_pio(vcpu);
2375 return 1;
2376 }
2377 return 0;
2378 }
2379 EXPORT_SYMBOL_GPL(kvm_emulate_pio);
2380
2381 int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2382 int size, unsigned long count, int down,
2383 gva_t address, int rep, unsigned port)
2384 {
2385 unsigned now, in_page;
2386 int i, ret = 0;
2387 int nr_pages = 1;
2388 struct page *page;
2389 struct kvm_io_device *pio_dev;
2390
2391 vcpu->run->exit_reason = KVM_EXIT_IO;
2392 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2393 vcpu->run->io.size = vcpu->arch.pio.size = size;
2394 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2395 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
2396 vcpu->run->io.port = vcpu->arch.pio.port = port;
2397 vcpu->arch.pio.in = in;
2398 vcpu->arch.pio.string = 1;
2399 vcpu->arch.pio.down = down;
2400 vcpu->arch.pio.guest_page_offset = offset_in_page(address);
2401 vcpu->arch.pio.rep = rep;
2402
2403 if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2404 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2405 handler);
2406 else
2407 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2408 handler);
2409
2410 if (!count) {
2411 kvm_x86_ops->skip_emulated_instruction(vcpu);
2412 return 1;
2413 }
2414
2415 if (!down)
2416 in_page = PAGE_SIZE - offset_in_page(address);
2417 else
2418 in_page = offset_in_page(address) + size;
2419 now = min(count, (unsigned long)in_page / size);
2420 if (!now) {
2421 /*
2422 * String I/O straddles page boundary. Pin two guest pages
2423 * so that we satisfy atomicity constraints. Do just one
2424 * transaction to avoid complexity.
2425 */
2426 nr_pages = 2;
2427 now = 1;
2428 }
2429 if (down) {
2430 /*
2431 * String I/O in reverse. Yuck. Kill the guest, fix later.
2432 */
2433 pr_unimpl(vcpu, "guest string pio down\n");
2434 kvm_inject_gp(vcpu, 0);
2435 return 1;
2436 }
2437 vcpu->run->io.count = now;
2438 vcpu->arch.pio.cur_count = now;
2439
2440 if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
2441 kvm_x86_ops->skip_emulated_instruction(vcpu);
2442
2443 for (i = 0; i < nr_pages; ++i) {
2444 page = gva_to_page(vcpu, address + i * PAGE_SIZE);
2445 vcpu->arch.pio.guest_pages[i] = page;
2446 if (!page) {
2447 kvm_inject_gp(vcpu, 0);
2448 free_pio_guest_pages(vcpu);
2449 return 1;
2450 }
2451 }
2452
2453 pio_dev = vcpu_find_pio_dev(vcpu, port,
2454 vcpu->arch.pio.cur_count,
2455 !vcpu->arch.pio.in);
2456 if (!vcpu->arch.pio.in) {
2457 /* string PIO write */
2458 ret = pio_copy_data(vcpu);
2459 if (ret >= 0 && pio_dev) {
2460 pio_string_write(pio_dev, vcpu);
2461 complete_pio(vcpu);
2462 if (vcpu->arch.pio.count == 0)
2463 ret = 1;
2464 }
2465 } else if (pio_dev)
2466 pr_unimpl(vcpu, "no string pio read support yet, "
2467 "port %x size %d count %ld\n",
2468 port, size, count);
2469
2470 return ret;
2471 }
2472 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
2473
2474 int kvm_arch_init(void *opaque)
2475 {
2476 int r;
2477 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
2478
2479 if (kvm_x86_ops) {
2480 printk(KERN_ERR "kvm: already loaded the other module\n");
2481 r = -EEXIST;
2482 goto out;
2483 }
2484
2485 if (!ops->cpu_has_kvm_support()) {
2486 printk(KERN_ERR "kvm: no hardware support\n");
2487 r = -EOPNOTSUPP;
2488 goto out;
2489 }
2490 if (ops->disabled_by_bios()) {
2491 printk(KERN_ERR "kvm: disabled by bios\n");
2492 r = -EOPNOTSUPP;
2493 goto out;
2494 }
2495
2496 r = kvm_mmu_module_init();
2497 if (r)
2498 goto out;
2499
2500 kvm_init_msr_list();
2501
2502 kvm_x86_ops = ops;
2503 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
2504 kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
2505 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
2506 PT_DIRTY_MASK, PT64_NX_MASK, 0);
2507 return 0;
2508
2509 out:
2510 return r;
2511 }
2512
2513 void kvm_arch_exit(void)
2514 {
2515 kvm_x86_ops = NULL;
2516 kvm_mmu_module_exit();
2517 }
2518
2519 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
2520 {
2521 ++vcpu->stat.halt_exits;
2522 KVMTRACE_0D(HLT, vcpu, handler);
2523 if (irqchip_in_kernel(vcpu->kvm)) {
2524 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
2525 up_read(&vcpu->kvm->slots_lock);
2526 kvm_vcpu_block(vcpu);
2527 down_read(&vcpu->kvm->slots_lock);
2528 if (vcpu->arch.mp_state != KVM_MP_STATE_RUNNABLE)
2529 return -EINTR;
2530 return 1;
2531 } else {
2532 vcpu->run->exit_reason = KVM_EXIT_HLT;
2533 return 0;
2534 }
2535 }
2536 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
2537
2538 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
2539 unsigned long a1)
2540 {
2541 if (is_long_mode(vcpu))
2542 return a0;
2543 else
2544 return a0 | ((gpa_t)a1 << 32);
2545 }
2546
2547 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
2548 {
2549 unsigned long nr, a0, a1, a2, a3, ret;
2550 int r = 1;
2551
2552 kvm_x86_ops->cache_regs(vcpu);
2553
2554 nr = vcpu->arch.regs[VCPU_REGS_RAX];
2555 a0 = vcpu->arch.regs[VCPU_REGS_RBX];
2556 a1 = vcpu->arch.regs[VCPU_REGS_RCX];
2557 a2 = vcpu->arch.regs[VCPU_REGS_RDX];
2558 a3 = vcpu->arch.regs[VCPU_REGS_RSI];
2559
2560 KVMTRACE_1D(VMMCALL, vcpu, (u32)nr, handler);
2561
2562 if (!is_long_mode(vcpu)) {
2563 nr &= 0xFFFFFFFF;
2564 a0 &= 0xFFFFFFFF;
2565 a1 &= 0xFFFFFFFF;
2566 a2 &= 0xFFFFFFFF;
2567 a3 &= 0xFFFFFFFF;
2568 }
2569
2570 switch (nr) {
2571 case KVM_HC_VAPIC_POLL_IRQ:
2572 ret = 0;
2573 break;
2574 case KVM_HC_MMU_OP:
2575 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
2576 break;
2577 default:
2578 ret = -KVM_ENOSYS;
2579 break;
2580 }
2581 vcpu->arch.regs[VCPU_REGS_RAX] = ret;
2582 kvm_x86_ops->decache_regs(vcpu);
2583 ++vcpu->stat.hypercalls;
2584 return r;
2585 }
2586 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
2587
2588 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
2589 {
2590 char instruction[3];
2591 int ret = 0;
2592
2593
2594 /*
2595 * Blow out the MMU to ensure that no other VCPU has an active mapping
2596 * to ensure that the updated hypercall appears atomically across all
2597 * VCPUs.
2598 */
2599 kvm_mmu_zap_all(vcpu->kvm);
2600
2601 kvm_x86_ops->cache_regs(vcpu);
2602 kvm_x86_ops->patch_hypercall(vcpu, instruction);
2603 if (emulator_write_emulated(vcpu->arch.rip, instruction, 3, vcpu)
2604 != X86EMUL_CONTINUE)
2605 ret = -EFAULT;
2606
2607 return ret;
2608 }
2609
2610 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
2611 {
2612 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
2613 }
2614
2615 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2616 {
2617 struct descriptor_table dt = { limit, base };
2618
2619 kvm_x86_ops->set_gdt(vcpu, &dt);
2620 }
2621
2622 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2623 {
2624 struct descriptor_table dt = { limit, base };
2625
2626 kvm_x86_ops->set_idt(vcpu, &dt);
2627 }
2628
2629 void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
2630 unsigned long *rflags)
2631 {
2632 kvm_lmsw(vcpu, msw);
2633 *rflags = kvm_x86_ops->get_rflags(vcpu);
2634 }
2635
2636 unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
2637 {
2638 unsigned long value;
2639
2640 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
2641 switch (cr) {
2642 case 0:
2643 value = vcpu->arch.cr0;
2644 break;
2645 case 2:
2646 value = vcpu->arch.cr2;
2647 break;
2648 case 3:
2649 value = vcpu->arch.cr3;
2650 break;
2651 case 4:
2652 value = vcpu->arch.cr4;
2653 break;
2654 case 8:
2655 value = kvm_get_cr8(vcpu);
2656 break;
2657 default:
2658 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
2659 return 0;
2660 }
2661 KVMTRACE_3D(CR_READ, vcpu, (u32)cr, (u32)value,
2662 (u32)((u64)value >> 32), handler);
2663
2664 return value;
2665 }
2666
2667 void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
2668 unsigned long *rflags)
2669 {
2670 KVMTRACE_3D(CR_WRITE, vcpu, (u32)cr, (u32)val,
2671 (u32)((u64)val >> 32), handler);
2672
2673 switch (cr) {
2674 case 0:
2675 kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
2676 *rflags = kvm_x86_ops->get_rflags(vcpu);
2677 break;
2678 case 2:
2679 vcpu->arch.cr2 = val;
2680 break;
2681 case 3:
2682 kvm_set_cr3(vcpu, val);
2683 break;
2684 case 4:
2685 kvm_set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
2686 break;
2687 case 8:
2688 kvm_set_cr8(vcpu, val & 0xfUL);
2689 break;
2690 default:
2691 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
2692 }
2693 }
2694
2695 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
2696 {
2697 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
2698 int j, nent = vcpu->arch.cpuid_nent;
2699
2700 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
2701 /* when no next entry is found, the current entry[i] is reselected */
2702 for (j = i + 1; j == i; j = (j + 1) % nent) {
2703 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
2704 if (ej->function == e->function) {
2705 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2706 return j;
2707 }
2708 }
2709 return 0; /* silence gcc, even though control never reaches here */
2710 }
2711
2712 /* find an entry with matching function, matching index (if needed), and that
2713 * should be read next (if it's stateful) */
2714 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
2715 u32 function, u32 index)
2716 {
2717 if (e->function != function)
2718 return 0;
2719 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
2720 return 0;
2721 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
2722 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
2723 return 0;
2724 return 1;
2725 }
2726
2727 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
2728 {
2729 int i;
2730 u32 function, index;
2731 struct kvm_cpuid_entry2 *e, *best;
2732
2733 kvm_x86_ops->cache_regs(vcpu);
2734 function = vcpu->arch.regs[VCPU_REGS_RAX];
2735 index = vcpu->arch.regs[VCPU_REGS_RCX];
2736 vcpu->arch.regs[VCPU_REGS_RAX] = 0;
2737 vcpu->arch.regs[VCPU_REGS_RBX] = 0;
2738 vcpu->arch.regs[VCPU_REGS_RCX] = 0;
2739 vcpu->arch.regs[VCPU_REGS_RDX] = 0;
2740 best = NULL;
2741 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2742 e = &vcpu->arch.cpuid_entries[i];
2743 if (is_matching_cpuid_entry(e, function, index)) {
2744 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
2745 move_to_next_stateful_cpuid_entry(vcpu, i);
2746 best = e;
2747 break;
2748 }
2749 /*
2750 * Both basic or both extended?
2751 */
2752 if (((e->function ^ function) & 0x80000000) == 0)
2753 if (!best || e->function > best->function)
2754 best = e;
2755 }
2756 if (best) {
2757 vcpu->arch.regs[VCPU_REGS_RAX] = best->eax;
2758 vcpu->arch.regs[VCPU_REGS_RBX] = best->ebx;
2759 vcpu->arch.regs[VCPU_REGS_RCX] = best->ecx;
2760 vcpu->arch.regs[VCPU_REGS_RDX] = best->edx;
2761 }
2762 kvm_x86_ops->decache_regs(vcpu);
2763 kvm_x86_ops->skip_emulated_instruction(vcpu);
2764 KVMTRACE_5D(CPUID, vcpu, function,
2765 (u32)vcpu->arch.regs[VCPU_REGS_RAX],
2766 (u32)vcpu->arch.regs[VCPU_REGS_RBX],
2767 (u32)vcpu->arch.regs[VCPU_REGS_RCX],
2768 (u32)vcpu->arch.regs[VCPU_REGS_RDX], handler);
2769 }
2770 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
2771
2772 /*
2773 * Check if userspace requested an interrupt window, and that the
2774 * interrupt window is open.
2775 *
2776 * No need to exit to userspace if we already have an interrupt queued.
2777 */
2778 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
2779 struct kvm_run *kvm_run)
2780 {
2781 return (!vcpu->arch.irq_summary &&
2782 kvm_run->request_interrupt_window &&
2783 vcpu->arch.interrupt_window_open &&
2784 (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF));
2785 }
2786
2787 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
2788 struct kvm_run *kvm_run)
2789 {
2790 kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
2791 kvm_run->cr8 = kvm_get_cr8(vcpu);
2792 kvm_run->apic_base = kvm_get_apic_base(vcpu);
2793 if (irqchip_in_kernel(vcpu->kvm))
2794 kvm_run->ready_for_interrupt_injection = 1;
2795 else
2796 kvm_run->ready_for_interrupt_injection =
2797 (vcpu->arch.interrupt_window_open &&
2798 vcpu->arch.irq_summary == 0);
2799 }
2800
2801 static void vapic_enter(struct kvm_vcpu *vcpu)
2802 {
2803 struct kvm_lapic *apic = vcpu->arch.apic;
2804 struct page *page;
2805
2806 if (!apic || !apic->vapic_addr)
2807 return;
2808
2809 down_read(&current->mm->mmap_sem);
2810 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
2811 up_read(&current->mm->mmap_sem);
2812
2813 vcpu->arch.apic->vapic_page = page;
2814 }
2815
2816 static void vapic_exit(struct kvm_vcpu *vcpu)
2817 {
2818 struct kvm_lapic *apic = vcpu->arch.apic;
2819
2820 if (!apic || !apic->vapic_addr)
2821 return;
2822
2823 down_read(&vcpu->kvm->slots_lock);
2824 kvm_release_page_dirty(apic->vapic_page);
2825 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
2826 up_read(&vcpu->kvm->slots_lock);
2827 }
2828
2829 static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2830 {
2831 int r;
2832
2833 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
2834 pr_debug("vcpu %d received sipi with vector # %x\n",
2835 vcpu->vcpu_id, vcpu->arch.sipi_vector);
2836 kvm_lapic_reset(vcpu);
2837 r = kvm_x86_ops->vcpu_reset(vcpu);
2838 if (r)
2839 return r;
2840 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
2841 }
2842
2843 down_read(&vcpu->kvm->slots_lock);
2844 vapic_enter(vcpu);
2845
2846 again:
2847 if (vcpu->requests)
2848 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
2849 kvm_mmu_unload(vcpu);
2850
2851 r = kvm_mmu_reload(vcpu);
2852 if (unlikely(r))
2853 goto out;
2854
2855 if (vcpu->requests) {
2856 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
2857 __kvm_migrate_timers(vcpu);
2858 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
2859 kvm_x86_ops->tlb_flush(vcpu);
2860 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
2861 &vcpu->requests)) {
2862 kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
2863 r = 0;
2864 goto out;
2865 }
2866 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
2867 kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
2868 r = 0;
2869 goto out;
2870 }
2871 }
2872
2873 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
2874 kvm_inject_pending_timer_irqs(vcpu);
2875
2876 preempt_disable();
2877
2878 kvm_x86_ops->prepare_guest_switch(vcpu);
2879 kvm_load_guest_fpu(vcpu);
2880
2881 local_irq_disable();
2882
2883 if (vcpu->requests || need_resched()) {
2884 local_irq_enable();
2885 preempt_enable();
2886 r = 1;
2887 goto out;
2888 }
2889
2890 if (signal_pending(current)) {
2891 local_irq_enable();
2892 preempt_enable();
2893 r = -EINTR;
2894 kvm_run->exit_reason = KVM_EXIT_INTR;
2895 ++vcpu->stat.signal_exits;
2896 goto out;
2897 }
2898
2899 if (vcpu->guest_debug.enabled)
2900 kvm_x86_ops->guest_debug_pre(vcpu);
2901
2902 vcpu->guest_mode = 1;
2903 /*
2904 * Make sure that guest_mode assignment won't happen after
2905 * testing the pending IRQ vector bitmap.
2906 */
2907 smp_wmb();
2908
2909 if (vcpu->arch.exception.pending)
2910 __queue_exception(vcpu);
2911 else if (irqchip_in_kernel(vcpu->kvm))
2912 kvm_x86_ops->inject_pending_irq(vcpu);
2913 else
2914 kvm_x86_ops->inject_pending_vectors(vcpu, kvm_run);
2915
2916 kvm_lapic_sync_to_vapic(vcpu);
2917
2918 up_read(&vcpu->kvm->slots_lock);
2919
2920 kvm_guest_enter();
2921
2922
2923 KVMTRACE_0D(VMENTRY, vcpu, entryexit);
2924 kvm_x86_ops->run(vcpu, kvm_run);
2925
2926 vcpu->guest_mode = 0;
2927 local_irq_enable();
2928
2929 ++vcpu->stat.exits;
2930
2931 /*
2932 * We must have an instruction between local_irq_enable() and
2933 * kvm_guest_exit(), so the timer interrupt isn't delayed by
2934 * the interrupt shadow. The stat.exits increment will do nicely.
2935 * But we need to prevent reordering, hence this barrier():
2936 */
2937 barrier();
2938
2939 kvm_guest_exit();
2940
2941 preempt_enable();
2942
2943 down_read(&vcpu->kvm->slots_lock);
2944
2945 /*
2946 * Profile KVM exit RIPs:
2947 */
2948 if (unlikely(prof_on == KVM_PROFILING)) {
2949 kvm_x86_ops->cache_regs(vcpu);
2950 profile_hit(KVM_PROFILING, (void *)vcpu->arch.rip);
2951 }
2952
2953 if (vcpu->arch.exception.pending && kvm_x86_ops->exception_injected(vcpu))
2954 vcpu->arch.exception.pending = false;
2955
2956 kvm_lapic_sync_from_vapic(vcpu);
2957
2958 r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
2959
2960 if (r > 0) {
2961 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
2962 r = -EINTR;
2963 kvm_run->exit_reason = KVM_EXIT_INTR;
2964 ++vcpu->stat.request_irq_exits;
2965 goto out;
2966 }
2967 if (!need_resched())
2968 goto again;
2969 }
2970
2971 out:
2972 up_read(&vcpu->kvm->slots_lock);
2973 if (r > 0) {
2974 kvm_resched(vcpu);
2975 down_read(&vcpu->kvm->slots_lock);
2976 goto again;
2977 }
2978
2979 post_kvm_run_save(vcpu, kvm_run);
2980
2981 vapic_exit(vcpu);
2982
2983 return r;
2984 }
2985
2986 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2987 {
2988 int r;
2989 sigset_t sigsaved;
2990
2991 vcpu_load(vcpu);
2992
2993 if (vcpu->sigset_active)
2994 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
2995
2996 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
2997 kvm_vcpu_block(vcpu);
2998 r = -EAGAIN;
2999 goto out;
3000 }
3001
3002 /* re-sync apic's tpr */
3003 if (!irqchip_in_kernel(vcpu->kvm))
3004 kvm_set_cr8(vcpu, kvm_run->cr8);
3005
3006 if (vcpu->arch.pio.cur_count) {
3007 r = complete_pio(vcpu);
3008 if (r)
3009 goto out;
3010 }
3011 #if CONFIG_HAS_IOMEM
3012 if (vcpu->mmio_needed) {
3013 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
3014 vcpu->mmio_read_completed = 1;
3015 vcpu->mmio_needed = 0;
3016
3017 down_read(&vcpu->kvm->slots_lock);
3018 r = emulate_instruction(vcpu, kvm_run,
3019 vcpu->arch.mmio_fault_cr2, 0,
3020 EMULTYPE_NO_DECODE);
3021 up_read(&vcpu->kvm->slots_lock);
3022 if (r == EMULATE_DO_MMIO) {
3023 /*
3024 * Read-modify-write. Back to userspace.
3025 */
3026 r = 0;
3027 goto out;
3028 }
3029 }
3030 #endif
3031 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL) {
3032 kvm_x86_ops->cache_regs(vcpu);
3033 vcpu->arch.regs[VCPU_REGS_RAX] = kvm_run->hypercall.ret;
3034 kvm_x86_ops->decache_regs(vcpu);
3035 }
3036
3037 r = __vcpu_run(vcpu, kvm_run);
3038
3039 out:
3040 if (vcpu->sigset_active)
3041 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
3042
3043 vcpu_put(vcpu);
3044 return r;
3045 }
3046
3047 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3048 {
3049 vcpu_load(vcpu);
3050
3051 kvm_x86_ops->cache_regs(vcpu);
3052
3053 regs->rax = vcpu->arch.regs[VCPU_REGS_RAX];
3054 regs->rbx = vcpu->arch.regs[VCPU_REGS_RBX];
3055 regs->rcx = vcpu->arch.regs[VCPU_REGS_RCX];
3056 regs->rdx = vcpu->arch.regs[VCPU_REGS_RDX];
3057 regs->rsi = vcpu->arch.regs[VCPU_REGS_RSI];
3058 regs->rdi = vcpu->arch.regs[VCPU_REGS_RDI];
3059 regs->rsp = vcpu->arch.regs[VCPU_REGS_RSP];
3060 regs->rbp = vcpu->arch.regs[VCPU_REGS_RBP];
3061 #ifdef CONFIG_X86_64
3062 regs->r8 = vcpu->arch.regs[VCPU_REGS_R8];
3063 regs->r9 = vcpu->arch.regs[VCPU_REGS_R9];
3064 regs->r10 = vcpu->arch.regs[VCPU_REGS_R10];
3065 regs->r11 = vcpu->arch.regs[VCPU_REGS_R11];
3066 regs->r12 = vcpu->arch.regs[VCPU_REGS_R12];
3067 regs->r13 = vcpu->arch.regs[VCPU_REGS_R13];
3068 regs->r14 = vcpu->arch.regs[VCPU_REGS_R14];
3069 regs->r15 = vcpu->arch.regs[VCPU_REGS_R15];
3070 #endif
3071
3072 regs->rip = vcpu->arch.rip;
3073 regs->rflags = kvm_x86_ops->get_rflags(vcpu);
3074
3075 /*
3076 * Don't leak debug flags in case they were set for guest debugging
3077 */
3078 if (vcpu->guest_debug.enabled && vcpu->guest_debug.singlestep)
3079 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
3080
3081 vcpu_put(vcpu);
3082
3083 return 0;
3084 }
3085
3086 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3087 {
3088 vcpu_load(vcpu);
3089
3090 vcpu->arch.regs[VCPU_REGS_RAX] = regs->rax;
3091 vcpu->arch.regs[VCPU_REGS_RBX] = regs->rbx;
3092 vcpu->arch.regs[VCPU_REGS_RCX] = regs->rcx;
3093 vcpu->arch.regs[VCPU_REGS_RDX] = regs->rdx;
3094 vcpu->arch.regs[VCPU_REGS_RSI] = regs->rsi;
3095 vcpu->arch.regs[VCPU_REGS_RDI] = regs->rdi;
3096 vcpu->arch.regs[VCPU_REGS_RSP] = regs->rsp;
3097 vcpu->arch.regs[VCPU_REGS_RBP] = regs->rbp;
3098 #ifdef CONFIG_X86_64
3099 vcpu->arch.regs[VCPU_REGS_R8] = regs->r8;
3100 vcpu->arch.regs[VCPU_REGS_R9] = regs->r9;
3101 vcpu->arch.regs[VCPU_REGS_R10] = regs->r10;
3102 vcpu->arch.regs[VCPU_REGS_R11] = regs->r11;
3103 vcpu->arch.regs[VCPU_REGS_R12] = regs->r12;
3104 vcpu->arch.regs[VCPU_REGS_R13] = regs->r13;
3105 vcpu->arch.regs[VCPU_REGS_R14] = regs->r14;
3106 vcpu->arch.regs[VCPU_REGS_R15] = regs->r15;
3107 #endif
3108
3109 vcpu->arch.rip = regs->rip;
3110 kvm_x86_ops->set_rflags(vcpu, regs->rflags);
3111
3112 kvm_x86_ops->decache_regs(vcpu);
3113
3114 vcpu->arch.exception.pending = false;
3115
3116 vcpu_put(vcpu);
3117
3118 return 0;
3119 }
3120
3121 void kvm_get_segment(struct kvm_vcpu *vcpu,
3122 struct kvm_segment *var, int seg)
3123 {
3124 kvm_x86_ops->get_segment(vcpu, var, seg);
3125 }
3126
3127 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
3128 {
3129 struct kvm_segment cs;
3130
3131 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
3132 *db = cs.db;
3133 *l = cs.l;
3134 }
3135 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
3136
3137 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
3138 struct kvm_sregs *sregs)
3139 {
3140 struct descriptor_table dt;
3141 int pending_vec;
3142
3143 vcpu_load(vcpu);
3144
3145 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3146 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3147 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3148 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3149 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3150 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
3151
3152 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3153 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3154
3155 kvm_x86_ops->get_idt(vcpu, &dt);
3156 sregs->idt.limit = dt.limit;
3157 sregs->idt.base = dt.base;
3158 kvm_x86_ops->get_gdt(vcpu, &dt);
3159 sregs->gdt.limit = dt.limit;
3160 sregs->gdt.base = dt.base;
3161
3162 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3163 sregs->cr0 = vcpu->arch.cr0;
3164 sregs->cr2 = vcpu->arch.cr2;
3165 sregs->cr3 = vcpu->arch.cr3;
3166 sregs->cr4 = vcpu->arch.cr4;
3167 sregs->cr8 = kvm_get_cr8(vcpu);
3168 sregs->efer = vcpu->arch.shadow_efer;
3169 sregs->apic_base = kvm_get_apic_base(vcpu);
3170
3171 if (irqchip_in_kernel(vcpu->kvm)) {
3172 memset(sregs->interrupt_bitmap, 0,
3173 sizeof sregs->interrupt_bitmap);
3174 pending_vec = kvm_x86_ops->get_irq(vcpu);
3175 if (pending_vec >= 0)
3176 set_bit(pending_vec,
3177 (unsigned long *)sregs->interrupt_bitmap);
3178 } else
3179 memcpy(sregs->interrupt_bitmap, vcpu->arch.irq_pending,
3180 sizeof sregs->interrupt_bitmap);
3181
3182 vcpu_put(vcpu);
3183
3184 return 0;
3185 }
3186
3187 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
3188 struct kvm_mp_state *mp_state)
3189 {
3190 vcpu_load(vcpu);
3191 mp_state->mp_state = vcpu->arch.mp_state;
3192 vcpu_put(vcpu);
3193 return 0;
3194 }
3195
3196 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
3197 struct kvm_mp_state *mp_state)
3198 {
3199 vcpu_load(vcpu);
3200 vcpu->arch.mp_state = mp_state->mp_state;
3201 vcpu_put(vcpu);
3202 return 0;
3203 }
3204
3205 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3206 struct kvm_segment *var, int seg)
3207 {
3208 kvm_x86_ops->set_segment(vcpu, var, seg);
3209 }
3210
3211 static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
3212 struct kvm_segment *kvm_desct)
3213 {
3214 kvm_desct->base = seg_desc->base0;
3215 kvm_desct->base |= seg_desc->base1 << 16;
3216 kvm_desct->base |= seg_desc->base2 << 24;
3217 kvm_desct->limit = seg_desc->limit0;
3218 kvm_desct->limit |= seg_desc->limit << 16;
3219 if (seg_desc->g) {
3220 kvm_desct->limit <<= 12;
3221 kvm_desct->limit |= 0xfff;
3222 }
3223 kvm_desct->selector = selector;
3224 kvm_desct->type = seg_desc->type;
3225 kvm_desct->present = seg_desc->p;
3226 kvm_desct->dpl = seg_desc->dpl;
3227 kvm_desct->db = seg_desc->d;
3228 kvm_desct->s = seg_desc->s;
3229 kvm_desct->l = seg_desc->l;
3230 kvm_desct->g = seg_desc->g;
3231 kvm_desct->avl = seg_desc->avl;
3232 if (!selector)
3233 kvm_desct->unusable = 1;
3234 else
3235 kvm_desct->unusable = 0;
3236 kvm_desct->padding = 0;
3237 }
3238
3239 static void get_segment_descritptor_dtable(struct kvm_vcpu *vcpu,
3240 u16 selector,
3241 struct descriptor_table *dtable)
3242 {
3243 if (selector & 1 << 2) {
3244 struct kvm_segment kvm_seg;
3245
3246 kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
3247
3248 if (kvm_seg.unusable)
3249 dtable->limit = 0;
3250 else
3251 dtable->limit = kvm_seg.limit;
3252 dtable->base = kvm_seg.base;
3253 }
3254 else
3255 kvm_x86_ops->get_gdt(vcpu, dtable);
3256 }
3257
3258 /* allowed just for 8 bytes segments */
3259 static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3260 struct desc_struct *seg_desc)
3261 {
3262 gpa_t gpa;
3263 struct descriptor_table dtable;
3264 u16 index = selector >> 3;
3265
3266 get_segment_descritptor_dtable(vcpu, selector, &dtable);
3267
3268 if (dtable.limit < index * 8 + 7) {
3269 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
3270 return 1;
3271 }
3272 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3273 gpa += index * 8;
3274 return kvm_read_guest(vcpu->kvm, gpa, seg_desc, 8);
3275 }
3276
3277 /* allowed just for 8 bytes segments */
3278 static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3279 struct desc_struct *seg_desc)
3280 {
3281 gpa_t gpa;
3282 struct descriptor_table dtable;
3283 u16 index = selector >> 3;
3284
3285 get_segment_descritptor_dtable(vcpu, selector, &dtable);
3286
3287 if (dtable.limit < index * 8 + 7)
3288 return 1;
3289 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3290 gpa += index * 8;
3291 return kvm_write_guest(vcpu->kvm, gpa, seg_desc, 8);
3292 }
3293
3294 static u32 get_tss_base_addr(struct kvm_vcpu *vcpu,
3295 struct desc_struct *seg_desc)
3296 {
3297 u32 base_addr;
3298
3299 base_addr = seg_desc->base0;
3300 base_addr |= (seg_desc->base1 << 16);
3301 base_addr |= (seg_desc->base2 << 24);
3302
3303 return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr);
3304 }
3305
3306 static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
3307 {
3308 struct kvm_segment kvm_seg;
3309
3310 kvm_get_segment(vcpu, &kvm_seg, seg);
3311 return kvm_seg.selector;
3312 }
3313
3314 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
3315 u16 selector,
3316 struct kvm_segment *kvm_seg)
3317 {
3318 struct desc_struct seg_desc;
3319
3320 if (load_guest_segment_descriptor(vcpu, selector, &seg_desc))
3321 return 1;
3322 seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg);
3323 return 0;
3324 }
3325
3326 int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
3327 {
3328 struct kvm_segment segvar = {
3329 .base = selector << 4,
3330 .limit = 0xffff,
3331 .selector = selector,
3332 .type = 3,
3333 .present = 1,
3334 .dpl = 3,
3335 .db = 0,
3336 .s = 1,
3337 .l = 0,
3338 .g = 0,
3339 .avl = 0,
3340 .unusable = 0,
3341 };
3342 kvm_x86_ops->set_segment(vcpu, &segvar, seg);
3343 return 0;
3344 }
3345
3346 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3347 int type_bits, int seg)
3348 {
3349 struct kvm_segment kvm_seg;
3350
3351 if (!(vcpu->arch.cr0 & X86_CR0_PE))
3352 return kvm_load_realmode_segment(vcpu, selector, seg);
3353 if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
3354 return 1;
3355 kvm_seg.type |= type_bits;
3356
3357 if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS &&
3358 seg != VCPU_SREG_LDTR)
3359 if (!kvm_seg.s)
3360 kvm_seg.unusable = 1;
3361
3362 kvm_set_segment(vcpu, &kvm_seg, seg);
3363 return 0;
3364 }
3365
3366 static void save_state_to_tss32(struct kvm_vcpu *vcpu,
3367 struct tss_segment_32 *tss)
3368 {
3369 tss->cr3 = vcpu->arch.cr3;
3370 tss->eip = vcpu->arch.rip;
3371 tss->eflags = kvm_x86_ops->get_rflags(vcpu);
3372 tss->eax = vcpu->arch.regs[VCPU_REGS_RAX];
3373 tss->ecx = vcpu->arch.regs[VCPU_REGS_RCX];
3374 tss->edx = vcpu->arch.regs[VCPU_REGS_RDX];
3375 tss->ebx = vcpu->arch.regs[VCPU_REGS_RBX];
3376 tss->esp = vcpu->arch.regs[VCPU_REGS_RSP];
3377 tss->ebp = vcpu->arch.regs[VCPU_REGS_RBP];
3378 tss->esi = vcpu->arch.regs[VCPU_REGS_RSI];
3379 tss->edi = vcpu->arch.regs[VCPU_REGS_RDI];
3380
3381 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3382 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3383 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3384 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3385 tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
3386 tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
3387 tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3388 tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
3389 }
3390
3391 static int load_state_from_tss32(struct kvm_vcpu *vcpu,
3392 struct tss_segment_32 *tss)
3393 {
3394 kvm_set_cr3(vcpu, tss->cr3);
3395
3396 vcpu->arch.rip = tss->eip;
3397 kvm_x86_ops->set_rflags(vcpu, tss->eflags | 2);
3398
3399 vcpu->arch.regs[VCPU_REGS_RAX] = tss->eax;
3400 vcpu->arch.regs[VCPU_REGS_RCX] = tss->ecx;
3401 vcpu->arch.regs[VCPU_REGS_RDX] = tss->edx;
3402 vcpu->arch.regs[VCPU_REGS_RBX] = tss->ebx;
3403 vcpu->arch.regs[VCPU_REGS_RSP] = tss->esp;
3404 vcpu->arch.regs[VCPU_REGS_RBP] = tss->ebp;
3405 vcpu->arch.regs[VCPU_REGS_RSI] = tss->esi;
3406 vcpu->arch.regs[VCPU_REGS_RDI] = tss->edi;
3407
3408 if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
3409 return 1;
3410
3411 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
3412 return 1;
3413
3414 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
3415 return 1;
3416
3417 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
3418 return 1;
3419
3420 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
3421 return 1;
3422
3423 if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS))
3424 return 1;
3425
3426 if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS))
3427 return 1;
3428 return 0;
3429 }
3430
3431 static void save_state_to_tss16(struct kvm_vcpu *vcpu,
3432 struct tss_segment_16 *tss)
3433 {
3434 tss->ip = vcpu->arch.rip;
3435 tss->flag = kvm_x86_ops->get_rflags(vcpu);
3436 tss->ax = vcpu->arch.regs[VCPU_REGS_RAX];
3437 tss->cx = vcpu->arch.regs[VCPU_REGS_RCX];
3438 tss->dx = vcpu->arch.regs[VCPU_REGS_RDX];
3439 tss->bx = vcpu->arch.regs[VCPU_REGS_RBX];
3440 tss->sp = vcpu->arch.regs[VCPU_REGS_RSP];
3441 tss->bp = vcpu->arch.regs[VCPU_REGS_RBP];
3442 tss->si = vcpu->arch.regs[VCPU_REGS_RSI];
3443 tss->di = vcpu->arch.regs[VCPU_REGS_RDI];
3444
3445 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3446 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3447 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3448 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3449 tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3450 tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
3451 }
3452
3453 static int load_state_from_tss16(struct kvm_vcpu *vcpu,
3454 struct tss_segment_16 *tss)
3455 {
3456 vcpu->arch.rip = tss->ip;
3457 kvm_x86_ops->set_rflags(vcpu, tss->flag | 2);
3458 vcpu->arch.regs[VCPU_REGS_RAX] = tss->ax;
3459 vcpu->arch.regs[VCPU_REGS_RCX] = tss->cx;
3460 vcpu->arch.regs[VCPU_REGS_RDX] = tss->dx;
3461 vcpu->arch.regs[VCPU_REGS_RBX] = tss->bx;
3462 vcpu->arch.regs[VCPU_REGS_RSP] = tss->sp;
3463 vcpu->arch.regs[VCPU_REGS_RBP] = tss->bp;
3464 vcpu->arch.regs[VCPU_REGS_RSI] = tss->si;
3465 vcpu->arch.regs[VCPU_REGS_RDI] = tss->di;
3466
3467 if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
3468 return 1;
3469
3470 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
3471 return 1;
3472
3473 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
3474 return 1;
3475
3476 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
3477 return 1;
3478
3479 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
3480 return 1;
3481 return 0;
3482 }
3483
3484 static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
3485 u32 old_tss_base,
3486 struct desc_struct *nseg_desc)
3487 {
3488 struct tss_segment_16 tss_segment_16;
3489 int ret = 0;
3490
3491 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
3492 sizeof tss_segment_16))
3493 goto out;
3494
3495 save_state_to_tss16(vcpu, &tss_segment_16);
3496
3497 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
3498 sizeof tss_segment_16))
3499 goto out;
3500
3501 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
3502 &tss_segment_16, sizeof tss_segment_16))
3503 goto out;
3504
3505 if (load_state_from_tss16(vcpu, &tss_segment_16))
3506 goto out;
3507
3508 ret = 1;
3509 out:
3510 return ret;
3511 }
3512
3513 static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
3514 u32 old_tss_base,
3515 struct desc_struct *nseg_desc)
3516 {
3517 struct tss_segment_32 tss_segment_32;
3518 int ret = 0;
3519
3520 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
3521 sizeof tss_segment_32))
3522 goto out;
3523
3524 save_state_to_tss32(vcpu, &tss_segment_32);
3525
3526 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
3527 sizeof tss_segment_32))
3528 goto out;
3529
3530 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
3531 &tss_segment_32, sizeof tss_segment_32))
3532 goto out;
3533
3534 if (load_state_from_tss32(vcpu, &tss_segment_32))
3535 goto out;
3536
3537 ret = 1;
3538 out:
3539 return ret;
3540 }
3541
3542 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
3543 {
3544 struct kvm_segment tr_seg;
3545 struct desc_struct cseg_desc;
3546 struct desc_struct nseg_desc;
3547 int ret = 0;
3548 u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
3549 u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
3550
3551 old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base);
3552
3553 /* FIXME: Handle errors. Failure to read either TSS or their
3554 * descriptors should generate a pagefault.
3555 */
3556 if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
3557 goto out;
3558
3559 if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
3560 goto out;
3561
3562 if (reason != TASK_SWITCH_IRET) {
3563 int cpl;
3564
3565 cpl = kvm_x86_ops->get_cpl(vcpu);
3566 if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
3567 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
3568 return 1;
3569 }
3570 }
3571
3572 if (!nseg_desc.p || (nseg_desc.limit0 | nseg_desc.limit << 16) < 0x67) {
3573 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
3574 return 1;
3575 }
3576
3577 if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
3578 cseg_desc.type &= ~(1 << 1); //clear the B flag
3579 save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
3580 }
3581
3582 if (reason == TASK_SWITCH_IRET) {
3583 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
3584 kvm_x86_ops->set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
3585 }
3586
3587 kvm_x86_ops->skip_emulated_instruction(vcpu);
3588 kvm_x86_ops->cache_regs(vcpu);
3589
3590 if (nseg_desc.type & 8)
3591 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_base,
3592 &nseg_desc);
3593 else
3594 ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_base,
3595 &nseg_desc);
3596
3597 if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
3598 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
3599 kvm_x86_ops->set_rflags(vcpu, eflags | X86_EFLAGS_NT);
3600 }
3601
3602 if (reason != TASK_SWITCH_IRET) {
3603 nseg_desc.type |= (1 << 1);
3604 save_guest_segment_descriptor(vcpu, tss_selector,
3605 &nseg_desc);
3606 }
3607
3608 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 | X86_CR0_TS);
3609 seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
3610 tr_seg.type = 11;
3611 kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
3612 out:
3613 kvm_x86_ops->decache_regs(vcpu);
3614 return ret;
3615 }
3616 EXPORT_SYMBOL_GPL(kvm_task_switch);
3617
3618 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
3619 struct kvm_sregs *sregs)
3620 {
3621 int mmu_reset_needed = 0;
3622 int i, pending_vec, max_bits;
3623 struct descriptor_table dt;
3624
3625 vcpu_load(vcpu);
3626
3627 dt.limit = sregs->idt.limit;
3628 dt.base = sregs->idt.base;
3629 kvm_x86_ops->set_idt(vcpu, &dt);
3630 dt.limit = sregs->gdt.limit;
3631 dt.base = sregs->gdt.base;
3632 kvm_x86_ops->set_gdt(vcpu, &dt);
3633
3634 vcpu->arch.cr2 = sregs->cr2;
3635 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
3636 vcpu->arch.cr3 = sregs->cr3;
3637
3638 kvm_set_cr8(vcpu, sregs->cr8);
3639
3640 mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
3641 kvm_x86_ops->set_efer(vcpu, sregs->efer);
3642 kvm_set_apic_base(vcpu, sregs->apic_base);
3643
3644 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3645
3646 mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
3647 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
3648 vcpu->arch.cr0 = sregs->cr0;
3649
3650 mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
3651 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
3652 if (!is_long_mode(vcpu) && is_pae(vcpu))
3653 load_pdptrs(vcpu, vcpu->arch.cr3);
3654
3655 if (mmu_reset_needed)
3656 kvm_mmu_reset_context(vcpu);
3657
3658 if (!irqchip_in_kernel(vcpu->kvm)) {
3659 memcpy(vcpu->arch.irq_pending, sregs->interrupt_bitmap,
3660 sizeof vcpu->arch.irq_pending);
3661 vcpu->arch.irq_summary = 0;
3662 for (i = 0; i < ARRAY_SIZE(vcpu->arch.irq_pending); ++i)
3663 if (vcpu->arch.irq_pending[i])
3664 __set_bit(i, &vcpu->arch.irq_summary);
3665 } else {
3666 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
3667 pending_vec = find_first_bit(
3668 (const unsigned long *)sregs->interrupt_bitmap,
3669 max_bits);
3670 /* Only pending external irq is handled here */
3671 if (pending_vec < max_bits) {
3672 kvm_x86_ops->set_irq(vcpu, pending_vec);
3673 pr_debug("Set back pending irq %d\n",
3674 pending_vec);
3675 }
3676 }
3677
3678 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3679 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3680 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3681 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3682 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3683 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
3684
3685 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3686 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3687
3688 vcpu_put(vcpu);
3689
3690 return 0;
3691 }
3692
3693 int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu,
3694 struct kvm_debug_guest *dbg)
3695 {
3696 int r;
3697
3698 vcpu_load(vcpu);
3699
3700 r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
3701
3702 vcpu_put(vcpu);
3703
3704 return r;
3705 }
3706
3707 /*
3708 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
3709 * we have asm/x86/processor.h
3710 */
3711 struct fxsave {
3712 u16 cwd;
3713 u16 swd;
3714 u16 twd;
3715 u16 fop;
3716 u64 rip;
3717 u64 rdp;
3718 u32 mxcsr;
3719 u32 mxcsr_mask;
3720 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
3721 #ifdef CONFIG_X86_64
3722 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
3723 #else
3724 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
3725 #endif
3726 };
3727
3728 /*
3729 * Translate a guest virtual address to a guest physical address.
3730 */
3731 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
3732 struct kvm_translation *tr)
3733 {
3734 unsigned long vaddr = tr->linear_address;
3735 gpa_t gpa;
3736
3737 vcpu_load(vcpu);
3738 down_read(&vcpu->kvm->slots_lock);
3739 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
3740 up_read(&vcpu->kvm->slots_lock);
3741 tr->physical_address = gpa;
3742 tr->valid = gpa != UNMAPPED_GVA;
3743 tr->writeable = 1;
3744 tr->usermode = 0;
3745 vcpu_put(vcpu);
3746
3747 return 0;
3748 }
3749
3750 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
3751 {
3752 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
3753
3754 vcpu_load(vcpu);
3755
3756 memcpy(fpu->fpr, fxsave->st_space, 128);
3757 fpu->fcw = fxsave->cwd;
3758 fpu->fsw = fxsave->swd;
3759 fpu->ftwx = fxsave->twd;
3760 fpu->last_opcode = fxsave->fop;
3761 fpu->last_ip = fxsave->rip;
3762 fpu->last_dp = fxsave->rdp;
3763 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
3764
3765 vcpu_put(vcpu);
3766
3767 return 0;
3768 }
3769
3770 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
3771 {
3772 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
3773
3774 vcpu_load(vcpu);
3775
3776 memcpy(fxsave->st_space, fpu->fpr, 128);
3777 fxsave->cwd = fpu->fcw;
3778 fxsave->swd = fpu->fsw;
3779 fxsave->twd = fpu->ftwx;
3780 fxsave->fop = fpu->last_opcode;
3781 fxsave->rip = fpu->last_ip;
3782 fxsave->rdp = fpu->last_dp;
3783 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
3784
3785 vcpu_put(vcpu);
3786
3787 return 0;
3788 }
3789
3790 void fx_init(struct kvm_vcpu *vcpu)
3791 {
3792 unsigned after_mxcsr_mask;
3793
3794 /*
3795 * Touch the fpu the first time in non atomic context as if
3796 * this is the first fpu instruction the exception handler
3797 * will fire before the instruction returns and it'll have to
3798 * allocate ram with GFP_KERNEL.
3799 */
3800 if (!used_math())
3801 kvm_fx_save(&vcpu->arch.host_fx_image);
3802
3803 /* Initialize guest FPU by resetting ours and saving into guest's */
3804 preempt_disable();
3805 kvm_fx_save(&vcpu->arch.host_fx_image);
3806 kvm_fx_finit();
3807 kvm_fx_save(&vcpu->arch.guest_fx_image);
3808 kvm_fx_restore(&vcpu->arch.host_fx_image);
3809 preempt_enable();
3810
3811 vcpu->arch.cr0 |= X86_CR0_ET;
3812 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
3813 vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
3814 memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
3815 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
3816 }
3817 EXPORT_SYMBOL_GPL(fx_init);
3818
3819 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
3820 {
3821 if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
3822 return;
3823
3824 vcpu->guest_fpu_loaded = 1;
3825 kvm_fx_save(&vcpu->arch.host_fx_image);
3826 kvm_fx_restore(&vcpu->arch.guest_fx_image);
3827 }
3828 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
3829
3830 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
3831 {
3832 if (!vcpu->guest_fpu_loaded)
3833 return;
3834
3835 vcpu->guest_fpu_loaded = 0;
3836 kvm_fx_save(&vcpu->arch.guest_fx_image);
3837 kvm_fx_restore(&vcpu->arch.host_fx_image);
3838 ++vcpu->stat.fpu_reload;
3839 }
3840 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
3841
3842 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
3843 {
3844 kvm_x86_ops->vcpu_free(vcpu);
3845 }
3846
3847 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
3848 unsigned int id)
3849 {
3850 return kvm_x86_ops->vcpu_create(kvm, id);
3851 }
3852
3853 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
3854 {
3855 int r;
3856
3857 /* We do fxsave: this must be aligned. */
3858 BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
3859
3860 vcpu_load(vcpu);
3861 r = kvm_arch_vcpu_reset(vcpu);
3862 if (r == 0)
3863 r = kvm_mmu_setup(vcpu);
3864 vcpu_put(vcpu);
3865 if (r < 0)
3866 goto free_vcpu;
3867
3868 return 0;
3869 free_vcpu:
3870 kvm_x86_ops->vcpu_free(vcpu);
3871 return r;
3872 }
3873
3874 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
3875 {
3876 vcpu_load(vcpu);
3877 kvm_mmu_unload(vcpu);
3878 vcpu_put(vcpu);
3879
3880 kvm_x86_ops->vcpu_free(vcpu);
3881 }
3882
3883 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
3884 {
3885 return kvm_x86_ops->vcpu_reset(vcpu);
3886 }
3887
3888 void kvm_arch_hardware_enable(void *garbage)
3889 {
3890 kvm_x86_ops->hardware_enable(garbage);
3891 }
3892
3893 void kvm_arch_hardware_disable(void *garbage)
3894 {
3895 kvm_x86_ops->hardware_disable(garbage);
3896 }
3897
3898 int kvm_arch_hardware_setup(void)
3899 {
3900 return kvm_x86_ops->hardware_setup();
3901 }
3902
3903 void kvm_arch_hardware_unsetup(void)
3904 {
3905 kvm_x86_ops->hardware_unsetup();
3906 }
3907
3908 void kvm_arch_check_processor_compat(void *rtn)
3909 {
3910 kvm_x86_ops->check_processor_compatibility(rtn);
3911 }
3912
3913 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
3914 {
3915 struct page *page;
3916 struct kvm *kvm;
3917 int r;
3918
3919 BUG_ON(vcpu->kvm == NULL);
3920 kvm = vcpu->kvm;
3921
3922 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
3923 if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0)
3924 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
3925 else
3926 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
3927
3928 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
3929 if (!page) {
3930 r = -ENOMEM;
3931 goto fail;
3932 }
3933 vcpu->arch.pio_data = page_address(page);
3934
3935 r = kvm_mmu_create(vcpu);
3936 if (r < 0)
3937 goto fail_free_pio_data;
3938
3939 if (irqchip_in_kernel(kvm)) {
3940 r = kvm_create_lapic(vcpu);
3941 if (r < 0)
3942 goto fail_mmu_destroy;
3943 }
3944
3945 return 0;
3946
3947 fail_mmu_destroy:
3948 kvm_mmu_destroy(vcpu);
3949 fail_free_pio_data:
3950 free_page((unsigned long)vcpu->arch.pio_data);
3951 fail:
3952 return r;
3953 }
3954
3955 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
3956 {
3957 kvm_free_lapic(vcpu);
3958 down_read(&vcpu->kvm->slots_lock);
3959 kvm_mmu_destroy(vcpu);
3960 up_read(&vcpu->kvm->slots_lock);
3961 free_page((unsigned long)vcpu->arch.pio_data);
3962 }
3963
3964 struct kvm *kvm_arch_create_vm(void)
3965 {
3966 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
3967
3968 if (!kvm)
3969 return ERR_PTR(-ENOMEM);
3970
3971 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
3972
3973 return kvm;
3974 }
3975
3976 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
3977 {
3978 vcpu_load(vcpu);
3979 kvm_mmu_unload(vcpu);
3980 vcpu_put(vcpu);
3981 }
3982
3983 static void kvm_free_vcpus(struct kvm *kvm)
3984 {
3985 unsigned int i;
3986
3987 /*
3988 * Unpin any mmu pages first.
3989 */
3990 for (i = 0; i < KVM_MAX_VCPUS; ++i)
3991 if (kvm->vcpus[i])
3992 kvm_unload_vcpu_mmu(kvm->vcpus[i]);
3993 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
3994 if (kvm->vcpus[i]) {
3995 kvm_arch_vcpu_free(kvm->vcpus[i]);
3996 kvm->vcpus[i] = NULL;
3997 }
3998 }
3999
4000 }
4001
4002 void kvm_arch_destroy_vm(struct kvm *kvm)
4003 {
4004 kvm_free_pit(kvm);
4005 kfree(kvm->arch.vpic);
4006 kfree(kvm->arch.vioapic);
4007 kvm_free_vcpus(kvm);
4008 kvm_free_physmem(kvm);
4009 if (kvm->arch.apic_access_page)
4010 put_page(kvm->arch.apic_access_page);
4011 if (kvm->arch.ept_identity_pagetable)
4012 put_page(kvm->arch.ept_identity_pagetable);
4013 kfree(kvm);
4014 }
4015
4016 int kvm_arch_set_memory_region(struct kvm *kvm,
4017 struct kvm_userspace_memory_region *mem,
4018 struct kvm_memory_slot old,
4019 int user_alloc)
4020 {
4021 int npages = mem->memory_size >> PAGE_SHIFT;
4022 struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
4023
4024 /*To keep backward compatibility with older userspace,
4025 *x86 needs to hanlde !user_alloc case.
4026 */
4027 if (!user_alloc) {
4028 if (npages && !old.rmap) {
4029 unsigned long userspace_addr;
4030
4031 down_write(&current->mm->mmap_sem);
4032 userspace_addr = do_mmap(NULL, 0,
4033 npages * PAGE_SIZE,
4034 PROT_READ | PROT_WRITE,
4035 MAP_PRIVATE | MAP_ANONYMOUS,
4036 0);
4037 up_write(&current->mm->mmap_sem);
4038
4039 if (IS_ERR((void *)userspace_addr))
4040 return PTR_ERR((void *)userspace_addr);
4041
4042 /* set userspace_addr atomically for kvm_hva_to_rmapp */
4043 spin_lock(&kvm->mmu_lock);
4044 memslot->userspace_addr = userspace_addr;
4045 spin_unlock(&kvm->mmu_lock);
4046 } else {
4047 if (!old.user_alloc && old.rmap) {
4048 int ret;
4049
4050 down_write(&current->mm->mmap_sem);
4051 ret = do_munmap(current->mm, old.userspace_addr,
4052 old.npages * PAGE_SIZE);
4053 up_write(&current->mm->mmap_sem);
4054 if (ret < 0)
4055 printk(KERN_WARNING
4056 "kvm_vm_ioctl_set_memory_region: "
4057 "failed to munmap memory\n");
4058 }
4059 }
4060 }
4061
4062 if (!kvm->arch.n_requested_mmu_pages) {
4063 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
4064 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
4065 }
4066
4067 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
4068 kvm_flush_remote_tlbs(kvm);
4069
4070 return 0;
4071 }
4072
4073 void kvm_arch_flush_shadow(struct kvm *kvm)
4074 {
4075 kvm_mmu_zap_all(kvm);
4076 }
4077
4078 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
4079 {
4080 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
4081 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED;
4082 }
4083
4084 static void vcpu_kick_intr(void *info)
4085 {
4086 #ifdef DEBUG
4087 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)info;
4088 printk(KERN_DEBUG "vcpu_kick_intr %p \n", vcpu);
4089 #endif
4090 }
4091
4092 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
4093 {
4094 int ipi_pcpu = vcpu->cpu;
4095 int cpu = get_cpu();
4096
4097 if (waitqueue_active(&vcpu->wq)) {
4098 wake_up_interruptible(&vcpu->wq);
4099 ++vcpu->stat.halt_wakeup;
4100 }
4101 /*
4102 * We may be called synchronously with irqs disabled in guest mode,
4103 * So need not to call smp_call_function_single() in that case.
4104 */
4105 if (vcpu->guest_mode && vcpu->cpu != cpu)
4106 smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0);
4107 put_cpu();
4108 }
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree