Merge master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / mips / pci / fixup-vr4133.c
blob8e01d0c1b76b5714dd1441298e94e4ce9a9905c2
1 /*
2 * arch/mips/vr41xx/nec-cmbvr4133/pci_fixup.c
4 * The NEC CMB-VR4133 Board specific PCI fixups.
6 * Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com> and
7 * Alex Sapkov <asapkov@ru.mvista.com>
9 * 2003-2004 (c) MontaVista, Software, Inc. This file is licensed under
10 * the terms of the GNU General Public License version 2. This program
11 * is licensed "as is" without any warranty of any kind, whether express
12 * or implied.
14 * Modified for support in 2.6
15 * Author: Manish Lachwani (mlachwani@mvista.com)
18 #include <linux/init.h>
19 #include <linux/pci.h>
21 #include <asm/io.h>
22 #include <asm/vr41xx/cmbvr4133.h>
24 extern int vr4133_rockhopper;
25 extern void ali_m1535plus_init(struct pci_dev *dev);
26 extern void ali_m5229_init(struct pci_dev *dev);
28 /* Do platform specific device initialization at pci_enable_device() time */
29 int pcibios_plat_dev_init(struct pci_dev *dev)
32 * We have to reset AMD PCnet adapter on Rockhopper since
33 * PMON leaves it enabled and generating interrupts. This leads
34 * to a lock if some PCI device driver later enables the IRQ line
35 * shared with PCnet and there is no AMD PCnet driver to catch its
36 * interrupts.
38 #ifdef CONFIG_ROCKHOPPER
39 if (dev->vendor == PCI_VENDOR_ID_AMD &&
40 dev->device == PCI_DEVICE_ID_AMD_LANCE) {
41 inl(pci_resource_start(dev, 0) + 0x18);
43 #endif
46 * we have to open the bridges' windows down to 0 because otherwise
47 * we cannot access ISA south bridge I/O registers that get mapped from
48 * 0. for example, 8259 PIC would be unaccessible without that
50 if(dev->vendor == PCI_VENDOR_ID_INTEL && dev->device == PCI_DEVICE_ID_INTEL_S21152BB) {
51 pci_write_config_byte(dev, PCI_IO_BASE, 0);
52 if(dev->bus->number == 0) {
53 pci_write_config_word(dev, PCI_IO_BASE_UPPER16, 0);
54 } else {
55 pci_write_config_word(dev, PCI_IO_BASE_UPPER16, 1);
59 return 0;
63 * M1535 IRQ mapping
64 * Feel free to change this, although it shouldn't be needed
66 #define M1535_IRQ_INTA 7
67 #define M1535_IRQ_INTB 9
68 #define M1535_IRQ_INTC 10
69 #define M1535_IRQ_INTD 11
71 #define M1535_IRQ_USB 9
72 #define M1535_IRQ_IDE 14
73 #define M1535_IRQ_IDE2 15
74 #define M1535_IRQ_PS2 12
75 #define M1535_IRQ_RTC 8
76 #define M1535_IRQ_FDC 6
77 #define M1535_IRQ_AUDIO 5
78 #define M1535_IRQ_COM1 4
79 #define M1535_IRQ_COM2 4
80 #define M1535_IRQ_IRDA 3
81 #define M1535_IRQ_KBD 1
82 #define M1535_IRQ_TMR 0
84 /* Rockhopper "slots" assignment; this is hard-coded ... */
85 #define ROCKHOPPER_M5451_SLOT 1
86 #define ROCKHOPPER_M1535_SLOT 2
87 #define ROCKHOPPER_M5229_SLOT 11
88 #define ROCKHOPPER_M5237_SLOT 15
89 #define ROCKHOPPER_PMU_SLOT 12
90 /* ... and hard-wired. */
91 #define ROCKHOPPER_PCI1_SLOT 3
92 #define ROCKHOPPER_PCI2_SLOT 4
93 #define ROCKHOPPER_PCI3_SLOT 5
94 #define ROCKHOPPER_PCI4_SLOT 6
95 #define ROCKHOPPER_PCNET_SLOT 1
97 #define M1535_IRQ_MASK(n) (1 << (n))
99 #define M1535_IRQ_EDGE (M1535_IRQ_MASK(M1535_IRQ_TMR) | \
100 M1535_IRQ_MASK(M1535_IRQ_KBD) | \
101 M1535_IRQ_MASK(M1535_IRQ_COM1) | \
102 M1535_IRQ_MASK(M1535_IRQ_COM2) | \
103 M1535_IRQ_MASK(M1535_IRQ_IRDA) | \
104 M1535_IRQ_MASK(M1535_IRQ_RTC) | \
105 M1535_IRQ_MASK(M1535_IRQ_FDC) | \
106 M1535_IRQ_MASK(M1535_IRQ_PS2))
108 #define M1535_IRQ_LEVEL (M1535_IRQ_MASK(M1535_IRQ_IDE) | \
109 M1535_IRQ_MASK(M1535_IRQ_USB) | \
110 M1535_IRQ_MASK(M1535_IRQ_INTA) | \
111 M1535_IRQ_MASK(M1535_IRQ_INTB) | \
112 M1535_IRQ_MASK(M1535_IRQ_INTC) | \
113 M1535_IRQ_MASK(M1535_IRQ_INTD))
115 struct irq_map_entry {
116 u16 bus;
117 u8 slot;
118 u8 irq;
120 static struct irq_map_entry int_map[] = {
121 {1, ROCKHOPPER_M5451_SLOT, M1535_IRQ_AUDIO}, /* Audio controller */
122 {1, ROCKHOPPER_PCI1_SLOT, M1535_IRQ_INTD}, /* PCI slot #1 */
123 {1, ROCKHOPPER_PCI2_SLOT, M1535_IRQ_INTC}, /* PCI slot #2 */
124 {1, ROCKHOPPER_M5237_SLOT, M1535_IRQ_USB}, /* USB host controller */
125 {1, ROCKHOPPER_M5229_SLOT, IDE_PRIMARY_IRQ}, /* IDE controller */
126 {2, ROCKHOPPER_PCNET_SLOT, M1535_IRQ_INTD}, /* AMD Am79c973 on-board
127 ethernet */
128 {2, ROCKHOPPER_PCI3_SLOT, M1535_IRQ_INTB}, /* PCI slot #3 */
129 {2, ROCKHOPPER_PCI4_SLOT, M1535_IRQ_INTC} /* PCI slot #4 */
132 static int pci_intlines[] =
133 { M1535_IRQ_INTA, M1535_IRQ_INTB, M1535_IRQ_INTC, M1535_IRQ_INTD };
135 /* Determine the Rockhopper IRQ line number for the PCI device */
136 int rockhopper_get_irq(struct pci_dev *dev, u8 pin, u8 slot)
138 struct pci_bus *bus;
139 int i;
141 bus = dev->bus;
142 if (bus == NULL)
143 return -1;
145 for (i = 0; i < sizeof (int_map) / sizeof (int_map[0]); i++) {
146 if (int_map[i].bus == bus->number && int_map[i].slot == slot) {
147 int line;
148 for (line = 0; line < 4; line++)
149 if (pci_intlines[line] == int_map[i].irq)
150 break;
151 if (line < 4)
152 return pci_intlines[(line + (pin - 1)) % 4];
153 else
154 return int_map[i].irq;
157 return -1;
160 #ifdef CONFIG_ROCKHOPPER
161 void i8259_init(void)
163 outb(0x11, 0x20); /* Master ICW1 */
164 outb(I8259_IRQ_BASE, 0x21); /* Master ICW2 */
165 outb(0x04, 0x21); /* Master ICW3 */
166 outb(0x01, 0x21); /* Master ICW4 */
167 outb(0xff, 0x21); /* Master IMW */
169 outb(0x11, 0xa0); /* Slave ICW1 */
170 outb(I8259_IRQ_BASE + 8, 0xa1); /* Slave ICW2 */
171 outb(0x02, 0xa1); /* Slave ICW3 */
172 outb(0x01, 0xa1); /* Slave ICW4 */
173 outb(0xff, 0xa1); /* Slave IMW */
175 outb(0x00, 0x4d0);
176 outb(0x02, 0x4d1); /* USB IRQ9 is level */
178 #endif
180 int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
182 extern int pci_probe_only;
183 pci_probe_only = 1;
185 #ifdef CONFIG_ROCKHOPPER
186 if( dev->bus->number == 1 && vr4133_rockhopper ) {
187 if(slot == ROCKHOPPER_PCI1_SLOT || slot == ROCKHOPPER_PCI2_SLOT)
188 dev->irq = CMBVR41XX_INTA_IRQ;
189 else
190 dev->irq = rockhopper_get_irq(dev, pin, slot);
191 } else
192 dev->irq = CMBVR41XX_INTA_IRQ;
193 #else
194 dev->irq = CMBVR41XX_INTA_IRQ;
195 #endif
197 return dev->irq;
200 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, ali_m1535plus_init);
201 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M5229, ali_m5229_init);