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drm/i915/sdvo: Border and stall select became test bits in gen5
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / gpu / drm / i915 / intel_sdvo.c
blob6c0bb18a26e80fd439eb6d38304a5ffc9e168a6e
1 /*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 *
25 * Authors:
26 * Eric Anholt <eric@anholt.net>
27 */
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
31 #include "drmP.h"
32 #include "drm.h"
33 #include "drm_crtc.h"
34 #include "drm_edid.h"
35 #include "intel_drv.h"
36 #include "i915_drm.h"
37 #include "i915_drv.h"
38 #include "intel_sdvo_regs.h"
39
40 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
41 #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
42 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
43 #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0)
44
45 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
46 SDVO_TV_MASK)
47
48 #define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
49 #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
50 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
51
52
53 static const char *tv_format_names[] = {
54 "NTSC_M" , "NTSC_J" , "NTSC_443",
55 "PAL_B" , "PAL_D" , "PAL_G" ,
56 "PAL_H" , "PAL_I" , "PAL_M" ,
57 "PAL_N" , "PAL_NC" , "PAL_60" ,
58 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
59 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
60 "SECAM_60"
61 };
62
63 #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
64
65 struct intel_sdvo {
66 struct intel_encoder base;
67
68 struct i2c_adapter *i2c;
69 u8 slave_addr;
70
71 struct i2c_adapter ddc;
72
73 /* Register for the SDVO device: SDVOB or SDVOC */
74 int sdvo_reg;
75
76 /* Active outputs controlled by this SDVO output */
77 uint16_t controlled_output;
78
79 /*
80 * Capabilities of the SDVO device returned by
81 * i830_sdvo_get_capabilities()
82 */
83 struct intel_sdvo_caps caps;
84
85 /* Pixel clock limitations reported by the SDVO device, in kHz */
86 int pixel_clock_min, pixel_clock_max;
87
88 /*
89 * For multiple function SDVO device,
90 * this is for current attached outputs.
91 */
92 uint16_t attached_output;
93
94 /**
95 * This is set if we're going to treat the device as TV-out.
96 *
97 * While we have these nice friendly flags for output types that ought
98 * to decide this for us, the S-Video output on our HDMI+S-Video card
99 * shows up as RGB1 (VGA).
100 */
101 bool is_tv;
102
103 /* This is for current tv format name */
104 int tv_format_index;
105
106 /**
107 * This is set if we treat the device as HDMI, instead of DVI.
108 */
109 bool is_hdmi;
110 bool has_hdmi_monitor;
111 bool has_hdmi_audio;
112
113 /**
114 * This is set if we detect output of sdvo device as LVDS and
115 * have a valid fixed mode to use with the panel.
116 */
117 bool is_lvds;
118
119 /**
120 * This is sdvo fixed pannel mode pointer
121 */
122 struct drm_display_mode *sdvo_lvds_fixed_mode;
123
124 /* DDC bus used by this SDVO encoder */
125 uint8_t ddc_bus;
126
127 /* Input timings for adjusted_mode */
128 struct intel_sdvo_dtd input_dtd;
129 };
130
131 struct intel_sdvo_connector {
132 struct intel_connector base;
133
134 /* Mark the type of connector */
135 uint16_t output_flag;
136
137 int force_audio;
138
139 /* This contains all current supported TV format */
140 u8 tv_format_supported[TV_FORMAT_NUM];
141 int format_supported_num;
142 struct drm_property *tv_format;
143
144 struct drm_property *force_audio_property;
145
146 /* add the property for the SDVO-TV */
147 struct drm_property *left;
148 struct drm_property *right;
149 struct drm_property *top;
150 struct drm_property *bottom;
151 struct drm_property *hpos;
152 struct drm_property *vpos;
153 struct drm_property *contrast;
154 struct drm_property *saturation;
155 struct drm_property *hue;
156 struct drm_property *sharpness;
157 struct drm_property *flicker_filter;
158 struct drm_property *flicker_filter_adaptive;
159 struct drm_property *flicker_filter_2d;
160 struct drm_property *tv_chroma_filter;
161 struct drm_property *tv_luma_filter;
162 struct drm_property *dot_crawl;
163
164 /* add the property for the SDVO-TV/LVDS */
165 struct drm_property *brightness;
166
167 /* Add variable to record current setting for the above property */
168 u32 left_margin, right_margin, top_margin, bottom_margin;
169
170 /* this is to get the range of margin.*/
171 u32 max_hscan, max_vscan;
172 u32 max_hpos, cur_hpos;
173 u32 max_vpos, cur_vpos;
174 u32 cur_brightness, max_brightness;
175 u32 cur_contrast, max_contrast;
176 u32 cur_saturation, max_saturation;
177 u32 cur_hue, max_hue;
178 u32 cur_sharpness, max_sharpness;
179 u32 cur_flicker_filter, max_flicker_filter;
180 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
181 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
182 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
183 u32 cur_tv_luma_filter, max_tv_luma_filter;
184 u32 cur_dot_crawl, max_dot_crawl;
185 };
186
187 static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
188 {
189 return container_of(encoder, struct intel_sdvo, base.base);
190 }
191
192 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
193 {
194 return container_of(intel_attached_encoder(connector),
195 struct intel_sdvo, base);
196 }
197
198 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
199 {
200 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
201 }
202
203 static bool
204 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
205 static bool
206 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
207 struct intel_sdvo_connector *intel_sdvo_connector,
208 int type);
209 static bool
210 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
211 struct intel_sdvo_connector *intel_sdvo_connector);
212
213 /**
214 * Writes the SDVOB or SDVOC with the given value, but always writes both
215 * SDVOB and SDVOC to work around apparent hardware issues (according to
216 * comments in the BIOS).
217 */
218 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
219 {
220 struct drm_device *dev = intel_sdvo->base.base.dev;
221 struct drm_i915_private *dev_priv = dev->dev_private;
222 u32 bval = val, cval = val;
223 int i;
224
225 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
226 I915_WRITE(intel_sdvo->sdvo_reg, val);
227 I915_READ(intel_sdvo->sdvo_reg);
228 return;
229 }
230
231 if (intel_sdvo->sdvo_reg == SDVOB) {
232 cval = I915_READ(SDVOC);
233 } else {
234 bval = I915_READ(SDVOB);
235 }
236 /*
237 * Write the registers twice for luck. Sometimes,
238 * writing them only once doesn't appear to 'stick'.
239 * The BIOS does this too. Yay, magic
240 */
241 for (i = 0; i < 2; i++)
242 {
243 I915_WRITE(SDVOB, bval);
244 I915_READ(SDVOB);
245 I915_WRITE(SDVOC, cval);
246 I915_READ(SDVOC);
247 }
248 }
249
250 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
251 {
252 struct i2c_msg msgs[] = {
253 {
254 .addr = intel_sdvo->slave_addr,
255 .flags = 0,
256 .len = 1,
257 .buf = &addr,
258 },
259 {
260 .addr = intel_sdvo->slave_addr,
261 .flags = I2C_M_RD,
262 .len = 1,
263 .buf = ch,
264 }
265 };
266 int ret;
267
268 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
269 return true;
270
271 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
272 return false;
273 }
274
275 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
276 /** Mapping of command numbers to names, for debug output */
277 static const struct _sdvo_cmd_name {
278 u8 cmd;
279 const char *name;
280 } sdvo_cmd_names[] = {
281 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
282 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
283 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
284 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
285 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
286 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
287 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
288 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
289 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
290 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
291 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
292 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
293 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
294 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
295 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
324
325 /* Add the op code for SDVO enhancements */
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
370
371 /* HDMI op code */
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
392 };
393
394 #define IS_SDVOB(reg) (reg == SDVOB || reg == PCH_SDVOB)
395 #define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC")
396
397 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
398 const void *args, int args_len)
399 {
400 int i;
401
402 DRM_DEBUG_KMS("%s: W: %02X ",
403 SDVO_NAME(intel_sdvo), cmd);
404 for (i = 0; i < args_len; i++)
405 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
406 for (; i < 8; i++)
407 DRM_LOG_KMS(" ");
408 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
409 if (cmd == sdvo_cmd_names[i].cmd) {
410 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
411 break;
412 }
413 }
414 if (i == ARRAY_SIZE(sdvo_cmd_names))
415 DRM_LOG_KMS("(%02X)", cmd);
416 DRM_LOG_KMS("\n");
417 }
418
419 static const char *cmd_status_names[] = {
420 "Power on",
421 "Success",
422 "Not supported",
423 "Invalid arg",
424 "Pending",
425 "Target not specified",
426 "Scaling not supported"
427 };
428
429 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
430 const void *args, int args_len)
431 {
432 u8 buf[args_len*2 + 2], status;
433 struct i2c_msg msgs[args_len + 3];
434 int i, ret;
435
436 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
437
438 for (i = 0; i < args_len; i++) {
439 msgs[i].addr = intel_sdvo->slave_addr;
440 msgs[i].flags = 0;
441 msgs[i].len = 2;
442 msgs[i].buf = buf + 2 *i;
443 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
444 buf[2*i + 1] = ((u8*)args)[i];
445 }
446 msgs[i].addr = intel_sdvo->slave_addr;
447 msgs[i].flags = 0;
448 msgs[i].len = 2;
449 msgs[i].buf = buf + 2*i;
450 buf[2*i + 0] = SDVO_I2C_OPCODE;
451 buf[2*i + 1] = cmd;
452
453 /* the following two are to read the response */
454 status = SDVO_I2C_CMD_STATUS;
455 msgs[i+1].addr = intel_sdvo->slave_addr;
456 msgs[i+1].flags = 0;
457 msgs[i+1].len = 1;
458 msgs[i+1].buf = &status;
459
460 msgs[i+2].addr = intel_sdvo->slave_addr;
461 msgs[i+2].flags = I2C_M_RD;
462 msgs[i+2].len = 1;
463 msgs[i+2].buf = &status;
464
465 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
466 if (ret < 0) {
467 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
468 return false;
469 }
470 if (ret != i+3) {
471 /* failure in I2C transfer */
472 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
473 return false;
474 }
475
476 i = 3;
477 while (status == SDVO_CMD_STATUS_PENDING && i--) {
478 if (!intel_sdvo_read_byte(intel_sdvo,
479 SDVO_I2C_CMD_STATUS,
480 &status))
481 return false;
482 }
483 if (status != SDVO_CMD_STATUS_SUCCESS) {
484 DRM_DEBUG_KMS("command returns response %s [%d]\n",
485 status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP ? cmd_status_names[status] : "???",
486 status);
487 return false;
488 }
489
490 return true;
491 }
492
493 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
494 void *response, int response_len)
495 {
496 u8 retry = 5;
497 u8 status;
498 int i;
499
500 /*
501 * The documentation states that all commands will be
502 * processed within 15µs, and that we need only poll
503 * the status byte a maximum of 3 times in order for the
504 * command to be complete.
505 *
506 * Check 5 times in case the hardware failed to read the docs.
507 */
508 do {
509 if (!intel_sdvo_read_byte(intel_sdvo,
510 SDVO_I2C_CMD_STATUS,
511 &status))
512 return false;
513 } while (status == SDVO_CMD_STATUS_PENDING && --retry);
514
515 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
516 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
517 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
518 else
519 DRM_LOG_KMS("(??? %d)", status);
520
521 if (status != SDVO_CMD_STATUS_SUCCESS)
522 goto log_fail;
523
524 /* Read the command response */
525 for (i = 0; i < response_len; i++) {
526 if (!intel_sdvo_read_byte(intel_sdvo,
527 SDVO_I2C_RETURN_0 + i,
528 &((u8 *)response)[i]))
529 goto log_fail;
530 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
531 }
532 DRM_LOG_KMS("\n");
533 return true;
534
535 log_fail:
536 DRM_LOG_KMS("\n");
537 return false;
538 }
539
540 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
541 {
542 if (mode->clock >= 100000)
543 return 1;
544 else if (mode->clock >= 50000)
545 return 2;
546 else
547 return 4;
548 }
549
550 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
551 u8 ddc_bus)
552 {
553 return intel_sdvo_write_cmd(intel_sdvo,
554 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
555 &ddc_bus, 1);
556 }
557
558 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
559 {
560 return intel_sdvo_write_cmd(intel_sdvo, cmd, data, len);
561 }
562
563 static bool
564 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
565 {
566 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
567 return false;
568
569 return intel_sdvo_read_response(intel_sdvo, value, len);
570 }
571
572 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
573 {
574 struct intel_sdvo_set_target_input_args targets = {0};
575 return intel_sdvo_set_value(intel_sdvo,
576 SDVO_CMD_SET_TARGET_INPUT,
577 &targets, sizeof(targets));
578 }
579
580 /**
581 * Return whether each input is trained.
582 *
583 * This function is making an assumption about the layout of the response,
584 * which should be checked against the docs.
585 */
586 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
587 {
588 struct intel_sdvo_get_trained_inputs_response response;
589
590 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
591 &response, sizeof(response)))
592 return false;
593
594 *input_1 = response.input0_trained;
595 *input_2 = response.input1_trained;
596 return true;
597 }
598
599 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
600 u16 outputs)
601 {
602 return intel_sdvo_set_value(intel_sdvo,
603 SDVO_CMD_SET_ACTIVE_OUTPUTS,
604 &outputs, sizeof(outputs));
605 }
606
607 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
608 int mode)
609 {
610 u8 state = SDVO_ENCODER_STATE_ON;
611
612 switch (mode) {
613 case DRM_MODE_DPMS_ON:
614 state = SDVO_ENCODER_STATE_ON;
615 break;
616 case DRM_MODE_DPMS_STANDBY:
617 state = SDVO_ENCODER_STATE_STANDBY;
618 break;
619 case DRM_MODE_DPMS_SUSPEND:
620 state = SDVO_ENCODER_STATE_SUSPEND;
621 break;
622 case DRM_MODE_DPMS_OFF:
623 state = SDVO_ENCODER_STATE_OFF;
624 break;
625 }
626
627 return intel_sdvo_set_value(intel_sdvo,
628 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
629 }
630
631 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
632 int *clock_min,
633 int *clock_max)
634 {
635 struct intel_sdvo_pixel_clock_range clocks;
636
637 if (!intel_sdvo_get_value(intel_sdvo,
638 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
639 &clocks, sizeof(clocks)))
640 return false;
641
642 /* Convert the values from units of 10 kHz to kHz. */
643 *clock_min = clocks.min * 10;
644 *clock_max = clocks.max * 10;
645 return true;
646 }
647
648 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
649 u16 outputs)
650 {
651 return intel_sdvo_set_value(intel_sdvo,
652 SDVO_CMD_SET_TARGET_OUTPUT,
653 &outputs, sizeof(outputs));
654 }
655
656 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
657 struct intel_sdvo_dtd *dtd)
658 {
659 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
660 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
661 }
662
663 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
664 struct intel_sdvo_dtd *dtd)
665 {
666 return intel_sdvo_set_timing(intel_sdvo,
667 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
668 }
669
670 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
671 struct intel_sdvo_dtd *dtd)
672 {
673 return intel_sdvo_set_timing(intel_sdvo,
674 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
675 }
676
677 static bool
678 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
679 uint16_t clock,
680 uint16_t width,
681 uint16_t height)
682 {
683 struct intel_sdvo_preferred_input_timing_args args;
684
685 memset(&args, 0, sizeof(args));
686 args.clock = clock;
687 args.width = width;
688 args.height = height;
689 args.interlace = 0;
690
691 if (intel_sdvo->is_lvds &&
692 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
693 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
694 args.scaled = 1;
695
696 return intel_sdvo_set_value(intel_sdvo,
697 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
698 &args, sizeof(args));
699 }
700
701 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
702 struct intel_sdvo_dtd *dtd)
703 {
704 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
705 &dtd->part1, sizeof(dtd->part1)) &&
706 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
707 &dtd->part2, sizeof(dtd->part2));
708 }
709
710 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
711 {
712 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
713 }
714
715 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
716 const struct drm_display_mode *mode)
717 {
718 uint16_t width, height;
719 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
720 uint16_t h_sync_offset, v_sync_offset;
721
722 width = mode->crtc_hdisplay;
723 height = mode->crtc_vdisplay;
724
725 /* do some mode translations */
726 h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
727 h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
728
729 v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
730 v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
731
732 h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
733 v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
734
735 dtd->part1.clock = mode->clock / 10;
736 dtd->part1.h_active = width & 0xff;
737 dtd->part1.h_blank = h_blank_len & 0xff;
738 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
739 ((h_blank_len >> 8) & 0xf);
740 dtd->part1.v_active = height & 0xff;
741 dtd->part1.v_blank = v_blank_len & 0xff;
742 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
743 ((v_blank_len >> 8) & 0xf);
744
745 dtd->part2.h_sync_off = h_sync_offset & 0xff;
746 dtd->part2.h_sync_width = h_sync_len & 0xff;
747 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
748 (v_sync_len & 0xf);
749 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
750 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
751 ((v_sync_len & 0x30) >> 4);
752
753 dtd->part2.dtd_flags = 0x18;
754 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
755 dtd->part2.dtd_flags |= 0x2;
756 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
757 dtd->part2.dtd_flags |= 0x4;
758
759 dtd->part2.sdvo_flags = 0;
760 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
761 dtd->part2.reserved = 0;
762 }
763
764 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
765 const struct intel_sdvo_dtd *dtd)
766 {
767 mode->hdisplay = dtd->part1.h_active;
768 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
769 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
770 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
771 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
772 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
773 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
774 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
775
776 mode->vdisplay = dtd->part1.v_active;
777 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
778 mode->vsync_start = mode->vdisplay;
779 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
780 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
781 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
782 mode->vsync_end = mode->vsync_start +
783 (dtd->part2.v_sync_off_width & 0xf);
784 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
785 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
786 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
787
788 mode->clock = dtd->part1.clock * 10;
789
790 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
791 if (dtd->part2.dtd_flags & 0x2)
792 mode->flags |= DRM_MODE_FLAG_PHSYNC;
793 if (dtd->part2.dtd_flags & 0x4)
794 mode->flags |= DRM_MODE_FLAG_PVSYNC;
795 }
796
797 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
798 {
799 struct intel_sdvo_encode encode;
800
801 return intel_sdvo_get_value(intel_sdvo,
802 SDVO_CMD_GET_SUPP_ENCODE,
803 &encode, sizeof(encode));
804 }
805
806 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
807 uint8_t mode)
808 {
809 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
810 }
811
812 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
813 uint8_t mode)
814 {
815 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
816 }
817
818 #if 0
819 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
820 {
821 int i, j;
822 uint8_t set_buf_index[2];
823 uint8_t av_split;
824 uint8_t buf_size;
825 uint8_t buf[48];
826 uint8_t *pos;
827
828 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
829
830 for (i = 0; i <= av_split; i++) {
831 set_buf_index[0] = i; set_buf_index[1] = 0;
832 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
833 set_buf_index, 2);
834 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
835 intel_sdvo_read_response(encoder, &buf_size, 1);
836
837 pos = buf;
838 for (j = 0; j <= buf_size; j += 8) {
839 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
840 NULL, 0);
841 intel_sdvo_read_response(encoder, pos, 8);
842 pos += 8;
843 }
844 }
845 }
846 #endif
847
848 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
849 {
850 struct dip_infoframe avi_if = {
851 .type = DIP_TYPE_AVI,
852 .ver = DIP_VERSION_AVI,
853 .len = DIP_LEN_AVI,
854 };
855 uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
856 uint8_t set_buf_index[2] = { 1, 0 };
857 uint64_t *data = (uint64_t *)&avi_if;
858 unsigned i;
859
860 intel_dip_infoframe_csum(&avi_if);
861
862 if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_INDEX,
863 set_buf_index, 2))
864 return false;
865
866 for (i = 0; i < sizeof(avi_if); i += 8) {
867 if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_DATA,
868 data, 8))
869 return false;
870 data++;
871 }
872
873 return intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_TXRATE,
874 &tx_rate, 1);
875 }
876
877 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
878 {
879 struct intel_sdvo_tv_format format;
880 uint32_t format_map;
881
882 format_map = 1 << intel_sdvo->tv_format_index;
883 memset(&format, 0, sizeof(format));
884 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
885
886 BUILD_BUG_ON(sizeof(format) != 6);
887 return intel_sdvo_set_value(intel_sdvo,
888 SDVO_CMD_SET_TV_FORMAT,
889 &format, sizeof(format));
890 }
891
892 static bool
893 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
894 struct drm_display_mode *mode)
895 {
896 struct intel_sdvo_dtd output_dtd;
897
898 if (!intel_sdvo_set_target_output(intel_sdvo,
899 intel_sdvo->attached_output))
900 return false;
901
902 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
903 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
904 return false;
905
906 return true;
907 }
908
909 static bool
910 intel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo,
911 struct drm_display_mode *mode,
912 struct drm_display_mode *adjusted_mode)
913 {
914 /* Reset the input timing to the screen. Assume always input 0. */
915 if (!intel_sdvo_set_target_input(intel_sdvo))
916 return false;
917
918 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
919 mode->clock / 10,
920 mode->hdisplay,
921 mode->vdisplay))
922 return false;
923
924 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
925 &intel_sdvo->input_dtd))
926 return false;
927
928 intel_sdvo_get_mode_from_dtd(adjusted_mode, &intel_sdvo->input_dtd);
929
930 drm_mode_set_crtcinfo(adjusted_mode, 0);
931 return true;
932 }
933
934 static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
935 struct drm_display_mode *mode,
936 struct drm_display_mode *adjusted_mode)
937 {
938 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
939 int multiplier;
940
941 /* We need to construct preferred input timings based on our
942 * output timings. To do that, we have to set the output
943 * timings, even though this isn't really the right place in
944 * the sequence to do it. Oh well.
945 */
946 if (intel_sdvo->is_tv) {
947 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
948 return false;
949
950 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
951 mode,
952 adjusted_mode);
953 } else if (intel_sdvo->is_lvds) {
954 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
955 intel_sdvo->sdvo_lvds_fixed_mode))
956 return false;
957
958 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
959 mode,
960 adjusted_mode);
961 }
962
963 /* Make the CRTC code factor in the SDVO pixel multiplier. The
964 * SDVO device will factor out the multiplier during mode_set.
965 */
966 multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
967 intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
968
969 return true;
970 }
971
972 static void intel_sdvo_mode_set(struct drm_encoder *encoder,
973 struct drm_display_mode *mode,
974 struct drm_display_mode *adjusted_mode)
975 {
976 struct drm_device *dev = encoder->dev;
977 struct drm_i915_private *dev_priv = dev->dev_private;
978 struct drm_crtc *crtc = encoder->crtc;
979 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
980 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
981 u32 sdvox;
982 struct intel_sdvo_in_out_map in_out;
983 struct intel_sdvo_dtd input_dtd;
984 int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
985 int rate;
986
987 if (!mode)
988 return;
989
990 /* First, set the input mapping for the first input to our controlled
991 * output. This is only correct if we're a single-input device, in
992 * which case the first input is the output from the appropriate SDVO
993 * channel on the motherboard. In a two-input device, the first input
994 * will be SDVOB and the second SDVOC.
995 */
996 in_out.in0 = intel_sdvo->attached_output;
997 in_out.in1 = 0;
998
999 intel_sdvo_set_value(intel_sdvo,
1000 SDVO_CMD_SET_IN_OUT_MAP,
1001 &in_out, sizeof(in_out));
1002
1003 /* Set the output timings to the screen */
1004 if (!intel_sdvo_set_target_output(intel_sdvo,
1005 intel_sdvo->attached_output))
1006 return;
1007
1008 /* We have tried to get input timing in mode_fixup, and filled into
1009 * adjusted_mode.
1010 */
1011 if (intel_sdvo->is_tv || intel_sdvo->is_lvds) {
1012 input_dtd = intel_sdvo->input_dtd;
1013 } else {
1014 /* Set the output timing to the screen */
1015 if (!intel_sdvo_set_target_output(intel_sdvo,
1016 intel_sdvo->attached_output))
1017 return;
1018
1019 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1020 (void) intel_sdvo_set_output_timing(intel_sdvo, &input_dtd);
1021 }
1022
1023 /* Set the input timing to the screen. Assume always input 0. */
1024 if (!intel_sdvo_set_target_input(intel_sdvo))
1025 return;
1026
1027 if (intel_sdvo->has_hdmi_monitor &&
1028 !intel_sdvo_set_avi_infoframe(intel_sdvo))
1029 return;
1030
1031 if (intel_sdvo->is_tv &&
1032 !intel_sdvo_set_tv_format(intel_sdvo))
1033 return;
1034
1035 (void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd);
1036
1037 switch (pixel_multiplier) {
1038 default:
1039 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1040 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1041 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1042 }
1043 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1044 return;
1045
1046 /* Set the SDVO control regs. */
1047 if (INTEL_INFO(dev)->gen >= 4) {
1048 sdvox = 0;
1049 if (INTEL_INFO(dev)->gen < 5)
1050 sdvox |= SDVO_BORDER_ENABLE;
1051 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
1052 sdvox |= SDVO_VSYNC_ACTIVE_HIGH;
1053 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
1054 sdvox |= SDVO_HSYNC_ACTIVE_HIGH;
1055 } else {
1056 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1057 switch (intel_sdvo->sdvo_reg) {
1058 case SDVOB:
1059 sdvox &= SDVOB_PRESERVE_MASK;
1060 break;
1061 case SDVOC:
1062 sdvox &= SDVOC_PRESERVE_MASK;
1063 break;
1064 }
1065 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1066 }
1067 if (intel_crtc->pipe == 1)
1068 sdvox |= SDVO_PIPE_B_SELECT;
1069 if (intel_sdvo->has_hdmi_audio)
1070 sdvox |= SDVO_AUDIO_ENABLE;
1071
1072 if (INTEL_INFO(dev)->gen >= 4) {
1073 /* done in crtc_mode_set as the dpll_md reg must be written early */
1074 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1075 /* done in crtc_mode_set as it lives inside the dpll register */
1076 } else {
1077 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1078 }
1079
1080 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1081 INTEL_INFO(dev)->gen < 5)
1082 sdvox |= SDVO_STALL_SELECT;
1083 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1084 }
1085
1086 static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1087 {
1088 struct drm_device *dev = encoder->dev;
1089 struct drm_i915_private *dev_priv = dev->dev_private;
1090 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1091 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
1092 u32 temp;
1093
1094 if (mode != DRM_MODE_DPMS_ON) {
1095 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1096 if (0)
1097 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1098
1099 if (mode == DRM_MODE_DPMS_OFF) {
1100 temp = I915_READ(intel_sdvo->sdvo_reg);
1101 if ((temp & SDVO_ENABLE) != 0) {
1102 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1103 }
1104 }
1105 } else {
1106 bool input1, input2;
1107 int i;
1108 u8 status;
1109
1110 temp = I915_READ(intel_sdvo->sdvo_reg);
1111 if ((temp & SDVO_ENABLE) == 0)
1112 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1113 for (i = 0; i < 2; i++)
1114 intel_wait_for_vblank(dev, intel_crtc->pipe);
1115
1116 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1117 /* Warn if the device reported failure to sync.
1118 * A lot of SDVO devices fail to notify of sync, but it's
1119 * a given it the status is a success, we succeeded.
1120 */
1121 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1122 DRM_DEBUG_KMS("First %s output reported failure to "
1123 "sync\n", SDVO_NAME(intel_sdvo));
1124 }
1125
1126 if (0)
1127 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1128 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1129 }
1130 return;
1131 }
1132
1133 static int intel_sdvo_mode_valid(struct drm_connector *connector,
1134 struct drm_display_mode *mode)
1135 {
1136 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1137
1138 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1139 return MODE_NO_DBLESCAN;
1140
1141 if (intel_sdvo->pixel_clock_min > mode->clock)
1142 return MODE_CLOCK_LOW;
1143
1144 if (intel_sdvo->pixel_clock_max < mode->clock)
1145 return MODE_CLOCK_HIGH;
1146
1147 if (intel_sdvo->is_lvds) {
1148 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1149 return MODE_PANEL;
1150
1151 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1152 return MODE_PANEL;
1153 }
1154
1155 return MODE_OK;
1156 }
1157
1158 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1159 {
1160 if (!intel_sdvo_get_value(intel_sdvo,
1161 SDVO_CMD_GET_DEVICE_CAPS,
1162 caps, sizeof(*caps)))
1163 return false;
1164
1165 DRM_DEBUG_KMS("SDVO capabilities:\n"
1166 " vendor_id: %d\n"
1167 " device_id: %d\n"
1168 " device_rev_id: %d\n"
1169 " sdvo_version_major: %d\n"
1170 " sdvo_version_minor: %d\n"
1171 " sdvo_inputs_mask: %d\n"
1172 " smooth_scaling: %d\n"
1173 " sharp_scaling: %d\n"
1174 " up_scaling: %d\n"
1175 " down_scaling: %d\n"
1176 " stall_support: %d\n"
1177 " output_flags: %d\n",
1178 caps->vendor_id,
1179 caps->device_id,
1180 caps->device_rev_id,
1181 caps->sdvo_version_major,
1182 caps->sdvo_version_minor,
1183 caps->sdvo_inputs_mask,
1184 caps->smooth_scaling,
1185 caps->sharp_scaling,
1186 caps->up_scaling,
1187 caps->down_scaling,
1188 caps->stall_support,
1189 caps->output_flags);
1190
1191 return true;
1192 }
1193
1194 /* No use! */
1195 #if 0
1196 struct drm_connector* intel_sdvo_find(struct drm_device *dev, int sdvoB)
1197 {
1198 struct drm_connector *connector = NULL;
1199 struct intel_sdvo *iout = NULL;
1200 struct intel_sdvo *sdvo;
1201
1202 /* find the sdvo connector */
1203 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1204 iout = to_intel_sdvo(connector);
1205
1206 if (iout->type != INTEL_OUTPUT_SDVO)
1207 continue;
1208
1209 sdvo = iout->dev_priv;
1210
1211 if (sdvo->sdvo_reg == SDVOB && sdvoB)
1212 return connector;
1213
1214 if (sdvo->sdvo_reg == SDVOC && !sdvoB)
1215 return connector;
1216
1217 }
1218
1219 return NULL;
1220 }
1221
1222 int intel_sdvo_supports_hotplug(struct drm_connector *connector)
1223 {
1224 u8 response[2];
1225 u8 status;
1226 struct intel_sdvo *intel_sdvo;
1227 DRM_DEBUG_KMS("\n");
1228
1229 if (!connector)
1230 return 0;
1231
1232 intel_sdvo = to_intel_sdvo(connector);
1233
1234 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1235 &response, 2) && response[0];
1236 }
1237
1238 void intel_sdvo_set_hotplug(struct drm_connector *connector, int on)
1239 {
1240 u8 response[2];
1241 u8 status;
1242 struct intel_sdvo *intel_sdvo = to_intel_sdvo(connector);
1243
1244 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1245 intel_sdvo_read_response(intel_sdvo, &response, 2);
1246
1247 if (on) {
1248 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, NULL, 0);
1249 status = intel_sdvo_read_response(intel_sdvo, &response, 2);
1250
1251 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
1252 } else {
1253 response[0] = 0;
1254 response[1] = 0;
1255 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
1256 }
1257
1258 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1259 intel_sdvo_read_response(intel_sdvo, &response, 2);
1260 }
1261 #endif
1262
1263 static bool
1264 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1265 {
1266 int caps = 0;
1267
1268 if (intel_sdvo->caps.output_flags &
1269 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1))
1270 caps++;
1271 if (intel_sdvo->caps.output_flags &
1272 (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1))
1273 caps++;
1274 if (intel_sdvo->caps.output_flags &
1275 (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_SVID1))
1276 caps++;
1277 if (intel_sdvo->caps.output_flags &
1278 (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_CVBS1))
1279 caps++;
1280 if (intel_sdvo->caps.output_flags &
1281 (SDVO_OUTPUT_YPRPB0 | SDVO_OUTPUT_YPRPB1))
1282 caps++;
1283
1284 if (intel_sdvo->caps.output_flags &
1285 (SDVO_OUTPUT_SCART0 | SDVO_OUTPUT_SCART1))
1286 caps++;
1287
1288 if (intel_sdvo->caps.output_flags &
1289 (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1))
1290 caps++;
1291
1292 return (caps > 1);
1293 }
1294
1295 static struct edid *
1296 intel_sdvo_get_edid(struct drm_connector *connector)
1297 {
1298 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1299 return drm_get_edid(connector, &sdvo->ddc);
1300 }
1301
1302 /* Mac mini hack -- use the same DDC as the analog connector */
1303 static struct edid *
1304 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1305 {
1306 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1307
1308 return drm_get_edid(connector,
1309 &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
1310 }
1311
1312 enum drm_connector_status
1313 intel_sdvo_hdmi_sink_detect(struct drm_connector *connector)
1314 {
1315 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1316 enum drm_connector_status status;
1317 struct edid *edid;
1318
1319 edid = intel_sdvo_get_edid(connector);
1320
1321 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1322 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1323
1324 /*
1325 * Don't use the 1 as the argument of DDC bus switch to get
1326 * the EDID. It is used for SDVO SPD ROM.
1327 */
1328 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1329 intel_sdvo->ddc_bus = ddc;
1330 edid = intel_sdvo_get_edid(connector);
1331 if (edid)
1332 break;
1333 }
1334 /*
1335 * If we found the EDID on the other bus,
1336 * assume that is the correct DDC bus.
1337 */
1338 if (edid == NULL)
1339 intel_sdvo->ddc_bus = saved_ddc;
1340 }
1341
1342 /*
1343 * When there is no edid and no monitor is connected with VGA
1344 * port, try to use the CRT ddc to read the EDID for DVI-connector.
1345 */
1346 if (edid == NULL)
1347 edid = intel_sdvo_get_analog_edid(connector);
1348
1349 status = connector_status_unknown;
1350 if (edid != NULL) {
1351 /* DDC bus is shared, match EDID to connector type */
1352 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1353 status = connector_status_connected;
1354 if (intel_sdvo->is_hdmi) {
1355 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1356 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1357 }
1358 }
1359 connector->display_info.raw_edid = NULL;
1360 kfree(edid);
1361 }
1362
1363 if (status == connector_status_connected) {
1364 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1365 if (intel_sdvo_connector->force_audio)
1366 intel_sdvo->has_hdmi_audio = intel_sdvo_connector->force_audio > 0;
1367 }
1368
1369 return status;
1370 }
1371
1372 static enum drm_connector_status
1373 intel_sdvo_detect(struct drm_connector *connector, bool force)
1374 {
1375 uint16_t response;
1376 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1377 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1378 enum drm_connector_status ret;
1379
1380 if (!intel_sdvo_write_cmd(intel_sdvo,
1381 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
1382 return connector_status_unknown;
1383
1384 /* add 30ms delay when the output type might be TV */
1385 if (intel_sdvo->caps.output_flags &
1386 (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_CVBS0))
1387 mdelay(30);
1388
1389 if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1390 return connector_status_unknown;
1391
1392 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1393 response & 0xff, response >> 8,
1394 intel_sdvo_connector->output_flag);
1395
1396 if (response == 0)
1397 return connector_status_disconnected;
1398
1399 intel_sdvo->attached_output = response;
1400
1401 if ((intel_sdvo_connector->output_flag & response) == 0)
1402 ret = connector_status_disconnected;
1403 else if (response & SDVO_TMDS_MASK)
1404 ret = intel_sdvo_hdmi_sink_detect(connector);
1405 else
1406 ret = connector_status_connected;
1407
1408 /* May update encoder flag for like clock for SDVO TV, etc.*/
1409 if (ret == connector_status_connected) {
1410 intel_sdvo->is_tv = false;
1411 intel_sdvo->is_lvds = false;
1412 intel_sdvo->base.needs_tv_clock = false;
1413
1414 if (response & SDVO_TV_MASK) {
1415 intel_sdvo->is_tv = true;
1416 intel_sdvo->base.needs_tv_clock = true;
1417 }
1418 if (response & SDVO_LVDS_MASK)
1419 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1420 }
1421
1422 return ret;
1423 }
1424
1425 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1426 {
1427 struct edid *edid;
1428
1429 /* set the bus switch and get the modes */
1430 edid = intel_sdvo_get_edid(connector);
1431
1432 /*
1433 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1434 * link between analog and digital outputs. So, if the regular SDVO
1435 * DDC fails, check to see if the analog output is disconnected, in
1436 * which case we'll look there for the digital DDC data.
1437 */
1438 if (edid == NULL)
1439 edid = intel_sdvo_get_analog_edid(connector);
1440
1441 if (edid != NULL) {
1442 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1443 drm_mode_connector_update_edid_property(connector, edid);
1444 drm_add_edid_modes(connector, edid);
1445 }
1446 connector->display_info.raw_edid = NULL;
1447 kfree(edid);
1448 }
1449 }
1450
1451 /*
1452 * Set of SDVO TV modes.
1453 * Note! This is in reply order (see loop in get_tv_modes).
1454 * XXX: all 60Hz refresh?
1455 */
1456 struct drm_display_mode sdvo_tv_modes[] = {
1457 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1458 416, 0, 200, 201, 232, 233, 0,
1459 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1460 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1461 416, 0, 240, 241, 272, 273, 0,
1462 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1463 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1464 496, 0, 300, 301, 332, 333, 0,
1465 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1466 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1467 736, 0, 350, 351, 382, 383, 0,
1468 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1469 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1470 736, 0, 400, 401, 432, 433, 0,
1471 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1472 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1473 736, 0, 480, 481, 512, 513, 0,
1474 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1475 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1476 800, 0, 480, 481, 512, 513, 0,
1477 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1478 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1479 800, 0, 576, 577, 608, 609, 0,
1480 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1481 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1482 816, 0, 350, 351, 382, 383, 0,
1483 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1484 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1485 816, 0, 400, 401, 432, 433, 0,
1486 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1487 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1488 816, 0, 480, 481, 512, 513, 0,
1489 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1490 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1491 816, 0, 540, 541, 572, 573, 0,
1492 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1493 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1494 816, 0, 576, 577, 608, 609, 0,
1495 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1496 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1497 864, 0, 576, 577, 608, 609, 0,
1498 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1499 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1500 896, 0, 600, 601, 632, 633, 0,
1501 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1502 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1503 928, 0, 624, 625, 656, 657, 0,
1504 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1505 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1506 1016, 0, 766, 767, 798, 799, 0,
1507 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1508 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1509 1120, 0, 768, 769, 800, 801, 0,
1510 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1511 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1512 1376, 0, 1024, 1025, 1056, 1057, 0,
1513 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1514 };
1515
1516 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1517 {
1518 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1519 struct intel_sdvo_sdtv_resolution_request tv_res;
1520 uint32_t reply = 0, format_map = 0;
1521 int i;
1522
1523 /* Read the list of supported input resolutions for the selected TV
1524 * format.
1525 */
1526 format_map = 1 << intel_sdvo->tv_format_index;
1527 memcpy(&tv_res, &format_map,
1528 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1529
1530 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1531 return;
1532
1533 BUILD_BUG_ON(sizeof(tv_res) != 3);
1534 if (!intel_sdvo_write_cmd(intel_sdvo,
1535 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1536 &tv_res, sizeof(tv_res)))
1537 return;
1538 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1539 return;
1540
1541 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1542 if (reply & (1 << i)) {
1543 struct drm_display_mode *nmode;
1544 nmode = drm_mode_duplicate(connector->dev,
1545 &sdvo_tv_modes[i]);
1546 if (nmode)
1547 drm_mode_probed_add(connector, nmode);
1548 }
1549 }
1550
1551 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1552 {
1553 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1554 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1555 struct drm_display_mode *newmode;
1556
1557 /*
1558 * Attempt to get the mode list from DDC.
1559 * Assume that the preferred modes are
1560 * arranged in priority order.
1561 */
1562 intel_ddc_get_modes(connector, intel_sdvo->i2c);
1563 if (list_empty(&connector->probed_modes) == false)
1564 goto end;
1565
1566 /* Fetch modes from VBT */
1567 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
1568 newmode = drm_mode_duplicate(connector->dev,
1569 dev_priv->sdvo_lvds_vbt_mode);
1570 if (newmode != NULL) {
1571 /* Guarantee the mode is preferred */
1572 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1573 DRM_MODE_TYPE_DRIVER);
1574 drm_mode_probed_add(connector, newmode);
1575 }
1576 }
1577
1578 end:
1579 list_for_each_entry(newmode, &connector->probed_modes, head) {
1580 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1581 intel_sdvo->sdvo_lvds_fixed_mode =
1582 drm_mode_duplicate(connector->dev, newmode);
1583
1584 drm_mode_set_crtcinfo(intel_sdvo->sdvo_lvds_fixed_mode,
1585 0);
1586
1587 intel_sdvo->is_lvds = true;
1588 break;
1589 }
1590 }
1591
1592 }
1593
1594 static int intel_sdvo_get_modes(struct drm_connector *connector)
1595 {
1596 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1597
1598 if (IS_TV(intel_sdvo_connector))
1599 intel_sdvo_get_tv_modes(connector);
1600 else if (IS_LVDS(intel_sdvo_connector))
1601 intel_sdvo_get_lvds_modes(connector);
1602 else
1603 intel_sdvo_get_ddc_modes(connector);
1604
1605 return !list_empty(&connector->probed_modes);
1606 }
1607
1608 static void
1609 intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
1610 {
1611 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1612 struct drm_device *dev = connector->dev;
1613
1614 if (intel_sdvo_connector->left)
1615 drm_property_destroy(dev, intel_sdvo_connector->left);
1616 if (intel_sdvo_connector->right)
1617 drm_property_destroy(dev, intel_sdvo_connector->right);
1618 if (intel_sdvo_connector->top)
1619 drm_property_destroy(dev, intel_sdvo_connector->top);
1620 if (intel_sdvo_connector->bottom)
1621 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1622 if (intel_sdvo_connector->hpos)
1623 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1624 if (intel_sdvo_connector->vpos)
1625 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1626 if (intel_sdvo_connector->saturation)
1627 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1628 if (intel_sdvo_connector->contrast)
1629 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1630 if (intel_sdvo_connector->hue)
1631 drm_property_destroy(dev, intel_sdvo_connector->hue);
1632 if (intel_sdvo_connector->sharpness)
1633 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1634 if (intel_sdvo_connector->flicker_filter)
1635 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1636 if (intel_sdvo_connector->flicker_filter_2d)
1637 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1638 if (intel_sdvo_connector->flicker_filter_adaptive)
1639 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1640 if (intel_sdvo_connector->tv_luma_filter)
1641 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1642 if (intel_sdvo_connector->tv_chroma_filter)
1643 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
1644 if (intel_sdvo_connector->dot_crawl)
1645 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
1646 if (intel_sdvo_connector->brightness)
1647 drm_property_destroy(dev, intel_sdvo_connector->brightness);
1648 }
1649
1650 static void intel_sdvo_destroy(struct drm_connector *connector)
1651 {
1652 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1653
1654 if (intel_sdvo_connector->tv_format)
1655 drm_property_destroy(connector->dev,
1656 intel_sdvo_connector->tv_format);
1657
1658 intel_sdvo_destroy_enhance_property(connector);
1659 drm_sysfs_connector_remove(connector);
1660 drm_connector_cleanup(connector);
1661 kfree(connector);
1662 }
1663
1664 static int
1665 intel_sdvo_set_property(struct drm_connector *connector,
1666 struct drm_property *property,
1667 uint64_t val)
1668 {
1669 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1670 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1671 uint16_t temp_value;
1672 uint8_t cmd;
1673 int ret;
1674
1675 ret = drm_connector_property_set_value(connector, property, val);
1676 if (ret)
1677 return ret;
1678
1679 if (property == intel_sdvo_connector->force_audio_property) {
1680 if (val == intel_sdvo_connector->force_audio)
1681 return 0;
1682
1683 intel_sdvo_connector->force_audio = val;
1684
1685 if (val > 0 && intel_sdvo->has_hdmi_audio)
1686 return 0;
1687 if (val < 0 && !intel_sdvo->has_hdmi_audio)
1688 return 0;
1689
1690 intel_sdvo->has_hdmi_audio = val > 0;
1691 goto done;
1692 }
1693
1694 #define CHECK_PROPERTY(name, NAME) \
1695 if (intel_sdvo_connector->name == property) { \
1696 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1697 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1698 cmd = SDVO_CMD_SET_##NAME; \
1699 intel_sdvo_connector->cur_##name = temp_value; \
1700 goto set_value; \
1701 }
1702
1703 if (property == intel_sdvo_connector->tv_format) {
1704 if (val >= TV_FORMAT_NUM)
1705 return -EINVAL;
1706
1707 if (intel_sdvo->tv_format_index ==
1708 intel_sdvo_connector->tv_format_supported[val])
1709 return 0;
1710
1711 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
1712 goto done;
1713 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
1714 temp_value = val;
1715 if (intel_sdvo_connector->left == property) {
1716 drm_connector_property_set_value(connector,
1717 intel_sdvo_connector->right, val);
1718 if (intel_sdvo_connector->left_margin == temp_value)
1719 return 0;
1720
1721 intel_sdvo_connector->left_margin = temp_value;
1722 intel_sdvo_connector->right_margin = temp_value;
1723 temp_value = intel_sdvo_connector->max_hscan -
1724 intel_sdvo_connector->left_margin;
1725 cmd = SDVO_CMD_SET_OVERSCAN_H;
1726 goto set_value;
1727 } else if (intel_sdvo_connector->right == property) {
1728 drm_connector_property_set_value(connector,
1729 intel_sdvo_connector->left, val);
1730 if (intel_sdvo_connector->right_margin == temp_value)
1731 return 0;
1732
1733 intel_sdvo_connector->left_margin = temp_value;
1734 intel_sdvo_connector->right_margin = temp_value;
1735 temp_value = intel_sdvo_connector->max_hscan -
1736 intel_sdvo_connector->left_margin;
1737 cmd = SDVO_CMD_SET_OVERSCAN_H;
1738 goto set_value;
1739 } else if (intel_sdvo_connector->top == property) {
1740 drm_connector_property_set_value(connector,
1741 intel_sdvo_connector->bottom, val);
1742 if (intel_sdvo_connector->top_margin == temp_value)
1743 return 0;
1744
1745 intel_sdvo_connector->top_margin = temp_value;
1746 intel_sdvo_connector->bottom_margin = temp_value;
1747 temp_value = intel_sdvo_connector->max_vscan -
1748 intel_sdvo_connector->top_margin;
1749 cmd = SDVO_CMD_SET_OVERSCAN_V;
1750 goto set_value;
1751 } else if (intel_sdvo_connector->bottom == property) {
1752 drm_connector_property_set_value(connector,
1753 intel_sdvo_connector->top, val);
1754 if (intel_sdvo_connector->bottom_margin == temp_value)
1755 return 0;
1756
1757 intel_sdvo_connector->top_margin = temp_value;
1758 intel_sdvo_connector->bottom_margin = temp_value;
1759 temp_value = intel_sdvo_connector->max_vscan -
1760 intel_sdvo_connector->top_margin;
1761 cmd = SDVO_CMD_SET_OVERSCAN_V;
1762 goto set_value;
1763 }
1764 CHECK_PROPERTY(hpos, HPOS)
1765 CHECK_PROPERTY(vpos, VPOS)
1766 CHECK_PROPERTY(saturation, SATURATION)
1767 CHECK_PROPERTY(contrast, CONTRAST)
1768 CHECK_PROPERTY(hue, HUE)
1769 CHECK_PROPERTY(brightness, BRIGHTNESS)
1770 CHECK_PROPERTY(sharpness, SHARPNESS)
1771 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1772 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1773 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1774 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1775 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
1776 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
1777 }
1778
1779 return -EINVAL; /* unknown property */
1780
1781 set_value:
1782 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1783 return -EIO;
1784
1785
1786 done:
1787 if (intel_sdvo->base.base.crtc) {
1788 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
1789 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
1790 crtc->y, crtc->fb);
1791 }
1792
1793 return 0;
1794 #undef CHECK_PROPERTY
1795 }
1796
1797 static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1798 .dpms = intel_sdvo_dpms,
1799 .mode_fixup = intel_sdvo_mode_fixup,
1800 .prepare = intel_encoder_prepare,
1801 .mode_set = intel_sdvo_mode_set,
1802 .commit = intel_encoder_commit,
1803 };
1804
1805 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
1806 .dpms = drm_helper_connector_dpms,
1807 .detect = intel_sdvo_detect,
1808 .fill_modes = drm_helper_probe_single_connector_modes,
1809 .set_property = intel_sdvo_set_property,
1810 .destroy = intel_sdvo_destroy,
1811 };
1812
1813 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1814 .get_modes = intel_sdvo_get_modes,
1815 .mode_valid = intel_sdvo_mode_valid,
1816 .best_encoder = intel_best_encoder,
1817 };
1818
1819 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
1820 {
1821 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1822
1823 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
1824 drm_mode_destroy(encoder->dev,
1825 intel_sdvo->sdvo_lvds_fixed_mode);
1826
1827 i2c_del_adapter(&intel_sdvo->ddc);
1828 intel_encoder_destroy(encoder);
1829 }
1830
1831 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1832 .destroy = intel_sdvo_enc_destroy,
1833 };
1834
1835 static void
1836 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
1837 {
1838 uint16_t mask = 0;
1839 unsigned int num_bits;
1840
1841 /* Make a mask of outputs less than or equal to our own priority in the
1842 * list.
1843 */
1844 switch (sdvo->controlled_output) {
1845 case SDVO_OUTPUT_LVDS1:
1846 mask |= SDVO_OUTPUT_LVDS1;
1847 case SDVO_OUTPUT_LVDS0:
1848 mask |= SDVO_OUTPUT_LVDS0;
1849 case SDVO_OUTPUT_TMDS1:
1850 mask |= SDVO_OUTPUT_TMDS1;
1851 case SDVO_OUTPUT_TMDS0:
1852 mask |= SDVO_OUTPUT_TMDS0;
1853 case SDVO_OUTPUT_RGB1:
1854 mask |= SDVO_OUTPUT_RGB1;
1855 case SDVO_OUTPUT_RGB0:
1856 mask |= SDVO_OUTPUT_RGB0;
1857 break;
1858 }
1859
1860 /* Count bits to find what number we are in the priority list. */
1861 mask &= sdvo->caps.output_flags;
1862 num_bits = hweight16(mask);
1863 /* If more than 3 outputs, default to DDC bus 3 for now. */
1864 if (num_bits > 3)
1865 num_bits = 3;
1866
1867 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1868 sdvo->ddc_bus = 1 << num_bits;
1869 }
1870
1871 /**
1872 * Choose the appropriate DDC bus for control bus switch command for this
1873 * SDVO output based on the controlled output.
1874 *
1875 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1876 * outputs, then LVDS outputs.
1877 */
1878 static void
1879 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
1880 struct intel_sdvo *sdvo, u32 reg)
1881 {
1882 struct sdvo_device_mapping *mapping;
1883
1884 if (IS_SDVOB(reg))
1885 mapping = &(dev_priv->sdvo_mappings[0]);
1886 else
1887 mapping = &(dev_priv->sdvo_mappings[1]);
1888
1889 if (mapping->initialized)
1890 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1891 else
1892 intel_sdvo_guess_ddc_bus(sdvo);
1893 }
1894
1895 static void
1896 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
1897 struct intel_sdvo *sdvo, u32 reg)
1898 {
1899 struct sdvo_device_mapping *mapping;
1900 u8 pin, speed;
1901
1902 if (IS_SDVOB(reg))
1903 mapping = &dev_priv->sdvo_mappings[0];
1904 else
1905 mapping = &dev_priv->sdvo_mappings[1];
1906
1907 pin = GMBUS_PORT_DPB;
1908 speed = GMBUS_RATE_1MHZ >> 8;
1909 if (mapping->initialized) {
1910 pin = mapping->i2c_pin;
1911 speed = mapping->i2c_speed;
1912 }
1913
1914 if (pin < GMBUS_NUM_PORTS) {
1915 sdvo->i2c = &dev_priv->gmbus[pin].adapter;
1916 intel_gmbus_set_speed(sdvo->i2c, speed);
1917 intel_gmbus_force_bit(sdvo->i2c, true);
1918 } else
1919 sdvo->i2c = &dev_priv->gmbus[GMBUS_PORT_DPB].adapter;
1920 }
1921
1922 static bool
1923 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
1924 {
1925 int is_hdmi;
1926
1927 if (!intel_sdvo_check_supp_encode(intel_sdvo))
1928 return false;
1929
1930 if (!intel_sdvo_set_target_output(intel_sdvo,
1931 device == 0 ? SDVO_OUTPUT_TMDS0 : SDVO_OUTPUT_TMDS1))
1932 return false;
1933
1934 is_hdmi = 0;
1935 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE, &is_hdmi, 1))
1936 return false;
1937
1938 return !!is_hdmi;
1939 }
1940
1941 static u8
1942 intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg)
1943 {
1944 struct drm_i915_private *dev_priv = dev->dev_private;
1945 struct sdvo_device_mapping *my_mapping, *other_mapping;
1946
1947 if (IS_SDVOB(sdvo_reg)) {
1948 my_mapping = &dev_priv->sdvo_mappings[0];
1949 other_mapping = &dev_priv->sdvo_mappings[1];
1950 } else {
1951 my_mapping = &dev_priv->sdvo_mappings[1];
1952 other_mapping = &dev_priv->sdvo_mappings[0];
1953 }
1954
1955 /* If the BIOS described our SDVO device, take advantage of it. */
1956 if (my_mapping->slave_addr)
1957 return my_mapping->slave_addr;
1958
1959 /* If the BIOS only described a different SDVO device, use the
1960 * address that it isn't using.
1961 */
1962 if (other_mapping->slave_addr) {
1963 if (other_mapping->slave_addr == 0x70)
1964 return 0x72;
1965 else
1966 return 0x70;
1967 }
1968
1969 /* No SDVO device info is found for another DVO port,
1970 * so use mapping assumption we had before BIOS parsing.
1971 */
1972 if (IS_SDVOB(sdvo_reg))
1973 return 0x70;
1974 else
1975 return 0x72;
1976 }
1977
1978 static void
1979 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
1980 struct intel_sdvo *encoder)
1981 {
1982 drm_connector_init(encoder->base.base.dev,
1983 &connector->base.base,
1984 &intel_sdvo_connector_funcs,
1985 connector->base.base.connector_type);
1986
1987 drm_connector_helper_add(&connector->base.base,
1988 &intel_sdvo_connector_helper_funcs);
1989
1990 connector->base.base.interlace_allowed = 0;
1991 connector->base.base.doublescan_allowed = 0;
1992 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
1993
1994 intel_connector_attach_encoder(&connector->base, &encoder->base);
1995 drm_sysfs_connector_add(&connector->base.base);
1996 }
1997
1998 static void
1999 intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
2000 {
2001 struct drm_device *dev = connector->base.base.dev;
2002
2003 connector->force_audio_property =
2004 drm_property_create(dev, DRM_MODE_PROP_RANGE, "force_audio", 2);
2005 if (connector->force_audio_property) {
2006 connector->force_audio_property->values[0] = -1;
2007 connector->force_audio_property->values[1] = 1;
2008 drm_connector_attach_property(&connector->base.base,
2009 connector->force_audio_property, 0);
2010 }
2011 }
2012
2013 static bool
2014 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2015 {
2016 struct drm_encoder *encoder = &intel_sdvo->base.base;
2017 struct drm_connector *connector;
2018 struct intel_connector *intel_connector;
2019 struct intel_sdvo_connector *intel_sdvo_connector;
2020
2021 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2022 if (!intel_sdvo_connector)
2023 return false;
2024
2025 if (device == 0) {
2026 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2027 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2028 } else if (device == 1) {
2029 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2030 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2031 }
2032
2033 intel_connector = &intel_sdvo_connector->base;
2034 connector = &intel_connector->base;
2035 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2036 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2037 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2038
2039 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2040 /* enable hdmi encoding mode if supported */
2041 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
2042 intel_sdvo_set_colorimetry(intel_sdvo,
2043 SDVO_COLORIMETRY_RGB256);
2044 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2045
2046 intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
2047 intel_sdvo->is_hdmi = true;
2048 }
2049 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2050 (1 << INTEL_ANALOG_CLONE_BIT));
2051
2052 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2053
2054 return true;
2055 }
2056
2057 static bool
2058 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2059 {
2060 struct drm_encoder *encoder = &intel_sdvo->base.base;
2061 struct drm_connector *connector;
2062 struct intel_connector *intel_connector;
2063 struct intel_sdvo_connector *intel_sdvo_connector;
2064
2065 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2066 if (!intel_sdvo_connector)
2067 return false;
2068
2069 intel_connector = &intel_sdvo_connector->base;
2070 connector = &intel_connector->base;
2071 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2072 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2073
2074 intel_sdvo->controlled_output |= type;
2075 intel_sdvo_connector->output_flag = type;
2076
2077 intel_sdvo->is_tv = true;
2078 intel_sdvo->base.needs_tv_clock = true;
2079 intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
2080
2081 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2082
2083 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2084 goto err;
2085
2086 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2087 goto err;
2088
2089 return true;
2090
2091 err:
2092 intel_sdvo_destroy(connector);
2093 return false;
2094 }
2095
2096 static bool
2097 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2098 {
2099 struct drm_encoder *encoder = &intel_sdvo->base.base;
2100 struct drm_connector *connector;
2101 struct intel_connector *intel_connector;
2102 struct intel_sdvo_connector *intel_sdvo_connector;
2103
2104 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2105 if (!intel_sdvo_connector)
2106 return false;
2107
2108 intel_connector = &intel_sdvo_connector->base;
2109 connector = &intel_connector->base;
2110 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2111 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2112 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2113
2114 if (device == 0) {
2115 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2116 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2117 } else if (device == 1) {
2118 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2119 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2120 }
2121
2122 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2123 (1 << INTEL_ANALOG_CLONE_BIT));
2124
2125 intel_sdvo_connector_init(intel_sdvo_connector,
2126 intel_sdvo);
2127 return true;
2128 }
2129
2130 static bool
2131 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2132 {
2133 struct drm_encoder *encoder = &intel_sdvo->base.base;
2134 struct drm_connector *connector;
2135 struct intel_connector *intel_connector;
2136 struct intel_sdvo_connector *intel_sdvo_connector;
2137
2138 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2139 if (!intel_sdvo_connector)
2140 return false;
2141
2142 intel_connector = &intel_sdvo_connector->base;
2143 connector = &intel_connector->base;
2144 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2145 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2146
2147 if (device == 0) {
2148 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2149 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2150 } else if (device == 1) {
2151 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2152 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2153 }
2154
2155 intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
2156 (1 << INTEL_SDVO_LVDS_CLONE_BIT));
2157
2158 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2159 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2160 goto err;
2161
2162 return true;
2163
2164 err:
2165 intel_sdvo_destroy(connector);
2166 return false;
2167 }
2168
2169 static bool
2170 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2171 {
2172 intel_sdvo->is_tv = false;
2173 intel_sdvo->base.needs_tv_clock = false;
2174 intel_sdvo->is_lvds = false;
2175
2176 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2177
2178 if (flags & SDVO_OUTPUT_TMDS0)
2179 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2180 return false;
2181
2182 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2183 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2184 return false;
2185
2186 /* TV has no XXX1 function block */
2187 if (flags & SDVO_OUTPUT_SVID0)
2188 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2189 return false;
2190
2191 if (flags & SDVO_OUTPUT_CVBS0)
2192 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2193 return false;
2194
2195 if (flags & SDVO_OUTPUT_RGB0)
2196 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2197 return false;
2198
2199 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2200 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2201 return false;
2202
2203 if (flags & SDVO_OUTPUT_LVDS0)
2204 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2205 return false;
2206
2207 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2208 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2209 return false;
2210
2211 if ((flags & SDVO_OUTPUT_MASK) == 0) {
2212 unsigned char bytes[2];
2213
2214 intel_sdvo->controlled_output = 0;
2215 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2216 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2217 SDVO_NAME(intel_sdvo),
2218 bytes[0], bytes[1]);
2219 return false;
2220 }
2221 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1);
2222
2223 return true;
2224 }
2225
2226 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2227 struct intel_sdvo_connector *intel_sdvo_connector,
2228 int type)
2229 {
2230 struct drm_device *dev = intel_sdvo->base.base.dev;
2231 struct intel_sdvo_tv_format format;
2232 uint32_t format_map, i;
2233
2234 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2235 return false;
2236
2237 if (!intel_sdvo_get_value(intel_sdvo,
2238 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2239 &format, sizeof(format)))
2240 return false;
2241
2242 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2243
2244 if (format_map == 0)
2245 return false;
2246
2247 intel_sdvo_connector->format_supported_num = 0;
2248 for (i = 0 ; i < TV_FORMAT_NUM; i++)
2249 if (format_map & (1 << i))
2250 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2251
2252
2253 intel_sdvo_connector->tv_format =
2254 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2255 "mode", intel_sdvo_connector->format_supported_num);
2256 if (!intel_sdvo_connector->tv_format)
2257 return false;
2258
2259 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2260 drm_property_add_enum(
2261 intel_sdvo_connector->tv_format, i,
2262 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2263
2264 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2265 drm_connector_attach_property(&intel_sdvo_connector->base.base,
2266 intel_sdvo_connector->tv_format, 0);
2267 return true;
2268
2269 }
2270
2271 #define ENHANCEMENT(name, NAME) do { \
2272 if (enhancements.name) { \
2273 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2274 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2275 return false; \
2276 intel_sdvo_connector->max_##name = data_value[0]; \
2277 intel_sdvo_connector->cur_##name = response; \
2278 intel_sdvo_connector->name = \
2279 drm_property_create(dev, DRM_MODE_PROP_RANGE, #name, 2); \
2280 if (!intel_sdvo_connector->name) return false; \
2281 intel_sdvo_connector->name->values[0] = 0; \
2282 intel_sdvo_connector->name->values[1] = data_value[0]; \
2283 drm_connector_attach_property(connector, \
2284 intel_sdvo_connector->name, \
2285 intel_sdvo_connector->cur_##name); \
2286 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2287 data_value[0], data_value[1], response); \
2288 } \
2289 } while(0)
2290
2291 static bool
2292 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2293 struct intel_sdvo_connector *intel_sdvo_connector,
2294 struct intel_sdvo_enhancements_reply enhancements)
2295 {
2296 struct drm_device *dev = intel_sdvo->base.base.dev;
2297 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2298 uint16_t response, data_value[2];
2299
2300 /* when horizontal overscan is supported, Add the left/right property */
2301 if (enhancements.overscan_h) {
2302 if (!intel_sdvo_get_value(intel_sdvo,
2303 SDVO_CMD_GET_MAX_OVERSCAN_H,
2304 &data_value, 4))
2305 return false;
2306
2307 if (!intel_sdvo_get_value(intel_sdvo,
2308 SDVO_CMD_GET_OVERSCAN_H,
2309 &response, 2))
2310 return false;
2311
2312 intel_sdvo_connector->max_hscan = data_value[0];
2313 intel_sdvo_connector->left_margin = data_value[0] - response;
2314 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2315 intel_sdvo_connector->left =
2316 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2317 "left_margin", 2);
2318 if (!intel_sdvo_connector->left)
2319 return false;
2320
2321 intel_sdvo_connector->left->values[0] = 0;
2322 intel_sdvo_connector->left->values[1] = data_value[0];
2323 drm_connector_attach_property(connector,
2324 intel_sdvo_connector->left,
2325 intel_sdvo_connector->left_margin);
2326
2327 intel_sdvo_connector->right =
2328 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2329 "right_margin", 2);
2330 if (!intel_sdvo_connector->right)
2331 return false;
2332
2333 intel_sdvo_connector->right->values[0] = 0;
2334 intel_sdvo_connector->right->values[1] = data_value[0];
2335 drm_connector_attach_property(connector,
2336 intel_sdvo_connector->right,
2337 intel_sdvo_connector->right_margin);
2338 DRM_DEBUG_KMS("h_overscan: max %d, "
2339 "default %d, current %d\n",
2340 data_value[0], data_value[1], response);
2341 }
2342
2343 if (enhancements.overscan_v) {
2344 if (!intel_sdvo_get_value(intel_sdvo,
2345 SDVO_CMD_GET_MAX_OVERSCAN_V,
2346 &data_value, 4))
2347 return false;
2348
2349 if (!intel_sdvo_get_value(intel_sdvo,
2350 SDVO_CMD_GET_OVERSCAN_V,
2351 &response, 2))
2352 return false;
2353
2354 intel_sdvo_connector->max_vscan = data_value[0];
2355 intel_sdvo_connector->top_margin = data_value[0] - response;
2356 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2357 intel_sdvo_connector->top =
2358 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2359 "top_margin", 2);
2360 if (!intel_sdvo_connector->top)
2361 return false;
2362
2363 intel_sdvo_connector->top->values[0] = 0;
2364 intel_sdvo_connector->top->values[1] = data_value[0];
2365 drm_connector_attach_property(connector,
2366 intel_sdvo_connector->top,
2367 intel_sdvo_connector->top_margin);
2368
2369 intel_sdvo_connector->bottom =
2370 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2371 "bottom_margin", 2);
2372 if (!intel_sdvo_connector->bottom)
2373 return false;
2374
2375 intel_sdvo_connector->bottom->values[0] = 0;
2376 intel_sdvo_connector->bottom->values[1] = data_value[0];
2377 drm_connector_attach_property(connector,
2378 intel_sdvo_connector->bottom,
2379 intel_sdvo_connector->bottom_margin);
2380 DRM_DEBUG_KMS("v_overscan: max %d, "
2381 "default %d, current %d\n",
2382 data_value[0], data_value[1], response);
2383 }
2384
2385 ENHANCEMENT(hpos, HPOS);
2386 ENHANCEMENT(vpos, VPOS);
2387 ENHANCEMENT(saturation, SATURATION);
2388 ENHANCEMENT(contrast, CONTRAST);
2389 ENHANCEMENT(hue, HUE);
2390 ENHANCEMENT(sharpness, SHARPNESS);
2391 ENHANCEMENT(brightness, BRIGHTNESS);
2392 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2393 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2394 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2395 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2396 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2397
2398 if (enhancements.dot_crawl) {
2399 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2400 return false;
2401
2402 intel_sdvo_connector->max_dot_crawl = 1;
2403 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2404 intel_sdvo_connector->dot_crawl =
2405 drm_property_create(dev, DRM_MODE_PROP_RANGE, "dot_crawl", 2);
2406 if (!intel_sdvo_connector->dot_crawl)
2407 return false;
2408
2409 intel_sdvo_connector->dot_crawl->values[0] = 0;
2410 intel_sdvo_connector->dot_crawl->values[1] = 1;
2411 drm_connector_attach_property(connector,
2412 intel_sdvo_connector->dot_crawl,
2413 intel_sdvo_connector->cur_dot_crawl);
2414 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2415 }
2416
2417 return true;
2418 }
2419
2420 static bool
2421 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2422 struct intel_sdvo_connector *intel_sdvo_connector,
2423 struct intel_sdvo_enhancements_reply enhancements)
2424 {
2425 struct drm_device *dev = intel_sdvo->base.base.dev;
2426 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2427 uint16_t response, data_value[2];
2428
2429 ENHANCEMENT(brightness, BRIGHTNESS);
2430
2431 return true;
2432 }
2433 #undef ENHANCEMENT
2434
2435 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2436 struct intel_sdvo_connector *intel_sdvo_connector)
2437 {
2438 union {
2439 struct intel_sdvo_enhancements_reply reply;
2440 uint16_t response;
2441 } enhancements;
2442
2443 enhancements.response = 0;
2444 intel_sdvo_get_value(intel_sdvo,
2445 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2446 &enhancements, sizeof(enhancements));
2447 if (enhancements.response == 0) {
2448 DRM_DEBUG_KMS("No enhancement is supported\n");
2449 return true;
2450 }
2451
2452 if (IS_TV(intel_sdvo_connector))
2453 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2454 else if(IS_LVDS(intel_sdvo_connector))
2455 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2456 else
2457 return true;
2458 }
2459
2460 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2461 struct i2c_msg *msgs,
2462 int num)
2463 {
2464 struct intel_sdvo *sdvo = adapter->algo_data;
2465
2466 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2467 return -EIO;
2468
2469 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2470 }
2471
2472 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2473 {
2474 struct intel_sdvo *sdvo = adapter->algo_data;
2475 return sdvo->i2c->algo->functionality(sdvo->i2c);
2476 }
2477
2478 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2479 .master_xfer = intel_sdvo_ddc_proxy_xfer,
2480 .functionality = intel_sdvo_ddc_proxy_func
2481 };
2482
2483 static bool
2484 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2485 struct drm_device *dev)
2486 {
2487 sdvo->ddc.owner = THIS_MODULE;
2488 sdvo->ddc.class = I2C_CLASS_DDC;
2489 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2490 sdvo->ddc.dev.parent = &dev->pdev->dev;
2491 sdvo->ddc.algo_data = sdvo;
2492 sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2493
2494 return i2c_add_adapter(&sdvo->ddc) == 0;
2495 }
2496
2497 bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
2498 {
2499 struct drm_i915_private *dev_priv = dev->dev_private;
2500 struct intel_encoder *intel_encoder;
2501 struct intel_sdvo *intel_sdvo;
2502 int i;
2503
2504 intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2505 if (!intel_sdvo)
2506 return false;
2507
2508 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
2509 kfree(intel_sdvo);
2510 return false;
2511 }
2512
2513 intel_sdvo->sdvo_reg = sdvo_reg;
2514
2515 intel_encoder = &intel_sdvo->base;
2516 intel_encoder->type = INTEL_OUTPUT_SDVO;
2517 /* encoder type will be decided later */
2518 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
2519
2520 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, sdvo_reg) >> 1;
2521 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
2522
2523 /* Read the regs to test if we can talk to the device */
2524 for (i = 0; i < 0x40; i++) {
2525 u8 byte;
2526
2527 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
2528 DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
2529 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2530 goto err;
2531 }
2532 }
2533
2534 if (IS_SDVOB(sdvo_reg))
2535 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
2536 else
2537 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
2538
2539 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
2540
2541 /* In default case sdvo lvds is false */
2542 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2543 goto err;
2544
2545 if (intel_sdvo_output_setup(intel_sdvo,
2546 intel_sdvo->caps.output_flags) != true) {
2547 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
2548 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2549 goto err;
2550 }
2551
2552 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
2553
2554 /* Set the input timing to the screen. Assume always input 0. */
2555 if (!intel_sdvo_set_target_input(intel_sdvo))
2556 goto err;
2557
2558 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2559 &intel_sdvo->pixel_clock_min,
2560 &intel_sdvo->pixel_clock_max))
2561 goto err;
2562
2563 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2564 "clock range %dMHz - %dMHz, "
2565 "input 1: %c, input 2: %c, "
2566 "output 1: %c, output 2: %c\n",
2567 SDVO_NAME(intel_sdvo),
2568 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2569 intel_sdvo->caps.device_rev_id,
2570 intel_sdvo->pixel_clock_min / 1000,
2571 intel_sdvo->pixel_clock_max / 1000,
2572 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2573 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2574 /* check currently supported outputs */
2575 intel_sdvo->caps.output_flags &
2576 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2577 intel_sdvo->caps.output_flags &
2578 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2579 return true;
2580
2581 err:
2582 drm_encoder_cleanup(&intel_encoder->base);
2583 i2c_del_adapter(&intel_sdvo->ddc);
2584 kfree(intel_sdvo);
2585
2586 return false;
2587 }
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree