gma500: Fix dependencies
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / staging / gma500 / psb_intel_lvds.c
blob03132a4e7dfd449382615cc40962520da255bb85
1 /*
2 * Copyright © 2006-2007 Intel Corporation
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
13 * You should have received a copy of the GNU General Public License along with
14 * this program; if not, write to the Free Software Foundation, Inc.,
15 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
17 * Authors:
18 * Eric Anholt <eric@anholt.net>
19 * Dave Airlie <airlied@linux.ie>
20 * Jesse Barnes <jesse.barnes@intel.com>
23 #include <linux/i2c.h>
24 #include <drm/drmP.h>
26 #include "intel_bios.h"
27 #include "psb_drv.h"
28 #include "psb_intel_drv.h"
29 #include "psb_intel_reg.h"
30 #include "power.h"
31 #include <linux/pm_runtime.h>
34 * LVDS I2C backlight control macros
36 #define BRIGHTNESS_MAX_LEVEL 100
37 #define BRIGHTNESS_MASK 0xFF
38 #define BLC_I2C_TYPE 0x01
39 #define BLC_PWM_TYPT 0x02
41 #define BLC_POLARITY_NORMAL 0
42 #define BLC_POLARITY_INVERSE 1
44 #define PSB_BLC_MAX_PWM_REG_FREQ (0xFFFE)
45 #define PSB_BLC_MIN_PWM_REG_FREQ (0x2)
46 #define PSB_BLC_PWM_PRECISION_FACTOR (10)
47 #define PSB_BACKLIGHT_PWM_CTL_SHIFT (16)
48 #define PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR (0xFFFE)
50 struct psb_intel_lvds_priv {
52 * Saved LVDO output states
54 uint32_t savePP_ON;
55 uint32_t savePP_OFF;
56 uint32_t saveLVDS;
57 uint32_t savePP_CONTROL;
58 uint32_t savePP_CYCLE;
59 uint32_t savePFIT_CONTROL;
60 uint32_t savePFIT_PGM_RATIOS;
61 uint32_t saveBLC_PWM_CTL;
66 * Returns the maximum level of the backlight duty cycle field.
68 static u32 psb_intel_lvds_get_max_backlight(struct drm_device *dev)
70 struct drm_psb_private *dev_priv = dev->dev_private;
71 u32 retVal;
73 if (gma_power_begin(dev, false)) {
74 retVal = ((REG_READ(BLC_PWM_CTL) &
75 BACKLIGHT_MODULATION_FREQ_MASK) >>
76 BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
78 gma_power_end(dev);
79 } else
80 retVal = ((dev_priv->saveBLC_PWM_CTL &
81 BACKLIGHT_MODULATION_FREQ_MASK) >>
82 BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
84 return retVal;
88 * Set LVDS backlight level by I2C command
90 * FIXME: at some point we need to both track this for PM and also
91 * disable runtime pm on MRST if the brightness is nil (ie blanked)
93 static int psb_lvds_i2c_set_brightness(struct drm_device *dev,
94 unsigned int level)
96 struct drm_psb_private *dev_priv =
97 (struct drm_psb_private *)dev->dev_private;
99 struct psb_intel_i2c_chan *lvds_i2c_bus = dev_priv->lvds_i2c_bus;
100 u8 out_buf[2];
101 unsigned int blc_i2c_brightness;
103 struct i2c_msg msgs[] = {
105 .addr = lvds_i2c_bus->slave_addr,
106 .flags = 0,
107 .len = 2,
108 .buf = out_buf,
112 blc_i2c_brightness = BRIGHTNESS_MASK & ((unsigned int)level *
113 BRIGHTNESS_MASK /
114 BRIGHTNESS_MAX_LEVEL);
116 if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE)
117 blc_i2c_brightness = BRIGHTNESS_MASK - blc_i2c_brightness;
119 out_buf[0] = dev_priv->lvds_bl->brightnesscmd;
120 out_buf[1] = (u8)blc_i2c_brightness;
122 if (i2c_transfer(&lvds_i2c_bus->adapter, msgs, 1) == 1) {
123 dev_dbg(dev->dev, "I2C set brightness.(command, value) (%d, %d)\n",
124 dev_priv->lvds_bl->brightnesscmd,
125 blc_i2c_brightness);
126 return 0;
129 dev_err(dev->dev, "I2C transfer error\n");
130 return -1;
134 static int psb_lvds_pwm_set_brightness(struct drm_device *dev, int level)
136 struct drm_psb_private *dev_priv =
137 (struct drm_psb_private *)dev->dev_private;
139 u32 max_pwm_blc;
140 u32 blc_pwm_duty_cycle;
142 max_pwm_blc = psb_intel_lvds_get_max_backlight(dev);
144 /*BLC_PWM_CTL Should be initiated while backlight device init*/
145 BUG_ON((max_pwm_blc & PSB_BLC_MAX_PWM_REG_FREQ) == 0);
147 blc_pwm_duty_cycle = level * max_pwm_blc / BRIGHTNESS_MAX_LEVEL;
149 if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE)
150 blc_pwm_duty_cycle = max_pwm_blc - blc_pwm_duty_cycle;
152 blc_pwm_duty_cycle &= PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR;
153 REG_WRITE(BLC_PWM_CTL,
154 (max_pwm_blc << PSB_BACKLIGHT_PWM_CTL_SHIFT) |
155 (blc_pwm_duty_cycle));
157 return 0;
161 * Set LVDS backlight level either by I2C or PWM
163 void psb_intel_lvds_set_brightness(struct drm_device *dev, int level)
165 /*u32 blc_pwm_ctl;*/
166 struct drm_psb_private *dev_priv =
167 (struct drm_psb_private *)dev->dev_private;
169 dev_dbg(dev->dev, "backlight level is %d\n", level);
171 if (!dev_priv->lvds_bl) {
172 dev_err(dev->dev, "NO LVDS Backlight Info\n");
173 return;
176 if (dev_priv->lvds_bl->type == BLC_I2C_TYPE)
177 psb_lvds_i2c_set_brightness(dev, level);
178 else
179 psb_lvds_pwm_set_brightness(dev, level);
183 * Sets the backlight level.
185 * level: backlight level, from 0 to psb_intel_lvds_get_max_backlight().
187 static void psb_intel_lvds_set_backlight(struct drm_device *dev, int level)
189 struct drm_psb_private *dev_priv = dev->dev_private;
190 u32 blc_pwm_ctl;
192 if (gma_power_begin(dev, false)) {
193 blc_pwm_ctl =
194 REG_READ(BLC_PWM_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
195 REG_WRITE(BLC_PWM_CTL,
196 (blc_pwm_ctl |
197 (level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
198 gma_power_end(dev);
199 } else {
200 blc_pwm_ctl = dev_priv->saveBLC_PWM_CTL &
201 ~BACKLIGHT_DUTY_CYCLE_MASK;
202 dev_priv->saveBLC_PWM_CTL = (blc_pwm_ctl |
203 (level << BACKLIGHT_DUTY_CYCLE_SHIFT));
208 * Sets the power state for the panel.
210 static void psb_intel_lvds_set_power(struct drm_device *dev,
211 struct psb_intel_output *output, bool on)
213 u32 pp_status;
215 if (!gma_power_begin(dev, true))
216 return;
218 if (on) {
219 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) |
220 POWER_TARGET_ON);
221 do {
222 pp_status = REG_READ(PP_STATUS);
223 } while ((pp_status & PP_ON) == 0);
225 psb_intel_lvds_set_backlight(dev,
226 output->
227 mode_dev->backlight_duty_cycle);
228 } else {
229 psb_intel_lvds_set_backlight(dev, 0);
231 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &
232 ~POWER_TARGET_ON);
233 do {
234 pp_status = REG_READ(PP_STATUS);
235 } while (pp_status & PP_ON);
238 gma_power_end(dev);
241 static void psb_intel_lvds_encoder_dpms(struct drm_encoder *encoder, int mode)
243 struct drm_device *dev = encoder->dev;
244 struct psb_intel_output *output = enc_to_psb_intel_output(encoder);
246 if (mode == DRM_MODE_DPMS_ON)
247 psb_intel_lvds_set_power(dev, output, true);
248 else
249 psb_intel_lvds_set_power(dev, output, false);
251 /* XXX: We never power down the LVDS pairs. */
254 static void psb_intel_lvds_save(struct drm_connector *connector)
256 struct drm_device *dev = connector->dev;
257 struct drm_psb_private *dev_priv =
258 (struct drm_psb_private *)dev->dev_private;
259 struct psb_intel_output *psb_intel_output =
260 to_psb_intel_output(connector);
261 struct psb_intel_lvds_priv *lvds_priv =
262 (struct psb_intel_lvds_priv *)psb_intel_output->dev_priv;
264 lvds_priv->savePP_ON = REG_READ(LVDSPP_ON);
265 lvds_priv->savePP_OFF = REG_READ(LVDSPP_OFF);
266 lvds_priv->saveLVDS = REG_READ(LVDS);
267 lvds_priv->savePP_CONTROL = REG_READ(PP_CONTROL);
268 lvds_priv->savePP_CYCLE = REG_READ(PP_CYCLE);
269 /*lvds_priv->savePP_DIVISOR = REG_READ(PP_DIVISOR);*/
270 lvds_priv->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL);
271 lvds_priv->savePFIT_CONTROL = REG_READ(PFIT_CONTROL);
272 lvds_priv->savePFIT_PGM_RATIOS = REG_READ(PFIT_PGM_RATIOS);
274 /*TODO: move backlight_duty_cycle to psb_intel_lvds_priv*/
275 dev_priv->backlight_duty_cycle = (dev_priv->saveBLC_PWM_CTL &
276 BACKLIGHT_DUTY_CYCLE_MASK);
279 * If the light is off at server startup,
280 * just make it full brightness
282 if (dev_priv->backlight_duty_cycle == 0)
283 dev_priv->backlight_duty_cycle =
284 psb_intel_lvds_get_max_backlight(dev);
286 dev_dbg(dev->dev, "(0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x)\n",
287 lvds_priv->savePP_ON,
288 lvds_priv->savePP_OFF,
289 lvds_priv->saveLVDS,
290 lvds_priv->savePP_CONTROL,
291 lvds_priv->savePP_CYCLE,
292 lvds_priv->saveBLC_PWM_CTL);
295 static void psb_intel_lvds_restore(struct drm_connector *connector)
297 struct drm_device *dev = connector->dev;
298 u32 pp_status;
300 /*struct drm_psb_private *dev_priv =
301 (struct drm_psb_private *)dev->dev_private;*/
302 struct psb_intel_output *psb_intel_output =
303 to_psb_intel_output(connector);
304 struct psb_intel_lvds_priv *lvds_priv =
305 (struct psb_intel_lvds_priv *)psb_intel_output->dev_priv;
307 dev_dbg(dev->dev, "(0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x)\n",
308 lvds_priv->savePP_ON,
309 lvds_priv->savePP_OFF,
310 lvds_priv->saveLVDS,
311 lvds_priv->savePP_CONTROL,
312 lvds_priv->savePP_CYCLE,
313 lvds_priv->saveBLC_PWM_CTL);
315 REG_WRITE(BLC_PWM_CTL, lvds_priv->saveBLC_PWM_CTL);
316 REG_WRITE(PFIT_CONTROL, lvds_priv->savePFIT_CONTROL);
317 REG_WRITE(PFIT_PGM_RATIOS, lvds_priv->savePFIT_PGM_RATIOS);
318 REG_WRITE(LVDSPP_ON, lvds_priv->savePP_ON);
319 REG_WRITE(LVDSPP_OFF, lvds_priv->savePP_OFF);
320 /*REG_WRITE(PP_DIVISOR, lvds_priv->savePP_DIVISOR);*/
321 REG_WRITE(PP_CYCLE, lvds_priv->savePP_CYCLE);
322 REG_WRITE(PP_CONTROL, lvds_priv->savePP_CONTROL);
323 REG_WRITE(LVDS, lvds_priv->saveLVDS);
325 if (lvds_priv->savePP_CONTROL & POWER_TARGET_ON) {
326 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) |
327 POWER_TARGET_ON);
328 do {
329 pp_status = REG_READ(PP_STATUS);
330 } while ((pp_status & PP_ON) == 0);
331 } else {
332 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &
333 ~POWER_TARGET_ON);
334 do {
335 pp_status = REG_READ(PP_STATUS);
336 } while (pp_status & PP_ON);
340 int psb_intel_lvds_mode_valid(struct drm_connector *connector,
341 struct drm_display_mode *mode)
343 struct psb_intel_output *psb_intel_output =
344 to_psb_intel_output(connector);
345 struct drm_display_mode *fixed_mode =
346 psb_intel_output->mode_dev->panel_fixed_mode;
348 if (psb_intel_output->type == INTEL_OUTPUT_MIPI2)
349 fixed_mode = psb_intel_output->mode_dev->panel_fixed_mode2;
351 /* just in case */
352 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
353 return MODE_NO_DBLESCAN;
355 /* just in case */
356 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
357 return MODE_NO_INTERLACE;
359 if (fixed_mode) {
360 if (mode->hdisplay > fixed_mode->hdisplay)
361 return MODE_PANEL;
362 if (mode->vdisplay > fixed_mode->vdisplay)
363 return MODE_PANEL;
365 return MODE_OK;
368 bool psb_intel_lvds_mode_fixup(struct drm_encoder *encoder,
369 struct drm_display_mode *mode,
370 struct drm_display_mode *adjusted_mode)
372 struct psb_intel_mode_device *mode_dev =
373 enc_to_psb_intel_output(encoder)->mode_dev;
374 struct drm_device *dev = encoder->dev;
375 struct psb_intel_crtc *psb_intel_crtc =
376 to_psb_intel_crtc(encoder->crtc);
377 struct drm_encoder *tmp_encoder;
378 struct drm_display_mode *panel_fixed_mode = mode_dev->panel_fixed_mode;
379 struct psb_intel_output *psb_intel_output =
380 enc_to_psb_intel_output(encoder);
382 if (psb_intel_output->type == INTEL_OUTPUT_MIPI2)
383 panel_fixed_mode = mode_dev->panel_fixed_mode2;
385 /* FIXME: review for Medfield */
386 /* PSB requires the LVDS is on pipe B, MRST has only one pipe anyway */
387 if (!IS_MRST(dev) && psb_intel_crtc->pipe == 0) {
388 printk(KERN_ERR "Can't support LVDS on pipe A\n");
389 return false;
391 if (IS_MRST(dev) && psb_intel_crtc->pipe != 0) {
392 printk(KERN_ERR "Must use PIPE A\n");
393 return false;
395 /* Should never happen!! */
396 list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list,
397 head) {
398 if (tmp_encoder != encoder
399 && tmp_encoder->crtc == encoder->crtc) {
400 printk(KERN_ERR "Can't enable LVDS and another "
401 "encoder on the same pipe\n");
402 return false;
407 * If we have timings from the BIOS for the panel, put them in
408 * to the adjusted mode. The CRTC will be set up for this mode,
409 * with the panel scaling set up to source from the H/VDisplay
410 * of the original mode.
412 if (panel_fixed_mode != NULL) {
413 adjusted_mode->hdisplay = panel_fixed_mode->hdisplay;
414 adjusted_mode->hsync_start = panel_fixed_mode->hsync_start;
415 adjusted_mode->hsync_end = panel_fixed_mode->hsync_end;
416 adjusted_mode->htotal = panel_fixed_mode->htotal;
417 adjusted_mode->vdisplay = panel_fixed_mode->vdisplay;
418 adjusted_mode->vsync_start = panel_fixed_mode->vsync_start;
419 adjusted_mode->vsync_end = panel_fixed_mode->vsync_end;
420 adjusted_mode->vtotal = panel_fixed_mode->vtotal;
421 adjusted_mode->clock = panel_fixed_mode->clock;
422 drm_mode_set_crtcinfo(adjusted_mode,
423 CRTC_INTERLACE_HALVE_V);
427 * XXX: It would be nice to support lower refresh rates on the
428 * panels to reduce power consumption, and perhaps match the
429 * user's requested refresh rate.
432 return true;
435 void psb_intel_lvds_prepare(struct drm_encoder *encoder)
437 struct drm_device *dev = encoder->dev;
438 struct psb_intel_output *output = enc_to_psb_intel_output(encoder);
439 struct psb_intel_mode_device *mode_dev = output->mode_dev;
441 if (!gma_power_begin(dev, true))
442 return;
444 mode_dev->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL);
445 mode_dev->backlight_duty_cycle = (mode_dev->saveBLC_PWM_CTL &
446 BACKLIGHT_DUTY_CYCLE_MASK);
448 psb_intel_lvds_set_power(dev, output, false);
450 gma_power_end(dev);
453 void psb_intel_lvds_commit(struct drm_encoder *encoder)
455 struct drm_device *dev = encoder->dev;
456 struct psb_intel_output *output = enc_to_psb_intel_output(encoder);
457 struct psb_intel_mode_device *mode_dev = output->mode_dev;
459 if (mode_dev->backlight_duty_cycle == 0)
460 mode_dev->backlight_duty_cycle =
461 psb_intel_lvds_get_max_backlight(dev);
463 psb_intel_lvds_set_power(dev, output, true);
466 static void psb_intel_lvds_mode_set(struct drm_encoder *encoder,
467 struct drm_display_mode *mode,
468 struct drm_display_mode *adjusted_mode)
470 struct psb_intel_mode_device *mode_dev =
471 enc_to_psb_intel_output(encoder)->mode_dev;
472 struct drm_device *dev = encoder->dev;
473 struct drm_psb_private *dev_priv = dev->dev_private;
474 u32 pfit_control;
477 * The LVDS pin pair will already have been turned on in the
478 * psb_intel_crtc_mode_set since it has a large impact on the DPLL
479 * settings.
483 * Enable automatic panel scaling so that non-native modes fill the
484 * screen. Should be enabled before the pipe is enabled, according to
485 * register description and PRM.
487 if (mode->hdisplay != adjusted_mode->hdisplay ||
488 mode->vdisplay != adjusted_mode->vdisplay)
489 pfit_control = (PFIT_ENABLE | VERT_AUTO_SCALE |
490 HORIZ_AUTO_SCALE | VERT_INTERP_BILINEAR |
491 HORIZ_INTERP_BILINEAR);
492 else
493 pfit_control = 0;
495 if (dev_priv->lvds_dither)
496 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
498 REG_WRITE(PFIT_CONTROL, pfit_control);
502 * Detect the LVDS connection.
504 * This always returns CONNECTOR_STATUS_CONNECTED.
505 * This connector should only have
506 * been set up if the LVDS was actually connected anyway.
508 static enum drm_connector_status psb_intel_lvds_detect(struct drm_connector
509 *connector, bool force)
511 return connector_status_connected;
515 * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
517 static int psb_intel_lvds_get_modes(struct drm_connector *connector)
519 struct drm_device *dev = connector->dev;
520 struct psb_intel_output *psb_intel_output =
521 to_psb_intel_output(connector);
522 struct psb_intel_mode_device *mode_dev =
523 psb_intel_output->mode_dev;
524 int ret = 0;
526 ret = psb_intel_ddc_get_modes(psb_intel_output);
528 if (ret)
529 return ret;
531 /* Didn't get an EDID, so
532 * Set wide sync ranges so we get all modes
533 * handed to valid_mode for checking
535 connector->display_info.min_vfreq = 0;
536 connector->display_info.max_vfreq = 200;
537 connector->display_info.min_hfreq = 0;
538 connector->display_info.max_hfreq = 200;
540 if (mode_dev->panel_fixed_mode != NULL) {
541 struct drm_display_mode *mode =
542 drm_mode_duplicate(dev, mode_dev->panel_fixed_mode);
543 drm_mode_probed_add(connector, mode);
544 return 1;
547 return 0;
551 * psb_intel_lvds_destroy - unregister and free LVDS structures
552 * @connector: connector to free
554 * Unregister the DDC bus for this connector then free the driver private
555 * structure.
557 void psb_intel_lvds_destroy(struct drm_connector *connector)
559 struct psb_intel_output *psb_intel_output =
560 to_psb_intel_output(connector);
562 if (psb_intel_output->ddc_bus)
563 psb_intel_i2c_destroy(psb_intel_output->ddc_bus);
564 drm_sysfs_connector_remove(connector);
565 drm_connector_cleanup(connector);
566 kfree(connector);
569 int psb_intel_lvds_set_property(struct drm_connector *connector,
570 struct drm_property *property,
571 uint64_t value)
573 struct drm_encoder *encoder = connector->encoder;
574 struct drm_psb_private *dev_priv;
576 if (!encoder)
577 return -1;
579 dev_priv = encoder->dev->dev_private;
581 if (!strcmp(property->name, "scaling mode")) {
582 struct psb_intel_crtc *crtc =
583 to_psb_intel_crtc(encoder->crtc);
584 uint64_t curValue;
586 if (!crtc)
587 goto set_prop_error;
589 switch (value) {
590 case DRM_MODE_SCALE_FULLSCREEN:
591 break;
592 case DRM_MODE_SCALE_NO_SCALE:
593 break;
594 case DRM_MODE_SCALE_ASPECT:
595 break;
596 default:
597 goto set_prop_error;
600 if (drm_connector_property_get_value(connector,
601 property,
602 &curValue))
603 goto set_prop_error;
605 if (curValue == value)
606 goto set_prop_done;
608 if (drm_connector_property_set_value(connector,
609 property,
610 value))
611 goto set_prop_error;
613 if (crtc->saved_mode.hdisplay != 0 &&
614 crtc->saved_mode.vdisplay != 0) {
615 if (!drm_crtc_helper_set_mode(encoder->crtc,
616 &crtc->saved_mode,
617 encoder->crtc->x,
618 encoder->crtc->y,
619 encoder->crtc->fb))
620 goto set_prop_error;
622 } else if (!strcmp(property->name, "backlight")) {
623 if (drm_connector_property_set_value(connector,
624 property,
625 value))
626 goto set_prop_error;
627 else {
628 #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
629 struct backlight_device *bd =
630 dev_priv->backlight_device;
631 if (bd) {
632 bd->props.brightness = value;
633 backlight_update_status(bd);
635 #endif
637 } else if (!strcmp(property->name, "DPMS")) {
638 struct drm_encoder_helper_funcs *pEncHFuncs
639 = encoder->helper_private;
640 pEncHFuncs->dpms(encoder, value);
643 set_prop_done:
644 return 0;
645 set_prop_error:
646 return -1;
649 static const struct drm_encoder_helper_funcs psb_intel_lvds_helper_funcs = {
650 .dpms = psb_intel_lvds_encoder_dpms,
651 .mode_fixup = psb_intel_lvds_mode_fixup,
652 .prepare = psb_intel_lvds_prepare,
653 .mode_set = psb_intel_lvds_mode_set,
654 .commit = psb_intel_lvds_commit,
657 const struct drm_connector_helper_funcs
658 psb_intel_lvds_connector_helper_funcs = {
659 .get_modes = psb_intel_lvds_get_modes,
660 .mode_valid = psb_intel_lvds_mode_valid,
661 .best_encoder = psb_intel_best_encoder,
664 const struct drm_connector_funcs psb_intel_lvds_connector_funcs = {
665 .dpms = drm_helper_connector_dpms,
666 .save = psb_intel_lvds_save,
667 .restore = psb_intel_lvds_restore,
668 .detect = psb_intel_lvds_detect,
669 .fill_modes = drm_helper_probe_single_connector_modes,
670 .set_property = psb_intel_lvds_set_property,
671 .destroy = psb_intel_lvds_destroy,
675 static void psb_intel_lvds_enc_destroy(struct drm_encoder *encoder)
677 drm_encoder_cleanup(encoder);
680 const struct drm_encoder_funcs psb_intel_lvds_enc_funcs = {
681 .destroy = psb_intel_lvds_enc_destroy,
687 * psb_intel_lvds_init - setup LVDS connectors on this device
688 * @dev: drm device
690 * Create the connector, register the LVDS DDC bus, and try to figure out what
691 * modes we can display on the LVDS panel (if present).
693 void psb_intel_lvds_init(struct drm_device *dev,
694 struct psb_intel_mode_device *mode_dev)
696 struct psb_intel_output *psb_intel_output;
697 struct psb_intel_lvds_priv *lvds_priv;
698 struct drm_connector *connector;
699 struct drm_encoder *encoder;
700 struct drm_display_mode *scan; /* *modes, *bios_mode; */
701 struct drm_crtc *crtc;
702 struct drm_psb_private *dev_priv =
703 (struct drm_psb_private *)dev->dev_private;
704 u32 lvds;
705 int pipe;
707 psb_intel_output = kzalloc(sizeof(struct psb_intel_output), GFP_KERNEL);
708 if (!psb_intel_output)
709 return;
711 lvds_priv = kzalloc(sizeof(struct psb_intel_lvds_priv), GFP_KERNEL);
712 if (!lvds_priv) {
713 kfree(psb_intel_output);
714 dev_err(dev->dev, "LVDS private allocation error\n");
715 return;
718 psb_intel_output->dev_priv = lvds_priv;
720 psb_intel_output->mode_dev = mode_dev;
721 connector = &psb_intel_output->base;
722 encoder = &psb_intel_output->enc;
723 drm_connector_init(dev, &psb_intel_output->base,
724 &psb_intel_lvds_connector_funcs,
725 DRM_MODE_CONNECTOR_LVDS);
727 drm_encoder_init(dev, &psb_intel_output->enc,
728 &psb_intel_lvds_enc_funcs,
729 DRM_MODE_ENCODER_LVDS);
731 drm_mode_connector_attach_encoder(&psb_intel_output->base,
732 &psb_intel_output->enc);
733 psb_intel_output->type = INTEL_OUTPUT_LVDS;
735 drm_encoder_helper_add(encoder, &psb_intel_lvds_helper_funcs);
736 drm_connector_helper_add(connector,
737 &psb_intel_lvds_connector_helper_funcs);
738 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
739 connector->interlace_allowed = false;
740 connector->doublescan_allowed = false;
742 /*Attach connector properties*/
743 drm_connector_attach_property(connector,
744 dev->mode_config.scaling_mode_property,
745 DRM_MODE_SCALE_FULLSCREEN);
746 drm_connector_attach_property(connector,
747 dev_priv->backlight_property,
748 BRIGHTNESS_MAX_LEVEL);
751 * Set up I2C bus
752 * FIXME: distroy i2c_bus when exit
754 psb_intel_output->i2c_bus = psb_intel_i2c_create(dev,
755 GPIOB,
756 "LVDSBLC_B");
757 if (!psb_intel_output->i2c_bus) {
758 dev_printk(KERN_ERR,
759 &dev->pdev->dev, "I2C bus registration failed.\n");
760 goto failed_blc_i2c;
762 psb_intel_output->i2c_bus->slave_addr = 0x2C;
763 dev_priv->lvds_i2c_bus = psb_intel_output->i2c_bus;
766 * LVDS discovery:
767 * 1) check for EDID on DDC
768 * 2) check for VBT data
769 * 3) check to see if LVDS is already on
770 * if none of the above, no panel
771 * 4) make sure lid is open
772 * if closed, act like it's not there for now
775 /* Set up the DDC bus. */
776 psb_intel_output->ddc_bus = psb_intel_i2c_create(dev,
777 GPIOC,
778 "LVDSDDC_C");
779 if (!psb_intel_output->ddc_bus) {
780 dev_printk(KERN_ERR, &dev->pdev->dev,
781 "DDC bus registration " "failed.\n");
782 goto failed_ddc;
786 * Attempt to get the fixed panel mode from DDC. Assume that the
787 * preferred mode is the right one.
789 psb_intel_ddc_get_modes(psb_intel_output);
790 list_for_each_entry(scan, &connector->probed_modes, head) {
791 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
792 mode_dev->panel_fixed_mode =
793 drm_mode_duplicate(dev, scan);
794 goto out; /* FIXME: check for quirks */
798 /* Failed to get EDID, what about VBT? do we need this? */
799 if (mode_dev->vbt_mode)
800 mode_dev->panel_fixed_mode =
801 drm_mode_duplicate(dev, mode_dev->vbt_mode);
803 if (!mode_dev->panel_fixed_mode)
804 if (dev_priv->lfp_lvds_vbt_mode)
805 mode_dev->panel_fixed_mode =
806 drm_mode_duplicate(dev,
807 dev_priv->lfp_lvds_vbt_mode);
810 * If we didn't get EDID, try checking if the panel is already turned
811 * on. If so, assume that whatever is currently programmed is the
812 * correct mode.
814 lvds = REG_READ(LVDS);
815 pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
816 crtc = psb_intel_get_crtc_from_pipe(dev, pipe);
818 if (crtc && (lvds & LVDS_PORT_EN)) {
819 mode_dev->panel_fixed_mode =
820 psb_intel_crtc_mode_get(dev, crtc);
821 if (mode_dev->panel_fixed_mode) {
822 mode_dev->panel_fixed_mode->type |=
823 DRM_MODE_TYPE_PREFERRED;
824 goto out; /* FIXME: check for quirks */
828 /* If we still don't have a mode after all that, give up. */
829 if (!mode_dev->panel_fixed_mode) {
830 dev_err(dev->dev, "Found no modes on the lvds, ignoring the LVDS\n");
831 goto failed_find;
835 * Blacklist machines with BIOSes that list an LVDS panel without
836 * actually having one.
838 out:
839 drm_sysfs_connector_add(connector);
840 return;
842 failed_find:
843 if (psb_intel_output->ddc_bus)
844 psb_intel_i2c_destroy(psb_intel_output->ddc_bus);
845 failed_ddc:
846 if (psb_intel_output->i2c_bus)
847 psb_intel_i2c_destroy(psb_intel_output->i2c_bus);
848 failed_blc_i2c:
849 drm_encoder_cleanup(encoder);
850 drm_connector_cleanup(connector);
851 kfree(connector);