drivers/staging/gma500/mrst_device.c

   1 /**************************************************************************
   2  * Copyright (c) 2011, Intel Corporation.
   3  * All Rights Reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  17  *
  18  **************************************************************************/
  19
  20 #include <linux/backlight.h>
  21 #include <drm/drmP.h>
  22 #include <drm/drm.h>
  23 #include "psb_drm.h"
  24 #include "psb_drv.h"
  25 #include "psb_reg.h"
  26 #include "psb_intel_reg.h"
  27 #include <asm/intel_scu_ipc.h>
  28 #include "mid_bios.h"
  29
  30 /* IPC message and command defines used to enable/disable mipi panel voltages */
  31 #define IPC_MSG_PANEL_ON_OFF    0xE9
  32 #define IPC_CMD_PANEL_ON        1
  33 #define IPC_CMD_PANEL_OFF       0
  34
  35 static int mrst_output_init(struct drm_device *dev)
  36 {
  37         struct drm_psb_private *dev_priv = dev->dev_private;
  38         if (dev_priv->iLVDS_enable) {
  39                 mrst_lvds_init(dev, &dev_priv->mode_dev);
  40                 return 0;
  41         }
  42         dev_err(dev->dev, "DSI is not supported\n");
  43         return -ENODEV;
  44 }
  45
  46 /*
  47  *      Provide the low level interfaces for the Moorestown backlight
  48  */
  49
  50 #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
  51
  52 #define MRST_BLC_MAX_PWM_REG_FREQ           0xFFFF
  53 #define BLC_PWM_PRECISION_FACTOR 100    /* 10000000 */
  54 #define BLC_PWM_FREQ_CALC_CONSTANT 32
  55 #define MHz 1000000
  56 #define BLC_ADJUSTMENT_MAX 100
  57
  58 static struct backlight_device *mrst_backlight_device;
  59 static int mrst_brightness;
  60
  61 static int mrst_set_brightness(struct backlight_device *bd)
  62 {
  63         struct drm_device *dev = bl_get_data(mrst_backlight_device);
  64         struct drm_psb_private *dev_priv = dev->dev_private;
  65         int level = bd->props.brightness;
  66         u32 blc_pwm_ctl;
  67         u32 max_pwm_blc;
  68
  69         /* Percentage 1-100% being valid */
  70         if (level < 1)
  71                 level = 1;
  72
  73         if (gma_power_begin(dev, 0)) {
  74                 /* Calculate and set the brightness value */
  75                 max_pwm_blc = REG_READ(BLC_PWM_CTL) >> 16;
  76                 blc_pwm_ctl = level * max_pwm_blc / 100;
  77
  78                 /* Adjust the backlight level with the percent in
  79                  * dev_priv->blc_adj1;
  80                  */
  81                 blc_pwm_ctl = blc_pwm_ctl * dev_priv->blc_adj1;
  82                 blc_pwm_ctl = blc_pwm_ctl / 100;
  83
  84                 /* Adjust the backlight level with the percent in
  85                  * dev_priv->blc_adj2;
  86                  */
  87                 blc_pwm_ctl = blc_pwm_ctl * dev_priv->blc_adj2;
  88                 blc_pwm_ctl = blc_pwm_ctl / 100;
  89
  90                 /* force PWM bit on */
  91                 REG_WRITE(BLC_PWM_CTL2, (0x80000000 | REG_READ(BLC_PWM_CTL2)));
  92                 REG_WRITE(BLC_PWM_CTL, (max_pwm_blc << 16) | blc_pwm_ctl);
  93                 gma_power_end(dev);
  94         }
  95         mrst_brightness = level;
  96         return 0;
  97 }
  98
  99 static int mrst_get_brightness(struct backlight_device *bd)
 100 {
 101         /* return locally cached var instead of HW read (due to DPST etc.) */
 102         /* FIXME: ideally return actual value in case firmware fiddled with
 103            it */
 104         return mrst_brightness;
 105 }
 106
 107 static int device_backlight_init(struct drm_device *dev)
 108 {
 109         struct drm_psb_private *dev_priv = dev->dev_private;
 110         unsigned long core_clock;
 111         u16 bl_max_freq;
 112         uint32_t value;
 113         uint32_t blc_pwm_precision_factor;
 114
 115         dev_priv->blc_adj1 = BLC_ADJUSTMENT_MAX;
 116         dev_priv->blc_adj2 = BLC_ADJUSTMENT_MAX;
 117         bl_max_freq = 256;
 118         /* this needs to be set elsewhere */
 119         blc_pwm_precision_factor = BLC_PWM_PRECISION_FACTOR;
 120
 121         core_clock = dev_priv->core_freq;
 122
 123         value = (core_clock * MHz) / BLC_PWM_FREQ_CALC_CONSTANT;
 124         value *= blc_pwm_precision_factor;
 125         value /= bl_max_freq;
 126         value /= blc_pwm_precision_factor;
 127
 128         if (gma_power_begin(dev, false)) {
 129                 if (value > (unsigned long long)MRST_BLC_MAX_PWM_REG_FREQ)
 130                                 return -ERANGE;
 131                 else {
 132                         REG_WRITE(BLC_PWM_CTL2,
 133                                         (0x80000000 | REG_READ(BLC_PWM_CTL2)));
 134                         REG_WRITE(BLC_PWM_CTL, value | (value << 16));
 135                 }
 136                 gma_power_end(dev);
 137         }
 138         return 0;
 139 }
 140
 141 static const struct backlight_ops mrst_ops = {
 142         .get_brightness = mrst_get_brightness,
 143         .update_status  = mrst_set_brightness,
 144 };
 145
 146 int mrst_backlight_init(struct drm_device *dev)
 147 {
 148         struct drm_psb_private *dev_priv = dev->dev_private;
 149         int ret;
 150         struct backlight_properties props;
 151
 152         memset(&props, 0, sizeof(struct backlight_properties));
 153         props.max_brightness = 100;
 154         props.type = BACKLIGHT_PLATFORM;
 155
 156         mrst_backlight_device = backlight_device_register("mrst-bl",
 157                                         NULL, (void *)dev, &mrst_ops, &props);
 158
 159         if (IS_ERR(mrst_backlight_device))
 160                 return PTR_ERR(mrst_backlight_device);
 161
 162         ret = device_backlight_init(dev);
 163         if (ret < 0) {
 164                 backlight_device_unregister(mrst_backlight_device);
 165                 return ret;
 166         }
 167         mrst_backlight_device->props.brightness = 100;
 168         mrst_backlight_device->props.max_brightness = 100;
 169         backlight_update_status(mrst_backlight_device);
 170         dev_priv->backlight_device = mrst_backlight_device;
 171         return 0;
 172 }
 173
 174 #endif
 175
 176 /*
 177  *      Provide the Moorestown specific chip logic and low level methods
 178  *      for power management
 179  */
 180
 181 static void mrst_init_pm(struct drm_device *dev)
 182 {
 183 }
 184
 185 /**
 186  *      mrst_save_display_registers     -       save registers lost on suspend
 187  *      @dev: our DRM device
 188  *
 189  *      Save the state we need in order to be able to restore the interface
 190  *      upon resume from suspend
 191  */
 192 static int mrst_save_display_registers(struct drm_device *dev)
 193 {
 194         struct drm_psb_private *dev_priv = dev->dev_private;
 195         struct drm_crtc *crtc;
 196         struct drm_connector *connector;
 197
 198         /* Display arbitration control + watermarks */
 199         dev_priv->saveDSPARB = PSB_RVDC32(DSPARB);
 200         dev_priv->saveDSPFW1 = PSB_RVDC32(DSPFW1);
 201         dev_priv->saveDSPFW2 = PSB_RVDC32(DSPFW2);
 202         dev_priv->saveDSPFW3 = PSB_RVDC32(DSPFW3);
 203         dev_priv->saveDSPFW4 = PSB_RVDC32(DSPFW4);
 204         dev_priv->saveDSPFW5 = PSB_RVDC32(DSPFW5);
 205         dev_priv->saveDSPFW6 = PSB_RVDC32(DSPFW6);
 206         dev_priv->saveCHICKENBIT = PSB_RVDC32(DSPCHICKENBIT);
 207
 208         /* Save crtc and output state */
 209         mutex_lock(&dev->mode_config.mutex);
 210         list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
 211                 if (drm_helper_crtc_in_use(crtc))
 212                         crtc->funcs->save(crtc);
 213         }
 214
 215         list_for_each_entry(connector, &dev->mode_config.connector_list, head)
 216                 connector->funcs->save(connector);
 217
 218         mutex_unlock(&dev->mode_config.mutex);
 219         return 0;
 220 }
 221
 222 /**
 223  *      mrst_restore_display_registers  -       restore lost register state
 224  *      @dev: our DRM device
 225  *
 226  *      Restore register state that was lost during suspend and resume.
 227  */
 228 static int mrst_restore_display_registers(struct drm_device *dev)
 229 {
 230         struct drm_psb_private *dev_priv = dev->dev_private;
 231         struct drm_crtc *crtc;
 232         struct drm_connector *connector;
 233         int pp_stat;
 234
 235         if (!dev_priv->iLVDS_enable) {
 236 #ifdef CONFIG_X86_MRST
 237                 intel_scu_ipc_simple_command(IPC_MSG_PANEL_ON_OFF,
 238                                                         IPC_CMD_PANEL_ON);
 239                 /* FIXME: can we avoid this delay ? */
 240                 msleep(2000); /* wait 2 seconds */
 241 #endif
 242         }
 243
 244         /* Display arbitration + watermarks */
 245         PSB_WVDC32(dev_priv->saveDSPARB, DSPARB);
 246         PSB_WVDC32(dev_priv->saveDSPFW1, DSPFW1);
 247         PSB_WVDC32(dev_priv->saveDSPFW2, DSPFW2);
 248         PSB_WVDC32(dev_priv->saveDSPFW3, DSPFW3);
 249         PSB_WVDC32(dev_priv->saveDSPFW4, DSPFW4);
 250         PSB_WVDC32(dev_priv->saveDSPFW5, DSPFW5);
 251         PSB_WVDC32(dev_priv->saveDSPFW6, DSPFW6);
 252         PSB_WVDC32(dev_priv->saveCHICKENBIT, DSPCHICKENBIT);
 253
 254         /*make sure VGA plane is off. it initializes to on after reset!*/
 255         PSB_WVDC32(0x80000000, VGACNTRL);
 256
 257         mutex_lock(&dev->mode_config.mutex);
 258         list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
 259                 if (drm_helper_crtc_in_use(crtc))
 260                         crtc->funcs->restore(crtc);
 261
 262         list_for_each_entry(connector, &dev->mode_config.connector_list, head)
 263                 connector->funcs->restore(connector);
 264
 265         mutex_unlock(&dev->mode_config.mutex);
 266
 267         if (dev_priv->iLVDS_enable) {
 268                 /*shutdown the panel*/
 269                 PSB_WVDC32(0, PP_CONTROL);
 270                 do {
 271                         pp_stat = PSB_RVDC32(PP_STATUS);
 272                 } while (pp_stat & 0x80000000);
 273
 274                 /* Turn off the plane */
 275                 PSB_WVDC32(0x58000000, DSPACNTR);
 276                 PSB_WVDC32(0, DSPASURF);/*trigger the plane disable*/
 277                 /* Wait ~4 ticks */
 278                 msleep(4);
 279                 /* Turn off pipe */
 280                 PSB_WVDC32(0x0, PIPEACONF);
 281                 /* Wait ~8 ticks */
 282                 msleep(8);
 283
 284                 /* Turn off PLLs */
 285                 PSB_WVDC32(0, MRST_DPLL_A);
 286         } else {
 287                 PSB_WVDC32(DPI_SHUT_DOWN, DPI_CONTROL_REG);
 288                 PSB_WVDC32(0x0, PIPEACONF);
 289                 PSB_WVDC32(0x2faf0000, BLC_PWM_CTL);
 290                 while (REG_READ(0x70008) & 0x40000000)
 291                         cpu_relax();
 292                 while ((PSB_RVDC32(GEN_FIFO_STAT_REG) & DPI_FIFO_EMPTY)
 293                         != DPI_FIFO_EMPTY)
 294                         cpu_relax();
 295                 PSB_WVDC32(0, DEVICE_READY_REG);
 296                 /* Turn off panel power */
 297 #ifdef CONFIG_X86_MRST  /* FIXME: kill define once modular */
 298                 intel_scu_ipc_simple_command(IPC_MSG_PANEL_ON_OFF,
 299                                                         IPC_CMD_PANEL_OFF);
 300 #endif
 301         }
 302         return 0;
 303 }
 304
 305 /**
 306  *      mrst_power_down -       power down the display island
 307  *      @dev: our DRM device
 308  *
 309  *      Power down the display interface of our device
 310  */
 311 static int mrst_power_down(struct drm_device *dev)
 312 {
 313         struct drm_psb_private *dev_priv = dev->dev_private;
 314         u32 pwr_mask ;
 315         u32 pwr_sts;
 316
 317         pwr_mask = PSB_PWRGT_DISPLAY_MASK;
 318         outl(pwr_mask, dev_priv->ospm_base + PSB_PM_SSC);
 319
 320         while (true) {
 321                 pwr_sts = inl(dev_priv->ospm_base + PSB_PM_SSS);
 322                 if ((pwr_sts & pwr_mask) == pwr_mask)
 323                         break;
 324                 else
 325                         udelay(10);
 326         }
 327         return 0;
 328 }
 329
 330 /*
 331  * mrst_power_up
 332  *
 333  * Restore power to the specified island(s) (powergating)
 334  */
 335 static int mrst_power_up(struct drm_device *dev)
 336 {
 337         struct drm_psb_private *dev_priv = dev->dev_private;
 338         u32 pwr_mask = PSB_PWRGT_DISPLAY_MASK;
 339         u32 pwr_sts, pwr_cnt;
 340
 341         pwr_cnt = inl(dev_priv->ospm_base + PSB_PM_SSC);
 342         pwr_cnt &= ~pwr_mask;
 343         outl(pwr_cnt, (dev_priv->ospm_base + PSB_PM_SSC));
 344
 345         while (true) {
 346                 pwr_sts = inl(dev_priv->ospm_base + PSB_PM_SSS);
 347                 if ((pwr_sts & pwr_mask) == 0)
 348                         break;
 349                 else
 350                         udelay(10);
 351         }
 352         return 0;
 353 }
 354
 355 const struct psb_ops mrst_chip_ops = {
 356         .name = "Moorestown",
 357         .accel_2d = 1,
 358         .pipes = 1,
 359         .sgx_offset = MRST_SGX_OFFSET,
 360
 361         .chip_setup = mid_chip_setup,
 362         .crtc_helper = &mrst_helper_funcs,
 363         .crtc_funcs = &psb_intel_crtc_funcs,
 364
 365         .output_init = mrst_output_init,
 366
 367 #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
 368         .backlight_init = mrst_backlight_init,
 369 #endif
 370
 371         .init_pm = mrst_init_pm,
 372         .save_regs = mrst_save_display_registers,
 373         .restore_regs = mrst_restore_display_registers,
 374         .power_down = mrst_power_down,
 375         .power_up = mrst_power_up,
 376 };
 377