drivers/watchdog/s3c2410_wdt.c

   1 /* linux/drivers/char/watchdog/s3c2410_wdt.c
   2  *
   3  * Copyright (c) 2004 Simtec Electronics
   4  *      Ben Dooks <ben@simtec.co.uk>
   5  *
   6  * S3C2410 Watchdog Timer Support
   7  *
   8  * Based on, softdog.c by Alan Cox,
   9  *     (c) Copyright 1996 Alan Cox <alan@lxorguk.ukuu.org.uk>
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License as published by
  13  * the Free Software Foundation; either version 2 of the License, or
  14  * (at your option) any later version.
  15  *
  16  * This program is distributed in the hope that it will be useful,
  17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  * GNU General Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  24 */
  25
  26 #include <linux/module.h>
  27 #include <linux/moduleparam.h>
  28 #include <linux/types.h>
  29 #include <linux/timer.h>
  30 #include <linux/miscdevice.h>
  31 #include <linux/watchdog.h>
  32 #include <linux/fs.h>
  33 #include <linux/init.h>
  34 #include <linux/platform_device.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/clk.h>
  37 #include <linux/uaccess.h>
  38 #include <linux/io.h>
  39 #include <linux/cpufreq.h>
  40
  41 #include <mach/map.h>
  42
  43 #undef S3C_VA_WATCHDOG
  44 #define S3C_VA_WATCHDOG (0)
  45
  46 #include <plat/regs-watchdog.h>
  47
  48 #define PFX "s3c2410-wdt: "
  49
  50 #define CONFIG_S3C2410_WATCHDOG_ATBOOT          (0)
  51 #define CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME    (15)
  52
  53 static int nowayout     = WATCHDOG_NOWAYOUT;
  54 static int tmr_margin   = CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME;
  55 static int tmr_atboot   = CONFIG_S3C2410_WATCHDOG_ATBOOT;
  56 static int soft_noboot;
  57 static int debug;
  58
  59 module_param(tmr_margin,  int, 0);
  60 module_param(tmr_atboot,  int, 0);
  61 module_param(nowayout,    int, 0);
  62 module_param(soft_noboot, int, 0);
  63 module_param(debug,       int, 0);
  64
  65 MODULE_PARM_DESC(tmr_margin, "Watchdog tmr_margin in seconds. default="
  66                 __MODULE_STRING(CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME) ")");
  67 MODULE_PARM_DESC(tmr_atboot,
  68                 "Watchdog is started at boot time if set to 1, default="
  69                         __MODULE_STRING(CONFIG_S3C2410_WATCHDOG_ATBOOT));
  70 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
  71                         __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  72 MODULE_PARM_DESC(soft_noboot, "Watchdog action, set to 1 to ignore reboots, "
  73                         "0 to reboot (default depends on ONLY_TESTING)");
  74 MODULE_PARM_DESC(debug, "Watchdog debug, set to >1 for debug, (default 0)");
  75
  76 static unsigned long open_lock;
  77 static struct device    *wdt_dev;       /* platform device attached to */
  78 static struct resource  *wdt_mem;
  79 static struct resource  *wdt_irq;
  80 static struct clk       *wdt_clock;
  81 static void __iomem     *wdt_base;
  82 static unsigned int      wdt_count;
  83 static char              expect_close;
  84 static DEFINE_SPINLOCK(wdt_lock);
  85
  86 /* watchdog control routines */
  87
  88 #define DBG(msg...) do { \
  89         if (debug) \
  90                 printk(KERN_INFO msg); \
  91         } while (0)
  92
  93 /* functions */
  94
  95 static void s3c2410wdt_keepalive(void)
  96 {
  97         spin_lock(&wdt_lock);
  98         writel(wdt_count, wdt_base + S3C2410_WTCNT);
  99         spin_unlock(&wdt_lock);
 100 }
 101
 102 static void __s3c2410wdt_stop(void)
 103 {
 104         unsigned long wtcon;
 105
 106         wtcon = readl(wdt_base + S3C2410_WTCON);
 107         wtcon &= ~(S3C2410_WTCON_ENABLE | S3C2410_WTCON_RSTEN);
 108         writel(wtcon, wdt_base + S3C2410_WTCON);
 109 }
 110
 111 static void s3c2410wdt_stop(void)
 112 {
 113         spin_lock(&wdt_lock);
 114         __s3c2410wdt_stop();
 115         spin_unlock(&wdt_lock);
 116 }
 117
 118 static void s3c2410wdt_start(void)
 119 {
 120         unsigned long wtcon;
 121
 122         spin_lock(&wdt_lock);
 123
 124         __s3c2410wdt_stop();
 125
 126         wtcon = readl(wdt_base + S3C2410_WTCON);
 127         wtcon |= S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV128;
 128
 129         if (soft_noboot) {
 130                 wtcon |= S3C2410_WTCON_INTEN;
 131                 wtcon &= ~S3C2410_WTCON_RSTEN;
 132         } else {
 133                 wtcon &= ~S3C2410_WTCON_INTEN;
 134                 wtcon |= S3C2410_WTCON_RSTEN;
 135         }
 136
 137         DBG("%s: wdt_count=0x%08x, wtcon=%08lx\n",
 138             __func__, wdt_count, wtcon);
 139
 140         writel(wdt_count, wdt_base + S3C2410_WTDAT);
 141         writel(wdt_count, wdt_base + S3C2410_WTCNT);
 142         writel(wtcon, wdt_base + S3C2410_WTCON);
 143         spin_unlock(&wdt_lock);
 144 }
 145
 146 static inline int s3c2410wdt_is_running(void)
 147 {
 148         return readl(wdt_base + S3C2410_WTCON) & S3C2410_WTCON_ENABLE;
 149 }
 150
 151 static int s3c2410wdt_set_heartbeat(int timeout)
 152 {
 153         unsigned long freq = clk_get_rate(wdt_clock);
 154         unsigned int count;
 155         unsigned int divisor = 1;
 156         unsigned long wtcon;
 157
 158         if (timeout < 1)
 159                 return -EINVAL;
 160
 161         freq /= 128;
 162         count = timeout * freq;
 163
 164         DBG("%s: count=%d, timeout=%d, freq=%lu\n",
 165             __func__, count, timeout, freq);
 166
 167         /* if the count is bigger than the watchdog register,
 168            then work out what we need to do (and if) we can
 169            actually make this value
 170         */
 171
 172         if (count >= 0x10000) {
 173                 for (divisor = 1; divisor <= 0x100; divisor++) {
 174                         if ((count / divisor) < 0x10000)
 175                                 break;
 176                 }
 177
 178                 if ((count / divisor) >= 0x10000) {
 179                         dev_err(wdt_dev, "timeout %d too big\n", timeout);
 180                         return -EINVAL;
 181                 }
 182         }
 183
 184         tmr_margin = timeout;
 185
 186         DBG("%s: timeout=%d, divisor=%d, count=%d (%08x)\n",
 187             __func__, timeout, divisor, count, count/divisor);
 188
 189         count /= divisor;
 190         wdt_count = count;
 191
 192         /* update the pre-scaler */
 193         wtcon = readl(wdt_base + S3C2410_WTCON);
 194         wtcon &= ~S3C2410_WTCON_PRESCALE_MASK;
 195         wtcon |= S3C2410_WTCON_PRESCALE(divisor-1);
 196
 197         writel(count, wdt_base + S3C2410_WTDAT);
 198         writel(wtcon, wdt_base + S3C2410_WTCON);
 199
 200         return 0;
 201 }
 202
 203 /*
 204  *      /dev/watchdog handling
 205  */
 206
 207 static int s3c2410wdt_open(struct inode *inode, struct file *file)
 208 {
 209         if (test_and_set_bit(0, &open_lock))
 210                 return -EBUSY;
 211
 212         if (nowayout)
 213                 __module_get(THIS_MODULE);
 214
 215         expect_close = 0;
 216
 217         /* start the timer */
 218         s3c2410wdt_start();
 219         return nonseekable_open(inode, file);
 220 }
 221
 222 static int s3c2410wdt_release(struct inode *inode, struct file *file)
 223 {
 224         /*
 225          *      Shut off the timer.
 226          *      Lock it in if it's a module and we set nowayout
 227          */
 228
 229         if (expect_close == 42)
 230                 s3c2410wdt_stop();
 231         else {
 232                 dev_err(wdt_dev, "Unexpected close, not stopping watchdog\n");
 233                 s3c2410wdt_keepalive();
 234         }
 235         expect_close = 0;
 236         clear_bit(0, &open_lock);
 237         return 0;
 238 }
 239
 240 static ssize_t s3c2410wdt_write(struct file *file, const char __user *data,
 241                                 size_t len, loff_t *ppos)
 242 {
 243         /*
 244          *      Refresh the timer.
 245          */
 246         if (len) {
 247                 if (!nowayout) {
 248                         size_t i;
 249
 250                         /* In case it was set long ago */
 251                         expect_close = 0;
 252
 253                         for (i = 0; i != len; i++) {
 254                                 char c;
 255
 256                                 if (get_user(c, data + i))
 257                                         return -EFAULT;
 258                                 if (c == 'V')
 259                                         expect_close = 42;
 260                         }
 261                 }
 262                 s3c2410wdt_keepalive();
 263         }
 264         return len;
 265 }
 266
 267 #define OPTIONS (WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE)
 268
 269 static const struct watchdog_info s3c2410_wdt_ident = {
 270         .options          =     OPTIONS,
 271         .firmware_version =     0,
 272         .identity         =     "S3C2410 Watchdog",
 273 };
 274
 275
 276 static long s3c2410wdt_ioctl(struct file *file, unsigned int cmd,
 277                                                         unsigned long arg)
 278 {
 279         void __user *argp = (void __user *)arg;
 280         int __user *p = argp;
 281         int new_margin;
 282
 283         switch (cmd) {
 284         case WDIOC_GETSUPPORT:
 285                 return copy_to_user(argp, &s3c2410_wdt_ident,
 286                         sizeof(s3c2410_wdt_ident)) ? -EFAULT : 0;
 287         case WDIOC_GETSTATUS:
 288         case WDIOC_GETBOOTSTATUS:
 289                 return put_user(0, p);
 290         case WDIOC_KEEPALIVE:
 291                 s3c2410wdt_keepalive();
 292                 return 0;
 293         case WDIOC_SETTIMEOUT:
 294                 if (get_user(new_margin, p))
 295                         return -EFAULT;
 296                 if (s3c2410wdt_set_heartbeat(new_margin))
 297                         return -EINVAL;
 298                 s3c2410wdt_keepalive();
 299                 return put_user(tmr_margin, p);
 300         case WDIOC_GETTIMEOUT:
 301                 return put_user(tmr_margin, p);
 302         default:
 303                 return -ENOTTY;
 304         }
 305 }
 306
 307 /* kernel interface */
 308
 309 static const struct file_operations s3c2410wdt_fops = {
 310         .owner          = THIS_MODULE,
 311         .llseek         = no_llseek,
 312         .write          = s3c2410wdt_write,
 313         .unlocked_ioctl = s3c2410wdt_ioctl,
 314         .open           = s3c2410wdt_open,
 315         .release        = s3c2410wdt_release,
 316 };
 317
 318 static struct miscdevice s3c2410wdt_miscdev = {
 319         .minor          = WATCHDOG_MINOR,
 320         .name           = "watchdog",
 321         .fops           = &s3c2410wdt_fops,
 322 };
 323
 324 /* interrupt handler code */
 325
 326 static irqreturn_t s3c2410wdt_irq(int irqno, void *param)
 327 {
 328         dev_info(wdt_dev, "watchdog timer expired (irq)\n");
 329
 330         s3c2410wdt_keepalive();
 331         return IRQ_HANDLED;
 332 }
 333
 334
 335 #ifdef CONFIG_CPU_FREQ
 336
 337 static int s3c2410wdt_cpufreq_transition(struct notifier_block *nb,
 338                                           unsigned long val, void *data)
 339 {
 340         int ret;
 341
 342         if (!s3c2410wdt_is_running())
 343                 goto done;
 344
 345         if (val == CPUFREQ_PRECHANGE) {
 346                 /* To ensure that over the change we don't cause the
 347                  * watchdog to trigger, we perform an keep-alive if
 348                  * the watchdog is running.
 349                  */
 350
 351                 s3c2410wdt_keepalive();
 352         } else if (val == CPUFREQ_POSTCHANGE) {
 353                 s3c2410wdt_stop();
 354
 355                 ret = s3c2410wdt_set_heartbeat(tmr_margin);
 356
 357                 if (ret >= 0)
 358                         s3c2410wdt_start();
 359                 else
 360                         goto err;
 361         }
 362
 363 done:
 364         return 0;
 365
 366  err:
 367         dev_err(wdt_dev, "cannot set new value for timeout %d\n", tmr_margin);
 368         return ret;
 369 }
 370
 371 static struct notifier_block s3c2410wdt_cpufreq_transition_nb = {
 372         .notifier_call  = s3c2410wdt_cpufreq_transition,
 373 };
 374
 375 static inline int s3c2410wdt_cpufreq_register(void)
 376 {
 377         return cpufreq_register_notifier(&s3c2410wdt_cpufreq_transition_nb,
 378                                          CPUFREQ_TRANSITION_NOTIFIER);
 379 }
 380
 381 static inline void s3c2410wdt_cpufreq_deregister(void)
 382 {
 383         cpufreq_unregister_notifier(&s3c2410wdt_cpufreq_transition_nb,
 384                                     CPUFREQ_TRANSITION_NOTIFIER);
 385 }
 386
 387 #else
 388 static inline int s3c2410wdt_cpufreq_register(void)
 389 {
 390         return 0;
 391 }
 392
 393 static inline void s3c2410wdt_cpufreq_deregister(void)
 394 {
 395 }
 396 #endif
 397
 398
 399
 400 /* device interface */
 401
 402 static int __devinit s3c2410wdt_probe(struct platform_device *pdev)
 403 {
 404         struct resource *res;
 405         struct device *dev;
 406         unsigned int wtcon;
 407         int started = 0;
 408         int ret;
 409         int size;
 410
 411         DBG("%s: probe=%p\n", __func__, pdev);
 412
 413         dev = &pdev->dev;
 414         wdt_dev = &pdev->dev;
 415
 416         /* get the memory region for the watchdog timer */
 417
 418         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 419         if (res == NULL) {
 420                 dev_err(dev, "no memory resource specified\n");
 421                 return -ENOENT;
 422         }
 423
 424         size = resource_size(res);
 425         wdt_mem = request_mem_region(res->start, size, pdev->name);
 426         if (wdt_mem == NULL) {
 427                 dev_err(dev, "failed to get memory region\n");
 428                 ret = -ENOENT;
 429                 goto err_req;
 430         }
 431
 432         wdt_base = ioremap(res->start, size);
 433         if (wdt_base == NULL) {
 434                 dev_err(dev, "failed to ioremap() region\n");
 435                 ret = -EINVAL;
 436                 goto err_req;
 437         }
 438
 439         DBG("probe: mapped wdt_base=%p\n", wdt_base);
 440
 441         wdt_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
 442         if (wdt_irq == NULL) {
 443                 dev_err(dev, "no irq resource specified\n");
 444                 ret = -ENOENT;
 445                 goto err_map;
 446         }
 447
 448         ret = request_irq(wdt_irq->start, s3c2410wdt_irq, 0, pdev->name, pdev);
 449         if (ret != 0) {
 450                 dev_err(dev, "failed to install irq (%d)\n", ret);
 451                 goto err_map;
 452         }
 453
 454         wdt_clock = clk_get(&pdev->dev, "watchdog");
 455         if (IS_ERR(wdt_clock)) {
 456                 dev_err(dev, "failed to find watchdog clock source\n");
 457                 ret = PTR_ERR(wdt_clock);
 458                 goto err_irq;
 459         }
 460
 461         clk_enable(wdt_clock);
 462
 463         if (s3c2410wdt_cpufreq_register() < 0) {
 464                 printk(KERN_ERR PFX "failed to register cpufreq\n");
 465                 goto err_clk;
 466         }
 467
 468         /* see if we can actually set the requested timer margin, and if
 469          * not, try the default value */
 470
 471         if (s3c2410wdt_set_heartbeat(tmr_margin)) {
 472                 started = s3c2410wdt_set_heartbeat(
 473                                         CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME);
 474
 475                 if (started == 0)
 476                         dev_info(dev,
 477                            "tmr_margin value out of range, default %d used\n",
 478                                CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME);
 479                 else
 480                         dev_info(dev, "default timer value is out of range, "
 481                                                         "cannot start\n");
 482         }
 483
 484         ret = misc_register(&s3c2410wdt_miscdev);
 485         if (ret) {
 486                 dev_err(dev, "cannot register miscdev on minor=%d (%d)\n",
 487                         WATCHDOG_MINOR, ret);
 488                 goto err_cpufreq;
 489         }
 490
 491         if (tmr_atboot && started == 0) {
 492                 dev_info(dev, "starting watchdog timer\n");
 493                 s3c2410wdt_start();
 494         } else if (!tmr_atboot) {
 495                 /* if we're not enabling the watchdog, then ensure it is
 496                  * disabled if it has been left running from the bootloader
 497                  * or other source */
 498
 499                 s3c2410wdt_stop();
 500         }
 501
 502         /* print out a statement of readiness */
 503
 504         wtcon = readl(wdt_base + S3C2410_WTCON);
 505
 506         dev_info(dev, "watchdog %sactive, reset %sabled, irq %sabled\n",
 507                  (wtcon & S3C2410_WTCON_ENABLE) ?  "" : "in",
 508                  (wtcon & S3C2410_WTCON_RSTEN) ? "" : "dis",
 509                  (wtcon & S3C2410_WTCON_INTEN) ? "" : "en");
 510
 511         return 0;
 512
 513  err_cpufreq:
 514         s3c2410wdt_cpufreq_deregister();
 515
 516  err_clk:
 517         clk_disable(wdt_clock);
 518         clk_put(wdt_clock);
 519
 520  err_irq:
 521         free_irq(wdt_irq->start, pdev);
 522
 523  err_map:
 524         iounmap(wdt_base);
 525
 526  err_req:
 527         release_resource(wdt_mem);
 528         kfree(wdt_mem);
 529
 530         return ret;
 531 }
 532
 533 static int __devexit s3c2410wdt_remove(struct platform_device *dev)
 534 {
 535         s3c2410wdt_cpufreq_deregister();
 536
 537         release_resource(wdt_mem);
 538         kfree(wdt_mem);
 539         wdt_mem = NULL;
 540
 541         free_irq(wdt_irq->start, dev);
 542         wdt_irq = NULL;
 543
 544         clk_disable(wdt_clock);
 545         clk_put(wdt_clock);
 546         wdt_clock = NULL;
 547
 548         iounmap(wdt_base);
 549         misc_deregister(&s3c2410wdt_miscdev);
 550         return 0;
 551 }
 552
 553 static void s3c2410wdt_shutdown(struct platform_device *dev)
 554 {
 555         s3c2410wdt_stop();
 556 }
 557
 558 #ifdef CONFIG_PM
 559
 560 static unsigned long wtcon_save;
 561 static unsigned long wtdat_save;
 562
 563 static int s3c2410wdt_suspend(struct platform_device *dev, pm_message_t state)
 564 {
 565         /* Save watchdog state, and turn it off. */
 566         wtcon_save = readl(wdt_base + S3C2410_WTCON);
 567         wtdat_save = readl(wdt_base + S3C2410_WTDAT);
 568
 569         /* Note that WTCNT doesn't need to be saved. */
 570         s3c2410wdt_stop();
 571
 572         return 0;
 573 }
 574
 575 static int s3c2410wdt_resume(struct platform_device *dev)
 576 {
 577         /* Restore watchdog state. */
 578
 579         writel(wtdat_save, wdt_base + S3C2410_WTDAT);
 580         writel(wtdat_save, wdt_base + S3C2410_WTCNT); /* Reset count */
 581         writel(wtcon_save, wdt_base + S3C2410_WTCON);
 582
 583         printk(KERN_INFO PFX "watchdog %sabled\n",
 584                (wtcon_save & S3C2410_WTCON_ENABLE) ? "en" : "dis");
 585
 586         return 0;
 587 }
 588
 589 #else
 590 #define s3c2410wdt_suspend NULL
 591 #define s3c2410wdt_resume  NULL
 592 #endif /* CONFIG_PM */
 593
 594
 595 static struct platform_driver s3c2410wdt_driver = {
 596         .probe          = s3c2410wdt_probe,
 597         .remove         = __devexit_p(s3c2410wdt_remove),
 598         .shutdown       = s3c2410wdt_shutdown,
 599         .suspend        = s3c2410wdt_suspend,
 600         .resume         = s3c2410wdt_resume,
 601         .driver         = {
 602                 .owner  = THIS_MODULE,
 603                 .name   = "s3c2410-wdt",
 604         },
 605 };
 606
 607
 608 static char banner[] __initdata =
 609         KERN_INFO "S3C2410 Watchdog Timer, (c) 2004 Simtec Electronics\n";
 610
 611 static int __init watchdog_init(void)
 612 {
 613         printk(banner);
 614         return platform_driver_register(&s3c2410wdt_driver);
 615 }
 616
 617 static void __exit watchdog_exit(void)
 618 {
 619         platform_driver_unregister(&s3c2410wdt_driver);
 620 }
 621
 622 module_init(watchdog_init);
 623 module_exit(watchdog_exit);
 624
 625 MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>, "
 626               "Dimitry Andric <dimitry.andric@tomtom.com>");
 627 MODULE_DESCRIPTION("S3C2410 Watchdog Device Driver");
 628 MODULE_LICENSE("GPL");
 629 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
 630 MODULE_ALIAS("platform:s3c2410-wdt");