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KVM: PPC: Convert MSR to shared page
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / powerpc / kvm / book3s_emulate.c
blob35d3c16b293849a7aaf3ba7399399c0055d9e6d2
1 /*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
14 *
15 * Copyright SUSE Linux Products GmbH 2009
16 *
17 * Authors: Alexander Graf <agraf@suse.de>
18 */
19
20 #include <asm/kvm_ppc.h>
21 #include <asm/disassemble.h>
22 #include <asm/kvm_book3s.h>
23 #include <asm/reg.h>
24
25 #define OP_19_XOP_RFID 18
26 #define OP_19_XOP_RFI 50
27
28 #define OP_31_XOP_MFMSR 83
29 #define OP_31_XOP_MTMSR 146
30 #define OP_31_XOP_MTMSRD 178
31 #define OP_31_XOP_MTSR 210
32 #define OP_31_XOP_MTSRIN 242
33 #define OP_31_XOP_TLBIEL 274
34 #define OP_31_XOP_TLBIE 306
35 #define OP_31_XOP_SLBMTE 402
36 #define OP_31_XOP_SLBIE 434
37 #define OP_31_XOP_SLBIA 498
38 #define OP_31_XOP_MFSR 595
39 #define OP_31_XOP_MFSRIN 659
40 #define OP_31_XOP_DCBA 758
41 #define OP_31_XOP_SLBMFEV 851
42 #define OP_31_XOP_EIOIO 854
43 #define OP_31_XOP_SLBMFEE 915
44
45 /* DCBZ is actually 1014, but we patch it to 1010 so we get a trap */
46 #define OP_31_XOP_DCBZ 1010
47
48 #define OP_LFS 48
49 #define OP_LFD 50
50 #define OP_STFS 52
51 #define OP_STFD 54
52
53 #define SPRN_GQR0 912
54 #define SPRN_GQR1 913
55 #define SPRN_GQR2 914
56 #define SPRN_GQR3 915
57 #define SPRN_GQR4 916
58 #define SPRN_GQR5 917
59 #define SPRN_GQR6 918
60 #define SPRN_GQR7 919
61
62 /* Book3S_32 defines mfsrin(v) - but that messes up our abstract
63 * function pointers, so let's just disable the define. */
64 #undef mfsrin
65
66 int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
67 unsigned int inst, int *advance)
68 {
69 int emulated = EMULATE_DONE;
70
71 switch (get_op(inst)) {
72 case 19:
73 switch (get_xop(inst)) {
74 case OP_19_XOP_RFID:
75 case OP_19_XOP_RFI:
76 kvmppc_set_pc(vcpu, vcpu->arch.srr0);
77 kvmppc_set_msr(vcpu, vcpu->arch.srr1);
78 *advance = 0;
79 break;
80
81 default:
82 emulated = EMULATE_FAIL;
83 break;
84 }
85 break;
86 case 31:
87 switch (get_xop(inst)) {
88 case OP_31_XOP_MFMSR:
89 kvmppc_set_gpr(vcpu, get_rt(inst),
90 vcpu->arch.shared->msr);
91 break;
92 case OP_31_XOP_MTMSRD:
93 {
94 ulong rs = kvmppc_get_gpr(vcpu, get_rs(inst));
95 if (inst & 0x10000) {
96 vcpu->arch.shared->msr &= ~(MSR_RI | MSR_EE);
97 vcpu->arch.shared->msr |= rs & (MSR_RI | MSR_EE);
98 } else
99 kvmppc_set_msr(vcpu, rs);
100 break;
101 }
102 case OP_31_XOP_MTMSR:
103 kvmppc_set_msr(vcpu, kvmppc_get_gpr(vcpu, get_rs(inst)));
104 break;
105 case OP_31_XOP_MFSR:
106 {
107 int srnum;
108
109 srnum = kvmppc_get_field(inst, 12 + 32, 15 + 32);
110 if (vcpu->arch.mmu.mfsrin) {
111 u32 sr;
112 sr = vcpu->arch.mmu.mfsrin(vcpu, srnum);
113 kvmppc_set_gpr(vcpu, get_rt(inst), sr);
114 }
115 break;
116 }
117 case OP_31_XOP_MFSRIN:
118 {
119 int srnum;
120
121 srnum = (kvmppc_get_gpr(vcpu, get_rb(inst)) >> 28) & 0xf;
122 if (vcpu->arch.mmu.mfsrin) {
123 u32 sr;
124 sr = vcpu->arch.mmu.mfsrin(vcpu, srnum);
125 kvmppc_set_gpr(vcpu, get_rt(inst), sr);
126 }
127 break;
128 }
129 case OP_31_XOP_MTSR:
130 vcpu->arch.mmu.mtsrin(vcpu,
131 (inst >> 16) & 0xf,
132 kvmppc_get_gpr(vcpu, get_rs(inst)));
133 break;
134 case OP_31_XOP_MTSRIN:
135 vcpu->arch.mmu.mtsrin(vcpu,
136 (kvmppc_get_gpr(vcpu, get_rb(inst)) >> 28) & 0xf,
137 kvmppc_get_gpr(vcpu, get_rs(inst)));
138 break;
139 case OP_31_XOP_TLBIE:
140 case OP_31_XOP_TLBIEL:
141 {
142 bool large = (inst & 0x00200000) ? true : false;
143 ulong addr = kvmppc_get_gpr(vcpu, get_rb(inst));
144 vcpu->arch.mmu.tlbie(vcpu, addr, large);
145 break;
146 }
147 case OP_31_XOP_EIOIO:
148 break;
149 case OP_31_XOP_SLBMTE:
150 if (!vcpu->arch.mmu.slbmte)
151 return EMULATE_FAIL;
152
153 vcpu->arch.mmu.slbmte(vcpu,
154 kvmppc_get_gpr(vcpu, get_rs(inst)),
155 kvmppc_get_gpr(vcpu, get_rb(inst)));
156 break;
157 case OP_31_XOP_SLBIE:
158 if (!vcpu->arch.mmu.slbie)
159 return EMULATE_FAIL;
160
161 vcpu->arch.mmu.slbie(vcpu,
162 kvmppc_get_gpr(vcpu, get_rb(inst)));
163 break;
164 case OP_31_XOP_SLBIA:
165 if (!vcpu->arch.mmu.slbia)
166 return EMULATE_FAIL;
167
168 vcpu->arch.mmu.slbia(vcpu);
169 break;
170 case OP_31_XOP_SLBMFEE:
171 if (!vcpu->arch.mmu.slbmfee) {
172 emulated = EMULATE_FAIL;
173 } else {
174 ulong t, rb;
175
176 rb = kvmppc_get_gpr(vcpu, get_rb(inst));
177 t = vcpu->arch.mmu.slbmfee(vcpu, rb);
178 kvmppc_set_gpr(vcpu, get_rt(inst), t);
179 }
180 break;
181 case OP_31_XOP_SLBMFEV:
182 if (!vcpu->arch.mmu.slbmfev) {
183 emulated = EMULATE_FAIL;
184 } else {
185 ulong t, rb;
186
187 rb = kvmppc_get_gpr(vcpu, get_rb(inst));
188 t = vcpu->arch.mmu.slbmfev(vcpu, rb);
189 kvmppc_set_gpr(vcpu, get_rt(inst), t);
190 }
191 break;
192 case OP_31_XOP_DCBA:
193 /* Gets treated as NOP */
194 break;
195 case OP_31_XOP_DCBZ:
196 {
197 ulong rb = kvmppc_get_gpr(vcpu, get_rb(inst));
198 ulong ra = 0;
199 ulong addr, vaddr;
200 u32 zeros[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
201 u32 dsisr;
202 int r;
203
204 if (get_ra(inst))
205 ra = kvmppc_get_gpr(vcpu, get_ra(inst));
206
207 addr = (ra + rb) & ~31ULL;
208 if (!(vcpu->arch.shared->msr & MSR_SF))
209 addr &= 0xffffffff;
210 vaddr = addr;
211
212 r = kvmppc_st(vcpu, &addr, 32, zeros, true);
213 if ((r == -ENOENT) || (r == -EPERM)) {
214 *advance = 0;
215 vcpu->arch.dear = vaddr;
216 to_svcpu(vcpu)->fault_dar = vaddr;
217
218 dsisr = DSISR_ISSTORE;
219 if (r == -ENOENT)
220 dsisr |= DSISR_NOHPTE;
221 else if (r == -EPERM)
222 dsisr |= DSISR_PROTFAULT;
223
224 to_book3s(vcpu)->dsisr = dsisr;
225 to_svcpu(vcpu)->fault_dsisr = dsisr;
226
227 kvmppc_book3s_queue_irqprio(vcpu,
228 BOOK3S_INTERRUPT_DATA_STORAGE);
229 }
230
231 break;
232 }
233 default:
234 emulated = EMULATE_FAIL;
235 }
236 break;
237 default:
238 emulated = EMULATE_FAIL;
239 }
240
241 if (emulated == EMULATE_FAIL)
242 emulated = kvmppc_emulate_paired_single(run, vcpu);
243
244 return emulated;
245 }
246
247 void kvmppc_set_bat(struct kvm_vcpu *vcpu, struct kvmppc_bat *bat, bool upper,
248 u32 val)
249 {
250 if (upper) {
251 /* Upper BAT */
252 u32 bl = (val >> 2) & 0x7ff;
253 bat->bepi_mask = (~bl << 17);
254 bat->bepi = val & 0xfffe0000;
255 bat->vs = (val & 2) ? 1 : 0;
256 bat->vp = (val & 1) ? 1 : 0;
257 bat->raw = (bat->raw & 0xffffffff00000000ULL) | val;
258 } else {
259 /* Lower BAT */
260 bat->brpn = val & 0xfffe0000;
261 bat->wimg = (val >> 3) & 0xf;
262 bat->pp = val & 3;
263 bat->raw = (bat->raw & 0x00000000ffffffffULL) | ((u64)val << 32);
264 }
265 }
266
267 static u32 kvmppc_read_bat(struct kvm_vcpu *vcpu, int sprn)
268 {
269 struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
270 struct kvmppc_bat *bat;
271
272 switch (sprn) {
273 case SPRN_IBAT0U ... SPRN_IBAT3L:
274 bat = &vcpu_book3s->ibat[(sprn - SPRN_IBAT0U) / 2];
275 break;
276 case SPRN_IBAT4U ... SPRN_IBAT7L:
277 bat = &vcpu_book3s->ibat[4 + ((sprn - SPRN_IBAT4U) / 2)];
278 break;
279 case SPRN_DBAT0U ... SPRN_DBAT3L:
280 bat = &vcpu_book3s->dbat[(sprn - SPRN_DBAT0U) / 2];
281 break;
282 case SPRN_DBAT4U ... SPRN_DBAT7L:
283 bat = &vcpu_book3s->dbat[4 + ((sprn - SPRN_DBAT4U) / 2)];
284 break;
285 default:
286 BUG();
287 }
288
289 if (sprn % 2)
290 return bat->raw >> 32;
291 else
292 return bat->raw;
293 }
294
295 static void kvmppc_write_bat(struct kvm_vcpu *vcpu, int sprn, u32 val)
296 {
297 struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
298 struct kvmppc_bat *bat;
299
300 switch (sprn) {
301 case SPRN_IBAT0U ... SPRN_IBAT3L:
302 bat = &vcpu_book3s->ibat[(sprn - SPRN_IBAT0U) / 2];
303 break;
304 case SPRN_IBAT4U ... SPRN_IBAT7L:
305 bat = &vcpu_book3s->ibat[4 + ((sprn - SPRN_IBAT4U) / 2)];
306 break;
307 case SPRN_DBAT0U ... SPRN_DBAT3L:
308 bat = &vcpu_book3s->dbat[(sprn - SPRN_DBAT0U) / 2];
309 break;
310 case SPRN_DBAT4U ... SPRN_DBAT7L:
311 bat = &vcpu_book3s->dbat[4 + ((sprn - SPRN_DBAT4U) / 2)];
312 break;
313 default:
314 BUG();
315 }
316
317 kvmppc_set_bat(vcpu, bat, !(sprn % 2), val);
318 }
319
320 int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
321 {
322 int emulated = EMULATE_DONE;
323 ulong spr_val = kvmppc_get_gpr(vcpu, rs);
324
325 switch (sprn) {
326 case SPRN_SDR1:
327 to_book3s(vcpu)->sdr1 = spr_val;
328 break;
329 case SPRN_DSISR:
330 to_book3s(vcpu)->dsisr = spr_val;
331 break;
332 case SPRN_DAR:
333 vcpu->arch.dear = spr_val;
334 break;
335 case SPRN_HIOR:
336 to_book3s(vcpu)->hior = spr_val;
337 break;
338 case SPRN_IBAT0U ... SPRN_IBAT3L:
339 case SPRN_IBAT4U ... SPRN_IBAT7L:
340 case SPRN_DBAT0U ... SPRN_DBAT3L:
341 case SPRN_DBAT4U ... SPRN_DBAT7L:
342 kvmppc_write_bat(vcpu, sprn, (u32)spr_val);
343 /* BAT writes happen so rarely that we're ok to flush
344 * everything here */
345 kvmppc_mmu_pte_flush(vcpu, 0, 0);
346 kvmppc_mmu_flush_segments(vcpu);
347 break;
348 case SPRN_HID0:
349 to_book3s(vcpu)->hid[0] = spr_val;
350 break;
351 case SPRN_HID1:
352 to_book3s(vcpu)->hid[1] = spr_val;
353 break;
354 case SPRN_HID2:
355 to_book3s(vcpu)->hid[2] = spr_val;
356 break;
357 case SPRN_HID2_GEKKO:
358 to_book3s(vcpu)->hid[2] = spr_val;
359 /* HID2.PSE controls paired single on gekko */
360 switch (vcpu->arch.pvr) {
361 case 0x00080200: /* lonestar 2.0 */
362 case 0x00088202: /* lonestar 2.2 */
363 case 0x70000100: /* gekko 1.0 */
364 case 0x00080100: /* gekko 2.0 */
365 case 0x00083203: /* gekko 2.3a */
366 case 0x00083213: /* gekko 2.3b */
367 case 0x00083204: /* gekko 2.4 */
368 case 0x00083214: /* gekko 2.4e (8SE) - retail HW2 */
369 case 0x00087200: /* broadway */
370 if (vcpu->arch.hflags & BOOK3S_HFLAG_NATIVE_PS) {
371 /* Native paired singles */
372 } else if (spr_val & (1 << 29)) { /* HID2.PSE */
373 vcpu->arch.hflags |= BOOK3S_HFLAG_PAIRED_SINGLE;
374 kvmppc_giveup_ext(vcpu, MSR_FP);
375 } else {
376 vcpu->arch.hflags &= ~BOOK3S_HFLAG_PAIRED_SINGLE;
377 }
378 break;
379 }
380 break;
381 case SPRN_HID4:
382 case SPRN_HID4_GEKKO:
383 to_book3s(vcpu)->hid[4] = spr_val;
384 break;
385 case SPRN_HID5:
386 to_book3s(vcpu)->hid[5] = spr_val;
387 /* guest HID5 set can change is_dcbz32 */
388 if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
389 (mfmsr() & MSR_HV))
390 vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32;
391 break;
392 case SPRN_GQR0:
393 case SPRN_GQR1:
394 case SPRN_GQR2:
395 case SPRN_GQR3:
396 case SPRN_GQR4:
397 case SPRN_GQR5:
398 case SPRN_GQR6:
399 case SPRN_GQR7:
400 to_book3s(vcpu)->gqr[sprn - SPRN_GQR0] = spr_val;
401 break;
402 case SPRN_ICTC:
403 case SPRN_THRM1:
404 case SPRN_THRM2:
405 case SPRN_THRM3:
406 case SPRN_CTRLF:
407 case SPRN_CTRLT:
408 case SPRN_L2CR:
409 case SPRN_MMCR0_GEKKO:
410 case SPRN_MMCR1_GEKKO:
411 case SPRN_PMC1_GEKKO:
412 case SPRN_PMC2_GEKKO:
413 case SPRN_PMC3_GEKKO:
414 case SPRN_PMC4_GEKKO:
415 case SPRN_WPAR_GEKKO:
416 break;
417 default:
418 printk(KERN_INFO "KVM: invalid SPR write: %d\n", sprn);
419 #ifndef DEBUG_SPR
420 emulated = EMULATE_FAIL;
421 #endif
422 break;
423 }
424
425 return emulated;
426 }
427
428 int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
429 {
430 int emulated = EMULATE_DONE;
431
432 switch (sprn) {
433 case SPRN_IBAT0U ... SPRN_IBAT3L:
434 case SPRN_IBAT4U ... SPRN_IBAT7L:
435 case SPRN_DBAT0U ... SPRN_DBAT3L:
436 case SPRN_DBAT4U ... SPRN_DBAT7L:
437 kvmppc_set_gpr(vcpu, rt, kvmppc_read_bat(vcpu, sprn));
438 break;
439 case SPRN_SDR1:
440 kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->sdr1);
441 break;
442 case SPRN_DSISR:
443 kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->dsisr);
444 break;
445 case SPRN_DAR:
446 kvmppc_set_gpr(vcpu, rt, vcpu->arch.dear);
447 break;
448 case SPRN_HIOR:
449 kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hior);
450 break;
451 case SPRN_HID0:
452 kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[0]);
453 break;
454 case SPRN_HID1:
455 kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[1]);
456 break;
457 case SPRN_HID2:
458 case SPRN_HID2_GEKKO:
459 kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[2]);
460 break;
461 case SPRN_HID4:
462 case SPRN_HID4_GEKKO:
463 kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[4]);
464 break;
465 case SPRN_HID5:
466 kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[5]);
467 break;
468 case SPRN_GQR0:
469 case SPRN_GQR1:
470 case SPRN_GQR2:
471 case SPRN_GQR3:
472 case SPRN_GQR4:
473 case SPRN_GQR5:
474 case SPRN_GQR6:
475 case SPRN_GQR7:
476 kvmppc_set_gpr(vcpu, rt,
477 to_book3s(vcpu)->gqr[sprn - SPRN_GQR0]);
478 break;
479 case SPRN_THRM1:
480 case SPRN_THRM2:
481 case SPRN_THRM3:
482 case SPRN_CTRLF:
483 case SPRN_CTRLT:
484 case SPRN_L2CR:
485 case SPRN_MMCR0_GEKKO:
486 case SPRN_MMCR1_GEKKO:
487 case SPRN_PMC1_GEKKO:
488 case SPRN_PMC2_GEKKO:
489 case SPRN_PMC3_GEKKO:
490 case SPRN_PMC4_GEKKO:
491 case SPRN_WPAR_GEKKO:
492 kvmppc_set_gpr(vcpu, rt, 0);
493 break;
494 default:
495 printk(KERN_INFO "KVM: invalid SPR read: %d\n", sprn);
496 #ifndef DEBUG_SPR
497 emulated = EMULATE_FAIL;
498 #endif
499 break;
500 }
501
502 return emulated;
503 }
504
505 u32 kvmppc_alignment_dsisr(struct kvm_vcpu *vcpu, unsigned int inst)
506 {
507 u32 dsisr = 0;
508
509 /*
510 * This is what the spec says about DSISR bits (not mentioned = 0):
511 *
512 * 12:13 [DS] Set to bits 30:31
513 * 15:16 [X] Set to bits 29:30
514 * 17 [X] Set to bit 25
515 * [D/DS] Set to bit 5
516 * 18:21 [X] Set to bits 21:24
517 * [D/DS] Set to bits 1:4
518 * 22:26 Set to bits 6:10 (RT/RS/FRT/FRS)
519 * 27:31 Set to bits 11:15 (RA)
520 */
521
522 switch (get_op(inst)) {
523 /* D-form */
524 case OP_LFS:
525 case OP_LFD:
526 case OP_STFD:
527 case OP_STFS:
528 dsisr |= (inst >> 12) & 0x4000; /* bit 17 */
529 dsisr |= (inst >> 17) & 0x3c00; /* bits 18:21 */
530 break;
531 /* X-form */
532 case 31:
533 dsisr |= (inst << 14) & 0x18000; /* bits 15:16 */
534 dsisr |= (inst << 8) & 0x04000; /* bit 17 */
535 dsisr |= (inst << 3) & 0x03c00; /* bits 18:21 */
536 break;
537 default:
538 printk(KERN_INFO "KVM: Unaligned instruction 0x%x\n", inst);
539 break;
540 }
541
542 dsisr |= (inst >> 16) & 0x03ff; /* bits 22:31 */
543
544 return dsisr;
545 }
546
547 ulong kvmppc_alignment_dar(struct kvm_vcpu *vcpu, unsigned int inst)
548 {
549 ulong dar = 0;
550 ulong ra;
551
552 switch (get_op(inst)) {
553 case OP_LFS:
554 case OP_LFD:
555 case OP_STFD:
556 case OP_STFS:
557 ra = get_ra(inst);
558 if (ra)
559 dar = kvmppc_get_gpr(vcpu, ra);
560 dar += (s32)((s16)inst);
561 break;
562 case 31:
563 ra = get_ra(inst);
564 if (ra)
565 dar = kvmppc_get_gpr(vcpu, ra);
566 dar += kvmppc_get_gpr(vcpu, get_rb(inst));
567 break;
568 default:
569 printk(KERN_INFO "KVM: Unaligned instruction 0x%x\n", inst);
570 break;
571 }
572
573 return dar;
574 }
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