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[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / arm / mach-footbridge / common.c
blob88b3dd89be89a20b65761de100c7799798ccb1df
1 /*
2 * linux/arch/arm/mach-footbridge/common.c
4 * Copyright (C) 1998-2000 Russell King, Dave Gilbert.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10 #include <linux/module.h>
11 #include <linux/types.h>
12 #include <linux/mm.h>
13 #include <linux/ioport.h>
14 #include <linux/list.h>
15 #include <linux/init.h>
16 #include <linux/io.h>
17 #include <linux/spinlock.h>
19 #include <asm/pgtable.h>
20 #include <asm/page.h>
21 #include <asm/irq.h>
22 #include <asm/mach-types.h>
23 #include <asm/setup.h>
24 #include <asm/hardware/dec21285.h>
26 #include <asm/mach/irq.h>
27 #include <asm/mach/map.h>
29 #include "common.h"
31 unsigned int mem_fclk_21285 = 50000000;
33 EXPORT_SYMBOL(mem_fclk_21285);
35 static int __init early_fclk(char *arg)
37 mem_fclk_21285 = simple_strtoul(arg, NULL, 0);
38 return 0;
41 early_param("mem_fclk_21285", early_fclk);
43 static int __init parse_tag_memclk(const struct tag *tag)
45 mem_fclk_21285 = tag->u.memclk.fmemclk;
46 return 0;
49 __tagtable(ATAG_MEMCLK, parse_tag_memclk);
52 * Footbridge IRQ translation table
53 * Converts from our IRQ numbers into FootBridge masks
55 static const int fb_irq_mask[] = {
56 IRQ_MASK_UART_RX, /* 0 */
57 IRQ_MASK_UART_TX, /* 1 */
58 IRQ_MASK_TIMER1, /* 2 */
59 IRQ_MASK_TIMER2, /* 3 */
60 IRQ_MASK_TIMER3, /* 4 */
61 IRQ_MASK_IN0, /* 5 */
62 IRQ_MASK_IN1, /* 6 */
63 IRQ_MASK_IN2, /* 7 */
64 IRQ_MASK_IN3, /* 8 */
65 IRQ_MASK_DOORBELLHOST, /* 9 */
66 IRQ_MASK_DMA1, /* 10 */
67 IRQ_MASK_DMA2, /* 11 */
68 IRQ_MASK_PCI, /* 12 */
69 IRQ_MASK_SDRAMPARITY, /* 13 */
70 IRQ_MASK_I2OINPOST, /* 14 */
71 IRQ_MASK_PCI_ABORT, /* 15 */
72 IRQ_MASK_PCI_SERR, /* 16 */
73 IRQ_MASK_DISCARD_TIMER, /* 17 */
74 IRQ_MASK_PCI_DPERR, /* 18 */
75 IRQ_MASK_PCI_PERR, /* 19 */
78 static void fb_mask_irq(unsigned int irq)
80 *CSR_IRQ_DISABLE = fb_irq_mask[_DC21285_INR(irq)];
83 static void fb_unmask_irq(unsigned int irq)
85 *CSR_IRQ_ENABLE = fb_irq_mask[_DC21285_INR(irq)];
88 static struct irq_chip fb_chip = {
89 .ack = fb_mask_irq,
90 .mask = fb_mask_irq,
91 .unmask = fb_unmask_irq,
94 static void __init __fb_init_irq(void)
96 unsigned int irq;
99 * setup DC21285 IRQs
101 *CSR_IRQ_DISABLE = -1;
102 *CSR_FIQ_DISABLE = -1;
104 for (irq = _DC21285_IRQ(0); irq < _DC21285_IRQ(20); irq++) {
105 set_irq_chip(irq, &fb_chip);
106 set_irq_handler(irq, handle_level_irq);
107 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
111 void __init footbridge_init_irq(void)
113 __fb_init_irq();
115 if (!footbridge_cfn_mode())
116 return;
118 if (machine_is_ebsa285())
119 /* The following is dependent on which slot
120 * you plug the Southbridge card into. We
121 * currently assume that you plug it into
122 * the right-hand most slot.
124 isa_init_irq(IRQ_PCI);
126 if (machine_is_cats())
127 isa_init_irq(IRQ_IN2);
129 if (machine_is_netwinder())
130 isa_init_irq(IRQ_IN3);
134 * Common mapping for all systems. Note that the outbound write flush is
135 * commented out since there is a "No Fix" problem with it. Not mapping
136 * it means that we have extra bullet protection on our feet.
138 static struct map_desc fb_common_io_desc[] __initdata = {
140 .virtual = ARMCSR_BASE,
141 .pfn = __phys_to_pfn(DC21285_ARMCSR_BASE),
142 .length = ARMCSR_SIZE,
143 .type = MT_DEVICE,
144 }, {
145 .virtual = XBUS_BASE,
146 .pfn = __phys_to_pfn(0x40000000),
147 .length = XBUS_SIZE,
148 .type = MT_DEVICE,
153 * The mapping when the footbridge is in host mode. We don't map any of
154 * this when we are in add-in mode.
156 static struct map_desc ebsa285_host_io_desc[] __initdata = {
157 #if defined(CONFIG_ARCH_FOOTBRIDGE) && defined(CONFIG_FOOTBRIDGE_HOST)
159 .virtual = PCIMEM_BASE,
160 .pfn = __phys_to_pfn(DC21285_PCI_MEM),
161 .length = PCIMEM_SIZE,
162 .type = MT_DEVICE,
163 }, {
164 .virtual = PCICFG0_BASE,
165 .pfn = __phys_to_pfn(DC21285_PCI_TYPE_0_CONFIG),
166 .length = PCICFG0_SIZE,
167 .type = MT_DEVICE,
168 }, {
169 .virtual = PCICFG1_BASE,
170 .pfn = __phys_to_pfn(DC21285_PCI_TYPE_1_CONFIG),
171 .length = PCICFG1_SIZE,
172 .type = MT_DEVICE,
173 }, {
174 .virtual = PCIIACK_BASE,
175 .pfn = __phys_to_pfn(DC21285_PCI_IACK),
176 .length = PCIIACK_SIZE,
177 .type = MT_DEVICE,
178 }, {
179 .virtual = PCIO_BASE,
180 .pfn = __phys_to_pfn(DC21285_PCI_IO),
181 .length = PCIO_SIZE,
182 .type = MT_DEVICE,
184 #endif
187 void __init footbridge_map_io(void)
190 * Set up the common mapping first; we need this to
191 * determine whether we're in host mode or not.
193 iotable_init(fb_common_io_desc, ARRAY_SIZE(fb_common_io_desc));
196 * Now, work out what we've got to map in addition on this
197 * platform.
199 if (footbridge_cfn_mode())
200 iotable_init(ebsa285_host_io_desc, ARRAY_SIZE(ebsa285_host_io_desc));
203 #ifdef CONFIG_FOOTBRIDGE_ADDIN
205 static inline unsigned long fb_bus_sdram_offset(void)
207 return *CSR_PCISDRAMBASE & 0xfffffff0;
211 * These two functions convert virtual addresses to PCI addresses and PCI
212 * addresses to virtual addresses. Note that it is only legal to use these
213 * on memory obtained via get_zeroed_page or kmalloc.
215 unsigned long __virt_to_bus(unsigned long res)
217 WARN_ON(res < PAGE_OFFSET || res >= (unsigned long)high_memory);
219 return res + (fb_bus_sdram_offset() - PAGE_OFFSET);
221 EXPORT_SYMBOL(__virt_to_bus);
223 unsigned long __bus_to_virt(unsigned long res)
225 res = res - (fb_bus_sdram_offset() - PAGE_OFFSET);
227 WARN_ON(res < PAGE_OFFSET || res >= (unsigned long)high_memory);
229 return res;
231 EXPORT_SYMBOL(__bus_to_virt);
233 unsigned long __pfn_to_bus(unsigned long pfn)
235 return __pfn_to_phys(pfn) + (fb_bus_sdram_offset() - PHYS_OFFSET);
237 EXPORT_SYMBOL(__pfn_to_bus);
239 unsigned long __bus_to_pfn(unsigned long bus)
241 return __phys_to_pfn(bus - (fb_bus_sdram_offset() - PHYS_OFFSET));
243 EXPORT_SYMBOL(__bus_to_pfn);
245 #endif