[PATCH] Don't leak NT bit into next task
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / x86_64 / kernel / setup64.c
blob8c4b80fe71a146c73447d4af46ced0e60d80c5b9
1 /*
2 * X86-64 specific CPU setup.
3 * Copyright (C) 1995 Linus Torvalds
4 * Copyright 2001, 2002, 2003 SuSE Labs / Andi Kleen.
5 * See setup.c for older changelog.
6 */
7 #include <linux/init.h>
8 #include <linux/kernel.h>
9 #include <linux/sched.h>
10 #include <linux/string.h>
11 #include <linux/bootmem.h>
12 #include <linux/bitops.h>
13 #include <linux/module.h>
14 #include <asm/bootsetup.h>
15 #include <asm/pda.h>
16 #include <asm/pgtable.h>
17 #include <asm/processor.h>
18 #include <asm/desc.h>
19 #include <asm/atomic.h>
20 #include <asm/mmu_context.h>
21 #include <asm/smp.h>
22 #include <asm/i387.h>
23 #include <asm/percpu.h>
24 #include <asm/proto.h>
25 #include <asm/sections.h>
27 char x86_boot_params[BOOT_PARAM_SIZE] __initdata;
29 cpumask_t cpu_initialized __cpuinitdata = CPU_MASK_NONE;
31 struct x8664_pda *_cpu_pda[NR_CPUS] __read_mostly;
32 EXPORT_SYMBOL(_cpu_pda);
33 struct x8664_pda boot_cpu_pda[NR_CPUS] __cacheline_aligned;
35 struct desc_ptr idt_descr = { 256 * 16 - 1, (unsigned long) idt_table };
37 char boot_cpu_stack[IRQSTACKSIZE] __attribute__((section(".bss.page_aligned")));
39 unsigned long __supported_pte_mask __read_mostly = ~0UL;
40 EXPORT_SYMBOL(__supported_pte_mask);
41 static int do_not_nx __cpuinitdata = 0;
43 /* noexec=on|off
44 Control non executable mappings for 64bit processes.
46 on Enable(default)
47 off Disable
48 */
49 static int __init nonx_setup(char *str)
51 if (!str)
52 return -EINVAL;
53 if (!strncmp(str, "on", 2)) {
54 __supported_pte_mask |= _PAGE_NX;
55 do_not_nx = 0;
56 } else if (!strncmp(str, "off", 3)) {
57 do_not_nx = 1;
58 __supported_pte_mask &= ~_PAGE_NX;
60 return 0;
62 early_param("noexec", nonx_setup);
64 int force_personality32 = 0;
66 /* noexec32=on|off
67 Control non executable heap for 32bit processes.
68 To control the stack too use noexec=off
70 on PROT_READ does not imply PROT_EXEC for 32bit processes
71 off PROT_READ implies PROT_EXEC (default)
73 static int __init nonx32_setup(char *str)
75 if (!strcmp(str, "on"))
76 force_personality32 &= ~READ_IMPLIES_EXEC;
77 else if (!strcmp(str, "off"))
78 force_personality32 |= READ_IMPLIES_EXEC;
79 return 1;
81 __setup("noexec32=", nonx32_setup);
84 * Great future plan:
85 * Declare PDA itself and support (irqstack,tss,pgd) as per cpu data.
86 * Always point %gs to its beginning
88 void __init setup_per_cpu_areas(void)
90 int i;
91 unsigned long size;
93 #ifdef CONFIG_HOTPLUG_CPU
94 prefill_possible_map();
95 #endif
97 /* Copy section for each CPU (we discard the original) */
98 size = PERCPU_ENOUGH_ROOM;
100 printk(KERN_INFO "PERCPU: Allocating %lu bytes of per cpu data\n", size);
101 for_each_cpu_mask (i, cpu_possible_map) {
102 char *ptr;
104 if (!NODE_DATA(cpu_to_node(i))) {
105 printk("cpu with no node %d, num_online_nodes %d\n",
106 i, num_online_nodes());
107 ptr = alloc_bootmem(size);
108 } else {
109 ptr = alloc_bootmem_node(NODE_DATA(cpu_to_node(i)), size);
111 if (!ptr)
112 panic("Cannot allocate cpu data for CPU %d\n", i);
113 cpu_pda(i)->data_offset = ptr - __per_cpu_start;
114 memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start);
118 void pda_init(int cpu)
120 struct x8664_pda *pda = cpu_pda(cpu);
122 /* Setup up data that may be needed in __get_free_pages early */
123 asm volatile("movl %0,%%fs ; movl %0,%%gs" :: "r" (0));
124 /* Memory clobbers used to order PDA accessed */
125 mb();
126 wrmsrl(MSR_GS_BASE, pda);
127 mb();
129 pda->cpunumber = cpu;
130 pda->irqcount = -1;
131 pda->kernelstack =
132 (unsigned long)stack_thread_info() - PDA_STACKOFFSET + THREAD_SIZE;
133 pda->active_mm = &init_mm;
134 pda->mmu_state = 0;
136 if (cpu == 0) {
137 /* others are initialized in smpboot.c */
138 pda->pcurrent = &init_task;
139 pda->irqstackptr = boot_cpu_stack;
140 } else {
141 pda->irqstackptr = (char *)
142 __get_free_pages(GFP_ATOMIC, IRQSTACK_ORDER);
143 if (!pda->irqstackptr)
144 panic("cannot allocate irqstack for cpu %d", cpu);
148 pda->irqstackptr += IRQSTACKSIZE-64;
151 char boot_exception_stacks[(N_EXCEPTION_STACKS - 1) * EXCEPTION_STKSZ + DEBUG_STKSZ]
152 __attribute__((section(".bss.page_aligned")));
154 /* May not be marked __init: used by software suspend */
155 void syscall_init(void)
158 * LSTAR and STAR live in a bit strange symbiosis.
159 * They both write to the same internal register. STAR allows to set CS/DS
160 * but only a 32bit target. LSTAR sets the 64bit rip.
162 wrmsrl(MSR_STAR, ((u64)__USER32_CS)<<48 | ((u64)__KERNEL_CS)<<32);
163 wrmsrl(MSR_LSTAR, system_call);
165 #ifdef CONFIG_IA32_EMULATION
166 syscall32_cpu_init ();
167 #endif
169 /* Flags to clear on syscall */
170 wrmsrl(MSR_SYSCALL_MASK, EF_TF|EF_DF|EF_IE|0x3000);
173 void __cpuinit check_efer(void)
175 unsigned long efer;
177 rdmsrl(MSR_EFER, efer);
178 if (!(efer & EFER_NX) || do_not_nx) {
179 __supported_pte_mask &= ~_PAGE_NX;
183 unsigned long kernel_eflags;
186 * cpu_init() initializes state that is per-CPU. Some data is already
187 * initialized (naturally) in the bootstrap process, such as the GDT
188 * and IDT. We reload them nevertheless, this function acts as a
189 * 'CPU state barrier', nothing should get across.
190 * A lot of state is already set up in PDA init.
192 void __cpuinit cpu_init (void)
194 int cpu = stack_smp_processor_id();
195 struct tss_struct *t = &per_cpu(init_tss, cpu);
196 struct orig_ist *orig_ist = &per_cpu(orig_ist, cpu);
197 unsigned long v;
198 char *estacks = NULL;
199 struct task_struct *me;
200 int i;
202 /* CPU 0 is initialised in head64.c */
203 if (cpu != 0) {
204 pda_init(cpu);
205 zap_low_mappings(cpu);
206 } else
207 estacks = boot_exception_stacks;
209 me = current;
211 if (cpu_test_and_set(cpu, cpu_initialized))
212 panic("CPU#%d already initialized!\n", cpu);
214 printk("Initializing CPU#%d\n", cpu);
216 clear_in_cr4(X86_CR4_VME|X86_CR4_PVI|X86_CR4_TSD|X86_CR4_DE);
219 * Initialize the per-CPU GDT with the boot GDT,
220 * and set up the GDT descriptor:
222 if (cpu)
223 memcpy(cpu_gdt(cpu), cpu_gdt_table, GDT_SIZE);
225 cpu_gdt_descr[cpu].size = GDT_SIZE;
226 asm volatile("lgdt %0" :: "m" (cpu_gdt_descr[cpu]));
227 asm volatile("lidt %0" :: "m" (idt_descr));
229 memset(me->thread.tls_array, 0, GDT_ENTRY_TLS_ENTRIES * 8);
230 syscall_init();
232 wrmsrl(MSR_FS_BASE, 0);
233 wrmsrl(MSR_KERNEL_GS_BASE, 0);
234 barrier();
236 check_efer();
239 * set up and load the per-CPU TSS
241 for (v = 0; v < N_EXCEPTION_STACKS; v++) {
242 static const unsigned int order[N_EXCEPTION_STACKS] = {
243 [0 ... N_EXCEPTION_STACKS - 1] = EXCEPTION_STACK_ORDER,
244 [DEBUG_STACK - 1] = DEBUG_STACK_ORDER
246 if (cpu) {
247 estacks = (char *)__get_free_pages(GFP_ATOMIC, order[v]);
248 if (!estacks)
249 panic("Cannot allocate exception stack %ld %d\n",
250 v, cpu);
252 estacks += PAGE_SIZE << order[v];
253 orig_ist->ist[v] = t->ist[v] = (unsigned long)estacks;
256 t->io_bitmap_base = offsetof(struct tss_struct, io_bitmap);
258 * <= is required because the CPU will access up to
259 * 8 bits beyond the end of the IO permission bitmap.
261 for (i = 0; i <= IO_BITMAP_LONGS; i++)
262 t->io_bitmap[i] = ~0UL;
264 atomic_inc(&init_mm.mm_count);
265 me->active_mm = &init_mm;
266 if (me->mm)
267 BUG();
268 enter_lazy_tlb(&init_mm, me);
270 set_tss_desc(cpu, t);
271 load_TR_desc();
272 load_LDT(&init_mm.context);
275 * Clear all 6 debug registers:
278 set_debugreg(0UL, 0);
279 set_debugreg(0UL, 1);
280 set_debugreg(0UL, 2);
281 set_debugreg(0UL, 3);
282 set_debugreg(0UL, 6);
283 set_debugreg(0UL, 7);
285 fpu_init();
287 raw_local_save_flags(kernel_eflags);