9 config GENERIC_CMOS_UPDATE
13 config GENERIC_CLOCKEVENTS
21 config HAVE_CACHE_SPLIT
40 Motorola 68328 processor support.
45 Motorola 68EX328 processor support.
50 Motorola 68VZ328 processor support.
55 Motorola 68360 processor support.
62 Motorola ColdFire 5206 processor support.
69 Motorola ColdFire 5206e processor support.
73 select GENERIC_CLOCKEVENTS
74 select HAVE_CACHE_SPLIT
76 Freescale Coldfire 5207/5208 processor support.
80 select GENERIC_CLOCKEVENTS
81 select HAVE_CACHE_SPLIT
84 Freescale Coldfire 5230/1/2/4/5 processor support
91 Motorola ColdFire 5249 processor support.
95 select HAVE_CACHE_SPLIT
98 Freescale (Motorola) ColdFire 5270/5271 processor support.
102 select COLDFIRE_SW_A7
105 Motorola ColdFire 5272 processor support.
109 select HAVE_CACHE_SPLIT
112 Freescale (Motorola) ColdFire 5274/5275 processor support.
116 select GENERIC_CLOCKEVENTS
117 select HAVE_CACHE_SPLIT
120 Motorola ColdFire 5280/5282 processor support.
124 select COLDFIRE_SW_A7
128 Motorola ColdFire 5307 processor support.
134 Freescale (Motorola) ColdFire 532x processor support.
138 select COLDFIRE_SW_A7
142 Motorola ColdFire 5407 processor support.
149 Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
156 Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
162 depends on (M5271 || M5275)
163 select GENERIC_CLOCKEVENTS
168 depends on (M548x || M547x)
173 depends on (M5206 || M5206e || M520x || M523x || M5249 || M527x || M5272 || M528x || M5307 || M532x || M5407 || M54xx)
175 select ARCH_REQUIRE_GPIOLIB
179 bool "Enable setting the CPU clock frequency"
182 On some CPU's you do not need to know what the core CPU clock
183 frequency is. On these you can disable clock setting. On some
184 traditional 68K parts, and on all ColdFire parts you need to set
185 the appropriate CPU clock frequency. On these devices many of the
186 onboard peripherals derive their timing from the master CPU clock
190 int "Set the core clock frequency"
194 Define the CPU clock frequency in use. This is the core clock
195 frequency, it may or may not be the same as the external clock
196 crystal fitted to your board. Some processors have an internal
197 PLL and can have their frequency programmed at run time, others
198 use internal dividers. In general the kernel won't setup a PLL
199 if it is fitted (there are some exceptions). This value will be
200 specific to the exact CPU that you are using.
203 bool "Old mask 5307 (1H55J) silicon"
206 Build support for the older revision ColdFire 5307 silicon.
207 Specifically this is the 1H55J mask revision.
211 prompt "Split Cache Configuration"
217 Use all of the ColdFire CPU cache memory as an instruction cache.
222 Use all of the ColdFire CPU cache memory as a data cache.
227 Split the ColdFire CPU cache, and use half as an instruction cache
228 and half as a data cache.
234 prompt "Data cache mode"
235 default CACHE_WRITETHRU
237 config CACHE_WRITETHRU
240 The ColdFire CPU cache is set into Write-through mode.
242 config CACHE_COPYBACK
245 The ColdFire CPU cache is set into Copy-back mode.
252 bool "Pilot 1000/5000, PalmPilot Personal/Pro, or PalmIII support"
255 Support for the Palm Pilot 1000/5000, Personal/Pro and PalmIII.
258 bool "(X)Copilot support"
261 Support the bugs of Xcopilot.
264 bool 'Arcturus Networks uC5272 dimm board support'
267 Support for the Arcturus Networks uC5272 dimm board.
270 bool "Arcturus Networks uC5282 board support"
273 Support for the Arcturus Networks uC5282 dimm board.
276 bool "uCsimm module support"
279 Support for the Arcturus Networks uCsimm module.
282 bool "uDsimm module support"
285 Support for the Arcturus Networks uDsimm module.
288 bool "DragenEngine II board support"
291 Support for the DragenEngine II board.
293 config DIRECT_IO_ACCESS
294 bool "Allow user to access IO directly"
295 depends on (UCSIMM || UCDIMM || DRAGEN2)
297 Disable the CPU internal registers protection in user mode,
298 to allow a user application to read/write them.
301 bool "Initialize LCD"
302 depends on (UCSIMM || UCDIMM || DRAGEN2)
304 Initialize the LCD controller of the 68x328 processor.
306 config MEMORY_RESERVE
307 int "Memory reservation (MiB)"
308 depends on (UCSIMM || UCDIMM)
310 Reserve certain memory regions on 68x328 based boards.
313 bool "Lineo uCquicc board support"
316 Support for the Lineo uCquicc board.
319 bool "Arnewsh 5206 board support"
322 Support for the Arnewsh 5206 board.
325 bool "Motorola M5206eC3 board support"
328 Support for the Motorola M5206eC3 board.
331 bool "Motorola M5206eLITE board support"
334 Support for the Motorola M5206eLITE board.
337 bool "Freescale M5208EVB board support"
340 Support for the Freescale Coldfire M5208EVB.
343 bool "Freescale M5235EVB support"
346 Support for the Freescale M5235EVB board.
349 bool "Motorola M5249C3 board support"
352 Support for the Motorola M5249C3 board.
355 bool "Freescale (Motorola) M5271EVB board support"
358 Support for the Freescale (Motorola) M5271EVB board.
361 bool "Freescale (Motorola) M5275EVB board support"
364 Support for the Freescale (Motorola) M5275EVB board.
367 bool "Motorola M5272C3 board support"
370 Support for the Motorola M5272C3 board.
373 bool "senTec COBRA5272 board support"
376 Support for the senTec COBRA5272 board.
379 bool "Avnet 5282 board support"
382 Support for the Avnet 5282 board.
385 bool "Motorola M5282EVB board support"
388 Support for the Motorola M5282EVB board.
391 bool "senTec COBRA5282 board support"
394 Support for the senTec COBRA5282 board.
397 bool "EMAC.Inc SOM5282EM board support"
400 Support for the EMAC.Inc SOM5282EM module.
403 bool "Intec Automation Inc. WildFire board support"
406 Support for the Intec Automation Inc. WildFire.
409 bool "Intec Automation Inc. WildFire module support"
412 Support for the Intec Automation Inc. WildFire module.
415 bool "Arnewsh 5307 board support"
418 Support for the Arnewsh 5307 board.
421 bool "Motorola M5307C3 board support"
424 Support for the Motorola M5307C3 board.
427 bool "SnapGear SecureEdge/MP3 platform support"
430 Support for the SnapGear SecureEdge/MP3 platform.
433 bool "Freescale (Motorola) M5329EVB board support"
436 Support for the Freescale (Motorola) M5329EVB board.
439 bool "senTec COBRA5329 board support"
442 Support for the senTec COBRA5329 board.
445 bool "Motorola M5407C3 board support"
448 Support for the Motorola M5407C3 board.
451 bool "FireBee board support"
454 Support for the FireBee ColdFire 5475 based board.
457 bool "Feith CLEOPATRA board support"
458 depends on (M5307 || M5407)
460 Support for the Feith Cleopatra boards.
463 bool "Feith CANCam board support"
466 Support for the Feith CANCam board.
469 bool "Feith SCALES board support"
472 Support for the Feith SCALES board.
475 bool "SecureEdge/NETtel board support"
476 depends on (M5206e || M5272 || M5307)
478 Support for the SnapGear NETtel/SecureEdge/SnapGear boards.
481 bool "SnapGear router board support"
484 Special additional support for SnapGear router boards.
487 bool "Sneha Technologies S.L. Sarasvati board support"
490 Support for the SNEHA CPU16B board.
493 bool "Netburner MOD-5272 board support"
496 Support for the Netburner MOD-5272 board.
499 bool "Savant Rosie1 board support"
502 Support for the Savant Rosie1 board.
504 config ROMFS_FROM_ROM
505 bool "ROMFS image not RAM resident"
506 depends on (NETtel || SNAPGEAR)
508 The ROMfs filesystem will stay resident in the FLASH/ROM, not be
514 depends on (PILOT3 || PILOT5)
519 depends on (ARN5206 || ARN5307)
524 depends on (M5206eC3 || M5208EVB || M5235EVB || M5249C3 || M5271EVB || M5272C3 || M5275EVB || M5282EVB || M5307C3 || M5329EVB || M5407C3)
529 depends on (CLEOPATRA || CANCam || SCALES)
534 depends on (COBRA5272 || COBRA5282)
539 depends on (SOM5282EM)
549 depends on SAVANTrosie1
554 depends on (AVNET5282)
557 bool "Support for U-Boot command line parameters"
559 If you say Y here kernel will try to collect command
560 line parameters from the initial u-boot stack.
564 bool "Use 4Kb for kernel stacks instead of 8Kb"
567 If you say Y here the kernel will use a 4Kb stacksize for the
568 kernel stack attached to each process/thread. This facilitates
569 running more threads on a system and also reduces the pressure
570 on the VM subsystem for higher order allocations.
572 comment "RAM configuration"
575 hex "Address of the base of RAM"
578 Define the address that RAM starts at. On many platforms this is
579 0, the base of the address space. And this is the default. Some
580 platforms choose to setup their RAM at other addresses within the
581 processor address space.
584 hex "Size of RAM (in bytes), or 0 for automatic"
587 Define the size of the system RAM. If you select 0 then the
588 kernel will try to probe the RAM size at runtime. This is not
589 supported on all CPU types.
592 hex "Address of the base of system vectors"
595 Define the address of the system vectors. Commonly this is
596 put at the start of RAM, but it doesn't have to be. On ColdFire
597 platforms this address is programmed into the VBR register, thus
598 actually setting the address to use.
601 hex "Address of the MBAR (internal peripherals)"
605 Define the address of the internal system peripherals. This value
606 is set in the processors MBAR register. This is generally setup by
607 the boot loader, and will not be written by the kernel. By far most
608 ColdFire boards use the default 0x10000000 value, so if unsure then
612 hex "Address of the IPSBAR (internal peripherals)"
614 depends on HAVE_IPSBAR
616 Define the address of the internal system peripherals. This value
617 is set in the processors IPSBAR register. This is generally setup by
618 the boot loader, and will not be written by the kernel. By far most
619 ColdFire boards use the default 0x40000000 value, so if unsure then
623 hex "Address of the base of kernel code"
626 Typically on m68k systems the kernel will not start at the base
627 of RAM, but usually some small offset from it. Define the start
628 address of the kernel here. The most common setup will have the
629 processor vectors at the base of RAM and then the start of the
630 kernel. On some platforms some RAM is reserved for boot loaders
631 and the kernel starts after that. The 0x400 default was based on
632 a system with the RAM based at address 0, and leaving enough room
633 for the theoretical maximum number of 256 vectors.
636 prompt "RAM bus width"
642 Select the physical RAM data bus size. Not needed on most platforms,
643 so you can generally choose AUTO.
648 Configure RAM bus to be 8 bits wide.
653 Configure RAM bus to be 16 bits wide.
658 Configure RAM bus to be 32 bits wide.
662 comment "ROM configuration"
665 bool "Specify ROM linker regions"
668 Define a ROM region for the linker script. This creates a kernel
669 that can be stored in flash, with possibly the text, and data
670 regions being copied out to RAM at startup.
673 hex "Address of the base of ROM device"
677 Define the address that the ROM region starts at. Some platforms
678 use this to set their chip select region accordingly for the boot
682 hex "Address of the base of the ROM vectors"
686 This is almost always the same as the base of the ROM. Since on all
687 68000 type variants the vectors are at the base of the boot device
691 hex "Size of ROM vector region (in bytes)"
695 Define the size of the vector region in ROM. For most 68000
696 variants this would be 0x400 bytes in size. Set to 0 if you do
697 not want a vector region at the start of the ROM.
700 hex "Address of the base of system image in ROM"
704 Define the start address of the system image in ROM. Commonly this
705 is strait after the ROM vectors.
708 hex "Size of the ROM device"
712 Size of the ROM device. On some platforms this is used to setup
713 the chip select that controls the boot ROM device.
716 prompt "Kernel executes from"
718 Choose the memory type that the kernel will be running in.
723 The kernel will be resident in RAM when running.
728 The kernel will be resident in FLASH/ROM when running. This is
729 often referred to as Execute-in-Place (XIP), since the kernel
730 code executes from the position it is stored in the FLASH/ROM.
735 source "kernel/Kconfig.preempt"
738 source "kernel/time/Kconfig"
745 source "drivers/pcmcia/Kconfig"