arch/arm/mach-pxa/pxa27x.c

   1 /*
   2  *  linux/arch/arm/mach-pxa/pxa27x.c
   3  *
   4  *  Author:     Nicolas Pitre
   5  *  Created:    Nov 05, 2002
   6  *  Copyright:  MontaVista Software Inc.
   7  *
   8  * Code specific to PXA27x aka Bulverde.
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13  */
  14 #include <linux/module.h>
  15 #include <linux/kernel.h>
  16 #include <linux/init.h>
  17 #include <linux/suspend.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/sysdev.h>
  20
  21 #include <mach/hardware.h>
  22 #include <asm/irq.h>
  23 #include <mach/irqs.h>
  24 #include <mach/pxa-regs.h>
  25 #include <mach/pxa2xx-regs.h>
  26 #include <mach/mfp-pxa27x.h>
  27 #include <mach/reset.h>
  28 #include <mach/ohci.h>
  29 #include <mach/pm.h>
  30 #include <mach/dma.h>
  31 #include <mach/i2c.h>
  32
  33 #include "generic.h"
  34 #include "devices.h"
  35 #include "clock.h"
  36
  37 void pxa27x_clear_otgph(void)
  38 {
  39         if (cpu_is_pxa27x() && (PSSR & PSSR_OTGPH))
  40                 PSSR |= PSSR_OTGPH;
  41 }
  42 EXPORT_SYMBOL(pxa27x_clear_otgph);
  43
  44 /* Crystal clock: 13MHz */
  45 #define BASE_CLK        13000000
  46
  47 /*
  48  * Get the clock frequency as reflected by CCSR and the turbo flag.
  49  * We assume these values have been applied via a fcs.
  50  * If info is not 0 we also display the current settings.
  51  */
  52 unsigned int pxa27x_get_clk_frequency_khz(int info)
  53 {
  54         unsigned long ccsr, clkcfg;
  55         unsigned int l, L, m, M, n2, N, S;
  56         int cccr_a, t, ht, b;
  57
  58         ccsr = CCSR;
  59         cccr_a = CCCR & (1 << 25);
  60
  61         /* Read clkcfg register: it has turbo, b, half-turbo (and f) */
  62         asm( "mrc\tp14, 0, %0, c6, c0, 0" : "=r" (clkcfg) );
  63         t  = clkcfg & (1 << 0);
  64         ht = clkcfg & (1 << 2);
  65         b  = clkcfg & (1 << 3);
  66
  67         l  = ccsr & 0x1f;
  68         n2 = (ccsr>>7) & 0xf;
  69         m  = (l <= 10) ? 1 : (l <= 20) ? 2 : 4;
  70
  71         L  = l * BASE_CLK;
  72         N  = (L * n2) / 2;
  73         M  = (!cccr_a) ? (L/m) : ((b) ? L : (L/2));
  74         S  = (b) ? L : (L/2);
  75
  76         if (info) {
  77                 printk( KERN_INFO "Run Mode clock: %d.%02dMHz (*%d)\n",
  78                         L / 1000000, (L % 1000000) / 10000, l );
  79                 printk( KERN_INFO "Turbo Mode clock: %d.%02dMHz (*%d.%d, %sactive)\n",
  80                         N / 1000000, (N % 1000000)/10000, n2 / 2, (n2 % 2)*5,
  81                         (t) ? "" : "in" );
  82                 printk( KERN_INFO "Memory clock: %d.%02dMHz (/%d)\n",
  83                         M / 1000000, (M % 1000000) / 10000, m );
  84                 printk( KERN_INFO "System bus clock: %d.%02dMHz \n",
  85                         S / 1000000, (S % 1000000) / 10000 );
  86         }
  87
  88         return (t) ? (N/1000) : (L/1000);
  89 }
  90
  91 /*
  92  * Return the current mem clock frequency in units of 10kHz as
  93  * reflected by CCCR[A], B, and L
  94  */
  95 unsigned int pxa27x_get_memclk_frequency_10khz(void)
  96 {
  97         unsigned long ccsr, clkcfg;
  98         unsigned int l, L, m, M;
  99         int cccr_a, b;
 100
 101         ccsr = CCSR;
 102         cccr_a = CCCR & (1 << 25);
 103
 104         /* Read clkcfg register: it has turbo, b, half-turbo (and f) */
 105         asm( "mrc\tp14, 0, %0, c6, c0, 0" : "=r" (clkcfg) );
 106         b = clkcfg & (1 << 3);
 107
 108         l = ccsr & 0x1f;
 109         m = (l <= 10) ? 1 : (l <= 20) ? 2 : 4;
 110
 111         L = l * BASE_CLK;
 112         M = (!cccr_a) ? (L/m) : ((b) ? L : (L/2));
 113
 114         return (M / 10000);
 115 }
 116
 117 /*
 118  * Return the current LCD clock frequency in units of 10kHz as
 119  */
 120 static unsigned int pxa27x_get_lcdclk_frequency_10khz(void)
 121 {
 122         unsigned long ccsr;
 123         unsigned int l, L, k, K;
 124
 125         ccsr = CCSR;
 126
 127         l = ccsr & 0x1f;
 128         k = (l <= 7) ? 1 : (l <= 16) ? 2 : 4;
 129
 130         L = l * BASE_CLK;
 131         K = L / k;
 132
 133         return (K / 10000);
 134 }
 135
 136 static unsigned long clk_pxa27x_lcd_getrate(struct clk *clk)
 137 {
 138         return pxa27x_get_lcdclk_frequency_10khz() * 10000;
 139 }
 140
 141 static const struct clkops clk_pxa27x_lcd_ops = {
 142         .enable         = clk_cken_enable,
 143         .disable        = clk_cken_disable,
 144         .getrate        = clk_pxa27x_lcd_getrate,
 145 };
 146
 147 static struct clk pxa27x_clks[] = {
 148         INIT_CK("LCDCLK", LCD,    &clk_pxa27x_lcd_ops, &pxa_device_fb.dev),
 149         INIT_CK("CAMCLK", CAMERA, &clk_pxa27x_lcd_ops, NULL),
 150
 151         INIT_CKEN("UARTCLK", FFUART, 14857000, 1, &pxa_device_ffuart.dev),
 152         INIT_CKEN("UARTCLK", BTUART, 14857000, 1, &pxa_device_btuart.dev),
 153         INIT_CKEN("UARTCLK", STUART, 14857000, 1, NULL),
 154
 155         INIT_CKEN("I2SCLK",  I2S,  14682000, 0, &pxa_device_i2s.dev),
 156         INIT_CKEN("I2CCLK",  I2C,  32842000, 0, &pxa_device_i2c.dev),
 157         INIT_CKEN("UDCCLK",  USB,  48000000, 5, &pxa27x_device_udc.dev),
 158         INIT_CKEN("MMCCLK",  MMC,  19500000, 0, &pxa_device_mci.dev),
 159         INIT_CKEN("FICPCLK", FICP, 48000000, 0, &pxa_device_ficp.dev),
 160
 161         INIT_CKEN("USBCLK", USBHOST, 48000000, 0, &pxa27x_device_ohci.dev),
 162         INIT_CKEN("I2CCLK", PWRI2C, 13000000, 0, &pxa27x_device_i2c_power.dev),
 163         INIT_CKEN("KBDCLK", KEYPAD, 32768, 0, &pxa27x_device_keypad.dev),
 164
 165         INIT_CKEN("SSPCLK", SSP1, 13000000, 0, &pxa27x_device_ssp1.dev),
 166         INIT_CKEN("SSPCLK", SSP2, 13000000, 0, &pxa27x_device_ssp2.dev),
 167         INIT_CKEN("SSPCLK", SSP3, 13000000, 0, &pxa27x_device_ssp3.dev),
 168         INIT_CKEN("PWMCLK", PWM0, 13000000, 0, &pxa27x_device_pwm0.dev),
 169         INIT_CKEN("PWMCLK", PWM1, 13000000, 0, &pxa27x_device_pwm1.dev),
 170
 171         INIT_CKEN("AC97CLK",     AC97,     24576000, 0, NULL),
 172         INIT_CKEN("AC97CONFCLK", AC97CONF, 24576000, 0, NULL),
 173
 174         /*
 175         INIT_CKEN("MSLCLK",  MSL,  48000000, 0, NULL),
 176         INIT_CKEN("USIMCLK", USIM, 48000000, 0, NULL),
 177         INIT_CKEN("MSTKCLK", MEMSTK, 19500000, 0, NULL),
 178         INIT_CKEN("IMCLK",   IM,   0, 0, NULL),
 179         INIT_CKEN("MEMCLK",  MEMC, 0, 0, NULL),
 180         */
 181 };
 182
 183 #ifdef CONFIG_PM
 184
 185 #define SAVE(x)         sleep_save[SLEEP_SAVE_##x] = x
 186 #define RESTORE(x)      x = sleep_save[SLEEP_SAVE_##x]
 187
 188 /*
 189  * List of global PXA peripheral registers to preserve.
 190  * More ones like CP and general purpose register values are preserved
 191  * with the stack pointer in sleep.S.
 192  */
 193 enum {
 194         SLEEP_SAVE_PSTR,
 195         SLEEP_SAVE_CKEN,
 196         SLEEP_SAVE_MDREFR,
 197         SLEEP_SAVE_PCFR,
 198         SLEEP_SAVE_COUNT
 199 };
 200
 201 void pxa27x_cpu_pm_save(unsigned long *sleep_save)
 202 {
 203         SAVE(MDREFR);
 204         SAVE(PCFR);
 205
 206         SAVE(CKEN);
 207         SAVE(PSTR);
 208 }
 209
 210 void pxa27x_cpu_pm_restore(unsigned long *sleep_save)
 211 {
 212         RESTORE(MDREFR);
 213         RESTORE(PCFR);
 214
 215         PSSR = PSSR_RDH | PSSR_PH;
 216
 217         RESTORE(CKEN);
 218         RESTORE(PSTR);
 219 }
 220
 221 void pxa27x_cpu_pm_enter(suspend_state_t state)
 222 {
 223         extern void pxa_cpu_standby(void);
 224
 225         /* ensure voltage-change sequencer not initiated, which hangs */
 226         PCFR &= ~PCFR_FVC;
 227
 228         /* Clear edge-detect status register. */
 229         PEDR = 0xDF12FE1B;
 230
 231         /* Clear reset status */
 232         RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
 233
 234         switch (state) {
 235         case PM_SUSPEND_STANDBY:
 236                 pxa_cpu_standby();
 237                 break;
 238         case PM_SUSPEND_MEM:
 239                 pxa27x_cpu_suspend(PWRMODE_SLEEP);
 240                 break;
 241         }
 242 }
 243
 244 static int pxa27x_cpu_pm_valid(suspend_state_t state)
 245 {
 246         return state == PM_SUSPEND_MEM || state == PM_SUSPEND_STANDBY;
 247 }
 248
 249 static int pxa27x_cpu_pm_prepare(void)
 250 {
 251         /* set resume return address */
 252         PSPR = virt_to_phys(pxa_cpu_resume);
 253         return 0;
 254 }
 255
 256 static void pxa27x_cpu_pm_finish(void)
 257 {
 258         /* ensure not to come back here if it wasn't intended */
 259         PSPR = 0;
 260 }
 261
 262 static struct pxa_cpu_pm_fns pxa27x_cpu_pm_fns = {
 263         .save_count     = SLEEP_SAVE_COUNT,
 264         .save           = pxa27x_cpu_pm_save,
 265         .restore        = pxa27x_cpu_pm_restore,
 266         .valid          = pxa27x_cpu_pm_valid,
 267         .enter          = pxa27x_cpu_pm_enter,
 268         .prepare        = pxa27x_cpu_pm_prepare,
 269         .finish         = pxa27x_cpu_pm_finish,
 270 };
 271
 272 static void __init pxa27x_init_pm(void)
 273 {
 274         pxa_cpu_pm_fns = &pxa27x_cpu_pm_fns;
 275 }
 276 #else
 277 static inline void pxa27x_init_pm(void) {}
 278 #endif
 279
 280 /* PXA27x:  Various gpios can issue wakeup events.  This logic only
 281  * handles the simple cases, not the WEMUX2 and WEMUX3 options
 282  */
 283 static int pxa27x_set_wake(unsigned int irq, unsigned int on)
 284 {
 285         int gpio = IRQ_TO_GPIO(irq);
 286         uint32_t mask;
 287
 288         if (gpio >= 0 && gpio < 128)
 289                 return gpio_set_wake(gpio, on);
 290
 291         if (irq == IRQ_KEYPAD)
 292                 return keypad_set_wake(on);
 293
 294         switch (irq) {
 295         case IRQ_RTCAlrm:
 296                 mask = PWER_RTC;
 297                 break;
 298         case IRQ_USB:
 299                 mask = 1u << 26;
 300                 break;
 301         default:
 302                 return -EINVAL;
 303         }
 304
 305         if (on)
 306                 PWER |= mask;
 307         else
 308                 PWER &=~mask;
 309
 310         return 0;
 311 }
 312
 313 void __init pxa27x_init_irq(void)
 314 {
 315         pxa_init_irq(34, pxa27x_set_wake);
 316         pxa_init_gpio(128, pxa27x_set_wake);
 317 }
 318
 319 /*
 320  * device registration specific to PXA27x.
 321  */
 322
 323 static struct resource i2c_power_resources[] = {
 324         {
 325                 .start  = 0x40f00180,
 326                 .end    = 0x40f001a3,
 327                 .flags  = IORESOURCE_MEM,
 328         }, {
 329                 .start  = IRQ_PWRI2C,
 330                 .end    = IRQ_PWRI2C,
 331                 .flags  = IORESOURCE_IRQ,
 332         },
 333 };
 334
 335 struct platform_device pxa27x_device_i2c_power = {
 336         .name           = "pxa2xx-i2c",
 337         .id             = 1,
 338         .resource       = i2c_power_resources,
 339         .num_resources  = ARRAY_SIZE(i2c_power_resources),
 340 };
 341
 342 void __init pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info)
 343 {
 344         local_irq_disable();
 345         PCFR |= PCFR_PI2CEN;
 346         local_irq_enable();
 347         pxa27x_device_i2c_power.dev.platform_data = info;
 348 }
 349
 350 static struct platform_device *devices[] __initdata = {
 351         &pxa27x_device_udc,
 352         &pxa_device_ffuart,
 353         &pxa_device_btuart,
 354         &pxa_device_stuart,
 355         &pxa_device_i2s,
 356         &pxa_device_rtc,
 357         &pxa27x_device_i2c_power,
 358         &pxa27x_device_ssp1,
 359         &pxa27x_device_ssp2,
 360         &pxa27x_device_ssp3,
 361         &pxa27x_device_pwm0,
 362         &pxa27x_device_pwm1,
 363 };
 364
 365 static struct sys_device pxa27x_sysdev[] = {
 366         {
 367                 .cls    = &pxa_irq_sysclass,
 368         }, {
 369                 .cls    = &pxa2xx_mfp_sysclass,
 370         }, {
 371                 .cls    = &pxa_gpio_sysclass,
 372         },
 373 };
 374
 375 static int __init pxa27x_init(void)
 376 {
 377         int i, ret = 0;
 378
 379         if (cpu_is_pxa27x()) {
 380
 381                 reset_status = RCSR;
 382
 383                 clks_register(pxa27x_clks, ARRAY_SIZE(pxa27x_clks));
 384
 385                 if ((ret = pxa_init_dma(32)))
 386                         return ret;
 387
 388                 pxa27x_init_pm();
 389
 390                 for (i = 0; i < ARRAY_SIZE(pxa27x_sysdev); i++) {
 391                         ret = sysdev_register(&pxa27x_sysdev[i]);
 392                         if (ret)
 393                                 pr_err("failed to register sysdev[%d]\n", i);
 394                 }
 395
 396                 ret = platform_add_devices(devices, ARRAY_SIZE(devices));
 397         }
 398
 399         return ret;
 400 }
 401
 402 postcore_initcall(pxa27x_init);