2 * Driver for ESS Maestro 1/2/2E Sound Card (started 21.8.99)
3 * Copyright (c) by Matze Braun <MatzeBraun@gmx.de>.
4 * Takashi Iwai <tiwai@suse.de>
6 * Most of the driver code comes from Zach Brown(zab@redhat.com)
8 * Rewritted from card-es1938.c source.
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
28 * Notes from Zach Brown about the driver code
30 * Hardware Description
32 * A working Maestro setup contains the Maestro chip wired to a
33 * codec or 2. In the Maestro we have the APUs, the ASSP, and the
34 * Wavecache. The APUs can be though of as virtual audio routing
35 * channels. They can take data from a number of sources and perform
36 * basic encodings of the data. The wavecache is a storehouse for
37 * PCM data. Typically it deals with PCI and interracts with the
38 * APUs. The ASSP is a wacky DSP like device that ESS is loth
39 * to release docs on. Thankfully it isn't required on the Maestro
40 * until you start doing insane things like FM emulation and surround
41 * encoding. The codecs are almost always AC-97 compliant codecs,
42 * but it appears that early Maestros may have had PT101 (an ESS
43 * part?) wired to them. The only real difference in the Maestro
44 * families is external goop like docking capability, memory for
45 * the ASSP, and initialization differences.
49 * We only drive the APU/Wavecache as typical DACs and drive the
50 * mixers in the codecs. There are 64 APUs. We assign 6 to each
51 * /dev/dsp? device. 2 channels for output, and 4 channels for
54 * Each APU can do a number of things, but we only really use
55 * 3 basic functions. For playback we use them to convert PCM
56 * data fetched over PCI by the wavecahche into analog data that
57 * is handed to the codec. One APU for mono, and a pair for stereo.
58 * When in stereo, the combination of smarts in the APU and Wavecache
59 * decide which wavecache gets the left or right channel.
61 * For record we still use the old overly mono system. For each in
62 * coming channel the data comes in from the codec, through a 'input'
63 * APU, through another rate converter APU, and then into memory via
64 * the wavecache and PCI. If its stereo, we mash it back into LRLR in
65 * software. The pass between the 2 APUs is supposedly what requires us
66 * to have a 512 byte buffer sitting around in wavecache/memory.
68 * The wavecache makes our life even more fun. First off, it can
69 * only address the first 28 bits of PCI address space, making it
70 * useless on quite a few architectures. Secondly, its insane.
71 * It claims to fetch from 4 regions of PCI space, each 4 meg in length.
72 * But that doesn't really work. You can only use 1 region. So all our
73 * allocations have to be in 4meg of each other. Booo. Hiss.
74 * So we have a module parameter, dsps_order, that is the order of
75 * the number of dsps to provide. All their buffer space is allocated
76 * on open time. The sonicvibes OSS routines we inherited really want
77 * power of 2 buffers, so we have all those next to each other, then
78 * 512 byte regions for the recording wavecaches. This ends up
79 * wasting quite a bit of memory. The only fixes I can see would be
80 * getting a kernel allocator that could work in zones, or figuring out
81 * just how to coerce the WP into doing what we want.
83 * The indirection of the various registers means we have to spinlock
84 * nearly all register accesses. We have the main register indirection
85 * like the wave cache, maestro registers, etc. Then we have beasts
86 * like the APU interface that is indirect registers gotten at through
87 * the main maestro indirection. Ouch. We spinlock around the actual
88 * ports on a per card basis. This means spinlock activity at each IO
89 * operation, but the only IO operation clusters are in non critical
90 * paths and it makes the code far easier to follow. Interrupts are
91 * blocked while holding the locks because the int handler has to
92 * get at some of them :(. The mixer interface doesn't, however.
93 * We also have an OSS state lock that is thrown around in a few
97 #include <sound/driver.h>
99 #include <linux/delay.h>
100 #include <linux/interrupt.h>
101 #include <linux/init.h>
102 #include <linux/pci.h>
103 #include <linux/slab.h>
104 #include <linux/gameport.h>
105 #include <linux/moduleparam.h>
106 #include <linux/mutex.h>
108 #include <sound/core.h>
109 #include <sound/pcm.h>
110 #include <sound/mpu401.h>
111 #include <sound/ac97_codec.h>
112 #include <sound/initval.h>
114 #define CARD_NAME "ESS Maestro1/2"
115 #define DRIVER_NAME "ES1968"
117 MODULE_DESCRIPTION("ESS Maestro");
118 MODULE_LICENSE("GPL");
119 MODULE_SUPPORTED_DEVICE("{{ESS,Maestro 2e},"
124 #if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
125 #define SUPPORT_JOYSTICK 1
128 static int index
[SNDRV_CARDS
] = SNDRV_DEFAULT_IDX
; /* Index 1-MAX */
129 static char *id
[SNDRV_CARDS
] = SNDRV_DEFAULT_STR
; /* ID for this card */
130 static int enable
[SNDRV_CARDS
] = SNDRV_DEFAULT_ENABLE_PNP
; /* Enable this card */
131 static int total_bufsize
[SNDRV_CARDS
] = {[0 ... (SNDRV_CARDS
- 1)] = 1024 };
132 static int pcm_substreams_p
[SNDRV_CARDS
] = {[0 ... (SNDRV_CARDS
- 1)] = 4 };
133 static int pcm_substreams_c
[SNDRV_CARDS
] = {[0 ... (SNDRV_CARDS
- 1)] = 1 };
134 static int clock
[SNDRV_CARDS
] = {[0 ... (SNDRV_CARDS
- 1)] = 0};
135 static int use_pm
[SNDRV_CARDS
] = {[0 ... (SNDRV_CARDS
- 1)] = 2};
136 static int enable_mpu
[SNDRV_CARDS
] = {[0 ... (SNDRV_CARDS
- 1)] = 2};
137 #ifdef SUPPORT_JOYSTICK
138 static int joystick
[SNDRV_CARDS
];
141 module_param_array(index
, int, NULL
, 0444);
142 MODULE_PARM_DESC(index
, "Index value for " CARD_NAME
" soundcard.");
143 module_param_array(id
, charp
, NULL
, 0444);
144 MODULE_PARM_DESC(id
, "ID string for " CARD_NAME
" soundcard.");
145 module_param_array(enable
, bool, NULL
, 0444);
146 MODULE_PARM_DESC(enable
, "Enable " CARD_NAME
" soundcard.");
147 module_param_array(total_bufsize
, int, NULL
, 0444);
148 MODULE_PARM_DESC(total_bufsize
, "Total buffer size in kB.");
149 module_param_array(pcm_substreams_p
, int, NULL
, 0444);
150 MODULE_PARM_DESC(pcm_substreams_p
, "PCM Playback substreams for " CARD_NAME
" soundcard.");
151 module_param_array(pcm_substreams_c
, int, NULL
, 0444);
152 MODULE_PARM_DESC(pcm_substreams_c
, "PCM Capture substreams for " CARD_NAME
" soundcard.");
153 module_param_array(clock
, int, NULL
, 0444);
154 MODULE_PARM_DESC(clock
, "Clock on " CARD_NAME
" soundcard. (0 = auto-detect)");
155 module_param_array(use_pm
, int, NULL
, 0444);
156 MODULE_PARM_DESC(use_pm
, "Toggle power-management. (0 = off, 1 = on, 2 = auto)");
157 module_param_array(enable_mpu
, int, NULL
, 0444);
158 MODULE_PARM_DESC(enable_mpu
, "Enable MPU401. (0 = off, 1 = on, 2 = auto)");
159 #ifdef SUPPORT_JOYSTICK
160 module_param_array(joystick
, bool, NULL
, 0444);
161 MODULE_PARM_DESC(joystick
, "Enable joystick.");
166 #define NR_APU_REGS 16
169 #define NEC_VERSA_SUBID1 0x80581033
170 #define NEC_VERSA_SUBID2 0x803c1033
173 #define ESS_FMT_STEREO 0x01
174 #define ESS_FMT_16BIT 0x02
176 #define DAC_RUNNING 1
177 #define ADC_RUNNING 2
179 /* Values for the ESM_LEGACY_AUDIO_CONTROL */
181 #define ESS_DISABLE_AUDIO 0x8000
182 #define ESS_ENABLE_SERIAL_IRQ 0x4000
183 #define IO_ADRESS_ALIAS 0x0020
184 #define MPU401_IRQ_ENABLE 0x0010
185 #define MPU401_IO_ENABLE 0x0008
186 #define GAME_IO_ENABLE 0x0004
187 #define FM_IO_ENABLE 0x0002
188 #define SB_IO_ENABLE 0x0001
190 /* Values for the ESM_CONFIG_A */
192 #define PIC_SNOOP1 0x4000
193 #define PIC_SNOOP2 0x2000
194 #define SAFEGUARD 0x0800
195 #define DMA_CLEAR 0x0700
196 #define DMA_DDMA 0x0000
197 #define DMA_TDMA 0x0100
198 #define DMA_PCPCI 0x0200
199 #define POST_WRITE 0x0080
200 #define PCI_TIMING 0x0040
201 #define SWAP_LR 0x0020
202 #define SUBTR_DECODE 0x0002
204 /* Values for the ESM_CONFIG_B */
206 #define SPDIF_CONFB 0x0100
207 #define HWV_CONFB 0x0080
208 #define DEBOUNCE 0x0040
209 #define GPIO_CONFB 0x0020
210 #define CHI_CONFB 0x0010
211 #define IDMA_CONFB 0x0008 /*undoc */
212 #define MIDI_FIX 0x0004 /*undoc */
213 #define IRQ_TO_ISA 0x0001 /*undoc */
215 /* Values for Ring Bus Control B */
216 #define RINGB_2CODEC_ID_MASK 0x0003
217 #define RINGB_DIS_VALIDATION 0x0008
218 #define RINGB_EN_SPDIF 0x0010
219 #define RINGB_EN_2CODEC 0x0020
220 #define RINGB_SING_BIT_DUAL 0x0040
222 /* ****Port Adresses**** */
225 #define ESM_INDEX 0x02
226 #define ESM_DATA 0x00
229 #define ESM_AC97_INDEX 0x30
230 #define ESM_AC97_DATA 0x32
231 #define ESM_RING_BUS_DEST 0x34
232 #define ESM_RING_BUS_CONTR_A 0x36
233 #define ESM_RING_BUS_CONTR_B 0x38
234 #define ESM_RING_BUS_SDO 0x3A
237 #define WC_INDEX 0x10
239 #define WC_CONTROL 0x14
242 #define ASSP_INDEX 0x80
243 #define ASSP_MEMORY 0x82
244 #define ASSP_DATA 0x84
245 #define ASSP_CONTROL_A 0xA2
246 #define ASSP_CONTROL_B 0xA4
247 #define ASSP_CONTROL_C 0xA6
248 #define ASSP_HOSTW_INDEX 0xA8
249 #define ASSP_HOSTW_DATA 0xAA
250 #define ASSP_HOSTW_IRQ 0xAC
252 #define ESM_MPU401_PORT 0x98
254 #define ESM_PORT_HOST_IRQ 0x18
256 #define IDR0_DATA_PORT 0x00
257 #define IDR1_CRAM_POINTER 0x01
258 #define IDR2_CRAM_DATA 0x02
259 #define IDR3_WAVE_DATA 0x03
260 #define IDR4_WAVE_PTR_LOW 0x04
261 #define IDR5_WAVE_PTR_HI 0x05
262 #define IDR6_TIMER_CTRL 0x06
263 #define IDR7_WAVE_ROMRAM 0x07
265 #define WRITEABLE_MAP 0xEFFFFF
266 #define READABLE_MAP 0x64003F
270 #define ESM_LEGACY_AUDIO_CONTROL 0x40
271 #define ESM_ACPI_COMMAND 0x54
272 #define ESM_CONFIG_A 0x50
273 #define ESM_CONFIG_B 0x52
274 #define ESM_DDMA 0x60
277 #define ESM_BOB_ENABLE 0x0001
278 #define ESM_BOB_START 0x0001
280 /* Host IRQ Control Bits */
281 #define ESM_RESET_MAESTRO 0x8000
282 #define ESM_RESET_DIRECTSOUND 0x4000
283 #define ESM_HIRQ_ClkRun 0x0100
284 #define ESM_HIRQ_HW_VOLUME 0x0040
285 #define ESM_HIRQ_HARPO 0x0030 /* What's that? */
286 #define ESM_HIRQ_ASSP 0x0010
287 #define ESM_HIRQ_DSIE 0x0004
288 #define ESM_HIRQ_MPU401 0x0002
289 #define ESM_HIRQ_SB 0x0001
291 /* Host IRQ Status Bits */
292 #define ESM_MPU401_IRQ 0x02
293 #define ESM_SB_IRQ 0x01
294 #define ESM_SOUND_IRQ 0x04
295 #define ESM_ASSP_IRQ 0x10
296 #define ESM_HWVOL_IRQ 0x40
298 #define ESS_SYSCLK 50000000
299 #define ESM_BOB_FREQ 200
300 #define ESM_BOB_FREQ_MAX 800
302 #define ESM_FREQ_ESM1 (49152000L / 1024L) /* default rate 48000 */
303 #define ESM_FREQ_ESM2 (50000000L / 1024L)
305 /* APU Modes: reg 0x00, bit 4-7 */
306 #define ESM_APU_MODE_SHIFT 4
307 #define ESM_APU_MODE_MASK (0xf << 4)
308 #define ESM_APU_OFF 0x00
309 #define ESM_APU_16BITLINEAR 0x01 /* 16-Bit Linear Sample Player */
310 #define ESM_APU_16BITSTEREO 0x02 /* 16-Bit Stereo Sample Player */
311 #define ESM_APU_8BITLINEAR 0x03 /* 8-Bit Linear Sample Player */
312 #define ESM_APU_8BITSTEREO 0x04 /* 8-Bit Stereo Sample Player */
313 #define ESM_APU_8BITDIFF 0x05 /* 8-Bit Differential Sample Playrer */
314 #define ESM_APU_DIGITALDELAY 0x06 /* Digital Delay Line */
315 #define ESM_APU_DUALTAP 0x07 /* Dual Tap Reader */
316 #define ESM_APU_CORRELATOR 0x08 /* Correlator */
317 #define ESM_APU_INPUTMIXER 0x09 /* Input Mixer */
318 #define ESM_APU_WAVETABLE 0x0A /* Wave Table Mode */
319 #define ESM_APU_SRCONVERTOR 0x0B /* Sample Rate Convertor */
320 #define ESM_APU_16BITPINGPONG 0x0C /* 16-Bit Ping-Pong Sample Player */
321 #define ESM_APU_RESERVED1 0x0D /* Reserved 1 */
322 #define ESM_APU_RESERVED2 0x0E /* Reserved 2 */
323 #define ESM_APU_RESERVED3 0x0F /* Reserved 3 */
326 #define ESM_APU_FILTER_Q_SHIFT 0
327 #define ESM_APU_FILTER_Q_MASK (3 << 0)
328 /* APU Filtey Q Control */
329 #define ESM_APU_FILTER_LESSQ 0x00
330 #define ESM_APU_FILTER_MOREQ 0x03
332 #define ESM_APU_FILTER_TYPE_SHIFT 2
333 #define ESM_APU_FILTER_TYPE_MASK (3 << 2)
334 #define ESM_APU_ENV_TYPE_SHIFT 8
335 #define ESM_APU_ENV_TYPE_MASK (3 << 8)
336 #define ESM_APU_ENV_STATE_SHIFT 10
337 #define ESM_APU_ENV_STATE_MASK (3 << 10)
338 #define ESM_APU_END_CURVE (1 << 12)
339 #define ESM_APU_INT_ON_LOOP (1 << 13)
340 #define ESM_APU_DMA_ENABLE (1 << 14)
343 #define ESM_APU_SUBMIX_GROUP_SHIRT 0
344 #define ESM_APU_SUBMIX_GROUP_MASK (7 << 0)
345 #define ESM_APU_SUBMIX_MODE (1 << 3)
346 #define ESM_APU_6dB (1 << 4)
347 #define ESM_APU_DUAL_EFFECT (1 << 5)
348 #define ESM_APU_EFFECT_CHANNELS_SHIFT 6
349 #define ESM_APU_EFFECT_CHANNELS_MASK (3 << 6)
352 #define ESM_APU_STEP_SIZE_MASK 0x0fff
355 #define ESM_APU_PHASE_SHIFT 0
356 #define ESM_APU_PHASE_MASK (0xff << 0)
357 #define ESM_APU_WAVE64K_PAGE_SHIFT 8 /* most 8bit of wave start offset */
358 #define ESM_APU_WAVE64K_PAGE_MASK (0xff << 8)
360 /* reg 0x05 - wave start offset */
361 /* reg 0x06 - wave end offset */
362 /* reg 0x07 - wave loop length */
365 #define ESM_APU_EFFECT_GAIN_SHIFT 0
366 #define ESM_APU_EFFECT_GAIN_MASK (0xff << 0)
367 #define ESM_APU_TREMOLO_DEPTH_SHIFT 8
368 #define ESM_APU_TREMOLO_DEPTH_MASK (0xf << 8)
369 #define ESM_APU_TREMOLO_RATE_SHIFT 12
370 #define ESM_APU_TREMOLO_RATE_MASK (0xf << 12)
373 /* bit 0-7 amplitude dest? */
374 #define ESM_APU_AMPLITUDE_NOW_SHIFT 8
375 #define ESM_APU_AMPLITUDE_NOW_MASK (0xff << 8)
378 #define ESM_APU_POLAR_PAN_SHIFT 0
379 #define ESM_APU_POLAR_PAN_MASK (0x3f << 0)
380 /* Polar Pan Control */
381 #define ESM_APU_PAN_CENTER_CIRCLE 0x00
382 #define ESM_APU_PAN_MIDDLE_RADIUS 0x01
383 #define ESM_APU_PAN_OUTSIDE_RADIUS 0x02
385 #define ESM_APU_FILTER_TUNING_SHIFT 8
386 #define ESM_APU_FILTER_TUNING_MASK (0xff << 8)
389 #define ESM_APU_DATA_SRC_A_SHIFT 0
390 #define ESM_APU_DATA_SRC_A_MASK (0x7f << 0)
391 #define ESM_APU_INV_POL_A (1 << 7)
392 #define ESM_APU_DATA_SRC_B_SHIFT 8
393 #define ESM_APU_DATA_SRC_B_MASK (0x7f << 8)
394 #define ESM_APU_INV_POL_B (1 << 15)
396 #define ESM_APU_VIBRATO_RATE_SHIFT 0
397 #define ESM_APU_VIBRATO_RATE_MASK (0xf << 0)
398 #define ESM_APU_VIBRATO_DEPTH_SHIFT 4
399 #define ESM_APU_VIBRATO_DEPTH_MASK (0xf << 4)
400 #define ESM_APU_VIBRATO_PHASE_SHIFT 8
401 #define ESM_APU_VIBRATO_PHASE_MASK (0xff << 8)
404 #define ESM_APU_RADIUS_SELECT (1 << 6)
406 /* APU Filter Control */
407 #define ESM_APU_FILTER_2POLE_LOPASS 0x00
408 #define ESM_APU_FILTER_2POLE_BANDPASS 0x01
409 #define ESM_APU_FILTER_2POLE_HIPASS 0x02
410 #define ESM_APU_FILTER_1POLE_LOPASS 0x03
411 #define ESM_APU_FILTER_1POLE_HIPASS 0x04
412 #define ESM_APU_FILTER_OFF 0x05
415 #define ESM_APU_ATFP_AMPLITUDE 0x00
416 #define ESM_APU_ATFP_TREMELO 0x01
417 #define ESM_APU_ATFP_FILTER 0x02
418 #define ESM_APU_ATFP_PAN 0x03
421 #define ESM_APU_ATFP_FLG_OFF 0x00
422 #define ESM_APU_ATFP_FLG_WAIT 0x01
423 #define ESM_APU_ATFP_FLG_DONE 0x02
424 #define ESM_APU_ATFP_FLG_INPROCESS 0x03
427 /* capture mixing buffer size */
428 #define ESM_MEM_ALIGN 0x1000
429 #define ESM_MIXBUF_SIZE 0x400
431 #define ESM_MODE_PLAY 0
432 #define ESM_MODE_CAPTURE 1
442 /* bits in the acpi masks */
443 #define ACPI_12MHZ ( 1 << 15)
444 #define ACPI_24MHZ ( 1 << 14)
445 #define ACPI_978 ( 1 << 13)
446 #define ACPI_SPDIF ( 1 << 12)
447 #define ACPI_GLUE ( 1 << 11)
448 #define ACPI__10 ( 1 << 10) /* reserved */
449 #define ACPI_PCIINT ( 1 << 9)
450 #define ACPI_HV ( 1 << 8) /* hardware volume */
451 #define ACPI_GPIO ( 1 << 7)
452 #define ACPI_ASSP ( 1 << 6)
453 #define ACPI_SB ( 1 << 5) /* sb emul */
454 #define ACPI_FM ( 1 << 4) /* fm emul */
455 #define ACPI_RB ( 1 << 3) /* ringbus / aclink */
456 #define ACPI_MIDI ( 1 << 2)
457 #define ACPI_GP ( 1 << 1) /* game port */
458 #define ACPI_WP ( 1 << 0) /* wave processor */
460 #define ACPI_ALL (0xffff)
461 #define ACPI_SLEEP (~(ACPI_SPDIF|ACPI_ASSP|ACPI_SB|ACPI_FM| \
462 ACPI_MIDI|ACPI_GP|ACPI_WP))
463 #define ACPI_NONE (ACPI__10)
465 /* these masks indicate which units we care about at
467 static u16 acpi_state_mask
[] = {
468 [ACPI_D0
] = ACPI_ALL
,
469 [ACPI_D1
] = ACPI_SLEEP
,
470 [ACPI_D2
] = ACPI_SLEEP
,
471 [ACPI_D3
] = ACPI_NONE
475 /* APU use in the driver */
476 enum snd_enum_apu_type
{
479 ESM_APU_PCM_RATECONV
,
485 TYPE_MAESTRO
, TYPE_MAESTRO2
, TYPE_MAESTRO2E
490 struct snd_dma_buffer buf
;
491 int empty
; /* status */
492 struct list_head list
;
495 /* Playback Channel */
502 /* playback/capture pcm buffer */
503 struct esm_memory
*memory
;
504 /* capture mixer buffer */
505 struct esm_memory
*mixbuf
;
507 unsigned int hwptr
; /* current hw pointer in bytes */
508 unsigned int count
; /* sample counter in bytes */
509 unsigned int dma_size
; /* total buffer size in bytes */
510 unsigned int frag_size
; /* period size in bytes */
511 unsigned int wav_shift
;
512 u16 base
[4]; /* offset for ptr */
514 /* stereo/16bit flag */
516 int mode
; /* playback / capture */
518 int bob_freq
; /* required timer frequency */
520 struct snd_pcm_substream
*substream
;
523 struct list_head list
;
532 int total_bufsize
; /* in bytes */
534 int playback_streams
, capture_streams
;
536 unsigned int clock
; /* clock */
537 /* for clock measurement */
538 unsigned int in_measurement
: 1;
539 unsigned int measure_apu
;
540 unsigned int measure_lastpos
;
541 unsigned int measure_count
;
544 struct snd_dma_buffer dma
;
548 unsigned long io_port
;
551 struct snd_card
*card
;
553 int do_pm
; /* power-management enabled */
555 /* DMA memory block */
556 struct list_head buf_list
;
559 struct snd_ac97
*ac97
;
560 struct snd_kcontrol
*master_switch
; /* for h/w volume control */
561 struct snd_kcontrol
*master_volume
;
563 struct snd_rawmidi
*rmidi
;
566 spinlock_t ac97_lock
;
567 struct tasklet_struct hwvol_tq
;
568 unsigned int in_suspend
;
572 int bobclient
; /* active timer instancs */
573 int bob_freq
; /* timer frequency */
574 struct mutex memory_mutex
; /* memory lock */
577 unsigned char apu
[NR_APUS
];
579 /* active substreams */
580 struct list_head substream_list
;
581 spinlock_t substream_lock
;
584 u16 apu_map
[NR_APUS
][NR_APU_REGS
];
587 #ifdef SUPPORT_JOYSTICK
588 struct gameport
*gameport
;
592 static irqreturn_t
snd_es1968_interrupt(int irq
, void *dev_id
, struct pt_regs
*regs
);
594 static struct pci_device_id snd_es1968_ids
[] = {
596 { 0x1285, 0x0100, PCI_ANY_ID
, PCI_ANY_ID
, PCI_CLASS_MULTIMEDIA_AUDIO
<< 8, 0xffff00, TYPE_MAESTRO
},
598 { 0x125d, 0x1968, PCI_ANY_ID
, PCI_ANY_ID
, PCI_CLASS_MULTIMEDIA_AUDIO
<< 8, 0xffff00, TYPE_MAESTRO2
},
600 { 0x125d, 0x1978, PCI_ANY_ID
, PCI_ANY_ID
, PCI_CLASS_MULTIMEDIA_AUDIO
<< 8, 0xffff00, TYPE_MAESTRO2E
},
604 MODULE_DEVICE_TABLE(pci
, snd_es1968_ids
);
606 /* *********************
608 *********************/
611 static void __maestro_write(struct es1968
*chip
, u16 reg
, u16 data
)
613 outw(reg
, chip
->io_port
+ ESM_INDEX
);
614 outw(data
, chip
->io_port
+ ESM_DATA
);
615 chip
->maestro_map
[reg
] = data
;
618 static inline void maestro_write(struct es1968
*chip
, u16 reg
, u16 data
)
621 spin_lock_irqsave(&chip
->reg_lock
, flags
);
622 __maestro_write(chip
, reg
, data
);
623 spin_unlock_irqrestore(&chip
->reg_lock
, flags
);
627 static u16
__maestro_read(struct es1968
*chip
, u16 reg
)
629 if (READABLE_MAP
& (1 << reg
)) {
630 outw(reg
, chip
->io_port
+ ESM_INDEX
);
631 chip
->maestro_map
[reg
] = inw(chip
->io_port
+ ESM_DATA
);
633 return chip
->maestro_map
[reg
];
636 static inline u16
maestro_read(struct es1968
*chip
, u16 reg
)
640 spin_lock_irqsave(&chip
->reg_lock
, flags
);
641 result
= __maestro_read(chip
, reg
);
642 spin_unlock_irqrestore(&chip
->reg_lock
, flags
);
646 /* Wait for the codec bus to be free */
647 static int snd_es1968_ac97_wait(struct es1968
*chip
)
649 int timeout
= 100000;
651 while (timeout
-- > 0) {
652 if (!(inb(chip
->io_port
+ ESM_AC97_INDEX
) & 1))
656 snd_printd("es1968: ac97 timeout\n");
657 return 1; /* timeout */
660 static void snd_es1968_ac97_write(struct snd_ac97
*ac97
, unsigned short reg
, unsigned short val
)
662 struct es1968
*chip
= ac97
->private_data
;
665 snd_es1968_ac97_wait(chip
);
668 spin_lock_irqsave(&chip
->ac97_lock
, flags
);
669 outw(val
, chip
->io_port
+ ESM_AC97_DATA
);
671 outb(reg
, chip
->io_port
+ ESM_AC97_INDEX
);
673 spin_unlock_irqrestore(&chip
->ac97_lock
, flags
);
676 static unsigned short snd_es1968_ac97_read(struct snd_ac97
*ac97
, unsigned short reg
)
679 struct es1968
*chip
= ac97
->private_data
;
682 snd_es1968_ac97_wait(chip
);
684 spin_lock_irqsave(&chip
->ac97_lock
, flags
);
685 outb(reg
| 0x80, chip
->io_port
+ ESM_AC97_INDEX
);
688 if (! snd_es1968_ac97_wait(chip
)) {
689 data
= inw(chip
->io_port
+ ESM_AC97_DATA
);
692 spin_unlock_irqrestore(&chip
->ac97_lock
, flags
);
698 static void apu_index_set(struct es1968
*chip
, u16 index
)
701 __maestro_write(chip
, IDR1_CRAM_POINTER
, index
);
702 for (i
= 0; i
< 1000; i
++)
703 if (__maestro_read(chip
, IDR1_CRAM_POINTER
) == index
)
705 snd_printd("es1968: APU register select failed. (Timeout)\n");
709 static void apu_data_set(struct es1968
*chip
, u16 data
)
712 for (i
= 0; i
< 1000; i
++) {
713 if (__maestro_read(chip
, IDR0_DATA_PORT
) == data
)
715 __maestro_write(chip
, IDR0_DATA_PORT
, data
);
717 snd_printd("es1968: APU register set probably failed (Timeout)!\n");
721 static void __apu_set_register(struct es1968
*chip
, u16 channel
, u8 reg
, u16 data
)
723 snd_assert(channel
< NR_APUS
, return);
725 chip
->apu_map
[channel
][reg
] = data
;
727 reg
|= (channel
<< 4);
728 apu_index_set(chip
, reg
);
729 apu_data_set(chip
, data
);
732 static void apu_set_register(struct es1968
*chip
, u16 channel
, u8 reg
, u16 data
)
735 spin_lock_irqsave(&chip
->reg_lock
, flags
);
736 __apu_set_register(chip
, channel
, reg
, data
);
737 spin_unlock_irqrestore(&chip
->reg_lock
, flags
);
740 static u16
__apu_get_register(struct es1968
*chip
, u16 channel
, u8 reg
)
742 snd_assert(channel
< NR_APUS
, return 0);
743 reg
|= (channel
<< 4);
744 apu_index_set(chip
, reg
);
745 return __maestro_read(chip
, IDR0_DATA_PORT
);
748 static u16
apu_get_register(struct es1968
*chip
, u16 channel
, u8 reg
)
752 spin_lock_irqsave(&chip
->reg_lock
, flags
);
753 v
= __apu_get_register(chip
, channel
, reg
);
754 spin_unlock_irqrestore(&chip
->reg_lock
, flags
);
758 #if 0 /* ASSP is not supported */
760 static void assp_set_register(struct es1968
*chip
, u32 reg
, u32 value
)
764 spin_lock_irqsave(&chip
->reg_lock
, flags
);
765 outl(reg
, chip
->io_port
+ ASSP_INDEX
);
766 outl(value
, chip
->io_port
+ ASSP_DATA
);
767 spin_unlock_irqrestore(&chip
->reg_lock
, flags
);
770 static u32
assp_get_register(struct es1968
*chip
, u32 reg
)
775 spin_lock_irqsave(&chip
->reg_lock
, flags
);
776 outl(reg
, chip
->io_port
+ ASSP_INDEX
);
777 value
= inl(chip
->io_port
+ ASSP_DATA
);
778 spin_unlock_irqrestore(&chip
->reg_lock
, flags
);
785 static void wave_set_register(struct es1968
*chip
, u16 reg
, u16 value
)
789 spin_lock_irqsave(&chip
->reg_lock
, flags
);
790 outw(reg
, chip
->io_port
+ WC_INDEX
);
791 outw(value
, chip
->io_port
+ WC_DATA
);
792 spin_unlock_irqrestore(&chip
->reg_lock
, flags
);
795 static u16
wave_get_register(struct es1968
*chip
, u16 reg
)
800 spin_lock_irqsave(&chip
->reg_lock
, flags
);
801 outw(reg
, chip
->io_port
+ WC_INDEX
);
802 value
= inw(chip
->io_port
+ WC_DATA
);
803 spin_unlock_irqrestore(&chip
->reg_lock
, flags
);
808 /* *******************
812 static void snd_es1968_bob_stop(struct es1968
*chip
)
816 reg
= __maestro_read(chip
, 0x11);
817 reg
&= ~ESM_BOB_ENABLE
;
818 __maestro_write(chip
, 0x11, reg
);
819 reg
= __maestro_read(chip
, 0x17);
820 reg
&= ~ESM_BOB_START
;
821 __maestro_write(chip
, 0x17, reg
);
824 static void snd_es1968_bob_start(struct es1968
*chip
)
829 /* compute ideal interrupt frequency for buffer size & play rate */
830 /* first, find best prescaler value to match freq */
831 for (prescale
= 5; prescale
< 12; prescale
++)
832 if (chip
->bob_freq
> (ESS_SYSCLK
>> (prescale
+ 9)))
835 /* next, back off prescaler whilst getting divider into optimum range */
837 while ((prescale
> 5) && (divide
< 32)) {
843 /* now fine-tune the divider for best match */
844 for (; divide
< 31; divide
++)
846 ((ESS_SYSCLK
>> (prescale
+ 9)) / (divide
+ 1))) break;
848 /* divide = 0 is illegal, but don't let prescale = 4! */
853 } else if (divide
> 1)
856 __maestro_write(chip
, 6, 0x9000 | (prescale
<< 5) | divide
); /* set reg */
858 /* Now set IDR 11/17 */
859 __maestro_write(chip
, 0x11, __maestro_read(chip
, 0x11) | 1);
860 __maestro_write(chip
, 0x17, __maestro_read(chip
, 0x17) | 1);
863 /* call with substream spinlock */
864 static void snd_es1968_bob_inc(struct es1968
*chip
, int freq
)
867 if (chip
->bobclient
== 1) {
868 chip
->bob_freq
= freq
;
869 snd_es1968_bob_start(chip
);
870 } else if (chip
->bob_freq
< freq
) {
871 snd_es1968_bob_stop(chip
);
872 chip
->bob_freq
= freq
;
873 snd_es1968_bob_start(chip
);
877 /* call with substream spinlock */
878 static void snd_es1968_bob_dec(struct es1968
*chip
)
881 if (chip
->bobclient
<= 0)
882 snd_es1968_bob_stop(chip
);
883 else if (chip
->bob_freq
> ESM_BOB_FREQ
) {
884 /* check reduction of timer frequency */
886 int max_freq
= ESM_BOB_FREQ
;
887 list_for_each(p
, &chip
->substream_list
) {
888 struct esschan
*es
= list_entry(p
, struct esschan
, list
);
889 if (max_freq
< es
->bob_freq
)
890 max_freq
= es
->bob_freq
;
892 if (max_freq
!= chip
->bob_freq
) {
893 snd_es1968_bob_stop(chip
);
894 chip
->bob_freq
= max_freq
;
895 snd_es1968_bob_start(chip
);
901 snd_es1968_calc_bob_rate(struct es1968
*chip
, struct esschan
*es
,
902 struct snd_pcm_runtime
*runtime
)
904 /* we acquire 4 interrupts per period for precise control.. */
905 int freq
= runtime
->rate
* 4;
906 if (es
->fmt
& ESS_FMT_STEREO
)
908 if (es
->fmt
& ESS_FMT_16BIT
)
910 freq
/= es
->frag_size
;
911 if (freq
< ESM_BOB_FREQ
)
913 else if (freq
> ESM_BOB_FREQ_MAX
)
914 freq
= ESM_BOB_FREQ_MAX
;
923 static u32
snd_es1968_compute_rate(struct es1968
*chip
, u32 freq
)
925 u32 rate
= (freq
<< 16) / chip
->clock
;
926 #if 0 /* XXX: do we need this? */
933 /* get current pointer */
934 static inline unsigned int
935 snd_es1968_get_dma_ptr(struct es1968
*chip
, struct esschan
*es
)
939 offset
= apu_get_register(chip
, es
->apu
[0], 5);
941 offset
-= es
->base
[0];
943 return (offset
& 0xFFFE); /* hardware is in words */
946 static void snd_es1968_apu_set_freq(struct es1968
*chip
, int apu
, int freq
)
948 apu_set_register(chip
, apu
, 2,
949 (apu_get_register(chip
, apu
, 2) & 0x00FF) |
950 ((freq
& 0xff) << 8) | 0x10);
951 apu_set_register(chip
, apu
, 3, freq
>> 8);
955 static inline void snd_es1968_trigger_apu(struct es1968
*esm
, int apu
, int mode
)
957 /* set the APU mode */
958 __apu_set_register(esm
, apu
, 0,
959 (__apu_get_register(esm
, apu
, 0) & 0xff0f) |
963 static void snd_es1968_pcm_start(struct es1968
*chip
, struct esschan
*es
)
965 spin_lock(&chip
->reg_lock
);
966 __apu_set_register(chip
, es
->apu
[0], 5, es
->base
[0]);
967 snd_es1968_trigger_apu(chip
, es
->apu
[0], es
->apu_mode
[0]);
968 if (es
->mode
== ESM_MODE_CAPTURE
) {
969 __apu_set_register(chip
, es
->apu
[2], 5, es
->base
[2]);
970 snd_es1968_trigger_apu(chip
, es
->apu
[2], es
->apu_mode
[2]);
972 if (es
->fmt
& ESS_FMT_STEREO
) {
973 __apu_set_register(chip
, es
->apu
[1], 5, es
->base
[1]);
974 snd_es1968_trigger_apu(chip
, es
->apu
[1], es
->apu_mode
[1]);
975 if (es
->mode
== ESM_MODE_CAPTURE
) {
976 __apu_set_register(chip
, es
->apu
[3], 5, es
->base
[3]);
977 snd_es1968_trigger_apu(chip
, es
->apu
[3], es
->apu_mode
[3]);
980 spin_unlock(&chip
->reg_lock
);
983 static void snd_es1968_pcm_stop(struct es1968
*chip
, struct esschan
*es
)
985 spin_lock(&chip
->reg_lock
);
986 snd_es1968_trigger_apu(chip
, es
->apu
[0], 0);
987 snd_es1968_trigger_apu(chip
, es
->apu
[1], 0);
988 if (es
->mode
== ESM_MODE_CAPTURE
) {
989 snd_es1968_trigger_apu(chip
, es
->apu
[2], 0);
990 snd_es1968_trigger_apu(chip
, es
->apu
[3], 0);
992 spin_unlock(&chip
->reg_lock
);
995 /* set the wavecache control reg */
996 static void snd_es1968_program_wavecache(struct es1968
*chip
, struct esschan
*es
,
997 int channel
, u32 addr
, int capture
)
999 u32 tmpval
= (addr
- 0x10) & 0xFFF8;
1002 if (!(es
->fmt
& ESS_FMT_16BIT
))
1003 tmpval
|= 4; /* 8bit */
1004 if (es
->fmt
& ESS_FMT_STEREO
)
1005 tmpval
|= 2; /* stereo */
1008 /* set the wavecache control reg */
1009 wave_set_register(chip
, es
->apu
[channel
] << 3, tmpval
);
1012 es
->wc_map
[channel
] = tmpval
;
1017 static void snd_es1968_playback_setup(struct es1968
*chip
, struct esschan
*es
,
1018 struct snd_pcm_runtime
*runtime
)
1024 unsigned long flags
;
1027 size
= es
->dma_size
>> es
->wav_shift
;
1029 if (es
->fmt
& ESS_FMT_STEREO
)
1032 for (channel
= 0; channel
<= high_apu
; channel
++) {
1033 apu
= es
->apu
[channel
];
1035 snd_es1968_program_wavecache(chip
, es
, channel
, es
->memory
->buf
.addr
, 0);
1037 /* Offset to PCMBAR */
1038 pa
= es
->memory
->buf
.addr
;
1039 pa
-= chip
->dma
.addr
;
1040 pa
>>= 1; /* words */
1042 pa
|= 0x00400000; /* System RAM (Bit 22) */
1044 if (es
->fmt
& ESS_FMT_STEREO
) {
1047 pa
|= 0x00800000; /* (Bit 23) */
1048 if (es
->fmt
& ESS_FMT_16BIT
)
1052 /* base offset of dma calcs when reading the pointer
1054 es
->base
[channel
] = pa
& 0xFFFF;
1056 for (i
= 0; i
< 16; i
++)
1057 apu_set_register(chip
, apu
, i
, 0x0000);
1059 /* Load the buffer into the wave engine */
1060 apu_set_register(chip
, apu
, 4, ((pa
>> 16) & 0xFF) << 8);
1061 apu_set_register(chip
, apu
, 5, pa
& 0xFFFF);
1062 apu_set_register(chip
, apu
, 6, (pa
+ size
) & 0xFFFF);
1063 /* setting loop == sample len */
1064 apu_set_register(chip
, apu
, 7, size
);
1066 /* clear effects/env.. */
1067 apu_set_register(chip
, apu
, 8, 0x0000);
1068 /* set amp now to 0xd0 (?), low byte is 'amplitude dest'? */
1069 apu_set_register(chip
, apu
, 9, 0xD000);
1071 /* clear routing stuff */
1072 apu_set_register(chip
, apu
, 11, 0x0000);
1073 /* dma on, no envelopes, filter to all 1s) */
1074 apu_set_register(chip
, apu
, 0, 0x400F);
1076 if (es
->fmt
& ESS_FMT_16BIT
)
1077 es
->apu_mode
[channel
] = ESM_APU_16BITLINEAR
;
1079 es
->apu_mode
[channel
] = ESM_APU_8BITLINEAR
;
1081 if (es
->fmt
& ESS_FMT_STEREO
) {
1082 /* set panning: left or right */
1083 /* Check: different panning. On my Canyon 3D Chipset the
1084 Channels are swapped. I don't know, about the output
1085 to the SPDif Link. Perhaps you have to change this
1086 and not the APU Regs 4-5. */
1087 apu_set_register(chip
, apu
, 10,
1088 0x8F00 | (channel
? 0 : 0x10));
1089 es
->apu_mode
[channel
] += 1; /* stereo */
1091 apu_set_register(chip
, apu
, 10, 0x8F08);
1094 spin_lock_irqsave(&chip
->reg_lock
, flags
);
1095 /* clear WP interrupts */
1096 outw(1, chip
->io_port
+ 0x04);
1097 /* enable WP ints */
1098 outw(inw(chip
->io_port
+ ESM_PORT_HOST_IRQ
) | ESM_HIRQ_DSIE
, chip
->io_port
+ ESM_PORT_HOST_IRQ
);
1099 spin_unlock_irqrestore(&chip
->reg_lock
, flags
);
1101 freq
= runtime
->rate
;
1109 if (!(es
->fmt
& ESS_FMT_16BIT
) && !(es
->fmt
& ESS_FMT_STEREO
))
1112 freq
= snd_es1968_compute_rate(chip
, freq
);
1114 /* Load the frequency, turn on 6dB */
1115 snd_es1968_apu_set_freq(chip
, es
->apu
[0], freq
);
1116 snd_es1968_apu_set_freq(chip
, es
->apu
[1], freq
);
1120 static void init_capture_apu(struct es1968
*chip
, struct esschan
*es
, int channel
,
1121 unsigned int pa
, unsigned int bsize
,
1122 int mode
, int route
)
1124 int i
, apu
= es
->apu
[channel
];
1126 es
->apu_mode
[channel
] = mode
;
1128 /* set the wavecache control reg */
1129 snd_es1968_program_wavecache(chip
, es
, channel
, pa
, 1);
1131 /* Offset to PCMBAR */
1132 pa
-= chip
->dma
.addr
;
1133 pa
>>= 1; /* words */
1135 /* base offset of dma calcs when reading the pointer
1137 es
->base
[channel
] = pa
& 0xFFFF;
1138 pa
|= 0x00400000; /* bit 22 -> System RAM */
1140 /* Begin loading the APU */
1141 for (i
= 0; i
< 16; i
++)
1142 apu_set_register(chip
, apu
, i
, 0x0000);
1144 /* need to enable subgroups.. and we should probably
1145 have different groups for different /dev/dsps.. */
1146 apu_set_register(chip
, apu
, 2, 0x8);
1148 /* Load the buffer into the wave engine */
1149 apu_set_register(chip
, apu
, 4, ((pa
>> 16) & 0xFF) << 8);
1150 apu_set_register(chip
, apu
, 5, pa
& 0xFFFF);
1151 apu_set_register(chip
, apu
, 6, (pa
+ bsize
) & 0xFFFF);
1152 apu_set_register(chip
, apu
, 7, bsize
);
1153 /* clear effects/env.. */
1154 apu_set_register(chip
, apu
, 8, 0x00F0);
1155 /* amplitude now? sure. why not. */
1156 apu_set_register(chip
, apu
, 9, 0x0000);
1157 /* set filter tune, radius, polar pan */
1158 apu_set_register(chip
, apu
, 10, 0x8F08);
1160 apu_set_register(chip
, apu
, 11, route
);
1161 /* dma on, no envelopes, filter to all 1s) */
1162 apu_set_register(chip
, apu
, 0, 0x400F);
1165 static void snd_es1968_capture_setup(struct es1968
*chip
, struct esschan
*es
,
1166 struct snd_pcm_runtime
*runtime
)
1170 unsigned long flags
;
1172 size
= es
->dma_size
>> es
->wav_shift
;
1177 2 = mono/left Input Mixer
1178 3 = right Input Mixer
1180 /* data seems to flow from the codec, through an apu into
1181 the 'mixbuf' bit of page, then through the SRC apu
1182 and out to the real 'buffer'. ok. sure. */
1184 /* input mixer (left/mono) */
1185 /* parallel in crap, see maestro reg 0xC [8-11] */
1186 init_capture_apu(chip
, es
, 2,
1187 es
->mixbuf
->buf
.addr
, ESM_MIXBUF_SIZE
/4, /* in words */
1188 ESM_APU_INPUTMIXER
, 0x14);
1189 /* SRC (left/mono); get input from inputing apu */
1190 init_capture_apu(chip
, es
, 0, es
->memory
->buf
.addr
, size
,
1191 ESM_APU_SRCONVERTOR
, es
->apu
[2]);
1192 if (es
->fmt
& ESS_FMT_STEREO
) {
1193 /* input mixer (right) */
1194 init_capture_apu(chip
, es
, 3,
1195 es
->mixbuf
->buf
.addr
+ ESM_MIXBUF_SIZE
/2,
1196 ESM_MIXBUF_SIZE
/4, /* in words */
1197 ESM_APU_INPUTMIXER
, 0x15);
1199 init_capture_apu(chip
, es
, 1,
1200 es
->memory
->buf
.addr
+ size
*2, size
,
1201 ESM_APU_SRCONVERTOR
, es
->apu
[3]);
1204 freq
= runtime
->rate
;
1205 /* Sample Rate conversion APUs don't like 0x10000 for their rate */
1211 freq
= snd_es1968_compute_rate(chip
, freq
);
1213 /* Load the frequency, turn on 6dB */
1214 snd_es1968_apu_set_freq(chip
, es
->apu
[0], freq
);
1215 snd_es1968_apu_set_freq(chip
, es
->apu
[1], freq
);
1217 /* fix mixer rate at 48khz. and its _must_ be 0x10000. */
1219 snd_es1968_apu_set_freq(chip
, es
->apu
[2], freq
);
1220 snd_es1968_apu_set_freq(chip
, es
->apu
[3], freq
);
1222 spin_lock_irqsave(&chip
->reg_lock
, flags
);
1223 /* clear WP interrupts */
1224 outw(1, chip
->io_port
+ 0x04);
1225 /* enable WP ints */
1226 outw(inw(chip
->io_port
+ ESM_PORT_HOST_IRQ
) | ESM_HIRQ_DSIE
, chip
->io_port
+ ESM_PORT_HOST_IRQ
);
1227 spin_unlock_irqrestore(&chip
->reg_lock
, flags
);
1230 /*******************
1232 *******************/
1234 static int snd_es1968_pcm_prepare(struct snd_pcm_substream
*substream
)
1236 struct es1968
*chip
= snd_pcm_substream_chip(substream
);
1237 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
1238 struct esschan
*es
= runtime
->private_data
;
1240 es
->dma_size
= snd_pcm_lib_buffer_bytes(substream
);
1241 es
->frag_size
= snd_pcm_lib_period_bytes(substream
);
1243 es
->wav_shift
= 1; /* maestro handles always 16bit */
1245 if (snd_pcm_format_width(runtime
->format
) == 16)
1246 es
->fmt
|= ESS_FMT_16BIT
;
1247 if (runtime
->channels
> 1) {
1248 es
->fmt
|= ESS_FMT_STEREO
;
1249 if (es
->fmt
& ESS_FMT_16BIT
) /* 8bit is already word shifted */
1252 es
->bob_freq
= snd_es1968_calc_bob_rate(chip
, es
, runtime
);
1256 snd_es1968_playback_setup(chip
, es
, runtime
);
1258 case ESM_MODE_CAPTURE
:
1259 snd_es1968_capture_setup(chip
, es
, runtime
);
1266 static int snd_es1968_pcm_trigger(struct snd_pcm_substream
*substream
, int cmd
)
1268 struct es1968
*chip
= snd_pcm_substream_chip(substream
);
1269 struct esschan
*es
= substream
->runtime
->private_data
;
1271 spin_lock(&chip
->substream_lock
);
1273 case SNDRV_PCM_TRIGGER_START
:
1274 case SNDRV_PCM_TRIGGER_RESUME
:
1277 snd_es1968_bob_inc(chip
, es
->bob_freq
);
1280 snd_es1968_pcm_start(chip
, es
);
1283 case SNDRV_PCM_TRIGGER_STOP
:
1284 case SNDRV_PCM_TRIGGER_SUSPEND
:
1287 snd_es1968_pcm_stop(chip
, es
);
1289 snd_es1968_bob_dec(chip
);
1292 spin_unlock(&chip
->substream_lock
);
1296 static snd_pcm_uframes_t
snd_es1968_pcm_pointer(struct snd_pcm_substream
*substream
)
1298 struct es1968
*chip
= snd_pcm_substream_chip(substream
);
1299 struct esschan
*es
= substream
->runtime
->private_data
;
1302 ptr
= snd_es1968_get_dma_ptr(chip
, es
) << es
->wav_shift
;
1304 return bytes_to_frames(substream
->runtime
, ptr
% es
->dma_size
);
1307 static struct snd_pcm_hardware snd_es1968_playback
= {
1308 .info
= (SNDRV_PCM_INFO_MMAP
|
1309 SNDRV_PCM_INFO_MMAP_VALID
|
1310 SNDRV_PCM_INFO_INTERLEAVED
|
1311 SNDRV_PCM_INFO_BLOCK_TRANSFER
|
1312 /*SNDRV_PCM_INFO_PAUSE |*/
1313 SNDRV_PCM_INFO_RESUME
),
1314 .formats
= SNDRV_PCM_FMTBIT_U8
| SNDRV_PCM_FMTBIT_S16_LE
,
1315 .rates
= SNDRV_PCM_RATE_CONTINUOUS
| SNDRV_PCM_RATE_8000_48000
,
1320 .buffer_bytes_max
= 65536,
1321 .period_bytes_min
= 256,
1322 .period_bytes_max
= 65536,
1324 .periods_max
= 1024,
1328 static struct snd_pcm_hardware snd_es1968_capture
= {
1329 .info
= (SNDRV_PCM_INFO_NONINTERLEAVED
|
1330 SNDRV_PCM_INFO_MMAP
|
1331 SNDRV_PCM_INFO_MMAP_VALID
|
1332 SNDRV_PCM_INFO_BLOCK_TRANSFER
|
1333 /*SNDRV_PCM_INFO_PAUSE |*/
1334 SNDRV_PCM_INFO_RESUME
),
1335 .formats
= /*SNDRV_PCM_FMTBIT_U8 |*/ SNDRV_PCM_FMTBIT_S16_LE
,
1336 .rates
= SNDRV_PCM_RATE_CONTINUOUS
| SNDRV_PCM_RATE_8000_48000
,
1341 .buffer_bytes_max
= 65536,
1342 .period_bytes_min
= 256,
1343 .period_bytes_max
= 65536,
1345 .periods_max
= 1024,
1349 /* *************************
1350 * DMA memory management *
1351 *************************/
1353 /* Because the Maestro can only take addresses relative to the PCM base address
1356 static int calc_available_memory_size(struct es1968
*chip
)
1358 struct list_head
*p
;
1361 mutex_lock(&chip
->memory_mutex
);
1362 list_for_each(p
, &chip
->buf_list
) {
1363 struct esm_memory
*buf
= list_entry(p
, struct esm_memory
, list
);
1364 if (buf
->empty
&& buf
->buf
.bytes
> max_size
)
1365 max_size
= buf
->buf
.bytes
;
1367 mutex_unlock(&chip
->memory_mutex
);
1368 if (max_size
>= 128*1024)
1369 max_size
= 127*1024;
1373 /* allocate a new memory chunk with the specified size */
1374 static struct esm_memory
*snd_es1968_new_memory(struct es1968
*chip
, int size
)
1376 struct esm_memory
*buf
;
1377 struct list_head
*p
;
1379 size
= ((size
+ ESM_MEM_ALIGN
- 1) / ESM_MEM_ALIGN
) * ESM_MEM_ALIGN
;
1380 mutex_lock(&chip
->memory_mutex
);
1381 list_for_each(p
, &chip
->buf_list
) {
1382 buf
= list_entry(p
, struct esm_memory
, list
);
1383 if (buf
->empty
&& buf
->buf
.bytes
>= size
)
1386 mutex_unlock(&chip
->memory_mutex
);
1390 if (buf
->buf
.bytes
> size
) {
1391 struct esm_memory
*chunk
= kmalloc(sizeof(*chunk
), GFP_KERNEL
);
1392 if (chunk
== NULL
) {
1393 mutex_unlock(&chip
->memory_mutex
);
1396 chunk
->buf
= buf
->buf
;
1397 chunk
->buf
.bytes
-= size
;
1398 chunk
->buf
.area
+= size
;
1399 chunk
->buf
.addr
+= size
;
1401 buf
->buf
.bytes
= size
;
1402 list_add(&chunk
->list
, &buf
->list
);
1405 mutex_unlock(&chip
->memory_mutex
);
1409 /* free a memory chunk */
1410 static void snd_es1968_free_memory(struct es1968
*chip
, struct esm_memory
*buf
)
1412 struct esm_memory
*chunk
;
1414 mutex_lock(&chip
->memory_mutex
);
1416 if (buf
->list
.prev
!= &chip
->buf_list
) {
1417 chunk
= list_entry(buf
->list
.prev
, struct esm_memory
, list
);
1419 chunk
->buf
.bytes
+= buf
->buf
.bytes
;
1420 list_del(&buf
->list
);
1425 if (buf
->list
.next
!= &chip
->buf_list
) {
1426 chunk
= list_entry(buf
->list
.next
, struct esm_memory
, list
);
1428 buf
->buf
.bytes
+= chunk
->buf
.bytes
;
1429 list_del(&chunk
->list
);
1433 mutex_unlock(&chip
->memory_mutex
);
1436 static void snd_es1968_free_dmabuf(struct es1968
*chip
)
1438 struct list_head
*p
;
1440 if (! chip
->dma
.area
)
1442 snd_dma_reserve_buf(&chip
->dma
, snd_dma_pci_buf_id(chip
->pci
));
1443 while ((p
= chip
->buf_list
.next
) != &chip
->buf_list
) {
1444 struct esm_memory
*chunk
= list_entry(p
, struct esm_memory
, list
);
1450 static int __devinit
1451 snd_es1968_init_dmabuf(struct es1968
*chip
)
1454 struct esm_memory
*chunk
;
1456 chip
->dma
.dev
.type
= SNDRV_DMA_TYPE_DEV
;
1457 chip
->dma
.dev
.dev
= snd_dma_pci_data(chip
->pci
);
1458 if (! snd_dma_get_reserved_buf(&chip
->dma
, snd_dma_pci_buf_id(chip
->pci
))) {
1459 err
= snd_dma_alloc_pages_fallback(SNDRV_DMA_TYPE_DEV
,
1460 snd_dma_pci_data(chip
->pci
),
1461 chip
->total_bufsize
, &chip
->dma
);
1462 if (err
< 0 || ! chip
->dma
.area
) {
1463 snd_printk(KERN_ERR
"es1968: can't allocate dma pages for size %d\n",
1464 chip
->total_bufsize
);
1467 if ((chip
->dma
.addr
+ chip
->dma
.bytes
- 1) & ~((1 << 28) - 1)) {
1468 snd_dma_free_pages(&chip
->dma
);
1469 snd_printk(KERN_ERR
"es1968: DMA buffer beyond 256MB.\n");
1474 INIT_LIST_HEAD(&chip
->buf_list
);
1475 /* allocate an empty chunk */
1476 chunk
= kmalloc(sizeof(*chunk
), GFP_KERNEL
);
1477 if (chunk
== NULL
) {
1478 snd_es1968_free_dmabuf(chip
);
1481 memset(chip
->dma
.area
, 0, ESM_MEM_ALIGN
);
1482 chunk
->buf
= chip
->dma
;
1483 chunk
->buf
.area
+= ESM_MEM_ALIGN
;
1484 chunk
->buf
.addr
+= ESM_MEM_ALIGN
;
1485 chunk
->buf
.bytes
-= ESM_MEM_ALIGN
;
1487 list_add(&chunk
->list
, &chip
->buf_list
);
1492 /* setup the dma_areas */
1493 /* buffer is extracted from the pre-allocated memory chunk */
1494 static int snd_es1968_hw_params(struct snd_pcm_substream
*substream
,
1495 struct snd_pcm_hw_params
*hw_params
)
1497 struct es1968
*chip
= snd_pcm_substream_chip(substream
);
1498 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
1499 struct esschan
*chan
= runtime
->private_data
;
1500 int size
= params_buffer_bytes(hw_params
);
1503 if (chan
->memory
->buf
.bytes
>= size
) {
1504 runtime
->dma_bytes
= size
;
1507 snd_es1968_free_memory(chip
, chan
->memory
);
1509 chan
->memory
= snd_es1968_new_memory(chip
, size
);
1510 if (chan
->memory
== NULL
) {
1511 // snd_printd("cannot allocate dma buffer: size = %d\n", size);
1514 snd_pcm_set_runtime_buffer(substream
, &chan
->memory
->buf
);
1515 return 1; /* area was changed */
1518 /* remove dma areas if allocated */
1519 static int snd_es1968_hw_free(struct snd_pcm_substream
*substream
)
1521 struct es1968
*chip
= snd_pcm_substream_chip(substream
);
1522 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
1523 struct esschan
*chan
;
1525 if (runtime
->private_data
== NULL
)
1527 chan
= runtime
->private_data
;
1529 snd_es1968_free_memory(chip
, chan
->memory
);
1530 chan
->memory
= NULL
;
1539 static int snd_es1968_alloc_apu_pair(struct es1968
*chip
, int type
)
1543 for (apu
= 0; apu
< NR_APUS
; apu
+= 2) {
1544 if (chip
->apu
[apu
] == ESM_APU_FREE
&&
1545 chip
->apu
[apu
+ 1] == ESM_APU_FREE
) {
1546 chip
->apu
[apu
] = chip
->apu
[apu
+ 1] = type
;
1556 static void snd_es1968_free_apu_pair(struct es1968
*chip
, int apu
)
1558 chip
->apu
[apu
] = chip
->apu
[apu
+ 1] = ESM_APU_FREE
;
1566 static int snd_es1968_playback_open(struct snd_pcm_substream
*substream
)
1568 struct es1968
*chip
= snd_pcm_substream_chip(substream
);
1569 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
1574 apu1
= snd_es1968_alloc_apu_pair(chip
, ESM_APU_PCM_PLAY
);
1578 es
= kzalloc(sizeof(*es
), GFP_KERNEL
);
1580 snd_es1968_free_apu_pair(chip
, apu1
);
1585 es
->apu
[1] = apu1
+ 1;
1586 es
->apu_mode
[0] = 0;
1587 es
->apu_mode
[1] = 0;
1589 es
->substream
= substream
;
1590 es
->mode
= ESM_MODE_PLAY
;
1592 runtime
->private_data
= es
;
1593 runtime
->hw
= snd_es1968_playback
;
1594 runtime
->hw
.buffer_bytes_max
= runtime
->hw
.period_bytes_max
=
1595 calc_available_memory_size(chip
);
1597 snd_pcm_hw_constraint_step(runtime
, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES
,
1600 spin_lock_irq(&chip
->substream_lock
);
1601 list_add(&es
->list
, &chip
->substream_list
);
1602 spin_unlock_irq(&chip
->substream_lock
);
1607 static int snd_es1968_capture_open(struct snd_pcm_substream
*substream
)
1609 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
1610 struct es1968
*chip
= snd_pcm_substream_chip(substream
);
1614 apu1
= snd_es1968_alloc_apu_pair(chip
, ESM_APU_PCM_CAPTURE
);
1617 apu2
= snd_es1968_alloc_apu_pair(chip
, ESM_APU_PCM_RATECONV
);
1619 snd_es1968_free_apu_pair(chip
, apu1
);
1623 es
= kzalloc(sizeof(*es
), GFP_KERNEL
);
1625 snd_es1968_free_apu_pair(chip
, apu1
);
1626 snd_es1968_free_apu_pair(chip
, apu2
);
1631 es
->apu
[1] = apu1
+ 1;
1633 es
->apu
[3] = apu2
+ 1;
1634 es
->apu_mode
[0] = 0;
1635 es
->apu_mode
[1] = 0;
1636 es
->apu_mode
[2] = 0;
1637 es
->apu_mode
[3] = 0;
1639 es
->substream
= substream
;
1640 es
->mode
= ESM_MODE_CAPTURE
;
1643 if ((es
->mixbuf
= snd_es1968_new_memory(chip
, ESM_MIXBUF_SIZE
)) == NULL
) {
1644 snd_es1968_free_apu_pair(chip
, apu1
);
1645 snd_es1968_free_apu_pair(chip
, apu2
);
1649 memset(es
->mixbuf
->buf
.area
, 0, ESM_MIXBUF_SIZE
);
1651 runtime
->private_data
= es
;
1652 runtime
->hw
= snd_es1968_capture
;
1653 runtime
->hw
.buffer_bytes_max
= runtime
->hw
.period_bytes_max
=
1654 calc_available_memory_size(chip
) - 1024; /* keep MIXBUF size */
1656 snd_pcm_hw_constraint_step(runtime
, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES
,
1659 spin_lock_irq(&chip
->substream_lock
);
1660 list_add(&es
->list
, &chip
->substream_list
);
1661 spin_unlock_irq(&chip
->substream_lock
);
1666 static int snd_es1968_playback_close(struct snd_pcm_substream
*substream
)
1668 struct es1968
*chip
= snd_pcm_substream_chip(substream
);
1671 if (substream
->runtime
->private_data
== NULL
)
1673 es
= substream
->runtime
->private_data
;
1674 spin_lock_irq(&chip
->substream_lock
);
1675 list_del(&es
->list
);
1676 spin_unlock_irq(&chip
->substream_lock
);
1677 snd_es1968_free_apu_pair(chip
, es
->apu
[0]);
1683 static int snd_es1968_capture_close(struct snd_pcm_substream
*substream
)
1685 struct es1968
*chip
= snd_pcm_substream_chip(substream
);
1688 if (substream
->runtime
->private_data
== NULL
)
1690 es
= substream
->runtime
->private_data
;
1691 spin_lock_irq(&chip
->substream_lock
);
1692 list_del(&es
->list
);
1693 spin_unlock_irq(&chip
->substream_lock
);
1694 snd_es1968_free_memory(chip
, es
->mixbuf
);
1695 snd_es1968_free_apu_pair(chip
, es
->apu
[0]);
1696 snd_es1968_free_apu_pair(chip
, es
->apu
[2]);
1702 static struct snd_pcm_ops snd_es1968_playback_ops
= {
1703 .open
= snd_es1968_playback_open
,
1704 .close
= snd_es1968_playback_close
,
1705 .ioctl
= snd_pcm_lib_ioctl
,
1706 .hw_params
= snd_es1968_hw_params
,
1707 .hw_free
= snd_es1968_hw_free
,
1708 .prepare
= snd_es1968_pcm_prepare
,
1709 .trigger
= snd_es1968_pcm_trigger
,
1710 .pointer
= snd_es1968_pcm_pointer
,
1713 static struct snd_pcm_ops snd_es1968_capture_ops
= {
1714 .open
= snd_es1968_capture_open
,
1715 .close
= snd_es1968_capture_close
,
1716 .ioctl
= snd_pcm_lib_ioctl
,
1717 .hw_params
= snd_es1968_hw_params
,
1718 .hw_free
= snd_es1968_hw_free
,
1719 .prepare
= snd_es1968_pcm_prepare
,
1720 .trigger
= snd_es1968_pcm_trigger
,
1721 .pointer
= snd_es1968_pcm_pointer
,
1728 #define CLOCK_MEASURE_BUFSIZE 16768 /* enough large for a single shot */
1730 static void __devinit
es1968_measure_clock(struct es1968
*chip
)
1733 unsigned int pa
, offset
, t
;
1734 struct esm_memory
*memory
;
1735 struct timeval start_time
, stop_time
;
1737 if (chip
->clock
== 0)
1738 chip
->clock
= 48000; /* default clock value */
1740 /* search 2 APUs (although one apu is enough) */
1741 if ((apu
= snd_es1968_alloc_apu_pair(chip
, ESM_APU_PCM_PLAY
)) < 0) {
1742 snd_printk(KERN_ERR
"Hmm, cannot find empty APU pair!?\n");
1745 if ((memory
= snd_es1968_new_memory(chip
, CLOCK_MEASURE_BUFSIZE
)) == NULL
) {
1746 snd_printk(KERN_ERR
"cannot allocate dma buffer - using default clock %d\n", chip
->clock
);
1747 snd_es1968_free_apu_pair(chip
, apu
);
1751 memset(memory
->buf
.area
, 0, CLOCK_MEASURE_BUFSIZE
);
1753 wave_set_register(chip
, apu
<< 3, (memory
->buf
.addr
- 0x10) & 0xfff8);
1755 pa
= (unsigned int)((memory
->buf
.addr
- chip
->dma
.addr
) >> 1);
1756 pa
|= 0x00400000; /* System RAM (Bit 22) */
1758 /* initialize apu */
1759 for (i
= 0; i
< 16; i
++)
1760 apu_set_register(chip
, apu
, i
, 0x0000);
1762 apu_set_register(chip
, apu
, 0, 0x400f);
1763 apu_set_register(chip
, apu
, 4, ((pa
>> 16) & 0xff) << 8);
1764 apu_set_register(chip
, apu
, 5, pa
& 0xffff);
1765 apu_set_register(chip
, apu
, 6, (pa
+ CLOCK_MEASURE_BUFSIZE
/2) & 0xffff);
1766 apu_set_register(chip
, apu
, 7, CLOCK_MEASURE_BUFSIZE
/2);
1767 apu_set_register(chip
, apu
, 8, 0x0000);
1768 apu_set_register(chip
, apu
, 9, 0xD000);
1769 apu_set_register(chip
, apu
, 10, 0x8F08);
1770 apu_set_register(chip
, apu
, 11, 0x0000);
1771 spin_lock_irq(&chip
->reg_lock
);
1772 outw(1, chip
->io_port
+ 0x04); /* clear WP interrupts */
1773 outw(inw(chip
->io_port
+ ESM_PORT_HOST_IRQ
) | ESM_HIRQ_DSIE
, chip
->io_port
+ ESM_PORT_HOST_IRQ
); /* enable WP ints */
1774 spin_unlock_irq(&chip
->reg_lock
);
1776 snd_es1968_apu_set_freq(chip
, apu
, ((unsigned int)48000 << 16) / chip
->clock
); /* 48000 Hz */
1778 chip
->in_measurement
= 1;
1779 chip
->measure_apu
= apu
;
1780 spin_lock_irq(&chip
->reg_lock
);
1781 snd_es1968_bob_inc(chip
, ESM_BOB_FREQ
);
1782 __apu_set_register(chip
, apu
, 5, pa
& 0xffff);
1783 snd_es1968_trigger_apu(chip
, apu
, ESM_APU_16BITLINEAR
);
1784 do_gettimeofday(&start_time
);
1785 spin_unlock_irq(&chip
->reg_lock
);
1787 spin_lock_irq(&chip
->reg_lock
);
1788 offset
= __apu_get_register(chip
, apu
, 5);
1789 do_gettimeofday(&stop_time
);
1790 snd_es1968_trigger_apu(chip
, apu
, 0); /* stop */
1791 snd_es1968_bob_dec(chip
);
1792 chip
->in_measurement
= 0;
1793 spin_unlock_irq(&chip
->reg_lock
);
1795 /* check the current position */
1796 offset
-= (pa
& 0xffff);
1798 offset
+= chip
->measure_count
* (CLOCK_MEASURE_BUFSIZE
/2);
1800 t
= stop_time
.tv_sec
- start_time
.tv_sec
;
1802 if (stop_time
.tv_usec
< start_time
.tv_usec
)
1803 t
-= start_time
.tv_usec
- stop_time
.tv_usec
;
1805 t
+= stop_time
.tv_usec
- start_time
.tv_usec
;
1807 snd_printk(KERN_ERR
"?? calculation error..\n");
1810 offset
= (offset
/ t
) * 1000 + ((offset
% t
) * 1000) / t
;
1811 if (offset
< 47500 || offset
> 48500) {
1812 if (offset
>= 40000 && offset
<= 50000)
1813 chip
->clock
= (chip
->clock
* offset
) / 48000;
1815 printk(KERN_INFO
"es1968: clocking to %d\n", chip
->clock
);
1817 snd_es1968_free_memory(chip
, memory
);
1818 snd_es1968_free_apu_pair(chip
, apu
);
1825 static void snd_es1968_pcm_free(struct snd_pcm
*pcm
)
1827 struct es1968
*esm
= pcm
->private_data
;
1828 snd_es1968_free_dmabuf(esm
);
1832 static int __devinit
1833 snd_es1968_pcm(struct es1968
*chip
, int device
)
1835 struct snd_pcm
*pcm
;
1838 /* get DMA buffer */
1839 if ((err
= snd_es1968_init_dmabuf(chip
)) < 0)
1843 wave_set_register(chip
, 0x01FC, chip
->dma
.addr
>> 12);
1844 wave_set_register(chip
, 0x01FD, chip
->dma
.addr
>> 12);
1845 wave_set_register(chip
, 0x01FE, chip
->dma
.addr
>> 12);
1846 wave_set_register(chip
, 0x01FF, chip
->dma
.addr
>> 12);
1848 if ((err
= snd_pcm_new(chip
->card
, "ESS Maestro", device
,
1849 chip
->playback_streams
,
1850 chip
->capture_streams
, &pcm
)) < 0)
1853 pcm
->private_data
= chip
;
1854 pcm
->private_free
= snd_es1968_pcm_free
;
1856 snd_pcm_set_ops(pcm
, SNDRV_PCM_STREAM_PLAYBACK
, &snd_es1968_playback_ops
);
1857 snd_pcm_set_ops(pcm
, SNDRV_PCM_STREAM_CAPTURE
, &snd_es1968_capture_ops
);
1859 pcm
->info_flags
= 0;
1861 strcpy(pcm
->name
, "ESS Maestro");
1871 static void snd_es1968_update_pcm(struct es1968
*chip
, struct esschan
*es
)
1875 struct snd_pcm_substream
*subs
= es
->substream
;
1877 if (subs
== NULL
|| !es
->running
)
1880 hwptr
= snd_es1968_get_dma_ptr(chip
, es
) << es
->wav_shift
;
1881 hwptr
%= es
->dma_size
;
1883 diff
= (es
->dma_size
+ hwptr
- es
->hwptr
) % es
->dma_size
;
1888 if (es
->count
> es
->frag_size
) {
1889 spin_unlock(&chip
->substream_lock
);
1890 snd_pcm_period_elapsed(subs
);
1891 spin_lock(&chip
->substream_lock
);
1892 es
->count
%= es
->frag_size
;
1898 static void es1968_update_hw_volume(unsigned long private_data
)
1900 struct es1968
*chip
= (struct es1968
*) private_data
;
1902 unsigned long flags
;
1904 /* Figure out which volume control button was pushed,
1905 based on differences from the default register
1907 x
= inb(chip
->io_port
+ 0x1c);
1908 /* Reset the volume control registers. */
1909 outb(0x88, chip
->io_port
+ 0x1c);
1910 outb(0x88, chip
->io_port
+ 0x1d);
1911 outb(0x88, chip
->io_port
+ 0x1e);
1912 outb(0x88, chip
->io_port
+ 0x1f);
1914 if (chip
->in_suspend
)
1917 if (! chip
->master_switch
|| ! chip
->master_volume
)
1920 /* FIXME: we can't call snd_ac97_* functions since here is in tasklet. */
1921 spin_lock_irqsave(&chip
->ac97_lock
, flags
);
1922 val
= chip
->ac97
->regs
[AC97_MASTER
];
1926 chip
->ac97
->regs
[AC97_MASTER
] = val
;
1927 outw(val
, chip
->io_port
+ ESM_AC97_DATA
);
1928 outb(AC97_MASTER
, chip
->io_port
+ ESM_AC97_INDEX
);
1929 snd_ctl_notify(chip
->card
, SNDRV_CTL_EVENT_MASK_VALUE
,
1930 &chip
->master_switch
->id
);
1933 if (((x
>>1) & 7) > 4) {
1935 if ((val
& 0xff) > 0)
1937 if ((val
& 0xff00) > 0)
1941 if ((val
& 0xff) < 0x1f)
1943 if ((val
& 0xff00) < 0x1f00)
1946 chip
->ac97
->regs
[AC97_MASTER
] = val
;
1947 outw(val
, chip
->io_port
+ ESM_AC97_DATA
);
1948 outb(AC97_MASTER
, chip
->io_port
+ ESM_AC97_INDEX
);
1949 snd_ctl_notify(chip
->card
, SNDRV_CTL_EVENT_MASK_VALUE
,
1950 &chip
->master_volume
->id
);
1952 spin_unlock_irqrestore(&chip
->ac97_lock
, flags
);
1958 static irqreturn_t
snd_es1968_interrupt(int irq
, void *dev_id
, struct pt_regs
*regs
)
1960 struct es1968
*chip
= dev_id
;
1963 if (!(event
= inb(chip
->io_port
+ 0x1A)))
1966 outw(inw(chip
->io_port
+ 4) & 1, chip
->io_port
+ 4);
1968 if (event
& ESM_HWVOL_IRQ
)
1969 tasklet_hi_schedule(&chip
->hwvol_tq
); /* we'll do this later */
1971 /* else ack 'em all, i imagine */
1972 outb(0xFF, chip
->io_port
+ 0x1A);
1974 if ((event
& ESM_MPU401_IRQ
) && chip
->rmidi
) {
1975 snd_mpu401_uart_interrupt(irq
, chip
->rmidi
->private_data
, regs
);
1978 if (event
& ESM_SOUND_IRQ
) {
1979 struct list_head
*p
;
1980 spin_lock(&chip
->substream_lock
);
1981 list_for_each(p
, &chip
->substream_list
) {
1982 struct esschan
*es
= list_entry(p
, struct esschan
, list
);
1984 snd_es1968_update_pcm(chip
, es
);
1986 spin_unlock(&chip
->substream_lock
);
1987 if (chip
->in_measurement
) {
1988 unsigned int curp
= __apu_get_register(chip
, chip
->measure_apu
, 5);
1989 if (curp
< chip
->measure_lastpos
)
1990 chip
->measure_count
++;
1991 chip
->measure_lastpos
= curp
;
2002 static int __devinit
2003 snd_es1968_mixer(struct es1968
*chip
)
2005 struct snd_ac97_bus
*pbus
;
2006 struct snd_ac97_template ac97
;
2007 struct snd_ctl_elem_id id
;
2009 static struct snd_ac97_bus_ops ops
= {
2010 .write
= snd_es1968_ac97_write
,
2011 .read
= snd_es1968_ac97_read
,
2014 if ((err
= snd_ac97_bus(chip
->card
, 0, &ops
, NULL
, &pbus
)) < 0)
2016 pbus
->no_vra
= 1; /* ES1968 doesn't need VRA */
2018 memset(&ac97
, 0, sizeof(ac97
));
2019 ac97
.private_data
= chip
;
2020 if ((err
= snd_ac97_mixer(pbus
, &ac97
, &chip
->ac97
)) < 0)
2023 /* attach master switch / volumes for h/w volume control */
2024 memset(&id
, 0, sizeof(id
));
2025 id
.iface
= SNDRV_CTL_ELEM_IFACE_MIXER
;
2026 strcpy(id
.name
, "Master Playback Switch");
2027 chip
->master_switch
= snd_ctl_find_id(chip
->card
, &id
);
2028 memset(&id
, 0, sizeof(id
));
2029 id
.iface
= SNDRV_CTL_ELEM_IFACE_MIXER
;
2030 strcpy(id
.name
, "Master Playback Volume");
2031 chip
->master_volume
= snd_ctl_find_id(chip
->card
, &id
);
2040 static void snd_es1968_ac97_reset(struct es1968
*chip
)
2042 unsigned long ioaddr
= chip
->io_port
;
2044 unsigned short save_ringbus_a
;
2045 unsigned short save_68
;
2049 /* save configuration */
2050 save_ringbus_a
= inw(ioaddr
+ 0x36);
2052 //outw(inw(ioaddr + 0x38) & 0xfffc, ioaddr + 0x38); /* clear second codec id? */
2053 /* set command/status address i/o to 1st codec */
2054 outw(inw(ioaddr
+ 0x3a) & 0xfffc, ioaddr
+ 0x3a);
2055 outw(inw(ioaddr
+ 0x3c) & 0xfffc, ioaddr
+ 0x3c);
2057 /* disable ac link */
2058 outw(0x0000, ioaddr
+ 0x36);
2059 save_68
= inw(ioaddr
+ 0x68);
2060 pci_read_config_word(chip
->pci
, 0x58, &w
); /* something magical with gpio and bus arb. */
2061 pci_read_config_dword(chip
->pci
, PCI_SUBSYSTEM_VENDOR_ID
, &vend
);
2064 outw(0xfffe, ioaddr
+ 0x64); /* unmask gpio 0 */
2065 outw(0x0001, ioaddr
+ 0x68); /* gpio write */
2066 outw(0x0000, ioaddr
+ 0x60); /* write 0 to gpio 0 */
2068 outw(0x0001, ioaddr
+ 0x60); /* write 1 to gpio 1 */
2071 outw(save_68
| 0x1, ioaddr
+ 0x68); /* now restore .. */
2072 outw((inw(ioaddr
+ 0x38) & 0xfffc) | 0x1, ioaddr
+ 0x38);
2073 outw((inw(ioaddr
+ 0x3a) & 0xfffc) | 0x1, ioaddr
+ 0x3a);
2074 outw((inw(ioaddr
+ 0x3c) & 0xfffc) | 0x1, ioaddr
+ 0x3c);
2076 /* now the second codec */
2077 /* disable ac link */
2078 outw(0x0000, ioaddr
+ 0x36);
2079 outw(0xfff7, ioaddr
+ 0x64); /* unmask gpio 3 */
2080 save_68
= inw(ioaddr
+ 0x68);
2081 outw(0x0009, ioaddr
+ 0x68); /* gpio write 0 & 3 ?? */
2082 outw(0x0001, ioaddr
+ 0x60); /* write 1 to gpio */
2084 outw(0x0009, ioaddr
+ 0x60); /* write 9 to gpio */
2086 //outw(inw(ioaddr + 0x38) & 0xfffc, ioaddr + 0x38);
2087 outw(inw(ioaddr
+ 0x3a) & 0xfffc, ioaddr
+ 0x3a);
2088 outw(inw(ioaddr
+ 0x3c) & 0xfffc, ioaddr
+ 0x3c);
2090 #if 0 /* the loop here needs to be much better if we want it.. */
2091 snd_printk(KERN_INFO
"trying software reset\n");
2092 /* try and do a software reset */
2093 outb(0x80 | 0x7c, ioaddr
+ 0x30);
2095 if ((inw(ioaddr
+ 0x30) & 1) == 0) {
2096 if (inb(ioaddr
+ 0x32) != 0)
2099 outb(0x80 | 0x7d, ioaddr
+ 0x30);
2100 if (((inw(ioaddr
+ 0x30) & 1) == 0)
2101 && (inb(ioaddr
+ 0x32) != 0))
2103 outb(0x80 | 0x7f, ioaddr
+ 0x30);
2104 if (((inw(ioaddr
+ 0x30) & 1) == 0)
2105 && (inb(ioaddr
+ 0x32) != 0))
2110 outb(inb(ioaddr
+ 0x37) | 0x08, ioaddr
+ 0x37); /* do a software reset */
2111 msleep(500); /* oh my.. */
2112 outb(inb(ioaddr
+ 0x37) & ~0x08,
2115 outw(0x80, ioaddr
+ 0x30);
2116 for (w
= 0; w
< 10000; w
++) {
2117 if ((inw(ioaddr
+ 0x30) & 1) == 0)
2123 if (vend
== NEC_VERSA_SUBID1
|| vend
== NEC_VERSA_SUBID2
) {
2124 /* turn on external amp? */
2125 outw(0xf9ff, ioaddr
+ 0x64);
2126 outw(inw(ioaddr
+ 0x68) | 0x600, ioaddr
+ 0x68);
2127 outw(0x0209, ioaddr
+ 0x60);
2131 outw(save_ringbus_a
, ioaddr
+ 0x36);
2133 /* Turn on the 978 docking chip.
2134 First frob the "master output enable" bit,
2135 then set most of the playback volume control registers to max. */
2136 outb(inb(ioaddr
+0xc0)|(1<<5), ioaddr
+0xc0);
2137 outb(0xff, ioaddr
+0xc3);
2138 outb(0xff, ioaddr
+0xc4);
2139 outb(0xff, ioaddr
+0xc6);
2140 outb(0xff, ioaddr
+0xc8);
2141 outb(0x3f, ioaddr
+0xcf);
2142 outb(0x3f, ioaddr
+0xd0);
2145 static void snd_es1968_reset(struct es1968
*chip
)
2148 outw(ESM_RESET_MAESTRO
| ESM_RESET_DIRECTSOUND
,
2149 chip
->io_port
+ ESM_PORT_HOST_IRQ
);
2151 outw(0x0000, chip
->io_port
+ ESM_PORT_HOST_IRQ
);
2158 static void snd_es1968_set_acpi(struct es1968
*chip
, int state
)
2160 u16 active_mask
= acpi_state_mask
[state
];
2162 pci_set_power_state(chip
->pci
, state
);
2163 /* make sure the units we care about are on
2164 XXX we might want to do this before state flipping? */
2165 pci_write_config_word(chip
->pci
, 0x54, ~ active_mask
);
2166 pci_write_config_word(chip
->pci
, 0x56, ~ active_mask
);
2171 * initialize maestro chip
2173 static void snd_es1968_chip_init(struct es1968
*chip
)
2175 struct pci_dev
*pci
= chip
->pci
;
2177 unsigned long iobase
= chip
->io_port
;
2181 /* We used to muck around with pci config space that
2182 * we had no business messing with. We don't know enough
2183 * about the machine to know which DMA mode is appropriate,
2184 * etc. We were guessing wrong on some machines and making
2185 * them unhappy. We now trust in the BIOS to do things right,
2186 * which almost certainly means a new host of problems will
2187 * arise with broken BIOS implementations. screw 'em.
2188 * We're already intolerant of machines that don't assign
2192 /* do config work at full power */
2193 snd_es1968_set_acpi(chip
, ACPI_D0
);
2196 pci_read_config_word(pci
, ESM_CONFIG_A
, &w
);
2198 w
&= ~DMA_CLEAR
; /* Clear DMA bits */
2199 w
&= ~(PIC_SNOOP1
| PIC_SNOOP2
); /* Clear Pic Snoop Mode Bits */
2200 w
&= ~SAFEGUARD
; /* Safeguard off */
2201 w
|= POST_WRITE
; /* Posted write */
2202 w
|= PCI_TIMING
; /* PCI timing on */
2203 /* XXX huh? claims to be reserved.. */
2204 w
&= ~SWAP_LR
; /* swap left/right
2205 seems to only have effect on SB
2207 w
&= ~SUBTR_DECODE
; /* Subtractive decode off */
2209 pci_write_config_word(pci
, ESM_CONFIG_A
, w
);
2213 pci_read_config_word(pci
, ESM_CONFIG_B
, &w
);
2215 w
&= ~(1 << 15); /* Turn off internal clock multiplier */
2216 /* XXX how do we know which to use? */
2217 w
&= ~(1 << 14); /* External clock */
2219 w
&= ~SPDIF_CONFB
; /* disable S/PDIF output */
2220 w
|= HWV_CONFB
; /* HWV on */
2221 w
|= DEBOUNCE
; /* Debounce off: easier to push the HW buttons */
2222 w
&= ~GPIO_CONFB
; /* GPIO 4:5 */
2223 w
|= CHI_CONFB
; /* Disconnect from the CHI. Enabling this made a dell 7500 work. */
2224 w
&= ~IDMA_CONFB
; /* IDMA off (undocumented) */
2225 w
&= ~MIDI_FIX
; /* MIDI fix off (undoc) */
2226 w
&= ~(1 << 1); /* reserved, always write 0 */
2227 w
&= ~IRQ_TO_ISA
; /* IRQ to ISA off (undoc) */
2229 pci_write_config_word(pci
, ESM_CONFIG_B
, w
);
2233 pci_read_config_word(pci
, ESM_DDMA
, &w
);
2235 pci_write_config_word(pci
, ESM_DDMA
, w
);
2241 pci_read_config_word(pci
, ESM_LEGACY_AUDIO_CONTROL
, &w
);
2243 w
|= ESS_DISABLE_AUDIO
; /* Disable Legacy Audio */
2244 w
&= ~ESS_ENABLE_SERIAL_IRQ
; /* Disable SIRQ */
2245 w
&= ~(0x1f); /* disable mpu irq/io, game port, fm, SB */
2247 pci_write_config_word(pci
, ESM_LEGACY_AUDIO_CONTROL
, w
);
2249 /* Set up 978 docking control chip. */
2250 pci_read_config_word(pci
, 0x58, &w
);
2251 w
|=1<<2; /* Enable 978. */
2252 w
|=1<<3; /* Turn on 978 hardware volume control. */
2253 w
&=~(1<<11); /* Turn on 978 mixer volume control. */
2254 pci_write_config_word(pci
, 0x58, w
);
2258 snd_es1968_reset(chip
);
2264 /* setup usual 0x34 stuff.. 0x36 may be chip specific */
2265 outw(0xC090, iobase
+ ESM_RING_BUS_DEST
); /* direct sound, stereo */
2267 outw(0x3000, iobase
+ ESM_RING_BUS_CONTR_A
); /* enable ringbus/serial */
2274 snd_es1968_ac97_reset(chip
);
2276 /* Ring Bus Control B */
2278 n
= inl(iobase
+ ESM_RING_BUS_CONTR_B
);
2279 n
&= ~RINGB_EN_SPDIF
; /* SPDIF off */
2280 //w |= RINGB_EN_2CODEC; /* enable 2nd codec */
2281 outl(n
, iobase
+ ESM_RING_BUS_CONTR_B
);
2283 /* Set hardware volume control registers to midpoints.
2284 We can tell which button was pushed based on how they change. */
2285 outb(0x88, iobase
+0x1c);
2286 outb(0x88, iobase
+0x1d);
2287 outb(0x88, iobase
+0x1e);
2288 outb(0x88, iobase
+0x1f);
2290 /* it appears some maestros (dell 7500) only work if these are set,
2291 regardless of wether we use the assp or not. */
2293 outb(0, iobase
+ ASSP_CONTROL_B
);
2294 outb(3, iobase
+ ASSP_CONTROL_A
); /* M: Reserved bits... */
2295 outb(0, iobase
+ ASSP_CONTROL_C
); /* M: Disable ASSP, ASSP IRQ's and FM Port */
2300 for (i
= 0; i
< 16; i
++) {
2301 /* Write 0 into the buffer area 0x1E0->1EF */
2302 outw(0x01E0 + i
, iobase
+ WC_INDEX
);
2303 outw(0x0000, iobase
+ WC_DATA
);
2305 /* The 1.10 test program seem to write 0 into the buffer area
2306 * 0x1D0-0x1DF too.*/
2307 outw(0x01D0 + i
, iobase
+ WC_INDEX
);
2308 outw(0x0000, iobase
+ WC_DATA
);
2310 wave_set_register(chip
, IDR7_WAVE_ROMRAM
,
2311 (wave_get_register(chip
, IDR7_WAVE_ROMRAM
) & 0xFF00));
2312 wave_set_register(chip
, IDR7_WAVE_ROMRAM
,
2313 wave_get_register(chip
, IDR7_WAVE_ROMRAM
) | 0x100);
2314 wave_set_register(chip
, IDR7_WAVE_ROMRAM
,
2315 wave_get_register(chip
, IDR7_WAVE_ROMRAM
) & ~0x200);
2316 wave_set_register(chip
, IDR7_WAVE_ROMRAM
,
2317 wave_get_register(chip
, IDR7_WAVE_ROMRAM
) | ~0x400);
2320 maestro_write(chip
, IDR2_CRAM_DATA
, 0x0000);
2321 /* Now back to the DirectSound stuff */
2322 /* audio serial configuration.. ? */
2323 maestro_write(chip
, 0x08, 0xB004);
2324 maestro_write(chip
, 0x09, 0x001B);
2325 maestro_write(chip
, 0x0A, 0x8000);
2326 maestro_write(chip
, 0x0B, 0x3F37);
2327 maestro_write(chip
, 0x0C, 0x0098);
2329 /* parallel in, has something to do with recording :) */
2330 maestro_write(chip
, 0x0C,
2331 (maestro_read(chip
, 0x0C) & ~0xF000) | 0x8000);
2333 maestro_write(chip
, 0x0C,
2334 (maestro_read(chip
, 0x0C) & ~0x0F00) | 0x0500);
2336 maestro_write(chip
, 0x0D, 0x7632);
2338 /* Wave cache control on - test off, sg off,
2339 enable, enable extra chans 1Mb */
2341 w
= inw(iobase
+ WC_CONTROL
);
2343 w
&= ~0xFA00; /* Seems to be reserved? I don't know */
2344 w
|= 0xA000; /* reserved... I don't know */
2345 w
&= ~0x0200; /* Channels 56,57,58,59 as Extra Play,Rec Channel enable
2346 Seems to crash the Computer if enabled... */
2347 w
|= 0x0100; /* Wave Cache Operation Enabled */
2348 w
|= 0x0080; /* Channels 60/61 as Placback/Record enabled */
2349 w
&= ~0x0060; /* Clear Wavtable Size */
2350 w
|= 0x0020; /* Wavetable Size : 1MB */
2351 /* Bit 4 is reserved */
2352 w
&= ~0x000C; /* DMA Stuff? I don't understand what the datasheet means */
2353 /* Bit 1 is reserved */
2354 w
&= ~0x0001; /* Test Mode off */
2356 outw(w
, iobase
+ WC_CONTROL
);
2358 /* Now clear the APU control ram */
2359 for (i
= 0; i
< NR_APUS
; i
++) {
2360 for (w
= 0; w
< NR_APU_REGS
; w
++)
2361 apu_set_register(chip
, i
, w
, 0);
2367 static void snd_es1968_start_irq(struct es1968
*chip
)
2370 w
= ESM_HIRQ_DSIE
| ESM_HIRQ_HW_VOLUME
;
2372 w
|= ESM_HIRQ_MPU401
;
2373 outw(w
, chip
->io_port
+ ESM_PORT_HOST_IRQ
);
2380 static int es1968_suspend(struct pci_dev
*pci
, pm_message_t state
)
2382 struct snd_card
*card
= pci_get_drvdata(pci
);
2383 struct es1968
*chip
= card
->private_data
;
2388 chip
->in_suspend
= 1;
2389 snd_power_change_state(card
, SNDRV_CTL_POWER_D3hot
);
2390 snd_pcm_suspend_all(chip
->pcm
);
2391 snd_ac97_suspend(chip
->ac97
);
2392 snd_es1968_bob_stop(chip
);
2393 snd_es1968_set_acpi(chip
, ACPI_D3
);
2394 pci_disable_device(pci
);
2395 pci_save_state(pci
);
2399 static int es1968_resume(struct pci_dev
*pci
)
2401 struct snd_card
*card
= pci_get_drvdata(pci
);
2402 struct es1968
*chip
= card
->private_data
;
2403 struct list_head
*p
;
2408 /* restore all our config */
2409 pci_restore_state(pci
);
2410 pci_enable_device(pci
);
2411 pci_set_master(pci
);
2412 snd_es1968_chip_init(chip
);
2414 /* need to restore the base pointers.. */
2415 if (chip
->dma
.addr
) {
2417 wave_set_register(chip
, 0x01FC, chip
->dma
.addr
>> 12);
2420 snd_es1968_start_irq(chip
);
2422 /* restore ac97 state */
2423 snd_ac97_resume(chip
->ac97
);
2425 list_for_each(p
, &chip
->substream_list
) {
2426 struct esschan
*es
= list_entry(p
, struct esschan
, list
);
2429 snd_es1968_playback_setup(chip
, es
, es
->substream
->runtime
);
2431 case ESM_MODE_CAPTURE
:
2432 snd_es1968_capture_setup(chip
, es
, es
->substream
->runtime
);
2437 /* start timer again */
2438 if (chip
->bobclient
)
2439 snd_es1968_bob_start(chip
);
2441 snd_power_change_state(card
, SNDRV_CTL_POWER_D0
);
2442 chip
->in_suspend
= 0;
2445 #endif /* CONFIG_PM */
2447 #ifdef SUPPORT_JOYSTICK
2448 #define JOYSTICK_ADDR 0x200
2449 static int __devinit
snd_es1968_create_gameport(struct es1968
*chip
, int dev
)
2451 struct gameport
*gp
;
2458 r
= request_region(JOYSTICK_ADDR
, 8, "ES1968 gameport");
2462 chip
->gameport
= gp
= gameport_allocate_port();
2464 printk(KERN_ERR
"es1968: cannot allocate memory for gameport\n");
2465 release_and_free_resource(r
);
2469 pci_read_config_word(chip
->pci
, ESM_LEGACY_AUDIO_CONTROL
, &val
);
2470 pci_write_config_word(chip
->pci
, ESM_LEGACY_AUDIO_CONTROL
, val
| 0x04);
2472 gameport_set_name(gp
, "ES1968 Gameport");
2473 gameport_set_phys(gp
, "pci%s/gameport0", pci_name(chip
->pci
));
2474 gameport_set_dev_parent(gp
, &chip
->pci
->dev
);
2475 gp
->io
= JOYSTICK_ADDR
;
2476 gameport_set_port_data(gp
, r
);
2478 gameport_register_port(gp
);
2483 static void snd_es1968_free_gameport(struct es1968
*chip
)
2485 if (chip
->gameport
) {
2486 struct resource
*r
= gameport_get_port_data(chip
->gameport
);
2488 gameport_unregister_port(chip
->gameport
);
2489 chip
->gameport
= NULL
;
2491 release_and_free_resource(r
);
2495 static inline int snd_es1968_create_gameport(struct es1968
*chip
, int dev
) { return -ENOSYS
; }
2496 static inline void snd_es1968_free_gameport(struct es1968
*chip
) { }
2499 static int snd_es1968_free(struct es1968
*chip
)
2501 if (chip
->io_port
) {
2502 synchronize_irq(chip
->irq
);
2503 outw(1, chip
->io_port
+ 0x04); /* clear WP interrupts */
2504 outw(0, chip
->io_port
+ ESM_PORT_HOST_IRQ
); /* disable IRQ */
2508 free_irq(chip
->irq
, (void *)chip
);
2509 snd_es1968_free_gameport(chip
);
2510 snd_es1968_set_acpi(chip
, ACPI_D3
);
2511 chip
->master_switch
= NULL
;
2512 chip
->master_volume
= NULL
;
2513 pci_release_regions(chip
->pci
);
2514 pci_disable_device(chip
->pci
);
2519 static int snd_es1968_dev_free(struct snd_device
*device
)
2521 struct es1968
*chip
= device
->device_data
;
2522 return snd_es1968_free(chip
);
2525 struct ess_device_list
{
2526 unsigned short type
; /* chip type */
2527 unsigned short vendor
; /* subsystem vendor id */
2530 static struct ess_device_list pm_whitelist
[] __devinitdata
= {
2531 { TYPE_MAESTRO2E
, 0x0e11 }, /* Compaq Armada */
2532 { TYPE_MAESTRO2E
, 0x1028 },
2533 { TYPE_MAESTRO2E
, 0x103c },
2534 { TYPE_MAESTRO2E
, 0x1179 },
2535 { TYPE_MAESTRO2E
, 0x14c0 }, /* HP omnibook 4150 */
2536 { TYPE_MAESTRO2E
, 0x1558 },
2539 static struct ess_device_list mpu_blacklist
[] __devinitdata
= {
2540 { TYPE_MAESTRO2
, 0x125d },
2543 static int __devinit
snd_es1968_create(struct snd_card
*card
,
2544 struct pci_dev
*pci
,
2550 struct es1968
**chip_ret
)
2552 static struct snd_device_ops ops
= {
2553 .dev_free
= snd_es1968_dev_free
,
2555 struct es1968
*chip
;
2560 /* enable PCI device */
2561 if ((err
= pci_enable_device(pci
)) < 0)
2563 /* check, if we can restrict PCI DMA transfers to 28 bits */
2564 if (pci_set_dma_mask(pci
, 0x0fffffff) < 0 ||
2565 pci_set_consistent_dma_mask(pci
, 0x0fffffff) < 0) {
2566 snd_printk(KERN_ERR
"architecture does not support 28bit PCI busmaster DMA\n");
2567 pci_disable_device(pci
);
2571 chip
= kzalloc(sizeof(*chip
), GFP_KERNEL
);
2573 pci_disable_device(pci
);
2578 chip
->type
= chip_type
;
2579 spin_lock_init(&chip
->reg_lock
);
2580 spin_lock_init(&chip
->substream_lock
);
2581 INIT_LIST_HEAD(&chip
->buf_list
);
2582 INIT_LIST_HEAD(&chip
->substream_list
);
2583 spin_lock_init(&chip
->ac97_lock
);
2584 mutex_init(&chip
->memory_mutex
);
2585 tasklet_init(&chip
->hwvol_tq
, es1968_update_hw_volume
, (unsigned long)chip
);
2589 chip
->total_bufsize
= total_bufsize
; /* in bytes */
2590 chip
->playback_streams
= play_streams
;
2591 chip
->capture_streams
= capt_streams
;
2593 if ((err
= pci_request_regions(pci
, "ESS Maestro")) < 0) {
2595 pci_disable_device(pci
);
2598 chip
->io_port
= pci_resource_start(pci
, 0);
2599 if (request_irq(pci
->irq
, snd_es1968_interrupt
, SA_INTERRUPT
|SA_SHIRQ
,
2600 "ESS Maestro", (void*)chip
)) {
2601 snd_printk(KERN_ERR
"unable to grab IRQ %d\n", pci
->irq
);
2602 snd_es1968_free(chip
);
2605 chip
->irq
= pci
->irq
;
2607 /* Clear Maestro_map */
2608 for (i
= 0; i
< 32; i
++)
2609 chip
->maestro_map
[i
] = 0;
2612 for (i
= 0; i
< NR_APUS
; i
++)
2613 chip
->apu
[i
] = ESM_APU_FREE
;
2615 /* just to be sure */
2616 pci_set_master(pci
);
2619 /* disable power-management if not on the whitelist */
2620 unsigned short vend
;
2621 pci_read_config_word(chip
->pci
, PCI_SUBSYSTEM_VENDOR_ID
, &vend
);
2622 for (i
= 0; i
< (int)ARRAY_SIZE(pm_whitelist
); i
++) {
2623 if (chip
->type
== pm_whitelist
[i
].type
&&
2624 vend
== pm_whitelist
[i
].vendor
) {
2630 /* not matched; disabling pm */
2631 printk(KERN_INFO
"es1968: not attempting power management.\n");
2635 chip
->do_pm
= do_pm
;
2637 snd_es1968_chip_init(chip
);
2639 if ((err
= snd_device_new(card
, SNDRV_DEV_LOWLEVEL
, chip
, &ops
)) < 0) {
2640 snd_es1968_free(chip
);
2644 snd_card_set_dev(card
, &pci
->dev
);
2654 static int __devinit
snd_es1968_probe(struct pci_dev
*pci
,
2655 const struct pci_device_id
*pci_id
)
2658 struct snd_card
*card
;
2659 struct es1968
*chip
;
2663 if (dev
>= SNDRV_CARDS
)
2670 card
= snd_card_new(index
[dev
], id
[dev
], THIS_MODULE
, 0);
2674 if (total_bufsize
[dev
] < 128)
2675 total_bufsize
[dev
] = 128;
2676 if (total_bufsize
[dev
] > 4096)
2677 total_bufsize
[dev
] = 4096;
2678 if ((err
= snd_es1968_create(card
, pci
,
2679 total_bufsize
[dev
] * 1024, /* in bytes */
2680 pcm_substreams_p
[dev
],
2681 pcm_substreams_c
[dev
],
2682 pci_id
->driver_data
,
2685 snd_card_free(card
);
2688 card
->private_data
= chip
;
2690 switch (chip
->type
) {
2691 case TYPE_MAESTRO2E
:
2692 strcpy(card
->driver
, "ES1978");
2693 strcpy(card
->shortname
, "ESS ES1978 (Maestro 2E)");
2696 strcpy(card
->driver
, "ES1968");
2697 strcpy(card
->shortname
, "ESS ES1968 (Maestro 2)");
2700 strcpy(card
->driver
, "ESM1");
2701 strcpy(card
->shortname
, "ESS Maestro 1");
2705 if ((err
= snd_es1968_pcm(chip
, 0)) < 0) {
2706 snd_card_free(card
);
2710 if ((err
= snd_es1968_mixer(chip
)) < 0) {
2711 snd_card_free(card
);
2715 if (enable_mpu
[dev
] == 2) {
2716 /* check the black list */
2717 unsigned short vend
;
2718 pci_read_config_word(chip
->pci
, PCI_SUBSYSTEM_VENDOR_ID
, &vend
);
2719 for (i
= 0; i
< ARRAY_SIZE(mpu_blacklist
); i
++) {
2720 if (chip
->type
== mpu_blacklist
[i
].type
&&
2721 vend
== mpu_blacklist
[i
].vendor
) {
2722 enable_mpu
[dev
] = 0;
2727 if (enable_mpu
[dev
]) {
2728 if ((err
= snd_mpu401_uart_new(card
, 0, MPU401_HW_MPU401
,
2729 chip
->io_port
+ ESM_MPU401_PORT
, 1,
2730 chip
->irq
, 0, &chip
->rmidi
)) < 0) {
2731 printk(KERN_WARNING
"es1968: skipping MPU-401 MIDI support..\n");
2735 snd_es1968_create_gameport(chip
, dev
);
2737 snd_es1968_start_irq(chip
);
2739 chip
->clock
= clock
[dev
];
2741 es1968_measure_clock(chip
);
2743 sprintf(card
->longname
, "%s at 0x%lx, irq %i",
2744 card
->shortname
, chip
->io_port
, chip
->irq
);
2746 if ((err
= snd_card_register(card
)) < 0) {
2747 snd_card_free(card
);
2750 pci_set_drvdata(pci
, card
);
2755 static void __devexit
snd_es1968_remove(struct pci_dev
*pci
)
2757 snd_card_free(pci_get_drvdata(pci
));
2758 pci_set_drvdata(pci
, NULL
);
2761 static struct pci_driver driver
= {
2762 .name
= "ES1968 (ESS Maestro)",
2763 .id_table
= snd_es1968_ids
,
2764 .probe
= snd_es1968_probe
,
2765 .remove
= __devexit_p(snd_es1968_remove
),
2767 .suspend
= es1968_suspend
,
2768 .resume
= es1968_resume
,
2772 static int __init
alsa_card_es1968_init(void)
2774 return pci_register_driver(&driver
);
2777 static void __exit
alsa_card_es1968_exit(void)
2779 pci_unregister_driver(&driver
);
2782 module_init(alsa_card_es1968_init
)
2783 module_exit(alsa_card_es1968_exit
)