OneNAND: Add touch_softlock_watchdog()
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / mtd / onenand / onenand_base.c
blobd6c13f7ae5a1f82d23b80c6e6e634e440755b741
1 /*
2 * linux/drivers/mtd/onenand/onenand_base.c
4 * Copyright (C) 2005 Samsung Electronics
5 * Kyungmin Park <kyungmin.park@samsung.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/init.h>
15 #include <linux/sched.h>
16 #include <linux/jiffies.h>
17 #include <linux/mtd/mtd.h>
18 #include <linux/mtd/onenand.h>
19 #include <linux/mtd/partitions.h>
21 #include <asm/io.h>
23 /**
24 * onenand_oob_64 - oob info for large (2KB) page
26 static struct nand_oobinfo onenand_oob_64 = {
27 .useecc = MTD_NANDECC_AUTOPLACE,
28 .eccbytes = 20,
29 .eccpos = {
30 8, 9, 10, 11, 12,
31 24, 25, 26, 27, 28,
32 40, 41, 42, 43, 44,
33 56, 57, 58, 59, 60,
35 .oobfree = {
36 {2, 3}, {14, 2}, {18, 3}, {30, 2},
37 {24, 3}, {46, 2}, {40, 3}, {62, 2} }
40 /**
41 * onenand_oob_32 - oob info for middle (1KB) page
43 static struct nand_oobinfo onenand_oob_32 = {
44 .useecc = MTD_NANDECC_AUTOPLACE,
45 .eccbytes = 10,
46 .eccpos = {
47 8, 9, 10, 11, 12,
48 24, 25, 26, 27, 28,
50 .oobfree = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
53 static const unsigned char ffchars[] = {
54 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
55 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
56 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
57 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
58 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
59 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
60 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
61 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
64 /**
65 * onenand_readw - [OneNAND Interface] Read OneNAND register
66 * @param addr address to read
68 * Read OneNAND register
70 static unsigned short onenand_readw(void __iomem *addr)
72 return readw(addr);
75 /**
76 * onenand_writew - [OneNAND Interface] Write OneNAND register with value
77 * @param value value to write
78 * @param addr address to write
80 * Write OneNAND register with value
82 static void onenand_writew(unsigned short value, void __iomem *addr)
84 writew(value, addr);
87 /**
88 * onenand_block_address - [DEFAULT] Get block address
89 * @param this onenand chip data structure
90 * @param block the block
91 * @return translated block address if DDP, otherwise same
93 * Setup Start Address 1 Register (F100h)
95 static int onenand_block_address(struct onenand_chip *this, int block)
97 if (this->device_id & ONENAND_DEVICE_IS_DDP) {
98 /* Device Flash Core select, NAND Flash Block Address */
99 int dfs = 0;
101 if (block & this->density_mask)
102 dfs = 1;
104 return (dfs << ONENAND_DDP_SHIFT) |
105 (block & (this->density_mask - 1));
108 return block;
112 * onenand_bufferram_address - [DEFAULT] Get bufferram address
113 * @param this onenand chip data structure
114 * @param block the block
115 * @return set DBS value if DDP, otherwise 0
117 * Setup Start Address 2 Register (F101h) for DDP
119 static int onenand_bufferram_address(struct onenand_chip *this, int block)
121 if (this->device_id & ONENAND_DEVICE_IS_DDP) {
122 /* Device BufferRAM Select */
123 int dbs = 0;
125 if (block & this->density_mask)
126 dbs = 1;
128 return (dbs << ONENAND_DDP_SHIFT);
131 return 0;
135 * onenand_page_address - [DEFAULT] Get page address
136 * @param page the page address
137 * @param sector the sector address
138 * @return combined page and sector address
140 * Setup Start Address 8 Register (F107h)
142 static int onenand_page_address(int page, int sector)
144 /* Flash Page Address, Flash Sector Address */
145 int fpa, fsa;
147 fpa = page & ONENAND_FPA_MASK;
148 fsa = sector & ONENAND_FSA_MASK;
150 return ((fpa << ONENAND_FPA_SHIFT) | fsa);
154 * onenand_buffer_address - [DEFAULT] Get buffer address
155 * @param dataram1 DataRAM index
156 * @param sectors the sector address
157 * @param count the number of sectors
158 * @return the start buffer value
160 * Setup Start Buffer Register (F200h)
162 static int onenand_buffer_address(int dataram1, int sectors, int count)
164 int bsa, bsc;
166 /* BufferRAM Sector Address */
167 bsa = sectors & ONENAND_BSA_MASK;
169 if (dataram1)
170 bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */
171 else
172 bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */
174 /* BufferRAM Sector Count */
175 bsc = count & ONENAND_BSC_MASK;
177 return ((bsa << ONENAND_BSA_SHIFT) | bsc);
181 * onenand_command - [DEFAULT] Send command to OneNAND device
182 * @param mtd MTD device structure
183 * @param cmd the command to be sent
184 * @param addr offset to read from or write to
185 * @param len number of bytes to read or write
187 * Send command to OneNAND device. This function is used for middle/large page
188 * devices (1KB/2KB Bytes per page)
190 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
192 struct onenand_chip *this = mtd->priv;
193 int value, readcmd = 0;
194 int block, page;
195 /* Now we use page size operation */
196 int sectors = 4, count = 4;
198 /* Address translation */
199 switch (cmd) {
200 case ONENAND_CMD_UNLOCK:
201 case ONENAND_CMD_LOCK:
202 case ONENAND_CMD_LOCK_TIGHT:
203 block = -1;
204 page = -1;
205 break;
207 case ONENAND_CMD_ERASE:
208 case ONENAND_CMD_BUFFERRAM:
209 block = (int) (addr >> this->erase_shift);
210 page = -1;
211 break;
213 default:
214 block = (int) (addr >> this->erase_shift);
215 page = (int) (addr >> this->page_shift);
216 page &= this->page_mask;
217 break;
220 /* NOTE: The setting order of the registers is very important! */
221 if (cmd == ONENAND_CMD_BUFFERRAM) {
222 /* Select DataRAM for DDP */
223 value = onenand_bufferram_address(this, block);
224 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
226 /* Switch to the next data buffer */
227 ONENAND_SET_NEXT_BUFFERRAM(this);
229 return 0;
232 if (block != -1) {
233 /* Write 'DFS, FBA' of Flash */
234 value = onenand_block_address(this, block);
235 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
238 if (page != -1) {
239 int dataram;
241 switch (cmd) {
242 case ONENAND_CMD_READ:
243 case ONENAND_CMD_READOOB:
244 dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
245 readcmd = 1;
246 break;
248 default:
249 dataram = ONENAND_CURRENT_BUFFERRAM(this);
250 break;
253 /* Write 'FPA, FSA' of Flash */
254 value = onenand_page_address(page, sectors);
255 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
257 /* Write 'BSA, BSC' of DataRAM */
258 value = onenand_buffer_address(dataram, sectors, count);
259 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
261 if (readcmd) {
262 /* Select DataRAM for DDP */
263 value = onenand_bufferram_address(this, block);
264 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
268 /* Interrupt clear */
269 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
271 /* Write command */
272 this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
274 return 0;
278 * onenand_wait - [DEFAULT] wait until the command is done
279 * @param mtd MTD device structure
280 * @param state state to select the max. timeout value
282 * Wait for command done. This applies to all OneNAND command
283 * Read can take up to 30us, erase up to 2ms and program up to 350us
284 * according to general OneNAND specs
286 static int onenand_wait(struct mtd_info *mtd, int state)
288 struct onenand_chip * this = mtd->priv;
289 unsigned long timeout;
290 unsigned int flags = ONENAND_INT_MASTER;
291 unsigned int interrupt = 0;
292 unsigned int ctrl, ecc;
294 /* The 20 msec is enough */
295 timeout = jiffies + msecs_to_jiffies(20);
296 while (time_before(jiffies, timeout)) {
297 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
299 if (interrupt & flags)
300 break;
302 if (state != FL_READING)
303 cond_resched();
304 touch_softlockup_watchdog();
306 /* To get correct interrupt status in timeout case */
307 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
309 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
311 if (ctrl & ONENAND_CTRL_ERROR) {
312 /* It maybe occur at initial bad block */
313 DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: controller error = 0x%04x\n", ctrl);
314 /* Clear other interrupt bits for preventing ECC error */
315 interrupt &= ONENAND_INT_MASTER;
318 if (ctrl & ONENAND_CTRL_LOCK) {
319 DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: it's locked error = 0x%04x\n", ctrl);
320 return -EACCES;
323 if (interrupt & ONENAND_INT_READ) {
324 ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
325 if (ecc & ONENAND_ECC_2BIT_ALL) {
326 DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: ECC error = 0x%04x\n", ecc);
327 return -EBADMSG;
331 return 0;
335 * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
336 * @param mtd MTD data structure
337 * @param area BufferRAM area
338 * @return offset given area
340 * Return BufferRAM offset given area
342 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
344 struct onenand_chip *this = mtd->priv;
346 if (ONENAND_CURRENT_BUFFERRAM(this)) {
347 if (area == ONENAND_DATARAM)
348 return mtd->oobblock;
349 if (area == ONENAND_SPARERAM)
350 return mtd->oobsize;
353 return 0;
357 * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
358 * @param mtd MTD data structure
359 * @param area BufferRAM area
360 * @param buffer the databuffer to put/get data
361 * @param offset offset to read from or write to
362 * @param count number of bytes to read/write
364 * Read the BufferRAM area
366 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
367 unsigned char *buffer, int offset, size_t count)
369 struct onenand_chip *this = mtd->priv;
370 void __iomem *bufferram;
372 bufferram = this->base + area;
374 bufferram += onenand_bufferram_offset(mtd, area);
376 memcpy(buffer, bufferram + offset, count);
378 return 0;
382 * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
383 * @param mtd MTD data structure
384 * @param area BufferRAM area
385 * @param buffer the databuffer to put/get data
386 * @param offset offset to read from or write to
387 * @param count number of bytes to read/write
389 * Read the BufferRAM area with Sync. Burst Mode
391 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
392 unsigned char *buffer, int offset, size_t count)
394 struct onenand_chip *this = mtd->priv;
395 void __iomem *bufferram;
397 bufferram = this->base + area;
399 bufferram += onenand_bufferram_offset(mtd, area);
401 this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
403 memcpy(buffer, bufferram + offset, count);
405 this->mmcontrol(mtd, 0);
407 return 0;
411 * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
412 * @param mtd MTD data structure
413 * @param area BufferRAM area
414 * @param buffer the databuffer to put/get data
415 * @param offset offset to read from or write to
416 * @param count number of bytes to read/write
418 * Write the BufferRAM area
420 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
421 const unsigned char *buffer, int offset, size_t count)
423 struct onenand_chip *this = mtd->priv;
424 void __iomem *bufferram;
426 bufferram = this->base + area;
428 bufferram += onenand_bufferram_offset(mtd, area);
430 memcpy(bufferram + offset, buffer, count);
432 return 0;
436 * onenand_check_bufferram - [GENERIC] Check BufferRAM information
437 * @param mtd MTD data structure
438 * @param addr address to check
439 * @return 1 if there are valid data, otherwise 0
441 * Check bufferram if there is data we required
443 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
445 struct onenand_chip *this = mtd->priv;
446 int block, page;
447 int i;
449 block = (int) (addr >> this->erase_shift);
450 page = (int) (addr >> this->page_shift);
451 page &= this->page_mask;
453 i = ONENAND_CURRENT_BUFFERRAM(this);
455 /* Is there valid data? */
456 if (this->bufferram[i].block == block &&
457 this->bufferram[i].page == page &&
458 this->bufferram[i].valid)
459 return 1;
461 return 0;
465 * onenand_update_bufferram - [GENERIC] Update BufferRAM information
466 * @param mtd MTD data structure
467 * @param addr address to update
468 * @param valid valid flag
470 * Update BufferRAM information
472 static int onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
473 int valid)
475 struct onenand_chip *this = mtd->priv;
476 int block, page;
477 int i;
479 block = (int) (addr >> this->erase_shift);
480 page = (int) (addr >> this->page_shift);
481 page &= this->page_mask;
483 /* Invalidate BufferRAM */
484 for (i = 0; i < MAX_BUFFERRAM; i++) {
485 if (this->bufferram[i].block == block &&
486 this->bufferram[i].page == page)
487 this->bufferram[i].valid = 0;
490 /* Update BufferRAM */
491 i = ONENAND_CURRENT_BUFFERRAM(this);
492 this->bufferram[i].block = block;
493 this->bufferram[i].page = page;
494 this->bufferram[i].valid = valid;
496 return 0;
500 * onenand_get_device - [GENERIC] Get chip for selected access
501 * @param mtd MTD device structure
502 * @param new_state the state which is requested
504 * Get the device and lock it for exclusive access
506 static int onenand_get_device(struct mtd_info *mtd, int new_state)
508 struct onenand_chip *this = mtd->priv;
509 DECLARE_WAITQUEUE(wait, current);
512 * Grab the lock and see if the device is available
514 while (1) {
515 spin_lock(&this->chip_lock);
516 if (this->state == FL_READY) {
517 this->state = new_state;
518 spin_unlock(&this->chip_lock);
519 break;
521 if (new_state == FL_PM_SUSPENDED) {
522 spin_unlock(&this->chip_lock);
523 return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
525 set_current_state(TASK_UNINTERRUPTIBLE);
526 add_wait_queue(&this->wq, &wait);
527 spin_unlock(&this->chip_lock);
528 schedule();
529 remove_wait_queue(&this->wq, &wait);
532 return 0;
536 * onenand_release_device - [GENERIC] release chip
537 * @param mtd MTD device structure
539 * Deselect, release chip lock and wake up anyone waiting on the device
541 static void onenand_release_device(struct mtd_info *mtd)
543 struct onenand_chip *this = mtd->priv;
545 /* Release the chip */
546 spin_lock(&this->chip_lock);
547 this->state = FL_READY;
548 wake_up(&this->wq);
549 spin_unlock(&this->chip_lock);
553 * onenand_read_ecc - [MTD Interface] Read data with ECC
554 * @param mtd MTD device structure
555 * @param from offset to read from
556 * @param len number of bytes to read
557 * @param retlen pointer to variable to store the number of read bytes
558 * @param buf the databuffer to put data
559 * @param oob_buf filesystem supplied oob data buffer
560 * @param oobsel oob selection structure
562 * OneNAND read with ECC
564 static int onenand_read_ecc(struct mtd_info *mtd, loff_t from, size_t len,
565 size_t *retlen, u_char *buf,
566 u_char *oob_buf, struct nand_oobinfo *oobsel)
568 struct onenand_chip *this = mtd->priv;
569 int read = 0, column;
570 int thislen;
571 int ret = 0;
573 DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_ecc: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
575 /* Do not allow reads past end of device */
576 if ((from + len) > mtd->size) {
577 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_ecc: Attempt read beyond end of device\n");
578 *retlen = 0;
579 return -EINVAL;
582 /* Grab the lock and see if the device is available */
583 onenand_get_device(mtd, FL_READING);
585 /* TODO handling oob */
587 while (read < len) {
588 thislen = min_t(int, mtd->oobblock, len - read);
590 column = from & (mtd->oobblock - 1);
591 if (column + thislen > mtd->oobblock)
592 thislen = mtd->oobblock - column;
594 if (!onenand_check_bufferram(mtd, from)) {
595 this->command(mtd, ONENAND_CMD_READ, from, mtd->oobblock);
597 ret = this->wait(mtd, FL_READING);
598 /* First copy data and check return value for ECC handling */
599 onenand_update_bufferram(mtd, from, 1);
602 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
604 read += thislen;
606 if (read == len)
607 break;
609 if (ret) {
610 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_ecc: read failed = %d\n", ret);
611 goto out;
614 from += thislen;
615 buf += thislen;
618 out:
619 /* Deselect and wake up anyone waiting on the device */
620 onenand_release_device(mtd);
623 * Return success, if no ECC failures, else -EBADMSG
624 * fs driver will take care of that, because
625 * retlen == desired len and result == -EBADMSG
627 *retlen = read;
628 return ret;
632 * onenand_read - [MTD Interface] MTD compability function for onenand_read_ecc
633 * @param mtd MTD device structure
634 * @param from offset to read from
635 * @param len number of bytes to read
636 * @param retlen pointer to variable to store the number of read bytes
637 * @param buf the databuffer to put data
639 * This function simply calls onenand_read_ecc with oob buffer and oobsel = NULL
641 static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
642 size_t *retlen, u_char *buf)
644 return onenand_read_ecc(mtd, from, len, retlen, buf, NULL, NULL);
648 * onenand_read_oob - [MTD Interface] OneNAND read out-of-band
649 * @param mtd MTD device structure
650 * @param from offset to read from
651 * @param len number of bytes to read
652 * @param retlen pointer to variable to store the number of read bytes
653 * @param buf the databuffer to put data
655 * OneNAND read out-of-band data from the spare area
657 static int onenand_read_oob(struct mtd_info *mtd, loff_t from, size_t len,
658 size_t *retlen, u_char *buf)
660 struct onenand_chip *this = mtd->priv;
661 int read = 0, thislen, column;
662 int ret = 0;
664 DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
666 /* Initialize return length value */
667 *retlen = 0;
669 /* Do not allow reads past end of device */
670 if (unlikely((from + len) > mtd->size)) {
671 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: Attempt read beyond end of device\n");
672 return -EINVAL;
675 /* Grab the lock and see if the device is available */
676 onenand_get_device(mtd, FL_READING);
678 column = from & (mtd->oobsize - 1);
680 while (read < len) {
681 thislen = mtd->oobsize - column;
682 thislen = min_t(int, thislen, len);
684 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
686 onenand_update_bufferram(mtd, from, 0);
688 ret = this->wait(mtd, FL_READING);
689 /* First copy data and check return value for ECC handling */
691 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
693 read += thislen;
695 if (read == len)
696 break;
698 if (ret) {
699 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: read failed = %d\n", ret);
700 goto out;
703 buf += thislen;
705 /* Read more? */
706 if (read < len) {
707 /* Page size */
708 from += mtd->oobblock;
709 column = 0;
713 out:
714 /* Deselect and wake up anyone waiting on the device */
715 onenand_release_device(mtd);
717 *retlen = read;
718 return ret;
721 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
723 * onenand_verify_page - [GENERIC] verify the chip contents after a write
724 * @param mtd MTD device structure
725 * @param buf the databuffer to verify
727 * Check DataRAM area directly
729 static int onenand_verify_page(struct mtd_info *mtd, u_char *buf, loff_t addr)
731 struct onenand_chip *this = mtd->priv;
732 void __iomem *dataram0, *dataram1;
733 int ret = 0;
735 this->command(mtd, ONENAND_CMD_READ, addr, mtd->oobblock);
737 ret = this->wait(mtd, FL_READING);
738 if (ret)
739 return ret;
741 onenand_update_bufferram(mtd, addr, 1);
743 /* Check, if the two dataram areas are same */
744 dataram0 = this->base + ONENAND_DATARAM;
745 dataram1 = dataram0 + mtd->oobblock;
747 if (memcmp(dataram0, dataram1, mtd->oobblock))
748 return -EBADMSG;
750 return 0;
752 #else
753 #define onenand_verify_page(...) (0)
754 #endif
756 #define NOTALIGNED(x) ((x & (mtd->oobblock - 1)) != 0)
759 * onenand_write_ecc - [MTD Interface] OneNAND write with ECC
760 * @param mtd MTD device structure
761 * @param to offset to write to
762 * @param len number of bytes to write
763 * @param retlen pointer to variable to store the number of written bytes
764 * @param buf the data to write
765 * @param eccbuf filesystem supplied oob data buffer
766 * @param oobsel oob selection structure
768 * OneNAND write with ECC
770 static int onenand_write_ecc(struct mtd_info *mtd, loff_t to, size_t len,
771 size_t *retlen, const u_char *buf,
772 u_char *eccbuf, struct nand_oobinfo *oobsel)
774 struct onenand_chip *this = mtd->priv;
775 int written = 0;
776 int ret = 0;
778 DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_ecc: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
780 /* Initialize retlen, in case of early exit */
781 *retlen = 0;
783 /* Do not allow writes past end of device */
784 if (unlikely((to + len) > mtd->size)) {
785 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_ecc: Attempt write to past end of device\n");
786 return -EINVAL;
789 /* Reject writes, which are not page aligned */
790 if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) {
791 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_ecc: Attempt to write not page aligned data\n");
792 return -EINVAL;
795 /* Grab the lock and see if the device is available */
796 onenand_get_device(mtd, FL_WRITING);
798 /* Loop until all data write */
799 while (written < len) {
800 int thislen = min_t(int, mtd->oobblock, len - written);
802 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobblock);
804 this->write_bufferram(mtd, ONENAND_DATARAM, buf, 0, thislen);
805 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
807 this->command(mtd, ONENAND_CMD_PROG, to, mtd->oobblock);
809 onenand_update_bufferram(mtd, to, 1);
811 ret = this->wait(mtd, FL_WRITING);
812 if (ret) {
813 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_ecc: write filaed %d\n", ret);
814 goto out;
817 written += thislen;
819 /* Only check verify write turn on */
820 ret = onenand_verify_page(mtd, (u_char *) buf, to);
821 if (ret) {
822 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_ecc: verify failed %d\n", ret);
823 goto out;
826 if (written == len)
827 break;
829 to += thislen;
830 buf += thislen;
833 out:
834 /* Deselect and wake up anyone waiting on the device */
835 onenand_release_device(mtd);
837 *retlen = written;
839 return ret;
843 * onenand_write - [MTD Interface] compability function for onenand_write_ecc
844 * @param mtd MTD device structure
845 * @param to offset to write to
846 * @param len number of bytes to write
847 * @param retlen pointer to variable to store the number of written bytes
848 * @param buf the data to write
850 * This function simply calls onenand_write_ecc
851 * with oob buffer and oobsel = NULL
853 static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
854 size_t *retlen, const u_char *buf)
856 return onenand_write_ecc(mtd, to, len, retlen, buf, NULL, NULL);
860 * onenand_write_oob - [MTD Interface] OneNAND write out-of-band
861 * @param mtd MTD device structure
862 * @param to offset to write to
863 * @param len number of bytes to write
864 * @param retlen pointer to variable to store the number of written bytes
865 * @param buf the data to write
867 * OneNAND write out-of-band
869 static int onenand_write_oob(struct mtd_info *mtd, loff_t to, size_t len,
870 size_t *retlen, const u_char *buf)
872 struct onenand_chip *this = mtd->priv;
873 int column, status;
874 int written = 0;
876 DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
878 /* Initialize retlen, in case of early exit */
879 *retlen = 0;
881 /* Do not allow writes past end of device */
882 if (unlikely((to + len) > mtd->size)) {
883 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: Attempt write to past end of device\n");
884 return -EINVAL;
887 /* Grab the lock and see if the device is available */
888 onenand_get_device(mtd, FL_WRITING);
890 /* Loop until all data write */
891 while (written < len) {
892 int thislen = min_t(int, mtd->oobsize, len - written);
894 column = to & (mtd->oobsize - 1);
896 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
898 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
899 this->write_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
901 this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
903 onenand_update_bufferram(mtd, to, 0);
905 status = this->wait(mtd, FL_WRITING);
906 if (status)
907 goto out;
909 written += thislen;
911 if (written == len)
912 break;
914 to += thislen;
915 buf += thislen;
918 out:
919 /* Deselect and wake up anyone waiting on the device */
920 onenand_release_device(mtd);
922 *retlen = written;
924 return 0;
928 * onenand_writev_ecc - [MTD Interface] write with iovec with ecc
929 * @param mtd MTD device structure
930 * @param vecs the iovectors to write
931 * @param count number of vectors
932 * @param to offset to write to
933 * @param retlen pointer to variable to store the number of written bytes
934 * @param eccbuf filesystem supplied oob data buffer
935 * @param oobsel oob selection structure
937 * OneNAND write with iovec with ecc
939 static int onenand_writev_ecc(struct mtd_info *mtd, const struct kvec *vecs,
940 unsigned long count, loff_t to, size_t *retlen,
941 u_char *eccbuf, struct nand_oobinfo *oobsel)
943 struct onenand_chip *this = mtd->priv;
944 unsigned char *pbuf;
945 size_t total_len, len;
946 int i, written = 0;
947 int ret = 0;
949 /* Preset written len for early exit */
950 *retlen = 0;
952 /* Calculate total length of data */
953 total_len = 0;
954 for (i = 0; i < count; i++)
955 total_len += vecs[i].iov_len;
957 DEBUG(MTD_DEBUG_LEVEL3, "onenand_writev_ecc: to = 0x%08x, len = %i, count = %ld\n", (unsigned int) to, (unsigned int) total_len, count);
959 /* Do not allow write past end of the device */
960 if (unlikely((to + total_len) > mtd->size)) {
961 DEBUG(MTD_DEBUG_LEVEL0, "onenand_writev_ecc: Attempted write past end of device\n");
962 return -EINVAL;
965 /* Reject writes, which are not page aligned */
966 if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(total_len))) {
967 DEBUG(MTD_DEBUG_LEVEL0, "onenand_writev_ecc: Attempt to write not page aligned data\n");
968 return -EINVAL;
971 /* Grab the lock and see if the device is available */
972 onenand_get_device(mtd, FL_WRITING);
974 /* TODO handling oob */
976 /* Loop until all keve's data has been written */
977 len = 0;
978 while (count) {
979 pbuf = this->page_buf;
981 * If the given tuple is >= pagesize then
982 * write it out from the iov
984 if ((vecs->iov_len - len) >= mtd->oobblock) {
985 pbuf = vecs->iov_base + len;
987 len += mtd->oobblock;
989 /* Check, if we have to switch to the next tuple */
990 if (len >= (int) vecs->iov_len) {
991 vecs++;
992 len = 0;
993 count--;
995 } else {
996 int cnt = 0, thislen;
997 while (cnt < mtd->oobblock) {
998 thislen = min_t(int, mtd->oobblock - cnt, vecs->iov_len - len);
999 memcpy(this->page_buf + cnt, vecs->iov_base + len, thislen);
1000 cnt += thislen;
1001 len += thislen;
1003 /* Check, if we have to switch to the next tuple */
1004 if (len >= (int) vecs->iov_len) {
1005 vecs++;
1006 len = 0;
1007 count--;
1012 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobblock);
1014 this->write_bufferram(mtd, ONENAND_DATARAM, pbuf, 0, mtd->oobblock);
1015 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
1017 this->command(mtd, ONENAND_CMD_PROG, to, mtd->oobblock);
1019 onenand_update_bufferram(mtd, to, 1);
1021 ret = this->wait(mtd, FL_WRITING);
1022 if (ret) {
1023 DEBUG(MTD_DEBUG_LEVEL0, "onenand_writev_ecc: write failed %d\n", ret);
1024 goto out;
1028 /* Only check verify write turn on */
1029 ret = onenand_verify_page(mtd, (u_char *) pbuf, to);
1030 if (ret) {
1031 DEBUG(MTD_DEBUG_LEVEL0, "onenand_writev_ecc: verify failed %d\n", ret);
1032 goto out;
1035 written += mtd->oobblock;
1037 to += mtd->oobblock;
1040 out:
1041 /* Deselect and wakt up anyone waiting on the device */
1042 onenand_release_device(mtd);
1044 *retlen = written;
1046 return 0;
1050 * onenand_writev - [MTD Interface] compabilty function for onenand_writev_ecc
1051 * @param mtd MTD device structure
1052 * @param vecs the iovectors to write
1053 * @param count number of vectors
1054 * @param to offset to write to
1055 * @param retlen pointer to variable to store the number of written bytes
1057 * OneNAND write with kvec. This just calls the ecc function
1059 static int onenand_writev(struct mtd_info *mtd, const struct kvec *vecs,
1060 unsigned long count, loff_t to, size_t *retlen)
1062 return onenand_writev_ecc(mtd, vecs, count, to, retlen, NULL, NULL);
1066 * onenand_block_checkbad - [GENERIC] Check if a block is marked bad
1067 * @param mtd MTD device structure
1068 * @param ofs offset from device start
1069 * @param getchip 0, if the chip is already selected
1070 * @param allowbbt 1, if its allowed to access the bbt area
1072 * Check, if the block is bad. Either by reading the bad block table or
1073 * calling of the scan function.
1075 static int onenand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt)
1077 struct onenand_chip *this = mtd->priv;
1078 struct bbm_info *bbm = this->bbm;
1080 /* Return info from the table */
1081 return bbm->isbad_bbt(mtd, ofs, allowbbt);
1085 * onenand_erase - [MTD Interface] erase block(s)
1086 * @param mtd MTD device structure
1087 * @param instr erase instruction
1089 * Erase one ore more blocks
1091 static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
1093 struct onenand_chip *this = mtd->priv;
1094 unsigned int block_size;
1095 loff_t addr;
1096 int len;
1097 int ret = 0;
1099 DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
1101 block_size = (1 << this->erase_shift);
1103 /* Start address must align on block boundary */
1104 if (unlikely(instr->addr & (block_size - 1))) {
1105 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Unaligned address\n");
1106 return -EINVAL;
1109 /* Length must align on block boundary */
1110 if (unlikely(instr->len & (block_size - 1))) {
1111 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Length not block aligned\n");
1112 return -EINVAL;
1115 /* Do not allow erase past end of device */
1116 if (unlikely((instr->len + instr->addr) > mtd->size)) {
1117 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Erase past end of device\n");
1118 return -EINVAL;
1121 instr->fail_addr = 0xffffffff;
1123 /* Grab the lock and see if the device is available */
1124 onenand_get_device(mtd, FL_ERASING);
1126 /* Loop throught the pages */
1127 len = instr->len;
1128 addr = instr->addr;
1130 instr->state = MTD_ERASING;
1132 while (len) {
1134 /* Check if we have a bad block, we do not erase bad blocks */
1135 if (onenand_block_checkbad(mtd, addr, 0, 0)) {
1136 printk (KERN_WARNING "onenand_erase: attempt to erase a bad block at addr 0x%08x\n", (unsigned int) addr);
1137 instr->state = MTD_ERASE_FAILED;
1138 goto erase_exit;
1141 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
1143 ret = this->wait(mtd, FL_ERASING);
1144 /* Check, if it is write protected */
1145 if (ret) {
1146 if (ret == -EPERM)
1147 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Device is write protected!!!\n");
1148 else
1149 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Failed erase, block %d\n", (unsigned) (addr >> this->erase_shift));
1150 instr->state = MTD_ERASE_FAILED;
1151 instr->fail_addr = addr;
1152 goto erase_exit;
1155 len -= block_size;
1156 addr += block_size;
1159 instr->state = MTD_ERASE_DONE;
1161 erase_exit:
1163 ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
1164 /* Do call back function */
1165 if (!ret)
1166 mtd_erase_callback(instr);
1168 /* Deselect and wake up anyone waiting on the device */
1169 onenand_release_device(mtd);
1171 return ret;
1175 * onenand_sync - [MTD Interface] sync
1176 * @param mtd MTD device structure
1178 * Sync is actually a wait for chip ready function
1180 static void onenand_sync(struct mtd_info *mtd)
1182 DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
1184 /* Grab the lock and see if the device is available */
1185 onenand_get_device(mtd, FL_SYNCING);
1187 /* Release it and go back */
1188 onenand_release_device(mtd);
1193 * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
1194 * @param mtd MTD device structure
1195 * @param ofs offset relative to mtd start
1197 * Check whether the block is bad
1199 static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
1201 /* Check for invalid offset */
1202 if (ofs > mtd->size)
1203 return -EINVAL;
1205 return onenand_block_checkbad(mtd, ofs, 1, 0);
1209 * onenand_default_block_markbad - [DEFAULT] mark a block bad
1210 * @param mtd MTD device structure
1211 * @param ofs offset from device start
1213 * This is the default implementation, which can be overridden by
1214 * a hardware specific driver.
1216 static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
1218 struct onenand_chip *this = mtd->priv;
1219 struct bbm_info *bbm = this->bbm;
1220 u_char buf[2] = {0, 0};
1221 size_t retlen;
1222 int block;
1224 /* Get block number */
1225 block = ((int) ofs) >> bbm->bbt_erase_shift;
1226 if (bbm->bbt)
1227 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
1229 /* We write two bytes, so we dont have to mess with 16 bit access */
1230 ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
1231 return mtd->write_oob(mtd, ofs , 2, &retlen, buf);
1235 * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
1236 * @param mtd MTD device structure
1237 * @param ofs offset relative to mtd start
1239 * Mark the block as bad
1241 static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1243 struct onenand_chip *this = mtd->priv;
1244 int ret;
1246 ret = onenand_block_isbad(mtd, ofs);
1247 if (ret) {
1248 /* If it was bad already, return success and do nothing */
1249 if (ret > 0)
1250 return 0;
1251 return ret;
1254 return this->block_markbad(mtd, ofs);
1258 * onenand_unlock - [MTD Interface] Unlock block(s)
1259 * @param mtd MTD device structure
1260 * @param ofs offset relative to mtd start
1261 * @param len number of bytes to unlock
1263 * Unlock one or more blocks
1265 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
1267 struct onenand_chip *this = mtd->priv;
1268 int start, end, block, value, status;
1270 start = ofs >> this->erase_shift;
1271 end = len >> this->erase_shift;
1273 /* Continuous lock scheme */
1274 if (this->options & ONENAND_CONT_LOCK) {
1275 /* Set start block address */
1276 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1277 /* Set end block address */
1278 this->write_word(end - 1, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
1279 /* Write unlock command */
1280 this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0);
1282 /* There's no return value */
1283 this->wait(mtd, FL_UNLOCKING);
1285 /* Sanity check */
1286 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1287 & ONENAND_CTRL_ONGO)
1288 continue;
1290 /* Check lock status */
1291 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1292 if (!(status & ONENAND_WP_US))
1293 printk(KERN_ERR "wp status = 0x%x\n", status);
1295 return 0;
1298 /* Block lock scheme */
1299 for (block = start; block < end; block++) {
1300 /* Set block address */
1301 value = onenand_block_address(this, block);
1302 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1303 /* Select DataRAM for DDP */
1304 value = onenand_bufferram_address(this, block);
1305 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1306 /* Set start block address */
1307 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1308 /* Write unlock command */
1309 this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0);
1311 /* There's no return value */
1312 this->wait(mtd, FL_UNLOCKING);
1314 /* Sanity check */
1315 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1316 & ONENAND_CTRL_ONGO)
1317 continue;
1319 /* Check lock status */
1320 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1321 if (!(status & ONENAND_WP_US))
1322 printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1325 return 0;
1329 * onenand_print_device_info - Print device ID
1330 * @param device device ID
1332 * Print device ID
1334 static void onenand_print_device_info(int device)
1336 int vcc, demuxed, ddp, density;
1338 vcc = device & ONENAND_DEVICE_VCC_MASK;
1339 demuxed = device & ONENAND_DEVICE_IS_DEMUX;
1340 ddp = device & ONENAND_DEVICE_IS_DDP;
1341 density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
1342 printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
1343 demuxed ? "" : "Muxed ",
1344 ddp ? "(DDP)" : "",
1345 (16 << density),
1346 vcc ? "2.65/3.3" : "1.8",
1347 device);
1350 static const struct onenand_manufacturers onenand_manuf_ids[] = {
1351 {ONENAND_MFR_SAMSUNG, "Samsung"},
1355 * onenand_check_maf - Check manufacturer ID
1356 * @param manuf manufacturer ID
1358 * Check manufacturer ID
1360 static int onenand_check_maf(int manuf)
1362 int size = ARRAY_SIZE(onenand_manuf_ids);
1363 char *name;
1364 int i;
1366 for (i = 0; i < size; i++)
1367 if (manuf == onenand_manuf_ids[i].id)
1368 break;
1370 if (i < size)
1371 name = onenand_manuf_ids[i].name;
1372 else
1373 name = "Unknown";
1375 printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
1377 return (i == size);
1381 * onenand_probe - [OneNAND Interface] Probe the OneNAND device
1382 * @param mtd MTD device structure
1384 * OneNAND detection method:
1385 * Compare the the values from command with ones from register
1387 static int onenand_probe(struct mtd_info *mtd)
1389 struct onenand_chip *this = mtd->priv;
1390 int bram_maf_id, bram_dev_id, maf_id, dev_id;
1391 int version_id;
1392 int density;
1394 /* Send the command for reading device ID from BootRAM */
1395 this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
1397 /* Read manufacturer and device IDs from BootRAM */
1398 bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
1399 bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
1401 /* Check manufacturer ID */
1402 if (onenand_check_maf(bram_maf_id))
1403 return -ENXIO;
1405 /* Reset OneNAND to read default register values */
1406 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
1408 /* Read manufacturer and device IDs from Register */
1409 maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
1410 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
1412 /* Check OneNAND device */
1413 if (maf_id != bram_maf_id || dev_id != bram_dev_id)
1414 return -ENXIO;
1416 /* Flash device information */
1417 onenand_print_device_info(dev_id);
1418 this->device_id = dev_id;
1420 density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1421 this->chipsize = (16 << density) << 20;
1422 /* Set density mask. it is used for DDP */
1423 this->density_mask = (1 << (density + 6));
1425 /* OneNAND page size & block size */
1426 /* The data buffer size is equal to page size */
1427 mtd->oobblock = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
1428 mtd->oobsize = mtd->oobblock >> 5;
1429 /* Pagers per block is always 64 in OneNAND */
1430 mtd->erasesize = mtd->oobblock << 6;
1432 this->erase_shift = ffs(mtd->erasesize) - 1;
1433 this->page_shift = ffs(mtd->oobblock) - 1;
1434 this->ppb_shift = (this->erase_shift - this->page_shift);
1435 this->page_mask = (mtd->erasesize / mtd->oobblock) - 1;
1437 /* REVIST: Multichip handling */
1439 mtd->size = this->chipsize;
1441 /* Version ID */
1442 version_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
1443 printk(KERN_DEBUG "OneNAND version = 0x%04x\n", version_id);
1445 /* Lock scheme */
1446 if (density <= ONENAND_DEVICE_DENSITY_512Mb &&
1447 !(version_id >> ONENAND_VERSION_PROCESS_SHIFT)) {
1448 printk(KERN_INFO "Lock scheme is Continues Lock\n");
1449 this->options |= ONENAND_CONT_LOCK;
1452 return 0;
1456 * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
1457 * @param mtd MTD device structure
1459 static int onenand_suspend(struct mtd_info *mtd)
1461 return onenand_get_device(mtd, FL_PM_SUSPENDED);
1465 * onenand_resume - [MTD Interface] Resume the OneNAND flash
1466 * @param mtd MTD device structure
1468 static void onenand_resume(struct mtd_info *mtd)
1470 struct onenand_chip *this = mtd->priv;
1472 if (this->state == FL_PM_SUSPENDED)
1473 onenand_release_device(mtd);
1474 else
1475 printk(KERN_ERR "resume() called for the chip which is not"
1476 "in suspended state\n");
1481 * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
1482 * @param mtd MTD device structure
1483 * @param maxchips Number of chips to scan for
1485 * This fills out all the not initialized function pointers
1486 * with the defaults.
1487 * The flash ID is read and the mtd/chip structures are
1488 * filled with the appropriate values.
1490 int onenand_scan(struct mtd_info *mtd, int maxchips)
1492 struct onenand_chip *this = mtd->priv;
1494 if (!this->read_word)
1495 this->read_word = onenand_readw;
1496 if (!this->write_word)
1497 this->write_word = onenand_writew;
1499 if (!this->command)
1500 this->command = onenand_command;
1501 if (!this->wait)
1502 this->wait = onenand_wait;
1504 if (!this->read_bufferram)
1505 this->read_bufferram = onenand_read_bufferram;
1506 if (!this->write_bufferram)
1507 this->write_bufferram = onenand_write_bufferram;
1509 if (!this->block_markbad)
1510 this->block_markbad = onenand_default_block_markbad;
1511 if (!this->scan_bbt)
1512 this->scan_bbt = onenand_default_bbt;
1514 if (onenand_probe(mtd))
1515 return -ENXIO;
1517 /* Set Sync. Burst Read after probing */
1518 if (this->mmcontrol) {
1519 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
1520 this->read_bufferram = onenand_sync_read_bufferram;
1523 /* Allocate buffers, if necessary */
1524 if (!this->page_buf) {
1525 size_t len;
1526 len = mtd->oobblock + mtd->oobsize;
1527 this->page_buf = kmalloc(len, GFP_KERNEL);
1528 if (!this->page_buf) {
1529 printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n");
1530 return -ENOMEM;
1532 this->options |= ONENAND_PAGEBUF_ALLOC;
1535 this->state = FL_READY;
1536 init_waitqueue_head(&this->wq);
1537 spin_lock_init(&this->chip_lock);
1539 switch (mtd->oobsize) {
1540 case 64:
1541 this->autooob = &onenand_oob_64;
1542 break;
1544 case 32:
1545 this->autooob = &onenand_oob_32;
1546 break;
1548 default:
1549 printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n",
1550 mtd->oobsize);
1551 /* To prevent kernel oops */
1552 this->autooob = &onenand_oob_32;
1553 break;
1556 memcpy(&mtd->oobinfo, this->autooob, sizeof(mtd->oobinfo));
1558 /* Fill in remaining MTD driver data */
1559 mtd->type = MTD_NANDFLASH;
1560 mtd->flags = MTD_CAP_NANDFLASH | MTD_ECC;
1561 mtd->ecctype = MTD_ECC_SW;
1562 mtd->erase = onenand_erase;
1563 mtd->point = NULL;
1564 mtd->unpoint = NULL;
1565 mtd->read = onenand_read;
1566 mtd->write = onenand_write;
1567 mtd->read_ecc = onenand_read_ecc;
1568 mtd->write_ecc = onenand_write_ecc;
1569 mtd->read_oob = onenand_read_oob;
1570 mtd->write_oob = onenand_write_oob;
1571 mtd->readv = NULL;
1572 mtd->readv_ecc = NULL;
1573 mtd->writev = onenand_writev;
1574 mtd->writev_ecc = onenand_writev_ecc;
1575 mtd->sync = onenand_sync;
1576 mtd->lock = NULL;
1577 mtd->unlock = onenand_unlock;
1578 mtd->suspend = onenand_suspend;
1579 mtd->resume = onenand_resume;
1580 mtd->block_isbad = onenand_block_isbad;
1581 mtd->block_markbad = onenand_block_markbad;
1582 mtd->owner = THIS_MODULE;
1584 /* Unlock whole block */
1585 mtd->unlock(mtd, 0x0, this->chipsize);
1587 return this->scan_bbt(mtd);
1591 * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
1592 * @param mtd MTD device structure
1594 void onenand_release(struct mtd_info *mtd)
1596 struct onenand_chip *this = mtd->priv;
1598 #ifdef CONFIG_MTD_PARTITIONS
1599 /* Deregister partitions */
1600 del_mtd_partitions (mtd);
1601 #endif
1602 /* Deregister the device */
1603 del_mtd_device (mtd);
1605 /* Free bad block table memory, if allocated */
1606 if (this->bbm)
1607 kfree(this->bbm);
1608 /* Buffer allocated by onenand_scan */
1609 if (this->options & ONENAND_PAGEBUF_ALLOC)
1610 kfree(this->page_buf);
1613 EXPORT_SYMBOL_GPL(onenand_scan);
1614 EXPORT_SYMBOL_GPL(onenand_release);
1616 MODULE_LICENSE("GPL");
1617 MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
1618 MODULE_DESCRIPTION("Generic OneNAND flash driver code");