mfd: New AB8500 driver
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / mfd / ab8500-core.c
blobf3d26fa9c34dddf05b021f3419966a4caef538a1
1 /*
2 * Copyright (C) ST-Ericsson SA 2010
4 * License Terms: GNU General Public License v2
5 * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
6 * Author: Rabin Vincent <rabin.vincent@stericsson.com>
7 */
9 #include <linux/kernel.h>
10 #include <linux/slab.h>
11 #include <linux/init.h>
12 #include <linux/irq.h>
13 #include <linux/delay.h>
14 #include <linux/interrupt.h>
15 #include <linux/module.h>
16 #include <linux/platform_device.h>
17 #include <linux/mfd/core.h>
18 #include <linux/mfd/ab8500.h>
21 * Interrupt register offsets
22 * Bank : 0x0E
24 #define AB8500_IT_SOURCE1_REG 0x0E00
25 #define AB8500_IT_SOURCE2_REG 0x0E01
26 #define AB8500_IT_SOURCE3_REG 0x0E02
27 #define AB8500_IT_SOURCE4_REG 0x0E03
28 #define AB8500_IT_SOURCE5_REG 0x0E04
29 #define AB8500_IT_SOURCE6_REG 0x0E05
30 #define AB8500_IT_SOURCE7_REG 0x0E06
31 #define AB8500_IT_SOURCE8_REG 0x0E07
32 #define AB8500_IT_SOURCE19_REG 0x0E12
33 #define AB8500_IT_SOURCE20_REG 0x0E13
34 #define AB8500_IT_SOURCE21_REG 0x0E14
35 #define AB8500_IT_SOURCE22_REG 0x0E15
36 #define AB8500_IT_SOURCE23_REG 0x0E16
37 #define AB8500_IT_SOURCE24_REG 0x0E17
40 * latch registers
42 #define AB8500_IT_LATCH1_REG 0x0E20
43 #define AB8500_IT_LATCH2_REG 0x0E21
44 #define AB8500_IT_LATCH3_REG 0x0E22
45 #define AB8500_IT_LATCH4_REG 0x0E23
46 #define AB8500_IT_LATCH5_REG 0x0E24
47 #define AB8500_IT_LATCH6_REG 0x0E25
48 #define AB8500_IT_LATCH7_REG 0x0E26
49 #define AB8500_IT_LATCH8_REG 0x0E27
50 #define AB8500_IT_LATCH9_REG 0x0E28
51 #define AB8500_IT_LATCH10_REG 0x0E29
52 #define AB8500_IT_LATCH19_REG 0x0E32
53 #define AB8500_IT_LATCH20_REG 0x0E33
54 #define AB8500_IT_LATCH21_REG 0x0E34
55 #define AB8500_IT_LATCH22_REG 0x0E35
56 #define AB8500_IT_LATCH23_REG 0x0E36
57 #define AB8500_IT_LATCH24_REG 0x0E37
60 * mask registers
63 #define AB8500_IT_MASK1_REG 0x0E40
64 #define AB8500_IT_MASK2_REG 0x0E41
65 #define AB8500_IT_MASK3_REG 0x0E42
66 #define AB8500_IT_MASK4_REG 0x0E43
67 #define AB8500_IT_MASK5_REG 0x0E44
68 #define AB8500_IT_MASK6_REG 0x0E45
69 #define AB8500_IT_MASK7_REG 0x0E46
70 #define AB8500_IT_MASK8_REG 0x0E47
71 #define AB8500_IT_MASK9_REG 0x0E48
72 #define AB8500_IT_MASK10_REG 0x0E49
73 #define AB8500_IT_MASK11_REG 0x0E4A
74 #define AB8500_IT_MASK12_REG 0x0E4B
75 #define AB8500_IT_MASK13_REG 0x0E4C
76 #define AB8500_IT_MASK14_REG 0x0E4D
77 #define AB8500_IT_MASK15_REG 0x0E4E
78 #define AB8500_IT_MASK16_REG 0x0E4F
79 #define AB8500_IT_MASK17_REG 0x0E50
80 #define AB8500_IT_MASK18_REG 0x0E51
81 #define AB8500_IT_MASK19_REG 0x0E52
82 #define AB8500_IT_MASK20_REG 0x0E53
83 #define AB8500_IT_MASK21_REG 0x0E54
84 #define AB8500_IT_MASK22_REG 0x0E55
85 #define AB8500_IT_MASK23_REG 0x0E56
86 #define AB8500_IT_MASK24_REG 0x0E57
88 #define AB8500_REV_REG 0x1080
91 * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt
92 * numbers are indexed into this array with (num / 8).
94 * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at
95 * offset 0.
97 static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = {
98 0, 1, 2, 3, 4, 6, 7, 8, 9, 18, 19, 20, 21,
101 static int __ab8500_write(struct ab8500 *ab8500, u16 addr, u8 data)
103 int ret;
105 dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data);
107 ret = ab8500->write(ab8500, addr, data);
108 if (ret < 0)
109 dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
110 addr, ret);
112 return ret;
116 * ab8500_write() - write an AB8500 register
117 * @ab8500: device to write to
118 * @addr: address of the register
119 * @data: value to write
121 int ab8500_write(struct ab8500 *ab8500, u16 addr, u8 data)
123 int ret;
125 mutex_lock(&ab8500->lock);
126 ret = __ab8500_write(ab8500, addr, data);
127 mutex_unlock(&ab8500->lock);
129 return ret;
131 EXPORT_SYMBOL_GPL(ab8500_write);
133 static int __ab8500_read(struct ab8500 *ab8500, u16 addr)
135 int ret;
137 ret = ab8500->read(ab8500, addr);
138 if (ret < 0)
139 dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
140 addr, ret);
142 dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret);
144 return ret;
148 * ab8500_read() - read an AB8500 register
149 * @ab8500: device to read from
150 * @addr: address of the register
152 int ab8500_read(struct ab8500 *ab8500, u16 addr)
154 int ret;
156 mutex_lock(&ab8500->lock);
157 ret = __ab8500_read(ab8500, addr);
158 mutex_unlock(&ab8500->lock);
160 return ret;
162 EXPORT_SYMBOL_GPL(ab8500_read);
165 * ab8500_set_bits() - set a bitfield in an AB8500 register
166 * @ab8500: device to read from
167 * @addr: address of the register
168 * @mask: mask of the bitfield to modify
169 * @data: value to set to the bitfield
171 int ab8500_set_bits(struct ab8500 *ab8500, u16 addr, u8 mask, u8 data)
173 int ret;
175 mutex_lock(&ab8500->lock);
177 ret = __ab8500_read(ab8500, addr);
178 if (ret < 0)
179 goto out;
181 ret &= ~mask;
182 ret |= data;
184 ret = __ab8500_write(ab8500, addr, ret);
186 out:
187 mutex_unlock(&ab8500->lock);
188 return ret;
190 EXPORT_SYMBOL_GPL(ab8500_set_bits);
192 static void ab8500_irq_lock(unsigned int irq)
194 struct ab8500 *ab8500 = get_irq_chip_data(irq);
196 mutex_lock(&ab8500->irq_lock);
199 static void ab8500_irq_sync_unlock(unsigned int irq)
201 struct ab8500 *ab8500 = get_irq_chip_data(irq);
202 int i;
204 for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) {
205 u8 old = ab8500->oldmask[i];
206 u8 new = ab8500->mask[i];
207 int reg;
209 if (new == old)
210 continue;
212 ab8500->oldmask[i] = new;
214 reg = AB8500_IT_MASK1_REG + ab8500_irq_regoffset[i];
215 ab8500_write(ab8500, reg, new);
218 mutex_unlock(&ab8500->irq_lock);
221 static void ab8500_irq_mask(unsigned int irq)
223 struct ab8500 *ab8500 = get_irq_chip_data(irq);
224 int offset = irq - ab8500->irq_base;
225 int index = offset / 8;
226 int mask = 1 << (offset % 8);
228 ab8500->mask[index] |= mask;
231 static void ab8500_irq_unmask(unsigned int irq)
233 struct ab8500 *ab8500 = get_irq_chip_data(irq);
234 int offset = irq - ab8500->irq_base;
235 int index = offset / 8;
236 int mask = 1 << (offset % 8);
238 ab8500->mask[index] &= ~mask;
241 static struct irq_chip ab8500_irq_chip = {
242 .name = "ab8500",
243 .bus_lock = ab8500_irq_lock,
244 .bus_sync_unlock = ab8500_irq_sync_unlock,
245 .mask = ab8500_irq_mask,
246 .unmask = ab8500_irq_unmask,
249 static irqreturn_t ab8500_irq(int irq, void *dev)
251 struct ab8500 *ab8500 = dev;
252 int i;
254 dev_vdbg(ab8500->dev, "interrupt\n");
256 for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) {
257 int regoffset = ab8500_irq_regoffset[i];
258 int status;
260 status = ab8500_read(ab8500, AB8500_IT_LATCH1_REG + regoffset);
261 if (status <= 0)
262 continue;
264 do {
265 int bit = __ffs(status);
266 int line = i * 8 + bit;
268 handle_nested_irq(ab8500->irq_base + line);
269 status &= ~(1 << bit);
270 } while (status);
273 return IRQ_HANDLED;
276 static int ab8500_irq_init(struct ab8500 *ab8500)
278 int base = ab8500->irq_base;
279 int irq;
281 for (irq = base; irq < base + AB8500_NR_IRQS; irq++) {
282 set_irq_chip_data(irq, ab8500);
283 set_irq_chip_and_handler(irq, &ab8500_irq_chip,
284 handle_simple_irq);
285 set_irq_nested_thread(irq, 1);
286 #ifdef CONFIG_ARM
287 set_irq_flags(irq, IRQF_VALID);
288 #else
289 set_irq_noprobe(irq);
290 #endif
293 return 0;
296 static void ab8500_irq_remove(struct ab8500 *ab8500)
298 int base = ab8500->irq_base;
299 int irq;
301 for (irq = base; irq < base + AB8500_NR_IRQS; irq++) {
302 #ifdef CONFIG_ARM
303 set_irq_flags(irq, 0);
304 #endif
305 set_irq_chip_and_handler(irq, NULL, NULL);
306 set_irq_chip_data(irq, NULL);
310 static struct resource ab8500_gpadc_resources[] = {
312 .name = "HW_CONV_END",
313 .start = AB8500_INT_GP_HW_ADC_CONV_END,
314 .end = AB8500_INT_GP_HW_ADC_CONV_END,
315 .flags = IORESOURCE_IRQ,
318 .name = "SW_CONV_END",
319 .start = AB8500_INT_GP_SW_ADC_CONV_END,
320 .end = AB8500_INT_GP_SW_ADC_CONV_END,
321 .flags = IORESOURCE_IRQ,
325 static struct resource ab8500_rtc_resources[] = {
327 .name = "60S",
328 .start = AB8500_INT_RTC_60S,
329 .end = AB8500_INT_RTC_60S,
330 .flags = IORESOURCE_IRQ,
333 .name = "ALARM",
334 .start = AB8500_INT_RTC_ALARM,
335 .end = AB8500_INT_RTC_ALARM,
336 .flags = IORESOURCE_IRQ,
340 static struct mfd_cell ab8500_devs[] = {
342 .name = "ab8500-gpadc",
343 .num_resources = ARRAY_SIZE(ab8500_gpadc_resources),
344 .resources = ab8500_gpadc_resources,
347 .name = "ab8500-rtc",
348 .num_resources = ARRAY_SIZE(ab8500_rtc_resources),
349 .resources = ab8500_rtc_resources,
351 { .name = "ab8500-charger", },
352 { .name = "ab8500-audio", },
353 { .name = "ab8500-usb", },
354 { .name = "ab8500-pwm", },
357 int __devinit ab8500_init(struct ab8500 *ab8500)
359 struct ab8500_platform_data *plat = dev_get_platdata(ab8500->dev);
360 int ret;
361 int i;
363 if (plat)
364 ab8500->irq_base = plat->irq_base;
366 mutex_init(&ab8500->lock);
367 mutex_init(&ab8500->irq_lock);
369 ret = ab8500_read(ab8500, AB8500_REV_REG);
370 if (ret < 0)
371 return ret;
374 * 0x0 - Early Drop
375 * 0x10 - Cut 1.0
376 * 0x11 - Cut 1.1
378 if (ret == 0x0 || ret == 0x10 || ret == 0x11) {
379 ab8500->revision = ret;
380 dev_info(ab8500->dev, "detected chip, revision: %#x\n", ret);
381 } else {
382 dev_err(ab8500->dev, "unknown chip, revision: %#x\n", ret);
383 return -EINVAL;
386 if (plat && plat->init)
387 plat->init(ab8500);
389 /* Clear and mask all interrupts */
390 for (i = 0; i < 10; i++) {
391 ab8500_read(ab8500, AB8500_IT_LATCH1_REG + i);
392 ab8500_write(ab8500, AB8500_IT_MASK1_REG + i, 0xff);
395 for (i = 18; i < 24; i++) {
396 ab8500_read(ab8500, AB8500_IT_LATCH1_REG + i);
397 ab8500_write(ab8500, AB8500_IT_MASK1_REG + i, 0xff);
400 for (i = 0; i < AB8500_NUM_IRQ_REGS; i++)
401 ab8500->mask[i] = ab8500->oldmask[i] = 0xff;
403 if (ab8500->irq_base) {
404 ret = ab8500_irq_init(ab8500);
405 if (ret)
406 return ret;
408 ret = request_threaded_irq(ab8500->irq, NULL, ab8500_irq,
409 IRQF_ONESHOT, "ab8500", ab8500);
410 if (ret)
411 goto out_removeirq;
414 ret = mfd_add_devices(ab8500->dev, -1, ab8500_devs,
415 ARRAY_SIZE(ab8500_devs), NULL,
416 ab8500->irq_base);
417 if (ret)
418 goto out_freeirq;
420 return ret;
422 out_freeirq:
423 if (ab8500->irq_base) {
424 free_irq(ab8500->irq, ab8500);
425 out_removeirq:
426 ab8500_irq_remove(ab8500);
428 return ret;
431 int __devexit ab8500_exit(struct ab8500 *ab8500)
433 mfd_remove_devices(ab8500->dev);
434 if (ab8500->irq_base) {
435 free_irq(ab8500->irq, ab8500);
436 ab8500_irq_remove(ab8500);
439 return 0;
442 MODULE_AUTHOR("Srinidhi Kasagar, Rabin Vincent");
443 MODULE_DESCRIPTION("AB8500 MFD core");
444 MODULE_LICENSE("GPL v2");