1 /******************************************************************************
3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
21 * Contact Information:
22 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 *****************************************************************************/
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/version.h>
30 #include <linux/init.h>
31 #include <linux/pci.h>
32 #include <linux/dma-mapping.h>
33 #include <linux/delay.h>
34 #include <linux/skbuff.h>
35 #include <linux/netdevice.h>
36 #include <linux/wireless.h>
37 #include <net/mac80211.h>
38 #include <linux/etherdevice.h>
39 #include <asm/unaligned.h>
41 #include "iwl-eeprom.h"
45 #include "iwl-helpers.h"
46 #include "iwl-calib.h"
49 static int iwl4965_send_tx_power(struct iwl_priv
*priv
);
50 static int iwl4965_hw_get_temperature(const struct iwl_priv
*priv
);
52 /* Change firmware file name, using "-" and incrementing number,
53 * *only* when uCode interface or architecture changes so that it
54 * is not compatible with earlier drivers.
55 * This number will also appear in << 8 position of 1st dword of uCode file */
56 #define IWL4965_UCODE_API "-2"
59 /* module parameters */
60 static struct iwl_mod_params iwl4965_mod_params
= {
61 .num_of_queues
= IWL49_NUM_QUEUES
,
62 .num_of_ampdu_queues
= IWL49_NUM_AMPDU_QUEUES
,
66 /* the rest are 0 by default */
69 /* check contents of special bootstrap uCode SRAM */
70 static int iwl4965_verify_bsm(struct iwl_priv
*priv
)
72 __le32
*image
= priv
->ucode_boot
.v_addr
;
73 u32 len
= priv
->ucode_boot
.len
;
77 IWL_DEBUG_INFO("Begin verify bsm\n");
79 /* verify BSM SRAM contents */
80 val
= iwl_read_prph(priv
, BSM_WR_DWCOUNT_REG
);
81 for (reg
= BSM_SRAM_LOWER_BOUND
;
82 reg
< BSM_SRAM_LOWER_BOUND
+ len
;
83 reg
+= sizeof(u32
), image
++) {
84 val
= iwl_read_prph(priv
, reg
);
85 if (val
!= le32_to_cpu(*image
)) {
86 IWL_ERROR("BSM uCode verification failed at "
87 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
89 reg
- BSM_SRAM_LOWER_BOUND
, len
,
90 val
, le32_to_cpu(*image
));
95 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
101 * iwl4965_load_bsm - Load bootstrap instructions
105 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
106 * in special SRAM that does not power down during RFKILL. When powering back
107 * up after power-saving sleeps (or during initial uCode load), the BSM loads
108 * the bootstrap program into the on-board processor, and starts it.
110 * The bootstrap program loads (via DMA) instructions and data for a new
111 * program from host DRAM locations indicated by the host driver in the
112 * BSM_DRAM_* registers. Once the new program is loaded, it starts
115 * When initializing the NIC, the host driver points the BSM to the
116 * "initialize" uCode image. This uCode sets up some internal data, then
117 * notifies host via "initialize alive" that it is complete.
119 * The host then replaces the BSM_DRAM_* pointer values to point to the
120 * normal runtime uCode instructions and a backup uCode data cache buffer
121 * (filled initially with starting data values for the on-board processor),
122 * then triggers the "initialize" uCode to load and launch the runtime uCode,
123 * which begins normal operation.
125 * When doing a power-save shutdown, runtime uCode saves data SRAM into
126 * the backup data cache in DRAM before SRAM is powered down.
128 * When powering back up, the BSM loads the bootstrap program. This reloads
129 * the runtime uCode instructions and the backup data cache into SRAM,
130 * and re-launches the runtime uCode from where it left off.
132 static int iwl4965_load_bsm(struct iwl_priv
*priv
)
134 __le32
*image
= priv
->ucode_boot
.v_addr
;
135 u32 len
= priv
->ucode_boot
.len
;
145 IWL_DEBUG_INFO("Begin load bsm\n");
147 priv
->ucode_type
= UCODE_RT
;
149 /* make sure bootstrap program is no larger than BSM's SRAM size */
150 if (len
> IWL_MAX_BSM_SIZE
)
153 /* Tell bootstrap uCode where to find the "Initialize" uCode
154 * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
155 * NOTE: iwl_init_alive_start() will replace these values,
156 * after the "initialize" uCode has run, to point to
157 * runtime/protocol instructions and backup data cache.
159 pinst
= priv
->ucode_init
.p_addr
>> 4;
160 pdata
= priv
->ucode_init_data
.p_addr
>> 4;
161 inst_len
= priv
->ucode_init
.len
;
162 data_len
= priv
->ucode_init_data
.len
;
164 ret
= iwl_grab_nic_access(priv
);
168 iwl_write_prph(priv
, BSM_DRAM_INST_PTR_REG
, pinst
);
169 iwl_write_prph(priv
, BSM_DRAM_DATA_PTR_REG
, pdata
);
170 iwl_write_prph(priv
, BSM_DRAM_INST_BYTECOUNT_REG
, inst_len
);
171 iwl_write_prph(priv
, BSM_DRAM_DATA_BYTECOUNT_REG
, data_len
);
173 /* Fill BSM memory with bootstrap instructions */
174 for (reg_offset
= BSM_SRAM_LOWER_BOUND
;
175 reg_offset
< BSM_SRAM_LOWER_BOUND
+ len
;
176 reg_offset
+= sizeof(u32
), image
++)
177 _iwl_write_prph(priv
, reg_offset
, le32_to_cpu(*image
));
179 ret
= iwl4965_verify_bsm(priv
);
181 iwl_release_nic_access(priv
);
185 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
186 iwl_write_prph(priv
, BSM_WR_MEM_SRC_REG
, 0x0);
187 iwl_write_prph(priv
, BSM_WR_MEM_DST_REG
, RTC_INST_LOWER_BOUND
);
188 iwl_write_prph(priv
, BSM_WR_DWCOUNT_REG
, len
/ sizeof(u32
));
190 /* Load bootstrap code into instruction SRAM now,
191 * to prepare to load "initialize" uCode */
192 iwl_write_prph(priv
, BSM_WR_CTRL_REG
, BSM_WR_CTRL_REG_BIT_START
);
194 /* Wait for load of bootstrap uCode to finish */
195 for (i
= 0; i
< 100; i
++) {
196 done
= iwl_read_prph(priv
, BSM_WR_CTRL_REG
);
197 if (!(done
& BSM_WR_CTRL_REG_BIT_START
))
202 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i
);
204 IWL_ERROR("BSM write did not complete!\n");
208 /* Enable future boot loads whenever power management unit triggers it
209 * (e.g. when powering back up after power-save shutdown) */
210 iwl_write_prph(priv
, BSM_WR_CTRL_REG
, BSM_WR_CTRL_REG_BIT_START_EN
);
212 iwl_release_nic_access(priv
);
218 * iwl4965_set_ucode_ptrs - Set uCode address location
220 * Tell initialization uCode where to find runtime uCode.
222 * BSM registers initially contain pointers to initialization uCode.
223 * We need to replace them to load runtime uCode inst and data,
224 * and to save runtime data when powering down.
226 static int iwl4965_set_ucode_ptrs(struct iwl_priv
*priv
)
233 /* bits 35:4 for 4965 */
234 pinst
= priv
->ucode_code
.p_addr
>> 4;
235 pdata
= priv
->ucode_data_backup
.p_addr
>> 4;
237 spin_lock_irqsave(&priv
->lock
, flags
);
238 ret
= iwl_grab_nic_access(priv
);
240 spin_unlock_irqrestore(&priv
->lock
, flags
);
244 /* Tell bootstrap uCode where to find image to load */
245 iwl_write_prph(priv
, BSM_DRAM_INST_PTR_REG
, pinst
);
246 iwl_write_prph(priv
, BSM_DRAM_DATA_PTR_REG
, pdata
);
247 iwl_write_prph(priv
, BSM_DRAM_DATA_BYTECOUNT_REG
,
248 priv
->ucode_data
.len
);
250 /* Inst bytecount must be last to set up, bit 31 signals uCode
251 * that all new ptr/size info is in place */
252 iwl_write_prph(priv
, BSM_DRAM_INST_BYTECOUNT_REG
,
253 priv
->ucode_code
.len
| BSM_DRAM_INST_LOAD
);
254 iwl_release_nic_access(priv
);
256 spin_unlock_irqrestore(&priv
->lock
, flags
);
258 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
264 * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
266 * Called after REPLY_ALIVE notification received from "initialize" uCode.
268 * The 4965 "initialize" ALIVE reply contains calibration data for:
269 * Voltage, temperature, and MIMO tx gain correction, now stored in priv
270 * (3945 does not contain this data).
272 * Tell "initialize" uCode to go ahead and load the runtime uCode.
274 static void iwl4965_init_alive_start(struct iwl_priv
*priv
)
276 /* Check alive response for "valid" sign from uCode */
277 if (priv
->card_alive_init
.is_valid
!= UCODE_VALID_OK
) {
278 /* We had an error bringing up the hardware, so take it
279 * all the way back down so we can try again */
280 IWL_DEBUG_INFO("Initialize Alive failed.\n");
284 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
285 * This is a paranoid check, because we would not have gotten the
286 * "initialize" alive if code weren't properly loaded. */
287 if (iwl_verify_ucode(priv
)) {
288 /* Runtime instruction load was bad;
289 * take it all the way back down so we can try again */
290 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
294 /* Calculate temperature */
295 priv
->temperature
= iwl4965_hw_get_temperature(priv
);
297 /* Send pointers to protocol/runtime uCode image ... init code will
298 * load and launch runtime uCode, which will send us another "Alive"
300 IWL_DEBUG_INFO("Initialization Alive received.\n");
301 if (iwl4965_set_ucode_ptrs(priv
)) {
302 /* Runtime instruction load won't happen;
303 * take it all the way back down so we can try again */
304 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
310 queue_work(priv
->workqueue
, &priv
->restart
);
313 static int is_fat_channel(__le32 rxon_flags
)
315 return (rxon_flags
& RXON_FLG_CHANNEL_MODE_PURE_40_MSK
) ||
316 (rxon_flags
& RXON_FLG_CHANNEL_MODE_MIXED_MSK
);
323 static int iwl4965_eeprom_check_version(struct iwl_priv
*priv
)
328 eeprom_ver
= iwl_eeprom_query16(priv
, EEPROM_VERSION
);
330 calib_ver
= iwl_eeprom_query16(priv
, EEPROM_4965_CALIB_VERSION_OFFSET
);
332 if (eeprom_ver
< EEPROM_4965_EEPROM_VERSION
||
333 calib_ver
< EEPROM_4965_TX_POWER_VERSION
)
338 IWL_ERROR("Unsuported EEPROM VER=0x%x < 0x%x CALIB=0x%x < 0x%x\n",
339 eeprom_ver
, EEPROM_4965_EEPROM_VERSION
,
340 calib_ver
, EEPROM_4965_TX_POWER_VERSION
);
344 int iwl4965_set_pwr_src(struct iwl_priv
*priv
, enum iwl_pwr_src src
)
349 spin_lock_irqsave(&priv
->lock
, flags
);
350 ret
= iwl_grab_nic_access(priv
);
352 spin_unlock_irqrestore(&priv
->lock
, flags
);
356 if (src
== IWL_PWR_SRC_VAUX
) {
358 ret
= pci_read_config_dword(priv
->pci_dev
, PCI_POWER_SOURCE
,
361 if (val
& PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT
) {
362 iwl_set_bits_mask_prph(priv
, APMG_PS_CTRL_REG
,
363 APMG_PS_CTRL_VAL_PWR_SRC_VAUX
,
364 ~APMG_PS_CTRL_MSK_PWR_SRC
);
367 iwl_set_bits_mask_prph(priv
, APMG_PS_CTRL_REG
,
368 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN
,
369 ~APMG_PS_CTRL_MSK_PWR_SRC
);
372 iwl_release_nic_access(priv
);
373 spin_unlock_irqrestore(&priv
->lock
, flags
);
379 * Activate/Deactivat Tx DMA/FIFO channels according tx fifos mask
380 * must be called under priv->lock and mac access
382 static void iwl4965_txq_set_sched(struct iwl_priv
*priv
, u32 mask
)
384 iwl_write_prph(priv
, IWL49_SCD_TXFACT
, mask
);
387 static int iwl4965_apm_init(struct iwl_priv
*priv
)
391 iwl_set_bit(priv
, CSR_GIO_CHICKEN_BITS
,
392 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER
);
394 /* disable L0s without affecting L1 :don't wait for ICH L0s bug W/A) */
395 iwl_set_bit(priv
, CSR_GIO_CHICKEN_BITS
,
396 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX
);
398 /* set "initialization complete" bit to move adapter
399 * D0U* --> D0A* state */
400 iwl_set_bit(priv
, CSR_GP_CNTRL
, CSR_GP_CNTRL_REG_FLAG_INIT_DONE
);
402 /* wait for clock stabilization */
403 ret
= iwl_poll_bit(priv
, CSR_GP_CNTRL
,
404 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY
,
405 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY
, 25000);
407 IWL_DEBUG_INFO("Failed to init the card\n");
411 ret
= iwl_grab_nic_access(priv
);
416 iwl_write_prph(priv
, APMG_CLK_CTRL_REG
, APMG_CLK_VAL_DMA_CLK_RQT
|
417 APMG_CLK_VAL_BSM_CLK_RQT
);
421 /* disable L1-Active */
422 iwl_set_bits_prph(priv
, APMG_PCIDEV_STT_REG
,
423 APMG_PCIDEV_STT_VAL_L1_ACT_DIS
);
425 iwl_release_nic_access(priv
);
431 static void iwl4965_nic_config(struct iwl_priv
*priv
)
438 spin_lock_irqsave(&priv
->lock
, flags
);
440 if ((priv
->rev_id
& 0x80) == 0x80 && (priv
->rev_id
& 0x7f) < 8) {
441 pci_read_config_dword(priv
->pci_dev
, PCI_REG_WUM8
, &val
);
442 /* Enable No Snoop field */
443 pci_write_config_dword(priv
->pci_dev
, PCI_REG_WUM8
,
447 pci_read_config_byte(priv
->pci_dev
, PCI_LINK_CTRL
, &val_link
);
449 /* L1 is enabled by BIOS */
450 if ((val_link
& PCI_LINK_VAL_L1_EN
) == PCI_LINK_VAL_L1_EN
)
451 /* diable L0S disabled L1A enabled */
452 iwl_set_bit(priv
, CSR_GIO_REG
, CSR_GIO_REG_VAL_L0S_ENABLED
);
454 /* L0S enabled L1A disabled */
455 iwl_clear_bit(priv
, CSR_GIO_REG
, CSR_GIO_REG_VAL_L0S_ENABLED
);
457 radio_cfg
= iwl_eeprom_query16(priv
, EEPROM_RADIO_CONFIG
);
459 /* write radio config values to register */
460 if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg
) == EEPROM_4965_RF_CFG_TYPE_MAX
)
461 iwl_set_bit(priv
, CSR_HW_IF_CONFIG_REG
,
462 EEPROM_RF_CFG_TYPE_MSK(radio_cfg
) |
463 EEPROM_RF_CFG_STEP_MSK(radio_cfg
) |
464 EEPROM_RF_CFG_DASH_MSK(radio_cfg
));
466 /* set CSR_HW_CONFIG_REG for uCode use */
467 iwl_set_bit(priv
, CSR_HW_IF_CONFIG_REG
,
468 CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI
|
469 CSR_HW_IF_CONFIG_REG_BIT_MAC_SI
);
471 priv
->calib_info
= (struct iwl_eeprom_calib_info
*)
472 iwl_eeprom_query_addr(priv
, EEPROM_4965_CALIB_TXPOWER_OFFSET
);
474 spin_unlock_irqrestore(&priv
->lock
, flags
);
477 static int iwl4965_apm_stop_master(struct iwl_priv
*priv
)
482 spin_lock_irqsave(&priv
->lock
, flags
);
484 /* set stop master bit */
485 iwl_set_bit(priv
, CSR_RESET
, CSR_RESET_REG_FLAG_STOP_MASTER
);
487 ret
= iwl_poll_bit(priv
, CSR_RESET
,
488 CSR_RESET_REG_FLAG_MASTER_DISABLED
,
489 CSR_RESET_REG_FLAG_MASTER_DISABLED
, 100);
494 spin_unlock_irqrestore(&priv
->lock
, flags
);
495 IWL_DEBUG_INFO("stop master\n");
500 static void iwl4965_apm_stop(struct iwl_priv
*priv
)
504 iwl4965_apm_stop_master(priv
);
506 spin_lock_irqsave(&priv
->lock
, flags
);
508 iwl_set_bit(priv
, CSR_RESET
, CSR_RESET_REG_FLAG_SW_RESET
);
512 iwl_set_bit(priv
, CSR_GP_CNTRL
, CSR_GP_CNTRL_REG_FLAG_INIT_DONE
);
513 spin_unlock_irqrestore(&priv
->lock
, flags
);
516 static int iwl4965_apm_reset(struct iwl_priv
*priv
)
521 iwl4965_apm_stop_master(priv
);
523 spin_lock_irqsave(&priv
->lock
, flags
);
525 iwl_set_bit(priv
, CSR_RESET
, CSR_RESET_REG_FLAG_SW_RESET
);
529 /* FIXME: put here L1A -L0S w/a */
531 iwl_set_bit(priv
, CSR_GP_CNTRL
, CSR_GP_CNTRL_REG_FLAG_INIT_DONE
);
533 ret
= iwl_poll_bit(priv
, CSR_RESET
,
534 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY
,
535 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY
, 25);
542 ret
= iwl_grab_nic_access(priv
);
545 /* Enable DMA and BSM Clock */
546 iwl_write_prph(priv
, APMG_CLK_EN_REG
, APMG_CLK_VAL_DMA_CLK_RQT
|
547 APMG_CLK_VAL_BSM_CLK_RQT
);
552 iwl_set_bits_prph(priv
, APMG_PCIDEV_STT_REG
,
553 APMG_PCIDEV_STT_VAL_L1_ACT_DIS
);
555 iwl_release_nic_access(priv
);
557 clear_bit(STATUS_HCMD_ACTIVE
, &priv
->status
);
558 wake_up_interruptible(&priv
->wait_command_queue
);
561 spin_unlock_irqrestore(&priv
->lock
, flags
);
566 /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
567 * Called after every association, but this runs only once!
568 * ... once chain noise is calibrated the first time, it's good forever. */
569 static void iwl4965_chain_noise_reset(struct iwl_priv
*priv
)
571 struct iwl_chain_noise_data
*data
= &(priv
->chain_noise_data
);
573 if ((data
->state
== IWL_CHAIN_NOISE_ALIVE
) && iwl_is_associated(priv
)) {
574 struct iwl4965_calibration_cmd cmd
;
576 memset(&cmd
, 0, sizeof(cmd
));
577 cmd
.opCode
= PHY_CALIBRATE_DIFF_GAIN_CMD
;
581 if (iwl_send_cmd_pdu(priv
, REPLY_PHY_CALIBRATION_CMD
,
583 IWL_ERROR("Could not send REPLY_PHY_CALIBRATION_CMD\n");
584 data
->state
= IWL_CHAIN_NOISE_ACCUMULATE
;
585 IWL_DEBUG_CALIB("Run chain_noise_calibrate\n");
589 static void iwl4965_gain_computation(struct iwl_priv
*priv
,
591 u16 min_average_noise_antenna_i
,
592 u32 min_average_noise
)
595 struct iwl_chain_noise_data
*data
= &priv
->chain_noise_data
;
597 data
->delta_gain_code
[min_average_noise_antenna_i
] = 0;
599 for (i
= 0; i
< NUM_RX_CHAINS
; i
++) {
602 if (!(data
->disconn_array
[i
]) &&
603 (data
->delta_gain_code
[i
] ==
604 CHAIN_NOISE_DELTA_GAIN_INIT_VAL
)) {
605 delta_g
= average_noise
[i
] - min_average_noise
;
606 data
->delta_gain_code
[i
] = (u8
)((delta_g
* 10) / 15);
607 data
->delta_gain_code
[i
] =
608 min(data
->delta_gain_code
[i
],
609 (u8
) CHAIN_NOISE_MAX_DELTA_GAIN_CODE
);
611 data
->delta_gain_code
[i
] =
612 (data
->delta_gain_code
[i
] | (1 << 2));
614 data
->delta_gain_code
[i
] = 0;
617 IWL_DEBUG_CALIB("delta_gain_codes: a %d b %d c %d\n",
618 data
->delta_gain_code
[0],
619 data
->delta_gain_code
[1],
620 data
->delta_gain_code
[2]);
622 /* Differential gain gets sent to uCode only once */
623 if (!data
->radio_write
) {
624 struct iwl4965_calibration_cmd cmd
;
625 data
->radio_write
= 1;
627 memset(&cmd
, 0, sizeof(cmd
));
628 cmd
.opCode
= PHY_CALIBRATE_DIFF_GAIN_CMD
;
629 cmd
.diff_gain_a
= data
->delta_gain_code
[0];
630 cmd
.diff_gain_b
= data
->delta_gain_code
[1];
631 cmd
.diff_gain_c
= data
->delta_gain_code
[2];
632 ret
= iwl_send_cmd_pdu(priv
, REPLY_PHY_CALIBRATION_CMD
,
635 IWL_DEBUG_CALIB("fail sending cmd "
636 "REPLY_PHY_CALIBRATION_CMD \n");
638 /* TODO we might want recalculate
639 * rx_chain in rxon cmd */
641 /* Mark so we run this algo only once! */
642 data
->state
= IWL_CHAIN_NOISE_CALIBRATED
;
644 data
->chain_noise_a
= 0;
645 data
->chain_noise_b
= 0;
646 data
->chain_noise_c
= 0;
647 data
->chain_signal_a
= 0;
648 data
->chain_signal_b
= 0;
649 data
->chain_signal_c
= 0;
650 data
->beacon_count
= 0;
653 static void iwl4965_rts_tx_cmd_flag(struct ieee80211_tx_info
*info
,
656 if (info
->flags
& IEEE80211_TX_CTL_USE_RTS_CTS
) {
657 *tx_flags
|= TX_CMD_FLG_RTS_MSK
;
658 *tx_flags
&= ~TX_CMD_FLG_CTS_MSK
;
659 } else if (info
->flags
& IEEE80211_TX_CTL_USE_CTS_PROTECT
) {
660 *tx_flags
&= ~TX_CMD_FLG_RTS_MSK
;
661 *tx_flags
|= TX_CMD_FLG_CTS_MSK
;
665 static void iwl4965_bg_txpower_work(struct work_struct
*work
)
667 struct iwl_priv
*priv
= container_of(work
, struct iwl_priv
,
670 /* If a scan happened to start before we got here
671 * then just return; the statistics notification will
672 * kick off another scheduled work to compensate for
673 * any temperature delta we missed here. */
674 if (test_bit(STATUS_EXIT_PENDING
, &priv
->status
) ||
675 test_bit(STATUS_SCANNING
, &priv
->status
))
678 mutex_lock(&priv
->mutex
);
680 /* Regardless of if we are assocaited, we must reconfigure the
681 * TX power since frames can be sent on non-radar channels while
683 iwl4965_send_tx_power(priv
);
685 /* Update last_temperature to keep is_calib_needed from running
686 * when it isn't needed... */
687 priv
->last_temperature
= priv
->temperature
;
689 mutex_unlock(&priv
->mutex
);
693 * Acquire priv->lock before calling this function !
695 static void iwl4965_set_wr_ptrs(struct iwl_priv
*priv
, int txq_id
, u32 index
)
697 iwl_write_direct32(priv
, HBUS_TARG_WRPTR
,
698 (index
& 0xff) | (txq_id
<< 8));
699 iwl_write_prph(priv
, IWL49_SCD_QUEUE_RDPTR(txq_id
), index
);
703 * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
704 * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
705 * @scd_retry: (1) Indicates queue will be used in aggregation mode
707 * NOTE: Acquire priv->lock before calling this function !
709 static void iwl4965_tx_queue_set_status(struct iwl_priv
*priv
,
710 struct iwl_tx_queue
*txq
,
711 int tx_fifo_id
, int scd_retry
)
713 int txq_id
= txq
->q
.id
;
715 /* Find out whether to activate Tx queue */
716 int active
= test_bit(txq_id
, &priv
->txq_ctx_active_msk
)?1:0;
718 /* Set up and activate */
719 iwl_write_prph(priv
, IWL49_SCD_QUEUE_STATUS_BITS(txq_id
),
720 (active
<< IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE
) |
721 (tx_fifo_id
<< IWL49_SCD_QUEUE_STTS_REG_POS_TXF
) |
722 (scd_retry
<< IWL49_SCD_QUEUE_STTS_REG_POS_WSL
) |
723 (scd_retry
<< IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK
) |
724 IWL49_SCD_QUEUE_STTS_REG_MSK
);
726 txq
->sched_retry
= scd_retry
;
728 IWL_DEBUG_INFO("%s %s Queue %d on AC %d\n",
729 active
? "Activate" : "Deactivate",
730 scd_retry
? "BA" : "AC", txq_id
, tx_fifo_id
);
733 static const u16 default_queue_to_tx_fifo
[] = {
743 static int iwl4965_alive_notify(struct iwl_priv
*priv
)
750 spin_lock_irqsave(&priv
->lock
, flags
);
752 ret
= iwl_grab_nic_access(priv
);
754 spin_unlock_irqrestore(&priv
->lock
, flags
);
758 /* Clear 4965's internal Tx Scheduler data base */
759 priv
->scd_base_addr
= iwl_read_prph(priv
, IWL49_SCD_SRAM_BASE_ADDR
);
760 a
= priv
->scd_base_addr
+ IWL49_SCD_CONTEXT_DATA_OFFSET
;
761 for (; a
< priv
->scd_base_addr
+ IWL49_SCD_TX_STTS_BITMAP_OFFSET
; a
+= 4)
762 iwl_write_targ_mem(priv
, a
, 0);
763 for (; a
< priv
->scd_base_addr
+ IWL49_SCD_TRANSLATE_TBL_OFFSET
; a
+= 4)
764 iwl_write_targ_mem(priv
, a
, 0);
765 for (; a
< sizeof(u16
) * priv
->hw_params
.max_txq_num
; a
+= 4)
766 iwl_write_targ_mem(priv
, a
, 0);
768 /* Tel 4965 where to find Tx byte count tables */
769 iwl_write_prph(priv
, IWL49_SCD_DRAM_BASE_ADDR
,
771 offsetof(struct iwl4965_shared
, queues_byte_cnt_tbls
)) >> 10);
773 /* Disable chain mode for all queues */
774 iwl_write_prph(priv
, IWL49_SCD_QUEUECHAIN_SEL
, 0);
776 /* Initialize each Tx queue (including the command queue) */
777 for (i
= 0; i
< priv
->hw_params
.max_txq_num
; i
++) {
779 /* TFD circular buffer read/write indexes */
780 iwl_write_prph(priv
, IWL49_SCD_QUEUE_RDPTR(i
), 0);
781 iwl_write_direct32(priv
, HBUS_TARG_WRPTR
, 0 | (i
<< 8));
783 /* Max Tx Window size for Scheduler-ACK mode */
784 iwl_write_targ_mem(priv
, priv
->scd_base_addr
+
785 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i
),
787 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS
) &
788 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK
);
791 iwl_write_targ_mem(priv
, priv
->scd_base_addr
+
792 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i
) +
795 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS
) &
796 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK
);
799 iwl_write_prph(priv
, IWL49_SCD_INTERRUPT_MASK
,
800 (1 << priv
->hw_params
.max_txq_num
) - 1);
802 /* Activate all Tx DMA/FIFO channels */
803 priv
->cfg
->ops
->lib
->txq_set_sched(priv
, IWL_MASK(0, 7));
805 iwl4965_set_wr_ptrs(priv
, IWL_CMD_QUEUE_NUM
, 0);
807 /* Map each Tx/cmd queue to its corresponding fifo */
808 for (i
= 0; i
< ARRAY_SIZE(default_queue_to_tx_fifo
); i
++) {
809 int ac
= default_queue_to_tx_fifo
[i
];
810 iwl_txq_ctx_activate(priv
, i
);
811 iwl4965_tx_queue_set_status(priv
, &priv
->txq
[i
], ac
, 0);
814 iwl_release_nic_access(priv
);
815 spin_unlock_irqrestore(&priv
->lock
, flags
);
820 static struct iwl_sensitivity_ranges iwl4965_sensitivity
= {
824 .auto_corr_min_ofdm
= 85,
825 .auto_corr_min_ofdm_mrc
= 170,
826 .auto_corr_min_ofdm_x1
= 105,
827 .auto_corr_min_ofdm_mrc_x1
= 220,
829 .auto_corr_max_ofdm
= 120,
830 .auto_corr_max_ofdm_mrc
= 210,
831 .auto_corr_max_ofdm_x1
= 140,
832 .auto_corr_max_ofdm_mrc_x1
= 270,
834 .auto_corr_min_cck
= 125,
835 .auto_corr_max_cck
= 200,
836 .auto_corr_min_cck_mrc
= 200,
837 .auto_corr_max_cck_mrc
= 400,
844 * iwl4965_hw_set_hw_params
846 * Called when initializing driver
848 static int iwl4965_hw_set_hw_params(struct iwl_priv
*priv
)
851 if ((priv
->cfg
->mod_params
->num_of_queues
> IWL49_NUM_QUEUES
) ||
852 (priv
->cfg
->mod_params
->num_of_queues
< IWL_MIN_NUM_QUEUES
)) {
853 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
854 IWL_MIN_NUM_QUEUES
, IWL49_NUM_QUEUES
);
858 priv
->hw_params
.max_txq_num
= priv
->cfg
->mod_params
->num_of_queues
;
859 priv
->hw_params
.first_ampdu_q
= IWL49_FIRST_AMPDU_QUEUE
;
860 priv
->hw_params
.max_stations
= IWL4965_STATION_COUNT
;
861 priv
->hw_params
.bcast_sta_id
= IWL4965_BROADCAST_ID
;
862 priv
->hw_params
.max_data_size
= IWL49_RTC_DATA_SIZE
;
863 priv
->hw_params
.max_inst_size
= IWL49_RTC_INST_SIZE
;
864 priv
->hw_params
.max_bsm_size
= BSM_SRAM_SIZE
;
865 priv
->hw_params
.fat_channel
= BIT(IEEE80211_BAND_5GHZ
);
867 priv
->hw_params
.tx_chains_num
= 2;
868 priv
->hw_params
.rx_chains_num
= 2;
869 priv
->hw_params
.valid_tx_ant
= ANT_A
| ANT_B
;
870 priv
->hw_params
.valid_rx_ant
= ANT_A
| ANT_B
;
871 priv
->hw_params
.ct_kill_threshold
= CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD
);
873 priv
->hw_params
.sens
= &iwl4965_sensitivity
;
878 /* set card power command */
879 static int iwl4965_set_power(struct iwl_priv
*priv
,
884 ret
= iwl_send_cmd_pdu_async(priv
, POWER_TABLE_CMD
,
885 sizeof(struct iwl4965_powertable_cmd
),
890 static s32
iwl4965_math_div_round(s32 num
, s32 denom
, s32
*res
)
903 *res
= ((num
* 2 + denom
) / (denom
* 2)) * sign
;
909 * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
911 * Determines power supply voltage compensation for txpower calculations.
912 * Returns number of 1/2-dB steps to subtract from gain table index,
913 * to compensate for difference between power supply voltage during
914 * factory measurements, vs. current power supply voltage.
916 * Voltage indication is higher for lower voltage.
917 * Lower voltage requires more gain (lower gain table index).
919 static s32
iwl4965_get_voltage_compensation(s32 eeprom_voltage
,
924 if ((TX_POWER_IWL_ILLEGAL_VOLTAGE
== eeprom_voltage
) ||
925 (TX_POWER_IWL_ILLEGAL_VOLTAGE
== current_voltage
))
928 iwl4965_math_div_round(current_voltage
- eeprom_voltage
,
929 TX_POWER_IWL_VOLTAGE_CODES_PER_03V
, &comp
);
931 if (current_voltage
> eeprom_voltage
)
933 if ((comp
< -2) || (comp
> 2))
939 static s32
iwl4965_get_tx_atten_grp(u16 channel
)
941 if (channel
>= CALIB_IWL_TX_ATTEN_GR5_FCH
&&
942 channel
<= CALIB_IWL_TX_ATTEN_GR5_LCH
)
943 return CALIB_CH_GROUP_5
;
945 if (channel
>= CALIB_IWL_TX_ATTEN_GR1_FCH
&&
946 channel
<= CALIB_IWL_TX_ATTEN_GR1_LCH
)
947 return CALIB_CH_GROUP_1
;
949 if (channel
>= CALIB_IWL_TX_ATTEN_GR2_FCH
&&
950 channel
<= CALIB_IWL_TX_ATTEN_GR2_LCH
)
951 return CALIB_CH_GROUP_2
;
953 if (channel
>= CALIB_IWL_TX_ATTEN_GR3_FCH
&&
954 channel
<= CALIB_IWL_TX_ATTEN_GR3_LCH
)
955 return CALIB_CH_GROUP_3
;
957 if (channel
>= CALIB_IWL_TX_ATTEN_GR4_FCH
&&
958 channel
<= CALIB_IWL_TX_ATTEN_GR4_LCH
)
959 return CALIB_CH_GROUP_4
;
961 IWL_ERROR("Can't find txatten group for channel %d.\n", channel
);
965 static u32
iwl4965_get_sub_band(const struct iwl_priv
*priv
, u32 channel
)
969 for (b
= 0; b
< EEPROM_TX_POWER_BANDS
; b
++) {
970 if (priv
->calib_info
->band_info
[b
].ch_from
== 0)
973 if ((channel
>= priv
->calib_info
->band_info
[b
].ch_from
)
974 && (channel
<= priv
->calib_info
->band_info
[b
].ch_to
))
981 static s32
iwl4965_interpolate_value(s32 x
, s32 x1
, s32 y1
, s32 x2
, s32 y2
)
988 iwl4965_math_div_round((x2
- x
) * (y1
- y2
), (x2
- x1
), &val
);
994 * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
996 * Interpolates factory measurements from the two sample channels within a
997 * sub-band, to apply to channel of interest. Interpolation is proportional to
998 * differences in channel frequencies, which is proportional to differences
1001 static int iwl4965_interpolate_chan(struct iwl_priv
*priv
, u32 channel
,
1002 struct iwl_eeprom_calib_ch_info
*chan_info
)
1007 const struct iwl_eeprom_calib_measure
*m1
;
1008 const struct iwl_eeprom_calib_measure
*m2
;
1009 struct iwl_eeprom_calib_measure
*omeas
;
1013 s
= iwl4965_get_sub_band(priv
, channel
);
1014 if (s
>= EEPROM_TX_POWER_BANDS
) {
1015 IWL_ERROR("Tx Power can not find channel %d ", channel
);
1019 ch_i1
= priv
->calib_info
->band_info
[s
].ch1
.ch_num
;
1020 ch_i2
= priv
->calib_info
->band_info
[s
].ch2
.ch_num
;
1021 chan_info
->ch_num
= (u8
) channel
;
1023 IWL_DEBUG_TXPOWER("channel %d subband %d factory cal ch %d & %d\n",
1024 channel
, s
, ch_i1
, ch_i2
);
1026 for (c
= 0; c
< EEPROM_TX_POWER_TX_CHAINS
; c
++) {
1027 for (m
= 0; m
< EEPROM_TX_POWER_MEASUREMENTS
; m
++) {
1028 m1
= &(priv
->calib_info
->band_info
[s
].ch1
.
1029 measurements
[c
][m
]);
1030 m2
= &(priv
->calib_info
->band_info
[s
].ch2
.
1031 measurements
[c
][m
]);
1032 omeas
= &(chan_info
->measurements
[c
][m
]);
1035 (u8
) iwl4965_interpolate_value(channel
, ch_i1
,
1040 (u8
) iwl4965_interpolate_value(channel
, ch_i1
,
1041 m1
->gain_idx
, ch_i2
,
1043 omeas
->temperature
=
1044 (u8
) iwl4965_interpolate_value(channel
, ch_i1
,
1049 (s8
) iwl4965_interpolate_value(channel
, ch_i1
,
1054 ("chain %d meas %d AP1=%d AP2=%d AP=%d\n", c
, m
,
1055 m1
->actual_pow
, m2
->actual_pow
, omeas
->actual_pow
);
1057 ("chain %d meas %d NI1=%d NI2=%d NI=%d\n", c
, m
,
1058 m1
->gain_idx
, m2
->gain_idx
, omeas
->gain_idx
);
1060 ("chain %d meas %d PA1=%d PA2=%d PA=%d\n", c
, m
,
1061 m1
->pa_det
, m2
->pa_det
, omeas
->pa_det
);
1063 ("chain %d meas %d T1=%d T2=%d T=%d\n", c
, m
,
1064 m1
->temperature
, m2
->temperature
,
1065 omeas
->temperature
);
1072 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
1073 * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
1074 static s32 back_off_table
[] = {
1075 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
1076 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
1077 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
1078 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
1082 /* Thermal compensation values for txpower for various frequency ranges ...
1083 * ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
1084 static struct iwl4965_txpower_comp_entry
{
1085 s32 degrees_per_05db_a
;
1086 s32 degrees_per_05db_a_denom
;
1087 } tx_power_cmp_tble
[CALIB_CH_GROUP_MAX
] = {
1088 {9, 2}, /* group 0 5.2, ch 34-43 */
1089 {4, 1}, /* group 1 5.2, ch 44-70 */
1090 {4, 1}, /* group 2 5.2, ch 71-124 */
1091 {4, 1}, /* group 3 5.2, ch 125-200 */
1092 {3, 1} /* group 4 2.4, ch all */
1095 static s32
get_min_power_index(s32 rate_power_index
, u32 band
)
1098 if ((rate_power_index
& 7) <= 4)
1099 return MIN_TX_GAIN_INDEX_52GHZ_EXT
;
1101 return MIN_TX_GAIN_INDEX
;
1109 static const struct gain_entry gain_table
[2][108] = {
1110 /* 5.2GHz power gain index table */
1112 {123, 0x3F}, /* highest txpower */
1221 /* 2.4GHz power gain index table */
1223 {110, 0x3f}, /* highest txpower */
1334 static int iwl4965_fill_txpower_tbl(struct iwl_priv
*priv
, u8 band
, u16 channel
,
1335 u8 is_fat
, u8 ctrl_chan_high
,
1336 struct iwl4965_tx_power_db
*tx_power_tbl
)
1338 u8 saturation_power
;
1340 s32 user_target_power
;
1344 s32 current_regulatory
;
1345 s32 txatten_grp
= CALIB_CH_GROUP_MAX
;
1348 const struct iwl_channel_info
*ch_info
= NULL
;
1349 struct iwl_eeprom_calib_ch_info ch_eeprom_info
;
1350 const struct iwl_eeprom_calib_measure
*measurement
;
1353 s32 voltage_compensation
;
1354 s32 degrees_per_05db_num
;
1355 s32 degrees_per_05db_denom
;
1357 s32 temperature_comp
[2];
1358 s32 factory_gain_index
[2];
1359 s32 factory_actual_pwr
[2];
1362 /* user_txpower_limit is in dBm, convert to half-dBm (half-dB units
1363 * are used for indexing into txpower table) */
1364 user_target_power
= 2 * priv
->tx_power_user_lmt
;
1366 /* Get current (RXON) channel, band, width */
1367 IWL_DEBUG_TXPOWER("chan %d band %d is_fat %d\n", channel
, band
,
1370 ch_info
= iwl_get_channel_info(priv
, priv
->band
, channel
);
1372 if (!is_channel_valid(ch_info
))
1375 /* get txatten group, used to select 1) thermal txpower adjustment
1376 * and 2) mimo txpower balance between Tx chains. */
1377 txatten_grp
= iwl4965_get_tx_atten_grp(channel
);
1378 if (txatten_grp
< 0)
1381 IWL_DEBUG_TXPOWER("channel %d belongs to txatten group %d\n",
1382 channel
, txatten_grp
);
1391 /* hardware txpower limits ...
1392 * saturation (clipping distortion) txpowers are in half-dBm */
1394 saturation_power
= priv
->calib_info
->saturation_power24
;
1396 saturation_power
= priv
->calib_info
->saturation_power52
;
1398 if (saturation_power
< IWL_TX_POWER_SATURATION_MIN
||
1399 saturation_power
> IWL_TX_POWER_SATURATION_MAX
) {
1401 saturation_power
= IWL_TX_POWER_DEFAULT_SATURATION_24
;
1403 saturation_power
= IWL_TX_POWER_DEFAULT_SATURATION_52
;
1406 /* regulatory txpower limits ... reg_limit values are in half-dBm,
1407 * max_power_avg values are in dBm, convert * 2 */
1409 reg_limit
= ch_info
->fat_max_power_avg
* 2;
1411 reg_limit
= ch_info
->max_power_avg
* 2;
1413 if ((reg_limit
< IWL_TX_POWER_REGULATORY_MIN
) ||
1414 (reg_limit
> IWL_TX_POWER_REGULATORY_MAX
)) {
1416 reg_limit
= IWL_TX_POWER_DEFAULT_REGULATORY_24
;
1418 reg_limit
= IWL_TX_POWER_DEFAULT_REGULATORY_52
;
1421 /* Interpolate txpower calibration values for this channel,
1422 * based on factory calibration tests on spaced channels. */
1423 iwl4965_interpolate_chan(priv
, channel
, &ch_eeprom_info
);
1425 /* calculate tx gain adjustment based on power supply voltage */
1426 voltage
= priv
->calib_info
->voltage
;
1427 init_voltage
= (s32
)le32_to_cpu(priv
->card_alive_init
.voltage
);
1428 voltage_compensation
=
1429 iwl4965_get_voltage_compensation(voltage
, init_voltage
);
1431 IWL_DEBUG_TXPOWER("curr volt %d eeprom volt %d volt comp %d\n",
1433 voltage
, voltage_compensation
);
1435 /* get current temperature (Celsius) */
1436 current_temp
= max(priv
->temperature
, IWL_TX_POWER_TEMPERATURE_MIN
);
1437 current_temp
= min(priv
->temperature
, IWL_TX_POWER_TEMPERATURE_MAX
);
1438 current_temp
= KELVIN_TO_CELSIUS(current_temp
);
1440 /* select thermal txpower adjustment params, based on channel group
1441 * (same frequency group used for mimo txatten adjustment) */
1442 degrees_per_05db_num
=
1443 tx_power_cmp_tble
[txatten_grp
].degrees_per_05db_a
;
1444 degrees_per_05db_denom
=
1445 tx_power_cmp_tble
[txatten_grp
].degrees_per_05db_a_denom
;
1447 /* get per-chain txpower values from factory measurements */
1448 for (c
= 0; c
< 2; c
++) {
1449 measurement
= &ch_eeprom_info
.measurements
[c
][1];
1451 /* txgain adjustment (in half-dB steps) based on difference
1452 * between factory and current temperature */
1453 factory_temp
= measurement
->temperature
;
1454 iwl4965_math_div_round((current_temp
- factory_temp
) *
1455 degrees_per_05db_denom
,
1456 degrees_per_05db_num
,
1457 &temperature_comp
[c
]);
1459 factory_gain_index
[c
] = measurement
->gain_idx
;
1460 factory_actual_pwr
[c
] = measurement
->actual_pow
;
1462 IWL_DEBUG_TXPOWER("chain = %d\n", c
);
1463 IWL_DEBUG_TXPOWER("fctry tmp %d, "
1464 "curr tmp %d, comp %d steps\n",
1465 factory_temp
, current_temp
,
1466 temperature_comp
[c
]);
1468 IWL_DEBUG_TXPOWER("fctry idx %d, fctry pwr %d\n",
1469 factory_gain_index
[c
],
1470 factory_actual_pwr
[c
]);
1473 /* for each of 33 bit-rates (including 1 for CCK) */
1474 for (i
= 0; i
< POWER_TABLE_NUM_ENTRIES
; i
++) {
1476 union iwl4965_tx_power_dual_stream tx_power
;
1478 /* for mimo, reduce each chain's txpower by half
1479 * (3dB, 6 steps), so total output power is regulatory
1482 current_regulatory
= reg_limit
-
1483 IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION
;
1486 current_regulatory
= reg_limit
;
1490 /* find txpower limit, either hardware or regulatory */
1491 power_limit
= saturation_power
- back_off_table
[i
];
1492 if (power_limit
> current_regulatory
)
1493 power_limit
= current_regulatory
;
1495 /* reduce user's txpower request if necessary
1496 * for this rate on this channel */
1497 target_power
= user_target_power
;
1498 if (target_power
> power_limit
)
1499 target_power
= power_limit
;
1501 IWL_DEBUG_TXPOWER("rate %d sat %d reg %d usr %d tgt %d\n",
1502 i
, saturation_power
- back_off_table
[i
],
1503 current_regulatory
, user_target_power
,
1506 /* for each of 2 Tx chains (radio transmitters) */
1507 for (c
= 0; c
< 2; c
++) {
1512 (s32
)le32_to_cpu(priv
->card_alive_init
.
1513 tx_atten
[txatten_grp
][c
]);
1517 /* calculate index; higher index means lower txpower */
1518 power_index
= (u8
) (factory_gain_index
[c
] -
1520 factory_actual_pwr
[c
]) -
1521 temperature_comp
[c
] -
1522 voltage_compensation
+
1525 /* IWL_DEBUG_TXPOWER("calculated txpower index %d\n",
1528 if (power_index
< get_min_power_index(i
, band
))
1529 power_index
= get_min_power_index(i
, band
);
1531 /* adjust 5 GHz index to support negative indexes */
1535 /* CCK, rate 32, reduce txpower for CCK */
1536 if (i
== POWER_TABLE_CCK_ENTRY
)
1538 IWL_TX_POWER_CCK_COMPENSATION_C_STEP
;
1540 /* stay within the table! */
1541 if (power_index
> 107) {
1542 IWL_WARNING("txpower index %d > 107\n",
1546 if (power_index
< 0) {
1547 IWL_WARNING("txpower index %d < 0\n",
1552 /* fill txpower command for this rate/chain */
1553 tx_power
.s
.radio_tx_gain
[c
] =
1554 gain_table
[band
][power_index
].radio
;
1555 tx_power
.s
.dsp_predis_atten
[c
] =
1556 gain_table
[band
][power_index
].dsp
;
1558 IWL_DEBUG_TXPOWER("chain %d mimo %d index %d "
1559 "gain 0x%02x dsp %d\n",
1560 c
, atten_value
, power_index
,
1561 tx_power
.s
.radio_tx_gain
[c
],
1562 tx_power
.s
.dsp_predis_atten
[c
]);
1563 }/* for each chain */
1565 tx_power_tbl
->power_tbl
[i
].dw
= cpu_to_le32(tx_power
.dw
);
1567 }/* for each rate */
1573 * iwl4965_send_tx_power - Configure the TXPOWER level user limit
1575 * Uses the active RXON for channel, band, and characteristics (fat, high)
1576 * The power limit is taken from priv->tx_power_user_lmt.
1578 static int iwl4965_send_tx_power(struct iwl_priv
*priv
)
1580 struct iwl4965_txpowertable_cmd cmd
= { 0 };
1584 u8 ctrl_chan_high
= 0;
1586 if (test_bit(STATUS_SCANNING
, &priv
->status
)) {
1587 /* If this gets hit a lot, switch it to a BUG() and catch
1588 * the stack trace to find out who is calling this during
1590 IWL_WARNING("TX Power requested while scanning!\n");
1594 band
= priv
->band
== IEEE80211_BAND_2GHZ
;
1596 is_fat
= is_fat_channel(priv
->active_rxon
.flags
);
1599 (priv
->active_rxon
.flags
& RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK
))
1603 cmd
.channel
= priv
->active_rxon
.channel
;
1605 ret
= iwl4965_fill_txpower_tbl(priv
, band
,
1606 le16_to_cpu(priv
->active_rxon
.channel
),
1607 is_fat
, ctrl_chan_high
, &cmd
.tx_power
);
1611 ret
= iwl_send_cmd_pdu(priv
, REPLY_TX_PWR_TABLE_CMD
, sizeof(cmd
), &cmd
);
1617 static int iwl4965_send_rxon_assoc(struct iwl_priv
*priv
)
1620 struct iwl4965_rxon_assoc_cmd rxon_assoc
;
1621 const struct iwl_rxon_cmd
*rxon1
= &priv
->staging_rxon
;
1622 const struct iwl_rxon_cmd
*rxon2
= &priv
->active_rxon
;
1624 if ((rxon1
->flags
== rxon2
->flags
) &&
1625 (rxon1
->filter_flags
== rxon2
->filter_flags
) &&
1626 (rxon1
->cck_basic_rates
== rxon2
->cck_basic_rates
) &&
1627 (rxon1
->ofdm_ht_single_stream_basic_rates
==
1628 rxon2
->ofdm_ht_single_stream_basic_rates
) &&
1629 (rxon1
->ofdm_ht_dual_stream_basic_rates
==
1630 rxon2
->ofdm_ht_dual_stream_basic_rates
) &&
1631 (rxon1
->rx_chain
== rxon2
->rx_chain
) &&
1632 (rxon1
->ofdm_basic_rates
== rxon2
->ofdm_basic_rates
)) {
1633 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
1637 rxon_assoc
.flags
= priv
->staging_rxon
.flags
;
1638 rxon_assoc
.filter_flags
= priv
->staging_rxon
.filter_flags
;
1639 rxon_assoc
.ofdm_basic_rates
= priv
->staging_rxon
.ofdm_basic_rates
;
1640 rxon_assoc
.cck_basic_rates
= priv
->staging_rxon
.cck_basic_rates
;
1641 rxon_assoc
.reserved
= 0;
1642 rxon_assoc
.ofdm_ht_single_stream_basic_rates
=
1643 priv
->staging_rxon
.ofdm_ht_single_stream_basic_rates
;
1644 rxon_assoc
.ofdm_ht_dual_stream_basic_rates
=
1645 priv
->staging_rxon
.ofdm_ht_dual_stream_basic_rates
;
1646 rxon_assoc
.rx_chain_select_flags
= priv
->staging_rxon
.rx_chain
;
1648 ret
= iwl_send_cmd_pdu_async(priv
, REPLY_RXON_ASSOC
,
1649 sizeof(rxon_assoc
), &rxon_assoc
, NULL
);
1657 int iwl4965_hw_channel_switch(struct iwl_priv
*priv
, u16 channel
)
1662 u8 ctrl_chan_high
= 0;
1663 struct iwl4965_channel_switch_cmd cmd
= { 0 };
1664 const struct iwl_channel_info
*ch_info
;
1666 band
= priv
->band
== IEEE80211_BAND_2GHZ
;
1668 ch_info
= iwl_get_channel_info(priv
, priv
->band
, channel
);
1670 is_fat
= is_fat_channel(priv
->staging_rxon
.flags
);
1673 (priv
->active_rxon
.flags
& RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK
))
1677 cmd
.expect_beacon
= 0;
1678 cmd
.channel
= cpu_to_le16(channel
);
1679 cmd
.rxon_flags
= priv
->active_rxon
.flags
;
1680 cmd
.rxon_filter_flags
= priv
->active_rxon
.filter_flags
;
1681 cmd
.switch_time
= cpu_to_le32(priv
->ucode_beacon_time
);
1683 cmd
.expect_beacon
= is_channel_radar(ch_info
);
1685 cmd
.expect_beacon
= 1;
1687 rc
= iwl4965_fill_txpower_tbl(priv
, band
, channel
, is_fat
,
1688 ctrl_chan_high
, &cmd
.tx_power
);
1690 IWL_DEBUG_11H("error:%d fill txpower_tbl\n", rc
);
1694 rc
= iwl_send_cmd_pdu(priv
, REPLY_CHANNEL_SWITCH
, sizeof(cmd
), &cmd
);
1698 static int iwl4965_shared_mem_rx_idx(struct iwl_priv
*priv
)
1700 struct iwl4965_shared
*s
= priv
->shared_virt
;
1701 return le32_to_cpu(s
->rb_closed
) & 0xFFF;
1704 unsigned int iwl4965_hw_get_beacon_cmd(struct iwl_priv
*priv
,
1705 struct iwl_frame
*frame
, u8 rate
)
1707 struct iwl4965_tx_beacon_cmd
*tx_beacon_cmd
;
1708 unsigned int frame_size
;
1710 tx_beacon_cmd
= &frame
->u
.beacon
;
1711 memset(tx_beacon_cmd
, 0, sizeof(*tx_beacon_cmd
));
1713 tx_beacon_cmd
->tx
.sta_id
= priv
->hw_params
.bcast_sta_id
;
1714 tx_beacon_cmd
->tx
.stop_time
.life_time
= TX_CMD_LIFE_TIME_INFINITE
;
1716 frame_size
= iwl4965_fill_beacon_frame(priv
,
1717 tx_beacon_cmd
->frame
,
1719 sizeof(frame
->u
) - sizeof(*tx_beacon_cmd
));
1721 BUG_ON(frame_size
> MAX_MPDU_SIZE
);
1722 tx_beacon_cmd
->tx
.len
= cpu_to_le16((u16
)frame_size
);
1724 if ((rate
== IWL_RATE_1M_PLCP
) || (rate
>= IWL_RATE_2M_PLCP
))
1725 tx_beacon_cmd
->tx
.rate_n_flags
=
1726 iwl_hw_set_rate_n_flags(rate
, RATE_MCS_CCK_MSK
);
1728 tx_beacon_cmd
->tx
.rate_n_flags
=
1729 iwl_hw_set_rate_n_flags(rate
, 0);
1731 tx_beacon_cmd
->tx
.tx_flags
= (TX_CMD_FLG_SEQ_CTL_MSK
|
1732 TX_CMD_FLG_TSF_MSK
| TX_CMD_FLG_STA_RATE_MSK
);
1733 return (sizeof(*tx_beacon_cmd
) + frame_size
);
1736 static int iwl4965_alloc_shared_mem(struct iwl_priv
*priv
)
1738 priv
->shared_virt
= pci_alloc_consistent(priv
->pci_dev
,
1739 sizeof(struct iwl4965_shared
),
1740 &priv
->shared_phys
);
1741 if (!priv
->shared_virt
)
1744 memset(priv
->shared_virt
, 0, sizeof(struct iwl4965_shared
));
1746 priv
->rb_closed_offset
= offsetof(struct iwl4965_shared
, rb_closed
);
1751 static void iwl4965_free_shared_mem(struct iwl_priv
*priv
)
1753 if (priv
->shared_virt
)
1754 pci_free_consistent(priv
->pci_dev
,
1755 sizeof(struct iwl4965_shared
),
1761 * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
1763 static void iwl4965_txq_update_byte_cnt_tbl(struct iwl_priv
*priv
,
1764 struct iwl_tx_queue
*txq
,
1768 int txq_id
= txq
->q
.id
;
1769 struct iwl4965_shared
*shared_data
= priv
->shared_virt
;
1771 len
= byte_cnt
+ IWL_TX_CRC_SIZE
+ IWL_TX_DELIMITER_SIZE
;
1773 /* Set up byte count within first 256 entries */
1774 IWL_SET_BITS16(shared_data
->queues_byte_cnt_tbls
[txq_id
].
1775 tfd_offset
[txq
->q
.write_ptr
], byte_cnt
, len
);
1777 /* If within first 64 entries, duplicate at end */
1778 if (txq
->q
.write_ptr
< IWL49_MAX_WIN_SIZE
)
1779 IWL_SET_BITS16(shared_data
->queues_byte_cnt_tbls
[txq_id
].
1780 tfd_offset
[IWL49_QUEUE_SIZE
+ txq
->q
.write_ptr
],
1785 * sign_extend - Sign extend a value using specified bit as sign-bit
1787 * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
1788 * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
1790 * @param oper value to sign extend
1791 * @param index 0 based bit index (0<=index<32) to sign bit
1793 static s32
sign_extend(u32 oper
, int index
)
1795 u8 shift
= 31 - index
;
1797 return (s32
)(oper
<< shift
) >> shift
;
1801 * iwl4965_hw_get_temperature - return the calibrated temperature (in Kelvin)
1802 * @statistics: Provides the temperature reading from the uCode
1804 * A return of <0 indicates bogus data in the statistics
1806 static int iwl4965_hw_get_temperature(const struct iwl_priv
*priv
)
1813 if (test_bit(STATUS_TEMPERATURE
, &priv
->status
) &&
1814 (priv
->statistics
.flag
& STATISTICS_REPLY_FLG_FAT_MODE_MSK
)) {
1815 IWL_DEBUG_TEMP("Running FAT temperature calibration\n");
1816 R1
= (s32
)le32_to_cpu(priv
->card_alive_init
.therm_r1
[1]);
1817 R2
= (s32
)le32_to_cpu(priv
->card_alive_init
.therm_r2
[1]);
1818 R3
= (s32
)le32_to_cpu(priv
->card_alive_init
.therm_r3
[1]);
1819 R4
= le32_to_cpu(priv
->card_alive_init
.therm_r4
[1]);
1821 IWL_DEBUG_TEMP("Running temperature calibration\n");
1822 R1
= (s32
)le32_to_cpu(priv
->card_alive_init
.therm_r1
[0]);
1823 R2
= (s32
)le32_to_cpu(priv
->card_alive_init
.therm_r2
[0]);
1824 R3
= (s32
)le32_to_cpu(priv
->card_alive_init
.therm_r3
[0]);
1825 R4
= le32_to_cpu(priv
->card_alive_init
.therm_r4
[0]);
1829 * Temperature is only 23 bits, so sign extend out to 32.
1831 * NOTE If we haven't received a statistics notification yet
1832 * with an updated temperature, use R4 provided to us in the
1833 * "initialize" ALIVE response.
1835 if (!test_bit(STATUS_TEMPERATURE
, &priv
->status
))
1836 vt
= sign_extend(R4
, 23);
1839 le32_to_cpu(priv
->statistics
.general
.temperature
), 23);
1841 IWL_DEBUG_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n", R1
, R2
, R3
, vt
);
1844 IWL_ERROR("Calibration conflict R1 == R3\n");
1848 /* Calculate temperature in degrees Kelvin, adjust by 97%.
1849 * Add offset to center the adjustment around 0 degrees Centigrade. */
1850 temperature
= TEMPERATURE_CALIB_A_VAL
* (vt
- R2
);
1851 temperature
/= (R3
- R1
);
1852 temperature
= (temperature
* 97) / 100 + TEMPERATURE_CALIB_KELVIN_OFFSET
;
1854 IWL_DEBUG_TEMP("Calibrated temperature: %dK, %dC\n",
1855 temperature
, KELVIN_TO_CELSIUS(temperature
));
1860 /* Adjust Txpower only if temperature variance is greater than threshold. */
1861 #define IWL_TEMPERATURE_THRESHOLD 3
1864 * iwl4965_is_temp_calib_needed - determines if new calibration is needed
1866 * If the temperature changed has changed sufficiently, then a recalibration
1869 * Assumes caller will replace priv->last_temperature once calibration
1872 static int iwl4965_is_temp_calib_needed(struct iwl_priv
*priv
)
1876 if (!test_bit(STATUS_STATISTICS
, &priv
->status
)) {
1877 IWL_DEBUG_TEMP("Temperature not updated -- no statistics.\n");
1881 temp_diff
= priv
->temperature
- priv
->last_temperature
;
1883 /* get absolute value */
1884 if (temp_diff
< 0) {
1885 IWL_DEBUG_POWER("Getting cooler, delta %d, \n", temp_diff
);
1886 temp_diff
= -temp_diff
;
1887 } else if (temp_diff
== 0)
1888 IWL_DEBUG_POWER("Same temp, \n");
1890 IWL_DEBUG_POWER("Getting warmer, delta %d, \n", temp_diff
);
1892 if (temp_diff
< IWL_TEMPERATURE_THRESHOLD
) {
1893 IWL_DEBUG_POWER("Thermal txpower calib not needed\n");
1897 IWL_DEBUG_POWER("Thermal txpower calib needed\n");
1902 static void iwl4965_temperature_calib(struct iwl_priv
*priv
)
1906 temp
= iwl4965_hw_get_temperature(priv
);
1910 if (priv
->temperature
!= temp
) {
1911 if (priv
->temperature
)
1912 IWL_DEBUG_TEMP("Temperature changed "
1913 "from %dC to %dC\n",
1914 KELVIN_TO_CELSIUS(priv
->temperature
),
1915 KELVIN_TO_CELSIUS(temp
));
1917 IWL_DEBUG_TEMP("Temperature "
1918 "initialized to %dC\n",
1919 KELVIN_TO_CELSIUS(temp
));
1922 priv
->temperature
= temp
;
1923 set_bit(STATUS_TEMPERATURE
, &priv
->status
);
1925 if (!priv
->disable_tx_power_cal
&&
1926 unlikely(!test_bit(STATUS_SCANNING
, &priv
->status
)) &&
1927 iwl4965_is_temp_calib_needed(priv
))
1928 queue_work(priv
->workqueue
, &priv
->txpower_work
);
1932 * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
1934 static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv
*priv
,
1937 /* Simply stop the queue, but don't change any configuration;
1938 * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
1939 iwl_write_prph(priv
,
1940 IWL49_SCD_QUEUE_STATUS_BITS(txq_id
),
1941 (0 << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE
)|
1942 (1 << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN
));
1946 * txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE
1947 * priv->lock must be held by the caller
1949 static int iwl4965_txq_agg_disable(struct iwl_priv
*priv
, u16 txq_id
,
1950 u16 ssn_idx
, u8 tx_fifo
)
1954 if ((IWL49_FIRST_AMPDU_QUEUE
> txq_id
) ||
1955 (IWL49_FIRST_AMPDU_QUEUE
+ IWL49_NUM_AMPDU_QUEUES
<= txq_id
)) {
1956 IWL_WARNING("queue number out of range: %d, must be %d to %d\n",
1957 txq_id
, IWL49_FIRST_AMPDU_QUEUE
,
1958 IWL49_FIRST_AMPDU_QUEUE
+ IWL49_NUM_AMPDU_QUEUES
- 1);
1962 ret
= iwl_grab_nic_access(priv
);
1966 iwl4965_tx_queue_stop_scheduler(priv
, txq_id
);
1968 iwl_clear_bits_prph(priv
, IWL49_SCD_QUEUECHAIN_SEL
, (1 << txq_id
));
1970 priv
->txq
[txq_id
].q
.read_ptr
= (ssn_idx
& 0xff);
1971 priv
->txq
[txq_id
].q
.write_ptr
= (ssn_idx
& 0xff);
1972 /* supposes that ssn_idx is valid (!= 0xFFF) */
1973 iwl4965_set_wr_ptrs(priv
, txq_id
, ssn_idx
);
1975 iwl_clear_bits_prph(priv
, IWL49_SCD_INTERRUPT_MASK
, (1 << txq_id
));
1976 iwl_txq_ctx_deactivate(priv
, txq_id
);
1977 iwl4965_tx_queue_set_status(priv
, &priv
->txq
[txq_id
], tx_fifo
, 0);
1979 iwl_release_nic_access(priv
);
1985 * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
1987 static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv
*priv
, u16 ra_tid
,
1994 scd_q2ratid
= ra_tid
& IWL_SCD_QUEUE_RA_TID_MAP_RATID_MSK
;
1996 tbl_dw_addr
= priv
->scd_base_addr
+
1997 IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id
);
1999 tbl_dw
= iwl_read_targ_mem(priv
, tbl_dw_addr
);
2002 tbl_dw
= (scd_q2ratid
<< 16) | (tbl_dw
& 0x0000FFFF);
2004 tbl_dw
= scd_q2ratid
| (tbl_dw
& 0xFFFF0000);
2006 iwl_write_targ_mem(priv
, tbl_dw_addr
, tbl_dw
);
2013 * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
2015 * NOTE: txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE,
2016 * i.e. it must be one of the higher queues used for aggregation
2018 static int iwl4965_txq_agg_enable(struct iwl_priv
*priv
, int txq_id
,
2019 int tx_fifo
, int sta_id
, int tid
, u16 ssn_idx
)
2021 unsigned long flags
;
2025 if ((IWL49_FIRST_AMPDU_QUEUE
> txq_id
) ||
2026 (IWL49_FIRST_AMPDU_QUEUE
+ IWL49_NUM_AMPDU_QUEUES
<= txq_id
)) {
2027 IWL_WARNING("queue number out of range: %d, must be %d to %d\n",
2028 txq_id
, IWL49_FIRST_AMPDU_QUEUE
,
2029 IWL49_FIRST_AMPDU_QUEUE
+ IWL49_NUM_AMPDU_QUEUES
- 1);
2033 ra_tid
= BUILD_RAxTID(sta_id
, tid
);
2035 /* Modify device's station table to Tx this TID */
2036 iwl_sta_modify_enable_tid_tx(priv
, sta_id
, tid
);
2038 spin_lock_irqsave(&priv
->lock
, flags
);
2039 ret
= iwl_grab_nic_access(priv
);
2041 spin_unlock_irqrestore(&priv
->lock
, flags
);
2045 /* Stop this Tx queue before configuring it */
2046 iwl4965_tx_queue_stop_scheduler(priv
, txq_id
);
2048 /* Map receiver-address / traffic-ID to this queue */
2049 iwl4965_tx_queue_set_q2ratid(priv
, ra_tid
, txq_id
);
2051 /* Set this queue as a chain-building queue */
2052 iwl_set_bits_prph(priv
, IWL49_SCD_QUEUECHAIN_SEL
, (1 << txq_id
));
2054 /* Place first TFD at index corresponding to start sequence number.
2055 * Assumes that ssn_idx is valid (!= 0xFFF) */
2056 priv
->txq
[txq_id
].q
.read_ptr
= (ssn_idx
& 0xff);
2057 priv
->txq
[txq_id
].q
.write_ptr
= (ssn_idx
& 0xff);
2058 iwl4965_set_wr_ptrs(priv
, txq_id
, ssn_idx
);
2060 /* Set up Tx window size and frame limit for this queue */
2061 iwl_write_targ_mem(priv
,
2062 priv
->scd_base_addr
+ IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id
),
2063 (SCD_WIN_SIZE
<< IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS
) &
2064 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK
);
2066 iwl_write_targ_mem(priv
, priv
->scd_base_addr
+
2067 IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id
) + sizeof(u32
),
2068 (SCD_FRAME_LIMIT
<< IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS
)
2069 & IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK
);
2071 iwl_set_bits_prph(priv
, IWL49_SCD_INTERRUPT_MASK
, (1 << txq_id
));
2073 /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
2074 iwl4965_tx_queue_set_status(priv
, &priv
->txq
[txq_id
], tx_fifo
, 1);
2076 iwl_release_nic_access(priv
);
2077 spin_unlock_irqrestore(&priv
->lock
, flags
);
2082 int iwl4965_mac_ampdu_action(struct ieee80211_hw
*hw
,
2083 enum ieee80211_ampdu_mlme_action action
,
2084 const u8
*addr
, u16 tid
, u16
*ssn
)
2086 struct iwl_priv
*priv
= hw
->priv
;
2087 DECLARE_MAC_BUF(mac
);
2089 IWL_DEBUG_HT("A-MPDU action on addr %s tid %d\n",
2090 print_mac(mac
, addr
), tid
);
2092 if (!(priv
->cfg
->sku
& IWL_SKU_N
))
2096 case IEEE80211_AMPDU_RX_START
:
2097 IWL_DEBUG_HT("start Rx\n");
2098 return iwl_rx_agg_start(priv
, addr
, tid
, *ssn
);
2099 case IEEE80211_AMPDU_RX_STOP
:
2100 IWL_DEBUG_HT("stop Rx\n");
2101 return iwl_rx_agg_stop(priv
, addr
, tid
);
2102 case IEEE80211_AMPDU_TX_START
:
2103 IWL_DEBUG_HT("start Tx\n");
2104 return iwl_tx_agg_start(priv
, addr
, tid
, ssn
);
2105 case IEEE80211_AMPDU_TX_STOP
:
2106 IWL_DEBUG_HT("stop Tx\n");
2107 return iwl_tx_agg_stop(priv
, addr
, tid
);
2109 IWL_DEBUG_HT("unknown\n");
2116 static u16
iwl4965_get_hcmd_size(u8 cmd_id
, u16 len
)
2120 return (u16
) sizeof(struct iwl4965_rxon_cmd
);
2126 static u16
iwl4965_build_addsta_hcmd(const struct iwl_addsta_cmd
*cmd
, u8
*data
)
2128 struct iwl4965_addsta_cmd
*addsta
= (struct iwl4965_addsta_cmd
*)data
;
2129 addsta
->mode
= cmd
->mode
;
2130 memcpy(&addsta
->sta
, &cmd
->sta
, sizeof(struct sta_id_modify
));
2131 memcpy(&addsta
->key
, &cmd
->key
, sizeof(struct iwl4965_keyinfo
));
2132 addsta
->station_flags
= cmd
->station_flags
;
2133 addsta
->station_flags_msk
= cmd
->station_flags_msk
;
2134 addsta
->tid_disable_tx
= cmd
->tid_disable_tx
;
2135 addsta
->add_immediate_ba_tid
= cmd
->add_immediate_ba_tid
;
2136 addsta
->remove_immediate_ba_tid
= cmd
->remove_immediate_ba_tid
;
2137 addsta
->add_immediate_ba_ssn
= cmd
->add_immediate_ba_ssn
;
2138 addsta
->reserved1
= __constant_cpu_to_le16(0);
2139 addsta
->reserved2
= __constant_cpu_to_le32(0);
2141 return (u16
)sizeof(struct iwl4965_addsta_cmd
);
2144 static inline u32
iwl4965_get_scd_ssn(struct iwl4965_tx_resp
*tx_resp
)
2146 return le32_to_cpup(&tx_resp
->u
.status
+ tx_resp
->frame_count
) & MAX_SN
;
2150 * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
2152 static int iwl4965_tx_status_reply_tx(struct iwl_priv
*priv
,
2153 struct iwl_ht_agg
*agg
,
2154 struct iwl4965_tx_resp
*tx_resp
,
2155 int txq_id
, u16 start_idx
)
2158 struct agg_tx_status
*frame_status
= tx_resp
->u
.agg_status
;
2159 struct ieee80211_tx_info
*info
= NULL
;
2160 struct ieee80211_hdr
*hdr
= NULL
;
2161 u32 rate_n_flags
= le32_to_cpu(tx_resp
->rate_n_flags
);
2164 if (agg
->wait_for_ba
)
2165 IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
2167 agg
->frame_count
= tx_resp
->frame_count
;
2168 agg
->start_idx
= start_idx
;
2169 agg
->rate_n_flags
= rate_n_flags
;
2172 /* # frames attempted by Tx command */
2173 if (agg
->frame_count
== 1) {
2174 /* Only one frame was attempted; no block-ack will arrive */
2175 status
= le16_to_cpu(frame_status
[0].status
);
2178 /* FIXME: code repetition */
2179 IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
2180 agg
->frame_count
, agg
->start_idx
, idx
);
2182 info
= IEEE80211_SKB_CB(priv
->txq
[txq_id
].txb
[idx
].skb
[0]);
2183 info
->status
.retry_count
= tx_resp
->failure_frame
;
2184 info
->flags
&= ~IEEE80211_TX_CTL_AMPDU
;
2185 info
->flags
|= iwl_is_tx_success(status
)?
2186 IEEE80211_TX_STAT_ACK
: 0;
2187 iwl_hwrate_to_tx_control(priv
, rate_n_flags
, info
);
2188 /* FIXME: code repetition end */
2190 IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
2191 status
& 0xff, tx_resp
->failure_frame
);
2192 IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n", rate_n_flags
);
2194 agg
->wait_for_ba
= 0;
2196 /* Two or more frames were attempted; expect block-ack */
2198 int start
= agg
->start_idx
;
2200 /* Construct bit-map of pending frames within Tx window */
2201 for (i
= 0; i
< agg
->frame_count
; i
++) {
2203 status
= le16_to_cpu(frame_status
[i
].status
);
2204 seq
= le16_to_cpu(frame_status
[i
].sequence
);
2205 idx
= SEQ_TO_INDEX(seq
);
2206 txq_id
= SEQ_TO_QUEUE(seq
);
2208 if (status
& (AGG_TX_STATE_FEW_BYTES_MSK
|
2209 AGG_TX_STATE_ABORT_MSK
))
2212 IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
2213 agg
->frame_count
, txq_id
, idx
);
2215 hdr
= iwl_tx_queue_get_hdr(priv
, txq_id
, idx
);
2217 sc
= le16_to_cpu(hdr
->seq_ctrl
);
2218 if (idx
!= (SEQ_TO_SN(sc
) & 0xff)) {
2219 IWL_ERROR("BUG_ON idx doesn't match seq control"
2220 " idx=%d, seq_idx=%d, seq=%d\n",
2226 IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
2227 i
, idx
, SEQ_TO_SN(sc
));
2231 sh
= (start
- idx
) + 0xff;
2232 bitmap
= bitmap
<< sh
;
2235 } else if (sh
< -64)
2236 sh
= 0xff - (start
- idx
);
2240 bitmap
= bitmap
<< sh
;
2243 bitmap
|= (1 << sh
);
2244 IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
2245 start
, (u32
)(bitmap
& 0xFFFFFFFF));
2248 agg
->bitmap
= bitmap
;
2249 agg
->start_idx
= start
;
2250 IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
2251 agg
->frame_count
, agg
->start_idx
,
2252 (unsigned long long)agg
->bitmap
);
2255 agg
->wait_for_ba
= 1;
2261 * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
2263 static void iwl4965_rx_reply_tx(struct iwl_priv
*priv
,
2264 struct iwl_rx_mem_buffer
*rxb
)
2266 struct iwl_rx_packet
*pkt
= (struct iwl_rx_packet
*)rxb
->skb
->data
;
2267 u16 sequence
= le16_to_cpu(pkt
->hdr
.sequence
);
2268 int txq_id
= SEQ_TO_QUEUE(sequence
);
2269 int index
= SEQ_TO_INDEX(sequence
);
2270 struct iwl_tx_queue
*txq
= &priv
->txq
[txq_id
];
2271 struct ieee80211_tx_info
*info
;
2272 struct iwl4965_tx_resp
*tx_resp
= (void *)&pkt
->u
.raw
[0];
2273 u32 status
= le32_to_cpu(tx_resp
->u
.status
);
2274 int tid
= MAX_TID_COUNT
, sta_id
= IWL_INVALID_STATION
;
2276 struct ieee80211_hdr
*hdr
;
2279 if ((index
>= txq
->q
.n_bd
) || (iwl_queue_used(&txq
->q
, index
) == 0)) {
2280 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
2281 "is out of range [0-%d] %d %d\n", txq_id
,
2282 index
, txq
->q
.n_bd
, txq
->q
.write_ptr
,
2287 info
= IEEE80211_SKB_CB(txq
->txb
[txq
->q
.read_ptr
].skb
[0]);
2288 memset(&info
->status
, 0, sizeof(info
->status
));
2290 hdr
= iwl_tx_queue_get_hdr(priv
, txq_id
, index
);
2291 fc
= hdr
->frame_control
;
2292 if (ieee80211_is_data_qos(fc
)) {
2293 qc
= ieee80211_get_qos_ctl(hdr
);
2297 sta_id
= iwl_get_ra_sta_id(priv
, hdr
);
2298 if (txq
->sched_retry
&& unlikely(sta_id
== IWL_INVALID_STATION
)) {
2299 IWL_ERROR("Station not known\n");
2303 if (txq
->sched_retry
) {
2304 const u32 scd_ssn
= iwl4965_get_scd_ssn(tx_resp
);
2305 struct iwl_ht_agg
*agg
= NULL
;
2310 agg
= &priv
->stations
[sta_id
].tid
[tid
].agg
;
2312 iwl4965_tx_status_reply_tx(priv
, agg
, tx_resp
, txq_id
, index
);
2314 /* check if BAR is needed */
2315 if ((tx_resp
->frame_count
== 1) && !iwl_is_tx_success(status
))
2316 info
->flags
|= IEEE80211_TX_STAT_AMPDU_NO_BACK
;
2318 if (txq
->q
.read_ptr
!= (scd_ssn
& 0xff)) {
2320 index
= iwl_queue_dec_wrap(scd_ssn
& 0xff, txq
->q
.n_bd
);
2321 IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
2322 "%d index %d\n", scd_ssn
, index
);
2323 freed
= iwl_tx_queue_reclaim(priv
, txq_id
, index
);
2324 priv
->stations
[sta_id
].tid
[tid
].tfds_in_queue
-= freed
;
2326 if (iwl_queue_space(&txq
->q
) > txq
->q
.low_mark
&&
2327 txq_id
>= 0 && priv
->mac80211_registered
&&
2328 agg
->state
!= IWL_EMPTYING_HW_QUEUE_DELBA
) {
2329 /* calculate mac80211 ampdu sw queue to wake */
2330 ampdu_q
= txq_id
- IWL49_FIRST_AMPDU_QUEUE
+
2332 if (agg
->state
== IWL_AGG_OFF
)
2333 ieee80211_wake_queue(priv
->hw
, txq_id
);
2335 ieee80211_wake_queue(priv
->hw
, ampdu_q
);
2337 iwl_txq_check_empty(priv
, sta_id
, tid
, txq_id
);
2340 info
->status
.retry_count
= tx_resp
->failure_frame
;
2342 iwl_is_tx_success(status
) ? IEEE80211_TX_STAT_ACK
: 0;
2343 iwl_hwrate_to_tx_control(priv
,
2344 le32_to_cpu(tx_resp
->rate_n_flags
),
2347 IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags "
2348 "0x%x retries %d\n", txq_id
,
2349 iwl_get_tx_fail_reason(status
),
2350 status
, le32_to_cpu(tx_resp
->rate_n_flags
),
2351 tx_resp
->failure_frame
);
2353 IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index
);
2356 int freed
= iwl_tx_queue_reclaim(priv
, txq_id
, index
);
2357 if (tid
!= MAX_TID_COUNT
)
2358 priv
->stations
[sta_id
].tid
[tid
].tfds_in_queue
-= freed
;
2359 if (iwl_queue_space(&txq
->q
) > txq
->q
.low_mark
&&
2360 (txq_id
>= 0) && priv
->mac80211_registered
)
2361 ieee80211_wake_queue(priv
->hw
, txq_id
);
2362 if (tid
!= MAX_TID_COUNT
)
2363 iwl_txq_check_empty(priv
, sta_id
, tid
, txq_id
);
2367 if (iwl_check_bits(status
, TX_ABORT_REQUIRED_MSK
))
2368 IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
2372 /* Set up 4965-specific Rx frame reply handlers */
2373 static void iwl4965_rx_handler_setup(struct iwl_priv
*priv
)
2375 /* Legacy Rx frames */
2376 priv
->rx_handlers
[REPLY_RX
] = iwl_rx_reply_rx
;
2378 priv
->rx_handlers
[REPLY_TX
] = iwl4965_rx_reply_tx
;
2381 static void iwl4965_setup_deferred_work(struct iwl_priv
*priv
)
2383 INIT_WORK(&priv
->txpower_work
, iwl4965_bg_txpower_work
);
2386 static void iwl4965_cancel_deferred_work(struct iwl_priv
*priv
)
2388 cancel_work_sync(&priv
->txpower_work
);
2392 static struct iwl_hcmd_ops iwl4965_hcmd
= {
2393 .rxon_assoc
= iwl4965_send_rxon_assoc
,
2396 static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils
= {
2397 .get_hcmd_size
= iwl4965_get_hcmd_size
,
2398 .build_addsta_hcmd
= iwl4965_build_addsta_hcmd
,
2399 .chain_noise_reset
= iwl4965_chain_noise_reset
,
2400 .gain_computation
= iwl4965_gain_computation
,
2401 .rts_tx_cmd_flag
= iwl4965_rts_tx_cmd_flag
,
2404 static struct iwl_lib_ops iwl4965_lib
= {
2405 .set_hw_params
= iwl4965_hw_set_hw_params
,
2406 .alloc_shared_mem
= iwl4965_alloc_shared_mem
,
2407 .free_shared_mem
= iwl4965_free_shared_mem
,
2408 .shared_mem_rx_idx
= iwl4965_shared_mem_rx_idx
,
2409 .txq_update_byte_cnt_tbl
= iwl4965_txq_update_byte_cnt_tbl
,
2410 .txq_set_sched
= iwl4965_txq_set_sched
,
2411 .txq_agg_enable
= iwl4965_txq_agg_enable
,
2412 .txq_agg_disable
= iwl4965_txq_agg_disable
,
2413 .rx_handler_setup
= iwl4965_rx_handler_setup
,
2414 .setup_deferred_work
= iwl4965_setup_deferred_work
,
2415 .cancel_deferred_work
= iwl4965_cancel_deferred_work
,
2416 .is_valid_rtc_data_addr
= iwl4965_hw_valid_rtc_data_addr
,
2417 .alive_notify
= iwl4965_alive_notify
,
2418 .init_alive_start
= iwl4965_init_alive_start
,
2419 .load_ucode
= iwl4965_load_bsm
,
2421 .init
= iwl4965_apm_init
,
2422 .reset
= iwl4965_apm_reset
,
2423 .stop
= iwl4965_apm_stop
,
2424 .config
= iwl4965_nic_config
,
2425 .set_pwr_src
= iwl4965_set_pwr_src
,
2428 .regulatory_bands
= {
2429 EEPROM_REGULATORY_BAND_1_CHANNELS
,
2430 EEPROM_REGULATORY_BAND_2_CHANNELS
,
2431 EEPROM_REGULATORY_BAND_3_CHANNELS
,
2432 EEPROM_REGULATORY_BAND_4_CHANNELS
,
2433 EEPROM_REGULATORY_BAND_5_CHANNELS
,
2434 EEPROM_4965_REGULATORY_BAND_24_FAT_CHANNELS
,
2435 EEPROM_4965_REGULATORY_BAND_52_FAT_CHANNELS
2437 .verify_signature
= iwlcore_eeprom_verify_signature
,
2438 .acquire_semaphore
= iwlcore_eeprom_acquire_semaphore
,
2439 .release_semaphore
= iwlcore_eeprom_release_semaphore
,
2440 .check_version
= iwl4965_eeprom_check_version
,
2441 .query_addr
= iwlcore_eeprom_query_addr
,
2443 .set_power
= iwl4965_set_power
,
2444 .send_tx_power
= iwl4965_send_tx_power
,
2445 .update_chain_flags
= iwl4965_update_chain_flags
,
2446 .temperature
= iwl4965_temperature_calib
,
2449 static struct iwl_ops iwl4965_ops
= {
2450 .lib
= &iwl4965_lib
,
2451 .hcmd
= &iwl4965_hcmd
,
2452 .utils
= &iwl4965_hcmd_utils
,
2455 struct iwl_cfg iwl4965_agn_cfg
= {
2457 .fw_name
= "iwlwifi-4965" IWL4965_UCODE_API
".ucode",
2458 .sku
= IWL_SKU_A
|IWL_SKU_G
|IWL_SKU_N
,
2459 .eeprom_size
= IWL4965_EEPROM_IMG_SIZE
,
2460 .ops
= &iwl4965_ops
,
2461 .mod_params
= &iwl4965_mod_params
,
2464 /* Module firmware */
2465 MODULE_FIRMWARE("iwlwifi-4965" IWL4965_UCODE_API
".ucode");
2467 module_param_named(antenna
, iwl4965_mod_params
.antenna
, int, 0444);
2468 MODULE_PARM_DESC(antenna
, "select antenna (1=Main, 2=Aux, default 0 [both])");
2469 module_param_named(disable
, iwl4965_mod_params
.disable
, int, 0444);
2470 MODULE_PARM_DESC(disable
, "manually disable the radio (default 0 [radio on])");
2471 module_param_named(swcrypto
, iwl4965_mod_params
.sw_crypto
, int, 0444);
2472 MODULE_PARM_DESC(swcrypto
, "using crypto in software (default 0 [hardware])");
2473 module_param_named(debug
, iwl4965_mod_params
.debug
, int, 0444);
2474 MODULE_PARM_DESC(debug
, "debug output mask");
2476 disable_hw_scan
, iwl4965_mod_params
.disable_hw_scan
, int, 0444);
2477 MODULE_PARM_DESC(disable_hw_scan
, "disable hardware scanning (default 0)");
2479 module_param_named(queues_num
, iwl4965_mod_params
.num_of_queues
, int, 0444);
2480 MODULE_PARM_DESC(queues_num
, "number of hw queues.");
2482 module_param_named(qos_enable
, iwl4965_mod_params
.enable_qos
, int, 0444);
2483 MODULE_PARM_DESC(qos_enable
, "enable all QoS functionality");
2485 module_param_named(11n_disable
, iwl4965_mod_params
.disable_11n
, int, 0444);
2486 MODULE_PARM_DESC(11n_disable
, "disable 11n functionality");
2487 module_param_named(amsdu_size_8K
, iwl4965_mod_params
.amsdu_size_8K
, int, 0444);
2488 MODULE_PARM_DESC(amsdu_size_8K
, "enable 8K amsdu size");
2490 module_param_named(fw_restart4965
, iwl4965_mod_params
.restart_fw
, int, 0444);
2491 MODULE_PARM_DESC(fw_restart4965
, "restart firmware in case of error");