mach-ux500: enable ARM errata 764369
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / scsi / isci / probe_roms.h
blob2c75248ca326ea38e3a9256da8e966fddd516d41
1 /*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
5 * GPL LICENSE SUMMARY
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
24 * BSD LICENSE
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27 * All rights reserved.
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30 * modification, are permitted provided that the following conditions
31 * are met:
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34 * notice, this list of conditions and the following disclaimer.
35 * * Redistributions in binary form must reproduce the above copyright
36 * notice, this list of conditions and the following disclaimer in
37 * the documentation and/or other materials provided with the
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41 * from this software without specific prior written permission.
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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55 #ifndef _ISCI_PROBE_ROMS_H_
56 #define _ISCI_PROBE_ROMS_H_
58 #ifdef __KERNEL__
59 #include <linux/firmware.h>
60 #include <linux/pci.h>
61 #include <linux/efi.h>
62 #include "isci.h"
64 #define SCIC_SDS_PARM_NO_SPEED 0
66 /* generation 1 (i.e. 1.5 Gb/s) */
67 #define SCIC_SDS_PARM_GEN1_SPEED 1
69 /* generation 2 (i.e. 3.0 Gb/s) */
70 #define SCIC_SDS_PARM_GEN2_SPEED 2
72 /* generation 3 (i.e. 6.0 Gb/s) */
73 #define SCIC_SDS_PARM_GEN3_SPEED 3
74 #define SCIC_SDS_PARM_MAX_SPEED SCIC_SDS_PARM_GEN3_SPEED
76 /* parameters that can be set by module parameters */
77 struct sci_user_parameters {
78 struct sci_phy_user_params {
79 /**
80 * This field specifies the NOTIFY (ENABLE SPIN UP) primitive
81 * insertion frequency for this phy index.
83 u32 notify_enable_spin_up_insertion_frequency;
85 /**
86 * This method specifies the number of transmitted DWORDs within which
87 * to transmit a single ALIGN primitive. This value applies regardless
88 * of what type of device is attached or connection state. A value of
89 * 0 indicates that no ALIGN primitives will be inserted.
91 u16 align_insertion_frequency;
93 /**
94 * This method specifies the number of transmitted DWORDs within which
95 * to transmit 2 ALIGN primitives. This applies for SAS connections
96 * only. A minimum value of 3 is required for this field.
98 u16 in_connection_align_insertion_frequency;
101 * This field indicates the maximum speed generation to be utilized
102 * by phys in the supplied port.
103 * - A value of 1 indicates generation 1 (i.e. 1.5 Gb/s).
104 * - A value of 2 indicates generation 2 (i.e. 3.0 Gb/s).
105 * - A value of 3 indicates generation 3 (i.e. 6.0 Gb/s).
107 u8 max_speed_generation;
109 } phys[SCI_MAX_PHYS];
112 * This field specifies the maximum number of direct attached devices
113 * that can have power supplied to them simultaneously.
115 u8 max_concurr_spinup;
118 * This field specifies the number of seconds to allow a phy to consume
119 * power before yielding to another phy.
122 u8 phy_spin_up_delay_interval;
125 * These timer values specifies how long a link will remain open with no
126 * activity in increments of a microsecond, it can be in increments of
127 * 100 microseconds if the upper most bit is set.
130 u16 stp_inactivity_timeout;
131 u16 ssp_inactivity_timeout;
134 * These timer values specifies how long a link will remain open in increments
135 * of 100 microseconds.
138 u16 stp_max_occupancy_timeout;
139 u16 ssp_max_occupancy_timeout;
142 * This timer value specifies how long a link will remain open with no
143 * outbound traffic in increments of a microsecond.
146 u8 no_outbound_task_timeout;
150 #define SCIC_SDS_PARM_PHY_MASK_MIN 0x0
151 #define SCIC_SDS_PARM_PHY_MASK_MAX 0xF
152 #define MAX_CONCURRENT_DEVICE_SPIN_UP_COUNT 4
154 struct sci_oem_params;
155 int sci_oem_parameters_validate(struct sci_oem_params *oem);
157 struct isci_orom;
158 struct isci_orom *isci_request_oprom(struct pci_dev *pdev);
159 enum sci_status isci_parse_oem_parameters(struct sci_oem_params *oem,
160 struct isci_orom *orom, int scu_index);
161 struct isci_orom *isci_request_firmware(struct pci_dev *pdev, const struct firmware *fw);
162 struct isci_orom *isci_get_efi_var(struct pci_dev *pdev);
164 struct isci_oem_hdr {
165 u8 sig[4];
166 u8 rev_major;
167 u8 rev_minor;
168 u16 len;
169 u8 checksum;
170 u8 reserved1;
171 u16 reserved2;
172 } __attribute__ ((packed));
174 #else
175 #define SCI_MAX_PORTS 4
176 #define SCI_MAX_PHYS 4
177 #define SCI_MAX_CONTROLLERS 2
178 #endif
180 #define ISCI_FW_NAME "isci/isci_firmware.bin"
182 #define ROMSIGNATURE 0xaa55
184 #define ISCI_OEM_SIG "$OEM"
185 #define ISCI_OEM_SIG_SIZE 4
186 #define ISCI_ROM_SIG "ISCUOEMB"
187 #define ISCI_ROM_SIG_SIZE 8
189 #define ISCI_EFI_VENDOR_GUID \
190 EFI_GUID(0x193dfefa, 0xa445, 0x4302, 0x99, 0xd8, 0xef, 0x3a, 0xad, \
191 0x1a, 0x04, 0xc6)
192 #define ISCI_EFI_VAR_NAME "RstScuO"
194 /* Allowed PORT configuration modes APC Automatic PORT configuration mode is
195 * defined by the OEM configuration parameters providing no PHY_MASK parameters
196 * for any PORT. i.e. There are no phys assigned to any of the ports at start.
197 * MPC Manual PORT configuration mode is defined by the OEM configuration
198 * parameters providing a PHY_MASK value for any PORT. It is assumed that any
199 * PORT with no PHY_MASK is an invalid port and not all PHYs must be assigned.
200 * A PORT_PHY mask that assigns just a single PHY to a port and no other PHYs
201 * being assigned is sufficient to declare manual PORT configuration.
203 enum sci_port_configuration_mode {
204 SCIC_PORT_MANUAL_CONFIGURATION_MODE = 0,
205 SCIC_PORT_AUTOMATIC_CONFIGURATION_MODE = 1
208 struct sci_bios_oem_param_block_hdr {
209 uint8_t signature[ISCI_ROM_SIG_SIZE];
210 uint16_t total_block_length;
211 uint8_t hdr_length;
212 uint8_t version;
213 uint8_t preboot_source;
214 uint8_t num_elements;
215 uint16_t element_length;
216 uint8_t reserved[8];
217 } __attribute__ ((packed));
219 struct sci_oem_params {
220 struct {
221 uint8_t mode_type;
222 uint8_t max_concurr_spin_up;
223 uint8_t do_enable_ssc;
224 uint8_t reserved;
225 } controller;
227 struct {
228 uint8_t phy_mask;
229 } ports[SCI_MAX_PORTS];
231 struct sci_phy_oem_params {
232 struct {
233 uint32_t high;
234 uint32_t low;
235 } sas_address;
237 uint32_t afe_tx_amp_control0;
238 uint32_t afe_tx_amp_control1;
239 uint32_t afe_tx_amp_control2;
240 uint32_t afe_tx_amp_control3;
241 } phys[SCI_MAX_PHYS];
242 } __attribute__ ((packed));
244 struct isci_orom {
245 struct sci_bios_oem_param_block_hdr hdr;
246 struct sci_oem_params ctrl[SCI_MAX_CONTROLLERS];
247 } __attribute__ ((packed));
249 #endif