2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
26 * Eric Anholt <eric@anholt.net>
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
35 #include "intel_drv.h"
38 #include "intel_sdvo_regs.h"
40 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
41 #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
42 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
43 #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0)
45 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
48 #define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
49 #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
52 static char *tv_format_names
[] = {
53 "NTSC_M" , "NTSC_J" , "NTSC_443",
54 "PAL_B" , "PAL_D" , "PAL_G" ,
55 "PAL_H" , "PAL_I" , "PAL_M" ,
56 "PAL_N" , "PAL_NC" , "PAL_60" ,
57 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
58 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
62 #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
65 struct intel_encoder base
;
69 /* Register for the SDVO device: SDVOB or SDVOC */
72 /* Active outputs controlled by this SDVO output */
73 uint16_t controlled_output
;
76 * Capabilities of the SDVO device returned by
77 * i830_sdvo_get_capabilities()
79 struct intel_sdvo_caps caps
;
81 /* Pixel clock limitations reported by the SDVO device, in kHz */
82 int pixel_clock_min
, pixel_clock_max
;
85 * For multiple function SDVO device,
86 * this is for current attached outputs.
88 uint16_t attached_output
;
91 * This is set if we're going to treat the device as TV-out.
93 * While we have these nice friendly flags for output types that ought
94 * to decide this for us, the S-Video output on our HDMI+S-Video card
95 * shows up as RGB1 (VGA).
99 /* This is for current tv format name */
100 char *tv_format_name
;
103 * This is set if we treat the device as HDMI, instead of DVI.
108 * This is set if we detect output of sdvo device as LVDS.
113 * This is sdvo flags for input timing.
118 * This is sdvo fixed pannel mode pointer
120 struct drm_display_mode
*sdvo_lvds_fixed_mode
;
123 * supported encoding mode, used to determine whether HDMI is
126 struct intel_sdvo_encode encode
;
128 /* DDC bus used by this SDVO encoder */
131 /* Mac mini hack -- use the same DDC as the analog connector */
132 struct i2c_adapter
*analog_ddc_bus
;
136 struct intel_sdvo_connector
{
137 struct intel_connector base
;
139 /* Mark the type of connector */
140 uint16_t output_flag
;
142 /* This contains all current supported TV format */
143 char *tv_format_supported
[TV_FORMAT_NUM
];
144 int format_supported_num
;
145 struct drm_property
*tv_format_property
;
146 struct drm_property
*tv_format_name_property
[TV_FORMAT_NUM
];
149 * Returned SDTV resolutions allowed for the current format, if the
150 * device reported it.
152 struct intel_sdvo_sdtv_resolution_reply sdtv_resolutions
;
154 /* add the property for the SDVO-TV */
155 struct drm_property
*left_property
;
156 struct drm_property
*right_property
;
157 struct drm_property
*top_property
;
158 struct drm_property
*bottom_property
;
159 struct drm_property
*hpos_property
;
160 struct drm_property
*vpos_property
;
162 /* add the property for the SDVO-TV/LVDS */
163 struct drm_property
*brightness_property
;
164 struct drm_property
*contrast_property
;
165 struct drm_property
*saturation_property
;
166 struct drm_property
*hue_property
;
168 /* Add variable to record current setting for the above property */
169 u32 left_margin
, right_margin
, top_margin
, bottom_margin
;
170 /* this is to get the range of margin.*/
171 u32 max_hscan
, max_vscan
;
172 u32 max_hpos
, cur_hpos
;
173 u32 max_vpos
, cur_vpos
;
174 u32 cur_brightness
, max_brightness
;
175 u32 cur_contrast
, max_contrast
;
176 u32 cur_saturation
, max_saturation
;
177 u32 cur_hue
, max_hue
;
180 static struct intel_sdvo
*enc_to_intel_sdvo(struct drm_encoder
*encoder
)
182 return container_of(enc_to_intel_encoder(encoder
), struct intel_sdvo
, base
);
185 static struct intel_sdvo_connector
*to_intel_sdvo_connector(struct drm_connector
*connector
)
187 return container_of(to_intel_connector(connector
), struct intel_sdvo_connector
, base
);
191 intel_sdvo_output_setup(struct intel_sdvo
*intel_sdvo
, uint16_t flags
);
193 intel_sdvo_tv_create_property(struct drm_connector
*connector
, int type
);
195 intel_sdvo_create_enhance_property(struct drm_connector
*connector
);
198 * Writes the SDVOB or SDVOC with the given value, but always writes both
199 * SDVOB and SDVOC to work around apparent hardware issues (according to
200 * comments in the BIOS).
202 static void intel_sdvo_write_sdvox(struct intel_sdvo
*intel_sdvo
, u32 val
)
204 struct drm_device
*dev
= intel_sdvo
->base
.enc
.dev
;
205 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
206 u32 bval
= val
, cval
= val
;
209 if (intel_sdvo
->sdvo_reg
== PCH_SDVOB
) {
210 I915_WRITE(intel_sdvo
->sdvo_reg
, val
);
211 I915_READ(intel_sdvo
->sdvo_reg
);
215 if (intel_sdvo
->sdvo_reg
== SDVOB
) {
216 cval
= I915_READ(SDVOC
);
218 bval
= I915_READ(SDVOB
);
221 * Write the registers twice for luck. Sometimes,
222 * writing them only once doesn't appear to 'stick'.
223 * The BIOS does this too. Yay, magic
225 for (i
= 0; i
< 2; i
++)
227 I915_WRITE(SDVOB
, bval
);
229 I915_WRITE(SDVOC
, cval
);
234 static bool intel_sdvo_read_byte(struct intel_sdvo
*intel_sdvo
, u8 addr
,
241 struct i2c_msg msgs
[] = {
243 .addr
= intel_sdvo
->slave_addr
>> 1,
249 .addr
= intel_sdvo
->slave_addr
>> 1,
259 if ((ret
= i2c_transfer(intel_sdvo
->base
.i2c_bus
, msgs
, 2)) == 2)
265 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret
);
269 static bool intel_sdvo_write_byte(struct intel_sdvo
*intel_sdvo
, int addr
,
273 struct i2c_msg msgs
[] = {
275 .addr
= intel_sdvo
->slave_addr
>> 1,
285 if (i2c_transfer(intel_sdvo
->base
.i2c_bus
, msgs
, 1) == 1)
292 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
293 /** Mapping of command numbers to names, for debug output */
294 static const struct _sdvo_cmd_name
{
297 } sdvo_cmd_names
[] = {
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET
),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS
),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV
),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS
),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS
),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS
),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP
),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP
),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS
),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT
),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG
),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG
),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE
),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT
),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT
),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1
),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2
),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1
),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2
),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1
),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1
),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2
),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1
),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2
),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING
),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1
),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2
),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE
),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE
),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS
),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT
),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT
),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS
),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT
),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT
),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES
),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE
),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE
),
336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE
),
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH
),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT
),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT
),
340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS
),
341 /* Add the op code for SDVO enhancements */
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_POSITION_H
),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POSITION_H
),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_POSITION_H
),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_POSITION_V
),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POSITION_V
),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_POSITION_V
),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION
),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION
),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION
),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE
),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE
),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE
),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST
),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST
),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST
),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS
),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS
),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS
),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H
),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H
),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H
),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V
),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V
),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V
),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE
),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE
),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE
),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI
),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI
),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP
),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY
),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY
),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER
),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT
),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT
),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX
),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX
),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO
),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT
),
382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT
),
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE
),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE
),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA
),
386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA
),
389 #define IS_SDVOB(reg) (reg == SDVOB || reg == PCH_SDVOB)
390 #define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC")
392 static void intel_sdvo_debug_write(struct intel_sdvo
*intel_sdvo
, u8 cmd
,
393 void *args
, int args_len
)
397 DRM_DEBUG_KMS("%s: W: %02X ",
398 SDVO_NAME(intel_sdvo
), cmd
);
399 for (i
= 0; i
< args_len
; i
++)
400 DRM_LOG_KMS("%02X ", ((u8
*)args
)[i
]);
403 for (i
= 0; i
< ARRAY_SIZE(sdvo_cmd_names
); i
++) {
404 if (cmd
== sdvo_cmd_names
[i
].cmd
) {
405 DRM_LOG_KMS("(%s)", sdvo_cmd_names
[i
].name
);
409 if (i
== ARRAY_SIZE(sdvo_cmd_names
))
410 DRM_LOG_KMS("(%02X)", cmd
);
414 static void intel_sdvo_write_cmd(struct intel_sdvo
*intel_sdvo
, u8 cmd
,
415 void *args
, int args_len
)
419 intel_sdvo_debug_write(intel_sdvo
, cmd
, args
, args_len
);
421 for (i
= 0; i
< args_len
; i
++) {
422 intel_sdvo_write_byte(intel_sdvo
, SDVO_I2C_ARG_0
- i
,
426 intel_sdvo_write_byte(intel_sdvo
, SDVO_I2C_OPCODE
, cmd
);
429 static const char *cmd_status_names
[] = {
435 "Target not specified",
436 "Scaling not supported"
439 static void intel_sdvo_debug_response(struct intel_sdvo
*intel_sdvo
,
440 void *response
, int response_len
,
445 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo
));
446 for (i
= 0; i
< response_len
; i
++)
447 DRM_LOG_KMS("%02X ", ((u8
*)response
)[i
]);
450 if (status
<= SDVO_CMD_STATUS_SCALING_NOT_SUPP
)
451 DRM_LOG_KMS("(%s)", cmd_status_names
[status
]);
453 DRM_LOG_KMS("(??? %d)", status
);
457 static u8
intel_sdvo_read_response(struct intel_sdvo
*intel_sdvo
,
458 void *response
, int response_len
)
465 /* Read the command response */
466 for (i
= 0; i
< response_len
; i
++) {
467 intel_sdvo_read_byte(intel_sdvo
,
468 SDVO_I2C_RETURN_0
+ i
,
469 &((u8
*)response
)[i
]);
472 /* read the return status */
473 intel_sdvo_read_byte(intel_sdvo
, SDVO_I2C_CMD_STATUS
,
476 intel_sdvo_debug_response(intel_sdvo
, response
, response_len
,
478 if (status
!= SDVO_CMD_STATUS_PENDING
)
487 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode
*mode
)
489 if (mode
->clock
>= 100000)
491 else if (mode
->clock
>= 50000)
498 * Try to read the response after issuie the DDC switch command. But it
499 * is noted that we must do the action of reading response and issuing DDC
500 * switch command in one I2C transaction. Otherwise when we try to start
501 * another I2C transaction after issuing the DDC bus switch, it will be
502 * switched to the internal SDVO register.
504 static void intel_sdvo_set_control_bus_switch(struct intel_sdvo
*intel_sdvo
,
507 u8 out_buf
[2], cmd_buf
[2], ret_value
[2], ret
;
508 struct i2c_msg msgs
[] = {
510 .addr
= intel_sdvo
->slave_addr
>> 1,
515 /* the following two are to read the response */
517 .addr
= intel_sdvo
->slave_addr
>> 1,
523 .addr
= intel_sdvo
->slave_addr
>> 1,
530 intel_sdvo_debug_write(intel_sdvo
, SDVO_CMD_SET_CONTROL_BUS_SWITCH
,
532 /* write the DDC switch command argument */
533 intel_sdvo_write_byte(intel_sdvo
, SDVO_I2C_ARG_0
, target
);
535 out_buf
[0] = SDVO_I2C_OPCODE
;
536 out_buf
[1] = SDVO_CMD_SET_CONTROL_BUS_SWITCH
;
537 cmd_buf
[0] = SDVO_I2C_CMD_STATUS
;
542 ret
= i2c_transfer(intel_sdvo
->base
.i2c_bus
, msgs
, 3);
544 /* failure in I2C transfer */
545 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret
);
548 if (ret_value
[0] != SDVO_CMD_STATUS_SUCCESS
) {
549 DRM_DEBUG_KMS("DDC switch command returns response %d\n",
556 static bool intel_sdvo_set_target_input(struct intel_sdvo
*intel_sdvo
, bool target_0
, bool target_1
)
558 struct intel_sdvo_set_target_input_args targets
= {0};
561 if (target_0
&& target_1
)
562 return SDVO_CMD_STATUS_NOTSUPP
;
565 targets
.target_1
= 1;
567 intel_sdvo_write_cmd(intel_sdvo
, SDVO_CMD_SET_TARGET_INPUT
, &targets
,
570 status
= intel_sdvo_read_response(intel_sdvo
, NULL
, 0);
572 return (status
== SDVO_CMD_STATUS_SUCCESS
);
576 * Return whether each input is trained.
578 * This function is making an assumption about the layout of the response,
579 * which should be checked against the docs.
581 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo
*intel_sdvo
, bool *input_1
, bool *input_2
)
583 struct intel_sdvo_get_trained_inputs_response response
;
586 intel_sdvo_write_cmd(intel_sdvo
, SDVO_CMD_GET_TRAINED_INPUTS
, NULL
, 0);
587 status
= intel_sdvo_read_response(intel_sdvo
, &response
, sizeof(response
));
588 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
591 *input_1
= response
.input0_trained
;
592 *input_2
= response
.input1_trained
;
596 static bool intel_sdvo_set_active_outputs(struct intel_sdvo
*intel_sdvo
,
601 intel_sdvo_write_cmd(intel_sdvo
, SDVO_CMD_SET_ACTIVE_OUTPUTS
, &outputs
,
603 status
= intel_sdvo_read_response(intel_sdvo
, NULL
, 0);
604 return (status
== SDVO_CMD_STATUS_SUCCESS
);
607 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo
*intel_sdvo
,
610 u8 status
, state
= SDVO_ENCODER_STATE_ON
;
613 case DRM_MODE_DPMS_ON
:
614 state
= SDVO_ENCODER_STATE_ON
;
616 case DRM_MODE_DPMS_STANDBY
:
617 state
= SDVO_ENCODER_STATE_STANDBY
;
619 case DRM_MODE_DPMS_SUSPEND
:
620 state
= SDVO_ENCODER_STATE_SUSPEND
;
622 case DRM_MODE_DPMS_OFF
:
623 state
= SDVO_ENCODER_STATE_OFF
;
627 intel_sdvo_write_cmd(intel_sdvo
, SDVO_CMD_SET_ENCODER_POWER_STATE
, &state
,
629 status
= intel_sdvo_read_response(intel_sdvo
, NULL
, 0);
631 return (status
== SDVO_CMD_STATUS_SUCCESS
);
634 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo
*intel_sdvo
,
638 struct intel_sdvo_pixel_clock_range clocks
;
641 intel_sdvo_write_cmd(intel_sdvo
, SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE
,
644 status
= intel_sdvo_read_response(intel_sdvo
, &clocks
, sizeof(clocks
));
646 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
649 /* Convert the values from units of 10 kHz to kHz. */
650 *clock_min
= clocks
.min
* 10;
651 *clock_max
= clocks
.max
* 10;
656 static bool intel_sdvo_set_target_output(struct intel_sdvo
*intel_sdvo
,
661 intel_sdvo_write_cmd(intel_sdvo
, SDVO_CMD_SET_TARGET_OUTPUT
, &outputs
,
664 status
= intel_sdvo_read_response(intel_sdvo
, NULL
, 0);
665 return (status
== SDVO_CMD_STATUS_SUCCESS
);
668 static bool intel_sdvo_set_timing(struct intel_sdvo
*intel_sdvo
, u8 cmd
,
669 struct intel_sdvo_dtd
*dtd
)
673 intel_sdvo_write_cmd(intel_sdvo
, cmd
, &dtd
->part1
, sizeof(dtd
->part1
));
674 status
= intel_sdvo_read_response(intel_sdvo
, NULL
, 0);
675 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
678 intel_sdvo_write_cmd(intel_sdvo
, cmd
+ 1, &dtd
->part2
, sizeof(dtd
->part2
));
679 status
= intel_sdvo_read_response(intel_sdvo
, NULL
, 0);
680 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
686 static bool intel_sdvo_set_input_timing(struct intel_sdvo
*intel_sdvo
,
687 struct intel_sdvo_dtd
*dtd
)
689 return intel_sdvo_set_timing(intel_sdvo
,
690 SDVO_CMD_SET_INPUT_TIMINGS_PART1
, dtd
);
693 static bool intel_sdvo_set_output_timing(struct intel_sdvo
*intel_sdvo
,
694 struct intel_sdvo_dtd
*dtd
)
696 return intel_sdvo_set_timing(intel_sdvo
,
697 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1
, dtd
);
701 intel_sdvo_create_preferred_input_timing(struct intel_sdvo
*intel_sdvo
,
706 struct intel_sdvo_preferred_input_timing_args args
;
709 memset(&args
, 0, sizeof(args
));
712 args
.height
= height
;
715 if (intel_sdvo
->is_lvds
&&
716 (intel_sdvo
->sdvo_lvds_fixed_mode
->hdisplay
!= width
||
717 intel_sdvo
->sdvo_lvds_fixed_mode
->vdisplay
!= height
))
720 intel_sdvo_write_cmd(intel_sdvo
,
721 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING
,
722 &args
, sizeof(args
));
723 status
= intel_sdvo_read_response(intel_sdvo
, NULL
, 0);
724 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
730 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo
*intel_sdvo
,
731 struct intel_sdvo_dtd
*dtd
)
735 intel_sdvo_write_cmd(intel_sdvo
, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1
,
738 status
= intel_sdvo_read_response(intel_sdvo
, &dtd
->part1
,
740 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
743 intel_sdvo_write_cmd(intel_sdvo
, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2
,
746 status
= intel_sdvo_read_response(intel_sdvo
, &dtd
->part2
,
748 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
754 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo
*intel_sdvo
, u8 val
)
758 intel_sdvo_write_cmd(intel_sdvo
, SDVO_CMD_SET_CLOCK_RATE_MULT
, &val
, 1);
759 status
= intel_sdvo_read_response(intel_sdvo
, NULL
, 0);
760 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
766 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd
*dtd
,
767 struct drm_display_mode
*mode
)
769 uint16_t width
, height
;
770 uint16_t h_blank_len
, h_sync_len
, v_blank_len
, v_sync_len
;
771 uint16_t h_sync_offset
, v_sync_offset
;
773 width
= mode
->crtc_hdisplay
;
774 height
= mode
->crtc_vdisplay
;
776 /* do some mode translations */
777 h_blank_len
= mode
->crtc_hblank_end
- mode
->crtc_hblank_start
;
778 h_sync_len
= mode
->crtc_hsync_end
- mode
->crtc_hsync_start
;
780 v_blank_len
= mode
->crtc_vblank_end
- mode
->crtc_vblank_start
;
781 v_sync_len
= mode
->crtc_vsync_end
- mode
->crtc_vsync_start
;
783 h_sync_offset
= mode
->crtc_hsync_start
- mode
->crtc_hblank_start
;
784 v_sync_offset
= mode
->crtc_vsync_start
- mode
->crtc_vblank_start
;
786 dtd
->part1
.clock
= mode
->clock
/ 10;
787 dtd
->part1
.h_active
= width
& 0xff;
788 dtd
->part1
.h_blank
= h_blank_len
& 0xff;
789 dtd
->part1
.h_high
= (((width
>> 8) & 0xf) << 4) |
790 ((h_blank_len
>> 8) & 0xf);
791 dtd
->part1
.v_active
= height
& 0xff;
792 dtd
->part1
.v_blank
= v_blank_len
& 0xff;
793 dtd
->part1
.v_high
= (((height
>> 8) & 0xf) << 4) |
794 ((v_blank_len
>> 8) & 0xf);
796 dtd
->part2
.h_sync_off
= h_sync_offset
& 0xff;
797 dtd
->part2
.h_sync_width
= h_sync_len
& 0xff;
798 dtd
->part2
.v_sync_off_width
= (v_sync_offset
& 0xf) << 4 |
800 dtd
->part2
.sync_off_width_high
= ((h_sync_offset
& 0x300) >> 2) |
801 ((h_sync_len
& 0x300) >> 4) | ((v_sync_offset
& 0x30) >> 2) |
802 ((v_sync_len
& 0x30) >> 4);
804 dtd
->part2
.dtd_flags
= 0x18;
805 if (mode
->flags
& DRM_MODE_FLAG_PHSYNC
)
806 dtd
->part2
.dtd_flags
|= 0x2;
807 if (mode
->flags
& DRM_MODE_FLAG_PVSYNC
)
808 dtd
->part2
.dtd_flags
|= 0x4;
810 dtd
->part2
.sdvo_flags
= 0;
811 dtd
->part2
.v_sync_off_high
= v_sync_offset
& 0xc0;
812 dtd
->part2
.reserved
= 0;
815 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode
* mode
,
816 struct intel_sdvo_dtd
*dtd
)
818 mode
->hdisplay
= dtd
->part1
.h_active
;
819 mode
->hdisplay
+= ((dtd
->part1
.h_high
>> 4) & 0x0f) << 8;
820 mode
->hsync_start
= mode
->hdisplay
+ dtd
->part2
.h_sync_off
;
821 mode
->hsync_start
+= (dtd
->part2
.sync_off_width_high
& 0xc0) << 2;
822 mode
->hsync_end
= mode
->hsync_start
+ dtd
->part2
.h_sync_width
;
823 mode
->hsync_end
+= (dtd
->part2
.sync_off_width_high
& 0x30) << 4;
824 mode
->htotal
= mode
->hdisplay
+ dtd
->part1
.h_blank
;
825 mode
->htotal
+= (dtd
->part1
.h_high
& 0xf) << 8;
827 mode
->vdisplay
= dtd
->part1
.v_active
;
828 mode
->vdisplay
+= ((dtd
->part1
.v_high
>> 4) & 0x0f) << 8;
829 mode
->vsync_start
= mode
->vdisplay
;
830 mode
->vsync_start
+= (dtd
->part2
.v_sync_off_width
>> 4) & 0xf;
831 mode
->vsync_start
+= (dtd
->part2
.sync_off_width_high
& 0x0c) << 2;
832 mode
->vsync_start
+= dtd
->part2
.v_sync_off_high
& 0xc0;
833 mode
->vsync_end
= mode
->vsync_start
+
834 (dtd
->part2
.v_sync_off_width
& 0xf);
835 mode
->vsync_end
+= (dtd
->part2
.sync_off_width_high
& 0x3) << 4;
836 mode
->vtotal
= mode
->vdisplay
+ dtd
->part1
.v_blank
;
837 mode
->vtotal
+= (dtd
->part1
.v_high
& 0xf) << 8;
839 mode
->clock
= dtd
->part1
.clock
* 10;
841 mode
->flags
&= ~(DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
);
842 if (dtd
->part2
.dtd_flags
& 0x2)
843 mode
->flags
|= DRM_MODE_FLAG_PHSYNC
;
844 if (dtd
->part2
.dtd_flags
& 0x4)
845 mode
->flags
|= DRM_MODE_FLAG_PVSYNC
;
848 static bool intel_sdvo_get_supp_encode(struct intel_sdvo
*intel_sdvo
,
849 struct intel_sdvo_encode
*encode
)
853 intel_sdvo_write_cmd(intel_sdvo
, SDVO_CMD_GET_SUPP_ENCODE
, NULL
, 0);
854 status
= intel_sdvo_read_response(intel_sdvo
, encode
, sizeof(*encode
));
855 if (status
!= SDVO_CMD_STATUS_SUCCESS
) { /* non-support means DVI */
856 memset(encode
, 0, sizeof(*encode
));
863 static bool intel_sdvo_set_encode(struct intel_sdvo
*intel_sdvo
,
868 intel_sdvo_write_cmd(intel_sdvo
, SDVO_CMD_SET_ENCODE
, &mode
, 1);
869 status
= intel_sdvo_read_response(intel_sdvo
, NULL
, 0);
871 return (status
== SDVO_CMD_STATUS_SUCCESS
);
874 static bool intel_sdvo_set_colorimetry(struct intel_sdvo
*intel_sdvo
,
879 intel_sdvo_write_cmd(intel_sdvo
, SDVO_CMD_SET_COLORIMETRY
, &mode
, 1);
880 status
= intel_sdvo_read_response(intel_sdvo
, NULL
, 0);
882 return (status
== SDVO_CMD_STATUS_SUCCESS
);
886 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo
*intel_sdvo
)
889 uint8_t set_buf_index
[2];
895 intel_sdvo_write_cmd(encoder
, SDVO_CMD_GET_HBUF_AV_SPLIT
, NULL
, 0);
896 intel_sdvo_read_response(encoder
, &av_split
, 1);
898 for (i
= 0; i
<= av_split
; i
++) {
899 set_buf_index
[0] = i
; set_buf_index
[1] = 0;
900 intel_sdvo_write_cmd(encoder
, SDVO_CMD_SET_HBUF_INDEX
,
902 intel_sdvo_write_cmd(encoder
, SDVO_CMD_GET_HBUF_INFO
, NULL
, 0);
903 intel_sdvo_read_response(encoder
, &buf_size
, 1);
906 for (j
= 0; j
<= buf_size
; j
+= 8) {
907 intel_sdvo_write_cmd(encoder
, SDVO_CMD_GET_HBUF_DATA
,
909 intel_sdvo_read_response(encoder
, pos
, 8);
916 static void intel_sdvo_set_hdmi_buf(struct intel_sdvo
*intel_sdvo
,
918 uint8_t *data
, int8_t size
, uint8_t tx_rate
)
920 uint8_t set_buf_index
[2];
922 set_buf_index
[0] = index
;
923 set_buf_index
[1] = 0;
925 intel_sdvo_write_cmd(intel_sdvo
, SDVO_CMD_SET_HBUF_INDEX
,
928 for (; size
> 0; size
-= 8) {
929 intel_sdvo_write_cmd(intel_sdvo
, SDVO_CMD_SET_HBUF_DATA
, data
, 8);
933 intel_sdvo_write_cmd(intel_sdvo
, SDVO_CMD_SET_HBUF_TXRATE
, &tx_rate
, 1);
936 static uint8_t intel_sdvo_calc_hbuf_csum(uint8_t *data
, uint8_t size
)
941 for (i
= 0; i
< size
; i
++)
947 #define DIP_TYPE_AVI 0x82
948 #define DIP_VERSION_AVI 0x2
949 #define DIP_LEN_AVI 13
951 struct dip_infoframe
{
979 /* Packet Byte #6~13 */
980 uint16_t top_bar_end
;
981 uint16_t bottom_bar_start
;
982 uint16_t left_bar_end
;
983 uint16_t right_bar_start
;
987 uint8_t channel_count
:3;
989 uint8_t coding_type
:4;
991 uint8_t sample_size
:2; /* SS0, SS1 */
992 uint8_t sample_frequency
:3;
995 uint8_t coding_type_private
:5;
998 uint8_t channel_allocation
;
1001 uint8_t level_shift
:4;
1002 uint8_t downmix_inhibit
:1;
1004 uint8_t payload
[28];
1005 } __attribute__ ((packed
)) u
;
1006 } __attribute__((packed
));
1008 static void intel_sdvo_set_avi_infoframe(struct intel_sdvo
*intel_sdvo
,
1009 struct drm_display_mode
* mode
)
1011 struct dip_infoframe avi_if
= {
1012 .type
= DIP_TYPE_AVI
,
1013 .version
= DIP_VERSION_AVI
,
1017 avi_if
.checksum
= intel_sdvo_calc_hbuf_csum((uint8_t *)&avi_if
,
1019 intel_sdvo_set_hdmi_buf(intel_sdvo
, 1, (uint8_t *)&avi_if
,
1021 SDVO_HBUF_TX_VSYNC
);
1024 static void intel_sdvo_set_tv_format(struct intel_sdvo
*intel_sdvo
)
1027 struct intel_sdvo_tv_format format
;
1028 uint32_t format_map
, i
;
1031 for (i
= 0; i
< TV_FORMAT_NUM
; i
++)
1032 if (tv_format_names
[i
] == intel_sdvo
->tv_format_name
)
1035 format_map
= 1 << i
;
1036 memset(&format
, 0, sizeof(format
));
1037 memcpy(&format
, &format_map
, sizeof(format_map
) > sizeof(format
) ?
1038 sizeof(format
) : sizeof(format_map
));
1040 intel_sdvo_write_cmd(intel_sdvo
, SDVO_CMD_SET_TV_FORMAT
, &format
,
1043 status
= intel_sdvo_read_response(intel_sdvo
, NULL
, 0);
1044 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
1045 DRM_DEBUG_KMS("%s: Failed to set TV format\n",
1046 SDVO_NAME(intel_sdvo
));
1049 static bool intel_sdvo_mode_fixup(struct drm_encoder
*encoder
,
1050 struct drm_display_mode
*mode
,
1051 struct drm_display_mode
*adjusted_mode
)
1053 struct intel_sdvo
*intel_sdvo
= enc_to_intel_sdvo(encoder
);
1055 if (intel_sdvo
->is_tv
) {
1056 struct intel_sdvo_dtd output_dtd
;
1059 /* We need to construct preferred input timings based on our
1060 * output timings. To do that, we have to set the output
1061 * timings, even though this isn't really the right place in
1062 * the sequence to do it. Oh well.
1066 /* Set output timings */
1067 intel_sdvo_get_dtd_from_mode(&output_dtd
, mode
);
1068 intel_sdvo_set_target_output(intel_sdvo
,
1069 intel_sdvo
->attached_output
);
1070 intel_sdvo_set_output_timing(intel_sdvo
, &output_dtd
);
1072 /* Set the input timing to the screen. Assume always input 0. */
1073 intel_sdvo_set_target_input(intel_sdvo
, true, false);
1076 success
= intel_sdvo_create_preferred_input_timing(intel_sdvo
,
1081 struct intel_sdvo_dtd input_dtd
;
1083 intel_sdvo_get_preferred_input_timing(intel_sdvo
,
1085 intel_sdvo_get_mode_from_dtd(adjusted_mode
, &input_dtd
);
1086 intel_sdvo
->sdvo_flags
= input_dtd
.part2
.sdvo_flags
;
1088 drm_mode_set_crtcinfo(adjusted_mode
, 0);
1090 mode
->clock
= adjusted_mode
->clock
;
1092 adjusted_mode
->clock
*=
1093 intel_sdvo_get_pixel_multiplier(mode
);
1097 } else if (intel_sdvo
->is_lvds
) {
1098 struct intel_sdvo_dtd output_dtd
;
1101 drm_mode_set_crtcinfo(intel_sdvo
->sdvo_lvds_fixed_mode
, 0);
1102 /* Set output timings */
1103 intel_sdvo_get_dtd_from_mode(&output_dtd
,
1104 intel_sdvo
->sdvo_lvds_fixed_mode
);
1106 intel_sdvo_set_target_output(intel_sdvo
,
1107 intel_sdvo
->attached_output
);
1108 intel_sdvo_set_output_timing(intel_sdvo
, &output_dtd
);
1110 /* Set the input timing to the screen. Assume always input 0. */
1111 intel_sdvo_set_target_input(intel_sdvo
, true, false);
1114 success
= intel_sdvo_create_preferred_input_timing(
1121 struct intel_sdvo_dtd input_dtd
;
1123 intel_sdvo_get_preferred_input_timing(intel_sdvo
,
1125 intel_sdvo_get_mode_from_dtd(adjusted_mode
, &input_dtd
);
1126 intel_sdvo
->sdvo_flags
= input_dtd
.part2
.sdvo_flags
;
1128 drm_mode_set_crtcinfo(adjusted_mode
, 0);
1130 mode
->clock
= adjusted_mode
->clock
;
1132 adjusted_mode
->clock
*=
1133 intel_sdvo_get_pixel_multiplier(mode
);
1139 /* Make the CRTC code factor in the SDVO pixel multiplier. The
1140 * SDVO device will be told of the multiplier during mode_set.
1142 adjusted_mode
->clock
*= intel_sdvo_get_pixel_multiplier(mode
);
1147 static void intel_sdvo_mode_set(struct drm_encoder
*encoder
,
1148 struct drm_display_mode
*mode
,
1149 struct drm_display_mode
*adjusted_mode
)
1151 struct drm_device
*dev
= encoder
->dev
;
1152 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1153 struct drm_crtc
*crtc
= encoder
->crtc
;
1154 struct intel_crtc
*intel_crtc
= to_intel_crtc(crtc
);
1155 struct intel_sdvo
*intel_sdvo
= enc_to_intel_sdvo(encoder
);
1157 int sdvo_pixel_multiply
;
1158 struct intel_sdvo_in_out_map in_out
;
1159 struct intel_sdvo_dtd input_dtd
;
1165 /* First, set the input mapping for the first input to our controlled
1166 * output. This is only correct if we're a single-input device, in
1167 * which case the first input is the output from the appropriate SDVO
1168 * channel on the motherboard. In a two-input device, the first input
1169 * will be SDVOB and the second SDVOC.
1171 in_out
.in0
= intel_sdvo
->attached_output
;
1174 intel_sdvo_write_cmd(intel_sdvo
, SDVO_CMD_SET_IN_OUT_MAP
,
1175 &in_out
, sizeof(in_out
));
1176 status
= intel_sdvo_read_response(intel_sdvo
, NULL
, 0);
1178 if (intel_sdvo
->is_hdmi
) {
1179 intel_sdvo_set_avi_infoframe(intel_sdvo
, mode
);
1180 sdvox
|= SDVO_AUDIO_ENABLE
;
1183 /* We have tried to get input timing in mode_fixup, and filled into
1185 if (intel_sdvo
->is_tv
|| intel_sdvo
->is_lvds
) {
1186 intel_sdvo_get_dtd_from_mode(&input_dtd
, adjusted_mode
);
1187 input_dtd
.part2
.sdvo_flags
= intel_sdvo
->sdvo_flags
;
1189 intel_sdvo_get_dtd_from_mode(&input_dtd
, mode
);
1191 /* If it's a TV, we already set the output timing in mode_fixup.
1192 * Otherwise, the output timing is equal to the input timing.
1194 if (!intel_sdvo
->is_tv
&& !intel_sdvo
->is_lvds
) {
1195 /* Set the output timing to the screen */
1196 intel_sdvo_set_target_output(intel_sdvo
,
1197 intel_sdvo
->attached_output
);
1198 intel_sdvo_set_output_timing(intel_sdvo
, &input_dtd
);
1201 /* Set the input timing to the screen. Assume always input 0. */
1202 intel_sdvo_set_target_input(intel_sdvo
, true, false);
1204 if (intel_sdvo
->is_tv
)
1205 intel_sdvo_set_tv_format(intel_sdvo
);
1207 /* We would like to use intel_sdvo_create_preferred_input_timing() to
1208 * provide the device with a timing it can support, if it supports that
1209 * feature. However, presumably we would need to adjust the CRTC to
1210 * output the preferred timing, and we don't support that currently.
1213 success
= intel_sdvo_create_preferred_input_timing(encoder
, clock
,
1216 struct intel_sdvo_dtd
*input_dtd
;
1218 intel_sdvo_get_preferred_input_timing(encoder
, &input_dtd
);
1219 intel_sdvo_set_input_timing(encoder
, &input_dtd
);
1222 intel_sdvo_set_input_timing(intel_sdvo
, &input_dtd
);
1225 switch (intel_sdvo_get_pixel_multiplier(mode
)) {
1227 intel_sdvo_set_clock_rate_mult(intel_sdvo
,
1228 SDVO_CLOCK_RATE_MULT_1X
);
1231 intel_sdvo_set_clock_rate_mult(intel_sdvo
,
1232 SDVO_CLOCK_RATE_MULT_2X
);
1235 intel_sdvo_set_clock_rate_mult(intel_sdvo
,
1236 SDVO_CLOCK_RATE_MULT_4X
);
1240 /* Set the SDVO control regs. */
1241 if (IS_I965G(dev
)) {
1242 sdvox
|= SDVO_BORDER_ENABLE
;
1243 if (adjusted_mode
->flags
& DRM_MODE_FLAG_PVSYNC
)
1244 sdvox
|= SDVO_VSYNC_ACTIVE_HIGH
;
1245 if (adjusted_mode
->flags
& DRM_MODE_FLAG_PHSYNC
)
1246 sdvox
|= SDVO_HSYNC_ACTIVE_HIGH
;
1248 sdvox
|= I915_READ(intel_sdvo
->sdvo_reg
);
1249 switch (intel_sdvo
->sdvo_reg
) {
1251 sdvox
&= SDVOB_PRESERVE_MASK
;
1254 sdvox
&= SDVOC_PRESERVE_MASK
;
1257 sdvox
|= (9 << 19) | SDVO_BORDER_ENABLE
;
1259 if (intel_crtc
->pipe
== 1)
1260 sdvox
|= SDVO_PIPE_B_SELECT
;
1262 sdvo_pixel_multiply
= intel_sdvo_get_pixel_multiplier(mode
);
1263 if (IS_I965G(dev
)) {
1264 /* done in crtc_mode_set as the dpll_md reg must be written early */
1265 } else if (IS_I945G(dev
) || IS_I945GM(dev
) || IS_G33(dev
)) {
1266 /* done in crtc_mode_set as it lives inside the dpll register */
1268 sdvox
|= (sdvo_pixel_multiply
- 1) << SDVO_PORT_MULTIPLY_SHIFT
;
1271 if (intel_sdvo
->sdvo_flags
& SDVO_NEED_TO_STALL
)
1272 sdvox
|= SDVO_STALL_SELECT
;
1273 intel_sdvo_write_sdvox(intel_sdvo
, sdvox
);
1276 static void intel_sdvo_dpms(struct drm_encoder
*encoder
, int mode
)
1278 struct drm_device
*dev
= encoder
->dev
;
1279 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1280 struct intel_sdvo
*intel_sdvo
= enc_to_intel_sdvo(encoder
);
1283 if (mode
!= DRM_MODE_DPMS_ON
) {
1284 intel_sdvo_set_active_outputs(intel_sdvo
, 0);
1286 intel_sdvo_set_encoder_power_state(intel_sdvo
, mode
);
1288 if (mode
== DRM_MODE_DPMS_OFF
) {
1289 temp
= I915_READ(intel_sdvo
->sdvo_reg
);
1290 if ((temp
& SDVO_ENABLE
) != 0) {
1291 intel_sdvo_write_sdvox(intel_sdvo
, temp
& ~SDVO_ENABLE
);
1295 bool input1
, input2
;
1299 temp
= I915_READ(intel_sdvo
->sdvo_reg
);
1300 if ((temp
& SDVO_ENABLE
) == 0)
1301 intel_sdvo_write_sdvox(intel_sdvo
, temp
| SDVO_ENABLE
);
1302 for (i
= 0; i
< 2; i
++)
1303 intel_wait_for_vblank(dev
);
1305 status
= intel_sdvo_get_trained_inputs(intel_sdvo
, &input1
,
1309 /* Warn if the device reported failure to sync.
1310 * A lot of SDVO devices fail to notify of sync, but it's
1311 * a given it the status is a success, we succeeded.
1313 if (status
== SDVO_CMD_STATUS_SUCCESS
&& !input1
) {
1314 DRM_DEBUG_KMS("First %s output reported failure to "
1315 "sync\n", SDVO_NAME(intel_sdvo
));
1319 intel_sdvo_set_encoder_power_state(intel_sdvo
, mode
);
1320 intel_sdvo_set_active_outputs(intel_sdvo
, intel_sdvo
->attached_output
);
1325 static int intel_sdvo_mode_valid(struct drm_connector
*connector
,
1326 struct drm_display_mode
*mode
)
1328 struct drm_encoder
*encoder
= intel_attached_encoder(connector
);
1329 struct intel_sdvo
*intel_sdvo
= enc_to_intel_sdvo(encoder
);
1331 if (mode
->flags
& DRM_MODE_FLAG_DBLSCAN
)
1332 return MODE_NO_DBLESCAN
;
1334 if (intel_sdvo
->pixel_clock_min
> mode
->clock
)
1335 return MODE_CLOCK_LOW
;
1337 if (intel_sdvo
->pixel_clock_max
< mode
->clock
)
1338 return MODE_CLOCK_HIGH
;
1340 if (intel_sdvo
->is_lvds
== true) {
1341 if (intel_sdvo
->sdvo_lvds_fixed_mode
== NULL
)
1344 if (mode
->hdisplay
> intel_sdvo
->sdvo_lvds_fixed_mode
->hdisplay
)
1347 if (mode
->vdisplay
> intel_sdvo
->sdvo_lvds_fixed_mode
->vdisplay
)
1354 static bool intel_sdvo_get_capabilities(struct intel_sdvo
*intel_sdvo
, struct intel_sdvo_caps
*caps
)
1358 intel_sdvo_write_cmd(intel_sdvo
, SDVO_CMD_GET_DEVICE_CAPS
, NULL
, 0);
1359 status
= intel_sdvo_read_response(intel_sdvo
, caps
, sizeof(*caps
));
1360 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
1368 struct drm_connector
* intel_sdvo_find(struct drm_device
*dev
, int sdvoB
)
1370 struct drm_connector
*connector
= NULL
;
1371 struct intel_sdvo
*iout
= NULL
;
1372 struct intel_sdvo
*sdvo
;
1374 /* find the sdvo connector */
1375 list_for_each_entry(connector
, &dev
->mode_config
.connector_list
, head
) {
1376 iout
= to_intel_sdvo(connector
);
1378 if (iout
->type
!= INTEL_OUTPUT_SDVO
)
1381 sdvo
= iout
->dev_priv
;
1383 if (sdvo
->sdvo_reg
== SDVOB
&& sdvoB
)
1386 if (sdvo
->sdvo_reg
== SDVOC
&& !sdvoB
)
1394 int intel_sdvo_supports_hotplug(struct drm_connector
*connector
)
1398 struct intel_sdvo
*intel_sdvo
;
1399 DRM_DEBUG_KMS("\n");
1404 intel_sdvo
= to_intel_sdvo(connector
);
1406 intel_sdvo_write_cmd(intel_sdvo
, SDVO_CMD_GET_HOT_PLUG_SUPPORT
, NULL
, 0);
1407 status
= intel_sdvo_read_response(intel_sdvo
, &response
, 2);
1409 if (response
[0] !=0)
1415 void intel_sdvo_set_hotplug(struct drm_connector
*connector
, int on
)
1419 struct intel_sdvo
*intel_sdvo
= to_intel_sdvo(connector
);
1421 intel_sdvo_write_cmd(intel_sdvo
, SDVO_CMD_GET_ACTIVE_HOT_PLUG
, NULL
, 0);
1422 intel_sdvo_read_response(intel_sdvo
, &response
, 2);
1425 intel_sdvo_write_cmd(intel_sdvo
, SDVO_CMD_GET_HOT_PLUG_SUPPORT
, NULL
, 0);
1426 status
= intel_sdvo_read_response(intel_sdvo
, &response
, 2);
1428 intel_sdvo_write_cmd(intel_sdvo
, SDVO_CMD_SET_ACTIVE_HOT_PLUG
, &response
, 2);
1432 intel_sdvo_write_cmd(intel_sdvo
, SDVO_CMD_SET_ACTIVE_HOT_PLUG
, &response
, 2);
1435 intel_sdvo_write_cmd(intel_sdvo
, SDVO_CMD_GET_ACTIVE_HOT_PLUG
, NULL
, 0);
1436 intel_sdvo_read_response(intel_sdvo
, &response
, 2);
1441 intel_sdvo_multifunc_encoder(struct intel_sdvo
*intel_sdvo
)
1445 if (intel_sdvo
->caps
.output_flags
&
1446 (SDVO_OUTPUT_TMDS0
| SDVO_OUTPUT_TMDS1
))
1448 if (intel_sdvo
->caps
.output_flags
&
1449 (SDVO_OUTPUT_RGB0
| SDVO_OUTPUT_RGB1
))
1451 if (intel_sdvo
->caps
.output_flags
&
1452 (SDVO_OUTPUT_SVID0
| SDVO_OUTPUT_SVID1
))
1454 if (intel_sdvo
->caps
.output_flags
&
1455 (SDVO_OUTPUT_CVBS0
| SDVO_OUTPUT_CVBS1
))
1457 if (intel_sdvo
->caps
.output_flags
&
1458 (SDVO_OUTPUT_YPRPB0
| SDVO_OUTPUT_YPRPB1
))
1461 if (intel_sdvo
->caps
.output_flags
&
1462 (SDVO_OUTPUT_SCART0
| SDVO_OUTPUT_SCART1
))
1465 if (intel_sdvo
->caps
.output_flags
&
1466 (SDVO_OUTPUT_LVDS0
| SDVO_OUTPUT_LVDS1
))
1472 static struct drm_connector
*
1473 intel_find_analog_connector(struct drm_device
*dev
)
1475 struct drm_connector
*connector
;
1476 struct drm_encoder
*encoder
;
1477 struct intel_sdvo
*intel_sdvo
;
1479 list_for_each_entry(encoder
, &dev
->mode_config
.encoder_list
, head
) {
1480 intel_sdvo
= enc_to_intel_sdvo(encoder
);
1481 if (intel_sdvo
->base
.type
== INTEL_OUTPUT_ANALOG
) {
1482 list_for_each_entry(connector
, &dev
->mode_config
.connector_list
, head
) {
1483 if (encoder
== intel_attached_encoder(connector
))
1492 intel_analog_is_connected(struct drm_device
*dev
)
1494 struct drm_connector
*analog_connector
;
1495 analog_connector
= intel_find_analog_connector(dev
);
1497 if (!analog_connector
)
1500 if (analog_connector
->funcs
->detect(analog_connector
) ==
1501 connector_status_disconnected
)
1507 enum drm_connector_status
1508 intel_sdvo_hdmi_sink_detect(struct drm_connector
*connector
)
1510 struct drm_encoder
*encoder
= intel_attached_encoder(connector
);
1511 struct intel_sdvo
*intel_sdvo
= enc_to_intel_sdvo(encoder
);
1512 struct intel_sdvo_connector
*intel_sdvo_connector
= to_intel_sdvo_connector(connector
);
1513 enum drm_connector_status status
= connector_status_connected
;
1514 struct edid
*edid
= NULL
;
1516 edid
= drm_get_edid(connector
, intel_sdvo
->base
.ddc_bus
);
1518 /* This is only applied to SDVO cards with multiple outputs */
1519 if (edid
== NULL
&& intel_sdvo_multifunc_encoder(intel_sdvo
)) {
1520 uint8_t saved_ddc
, temp_ddc
;
1521 saved_ddc
= intel_sdvo
->ddc_bus
;
1522 temp_ddc
= intel_sdvo
->ddc_bus
>> 1;
1524 * Don't use the 1 as the argument of DDC bus switch to get
1525 * the EDID. It is used for SDVO SPD ROM.
1527 while(temp_ddc
> 1) {
1528 intel_sdvo
->ddc_bus
= temp_ddc
;
1529 edid
= drm_get_edid(connector
, intel_sdvo
->base
.ddc_bus
);
1532 * When we can get the EDID, maybe it is the
1533 * correct DDC bus. Update it.
1535 intel_sdvo
->ddc_bus
= temp_ddc
;
1541 intel_sdvo
->ddc_bus
= saved_ddc
;
1543 /* when there is no edid and no monitor is connected with VGA
1544 * port, try to use the CRT ddc to read the EDID for DVI-connector
1546 if (edid
== NULL
&& intel_sdvo
->analog_ddc_bus
&&
1547 !intel_analog_is_connected(connector
->dev
))
1548 edid
= drm_get_edid(connector
, intel_sdvo
->analog_ddc_bus
);
1551 bool is_digital
= !!(edid
->input
& DRM_EDID_INPUT_DIGITAL
);
1552 bool need_digital
= !!(intel_sdvo_connector
->output_flag
& SDVO_TMDS_MASK
);
1554 /* DDC bus is shared, match EDID to connector type */
1555 if (is_digital
&& need_digital
)
1556 intel_sdvo
->is_hdmi
= drm_detect_hdmi_monitor(edid
);
1557 else if (is_digital
!= need_digital
)
1558 status
= connector_status_disconnected
;
1560 connector
->display_info
.raw_edid
= NULL
;
1562 status
= connector_status_disconnected
;
1569 static enum drm_connector_status
intel_sdvo_detect(struct drm_connector
*connector
)
1573 struct drm_encoder
*encoder
= intel_attached_encoder(connector
);
1574 struct intel_sdvo
*intel_sdvo
= enc_to_intel_sdvo(encoder
);
1575 struct intel_sdvo_connector
*intel_sdvo_connector
= to_intel_sdvo_connector(connector
);
1576 enum drm_connector_status ret
;
1578 intel_sdvo_write_cmd(intel_sdvo
,
1579 SDVO_CMD_GET_ATTACHED_DISPLAYS
, NULL
, 0);
1580 if (intel_sdvo
->is_tv
) {
1581 /* add 30ms delay when the output type is SDVO-TV */
1584 status
= intel_sdvo_read_response(intel_sdvo
, &response
, 2);
1586 DRM_DEBUG_KMS("SDVO response %d %d\n", response
& 0xff, response
>> 8);
1588 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
1589 return connector_status_unknown
;
1592 return connector_status_disconnected
;
1594 intel_sdvo
->attached_output
= response
;
1596 if ((intel_sdvo_connector
->output_flag
& response
) == 0)
1597 ret
= connector_status_disconnected
;
1598 else if (response
& SDVO_TMDS_MASK
)
1599 ret
= intel_sdvo_hdmi_sink_detect(connector
);
1601 ret
= connector_status_connected
;
1603 /* May update encoder flag for like clock for SDVO TV, etc.*/
1604 if (ret
== connector_status_connected
) {
1605 intel_sdvo
->is_tv
= false;
1606 intel_sdvo
->is_lvds
= false;
1607 intel_sdvo
->base
.needs_tv_clock
= false;
1609 if (response
& SDVO_TV_MASK
) {
1610 intel_sdvo
->is_tv
= true;
1611 intel_sdvo
->base
.needs_tv_clock
= true;
1613 if (response
& SDVO_LVDS_MASK
)
1614 intel_sdvo
->is_lvds
= true;
1620 static void intel_sdvo_get_ddc_modes(struct drm_connector
*connector
)
1622 struct drm_encoder
*encoder
= intel_attached_encoder(connector
);
1623 struct intel_sdvo
*intel_sdvo
= enc_to_intel_sdvo(encoder
);
1626 /* set the bus switch and get the modes */
1627 num_modes
= intel_ddc_get_modes(connector
, intel_sdvo
->base
.ddc_bus
);
1630 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1631 * link between analog and digital outputs. So, if the regular SDVO
1632 * DDC fails, check to see if the analog output is disconnected, in
1633 * which case we'll look there for the digital DDC data.
1635 if (num_modes
== 0 &&
1636 intel_sdvo
->analog_ddc_bus
&&
1637 !intel_analog_is_connected(connector
->dev
)) {
1638 /* Switch to the analog ddc bus and try that
1640 (void) intel_ddc_get_modes(connector
, intel_sdvo
->analog_ddc_bus
);
1645 * Set of SDVO TV modes.
1646 * Note! This is in reply order (see loop in get_tv_modes).
1647 * XXX: all 60Hz refresh?
1649 struct drm_display_mode sdvo_tv_modes
[] = {
1650 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER
, 5815, 320, 321, 384,
1651 416, 0, 200, 201, 232, 233, 0,
1652 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1653 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER
, 6814, 320, 321, 384,
1654 416, 0, 240, 241, 272, 273, 0,
1655 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1656 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER
, 9910, 400, 401, 464,
1657 496, 0, 300, 301, 332, 333, 0,
1658 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1659 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER
, 16913, 640, 641, 704,
1660 736, 0, 350, 351, 382, 383, 0,
1661 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1662 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER
, 19121, 640, 641, 704,
1663 736, 0, 400, 401, 432, 433, 0,
1664 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1665 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 22654, 640, 641, 704,
1666 736, 0, 480, 481, 512, 513, 0,
1667 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1668 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER
, 24624, 704, 705, 768,
1669 800, 0, 480, 481, 512, 513, 0,
1670 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1671 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER
, 29232, 704, 705, 768,
1672 800, 0, 576, 577, 608, 609, 0,
1673 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1674 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER
, 18751, 720, 721, 784,
1675 816, 0, 350, 351, 382, 383, 0,
1676 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1677 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER
, 21199, 720, 721, 784,
1678 816, 0, 400, 401, 432, 433, 0,
1679 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1680 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER
, 25116, 720, 721, 784,
1681 816, 0, 480, 481, 512, 513, 0,
1682 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1683 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER
, 28054, 720, 721, 784,
1684 816, 0, 540, 541, 572, 573, 0,
1685 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1686 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER
, 29816, 720, 721, 784,
1687 816, 0, 576, 577, 608, 609, 0,
1688 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1689 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER
, 31570, 768, 769, 832,
1690 864, 0, 576, 577, 608, 609, 0,
1691 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1692 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 34030, 800, 801, 864,
1693 896, 0, 600, 601, 632, 633, 0,
1694 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1695 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER
, 36581, 832, 833, 896,
1696 928, 0, 624, 625, 656, 657, 0,
1697 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1698 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER
, 48707, 920, 921, 984,
1699 1016, 0, 766, 767, 798, 799, 0,
1700 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1701 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 53827, 1024, 1025, 1088,
1702 1120, 0, 768, 769, 800, 801, 0,
1703 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1704 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER
, 87265, 1280, 1281, 1344,
1705 1376, 0, 1024, 1025, 1056, 1057, 0,
1706 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1709 static void intel_sdvo_get_tv_modes(struct drm_connector
*connector
)
1711 struct drm_encoder
*encoder
= intel_attached_encoder(connector
);
1712 struct intel_sdvo
*intel_sdvo
= enc_to_intel_sdvo(encoder
);
1713 struct intel_sdvo_sdtv_resolution_request tv_res
;
1714 uint32_t reply
= 0, format_map
= 0;
1719 /* Read the list of supported input resolutions for the selected TV
1722 for (i
= 0; i
< TV_FORMAT_NUM
; i
++)
1723 if (tv_format_names
[i
] == intel_sdvo
->tv_format_name
)
1726 format_map
= (1 << i
);
1727 memcpy(&tv_res
, &format_map
,
1728 sizeof(struct intel_sdvo_sdtv_resolution_request
) >
1729 sizeof(format_map
) ? sizeof(format_map
) :
1730 sizeof(struct intel_sdvo_sdtv_resolution_request
));
1732 intel_sdvo_set_target_output(intel_sdvo
, intel_sdvo
->attached_output
);
1734 intel_sdvo_write_cmd(intel_sdvo
, SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT
,
1735 &tv_res
, sizeof(tv_res
));
1736 status
= intel_sdvo_read_response(intel_sdvo
, &reply
, 3);
1737 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
1740 for (i
= 0; i
< ARRAY_SIZE(sdvo_tv_modes
); i
++)
1741 if (reply
& (1 << i
)) {
1742 struct drm_display_mode
*nmode
;
1743 nmode
= drm_mode_duplicate(connector
->dev
,
1746 drm_mode_probed_add(connector
, nmode
);
1751 static void intel_sdvo_get_lvds_modes(struct drm_connector
*connector
)
1753 struct drm_encoder
*encoder
= intel_attached_encoder(connector
);
1754 struct intel_sdvo
*intel_sdvo
= enc_to_intel_sdvo(encoder
);
1755 struct drm_i915_private
*dev_priv
= connector
->dev
->dev_private
;
1756 struct drm_display_mode
*newmode
;
1759 * Attempt to get the mode list from DDC.
1760 * Assume that the preferred modes are
1761 * arranged in priority order.
1763 intel_ddc_get_modes(connector
, intel_sdvo
->base
.ddc_bus
);
1764 if (list_empty(&connector
->probed_modes
) == false)
1767 /* Fetch modes from VBT */
1768 if (dev_priv
->sdvo_lvds_vbt_mode
!= NULL
) {
1769 newmode
= drm_mode_duplicate(connector
->dev
,
1770 dev_priv
->sdvo_lvds_vbt_mode
);
1771 if (newmode
!= NULL
) {
1772 /* Guarantee the mode is preferred */
1773 newmode
->type
= (DRM_MODE_TYPE_PREFERRED
|
1774 DRM_MODE_TYPE_DRIVER
);
1775 drm_mode_probed_add(connector
, newmode
);
1780 list_for_each_entry(newmode
, &connector
->probed_modes
, head
) {
1781 if (newmode
->type
& DRM_MODE_TYPE_PREFERRED
) {
1782 intel_sdvo
->sdvo_lvds_fixed_mode
=
1783 drm_mode_duplicate(connector
->dev
, newmode
);
1790 static int intel_sdvo_get_modes(struct drm_connector
*connector
)
1792 struct intel_sdvo_connector
*intel_sdvo_connector
= to_intel_sdvo_connector(connector
);
1794 if (IS_TV(intel_sdvo_connector
))
1795 intel_sdvo_get_tv_modes(connector
);
1796 else if (IS_LVDS(intel_sdvo_connector
))
1797 intel_sdvo_get_lvds_modes(connector
);
1799 intel_sdvo_get_ddc_modes(connector
);
1801 if (list_empty(&connector
->probed_modes
))
1807 void intel_sdvo_destroy_enhance_property(struct drm_connector
*connector
)
1809 struct intel_sdvo_connector
*intel_sdvo_connector
= to_intel_sdvo_connector(connector
);
1810 struct drm_device
*dev
= connector
->dev
;
1812 if (IS_TV(intel_sdvo_connector
)) {
1813 if (intel_sdvo_connector
->left_property
)
1814 drm_property_destroy(dev
, intel_sdvo_connector
->left_property
);
1815 if (intel_sdvo_connector
->right_property
)
1816 drm_property_destroy(dev
, intel_sdvo_connector
->right_property
);
1817 if (intel_sdvo_connector
->top_property
)
1818 drm_property_destroy(dev
, intel_sdvo_connector
->top_property
);
1819 if (intel_sdvo_connector
->bottom_property
)
1820 drm_property_destroy(dev
, intel_sdvo_connector
->bottom_property
);
1821 if (intel_sdvo_connector
->hpos_property
)
1822 drm_property_destroy(dev
, intel_sdvo_connector
->hpos_property
);
1823 if (intel_sdvo_connector
->vpos_property
)
1824 drm_property_destroy(dev
, intel_sdvo_connector
->vpos_property
);
1825 if (intel_sdvo_connector
->saturation_property
)
1826 drm_property_destroy(dev
,
1827 intel_sdvo_connector
->saturation_property
);
1828 if (intel_sdvo_connector
->contrast_property
)
1829 drm_property_destroy(dev
,
1830 intel_sdvo_connector
->contrast_property
);
1831 if (intel_sdvo_connector
->hue_property
)
1832 drm_property_destroy(dev
, intel_sdvo_connector
->hue_property
);
1834 if (IS_TV(intel_sdvo_connector
) || IS_LVDS(intel_sdvo_connector
)) {
1835 if (intel_sdvo_connector
->brightness_property
)
1836 drm_property_destroy(dev
,
1837 intel_sdvo_connector
->brightness_property
);
1842 static void intel_sdvo_destroy(struct drm_connector
*connector
)
1844 struct intel_sdvo_connector
*intel_sdvo_connector
= to_intel_sdvo_connector(connector
);
1846 if (intel_sdvo_connector
->tv_format_property
)
1847 drm_property_destroy(connector
->dev
,
1848 intel_sdvo_connector
->tv_format_property
);
1850 intel_sdvo_destroy_enhance_property(connector
);
1851 drm_sysfs_connector_remove(connector
);
1852 drm_connector_cleanup(connector
);
1857 intel_sdvo_set_property(struct drm_connector
*connector
,
1858 struct drm_property
*property
,
1861 struct drm_encoder
*encoder
= intel_attached_encoder(connector
);
1862 struct intel_sdvo
*intel_sdvo
= enc_to_intel_sdvo(encoder
);
1863 struct intel_sdvo_connector
*intel_sdvo_connector
= to_intel_sdvo_connector(connector
);
1864 struct drm_crtc
*crtc
= encoder
->crtc
;
1866 bool changed
= false;
1867 uint8_t cmd
, status
;
1868 uint16_t temp_value
;
1870 ret
= drm_connector_property_set_value(connector
, property
, val
);
1874 if (property
== intel_sdvo_connector
->tv_format_property
) {
1875 if (val
>= TV_FORMAT_NUM
) {
1879 if (intel_sdvo
->tv_format_name
==
1880 intel_sdvo_connector
->tv_format_supported
[val
])
1883 intel_sdvo
->tv_format_name
= intel_sdvo_connector
->tv_format_supported
[val
];
1887 if (IS_TV(intel_sdvo_connector
) || IS_LVDS(intel_sdvo_connector
)) {
1890 if (intel_sdvo_connector
->left_property
== property
) {
1891 drm_connector_property_set_value(connector
,
1892 intel_sdvo_connector
->right_property
, val
);
1893 if (intel_sdvo_connector
->left_margin
== temp_value
)
1896 intel_sdvo_connector
->left_margin
= temp_value
;
1897 intel_sdvo_connector
->right_margin
= temp_value
;
1898 temp_value
= intel_sdvo_connector
->max_hscan
-
1899 intel_sdvo_connector
->left_margin
;
1900 cmd
= SDVO_CMD_SET_OVERSCAN_H
;
1901 } else if (intel_sdvo_connector
->right_property
== property
) {
1902 drm_connector_property_set_value(connector
,
1903 intel_sdvo_connector
->left_property
, val
);
1904 if (intel_sdvo_connector
->right_margin
== temp_value
)
1907 intel_sdvo_connector
->left_margin
= temp_value
;
1908 intel_sdvo_connector
->right_margin
= temp_value
;
1909 temp_value
= intel_sdvo_connector
->max_hscan
-
1910 intel_sdvo_connector
->left_margin
;
1911 cmd
= SDVO_CMD_SET_OVERSCAN_H
;
1912 } else if (intel_sdvo_connector
->top_property
== property
) {
1913 drm_connector_property_set_value(connector
,
1914 intel_sdvo_connector
->bottom_property
, val
);
1915 if (intel_sdvo_connector
->top_margin
== temp_value
)
1918 intel_sdvo_connector
->top_margin
= temp_value
;
1919 intel_sdvo_connector
->bottom_margin
= temp_value
;
1920 temp_value
= intel_sdvo_connector
->max_vscan
-
1921 intel_sdvo_connector
->top_margin
;
1922 cmd
= SDVO_CMD_SET_OVERSCAN_V
;
1923 } else if (intel_sdvo_connector
->bottom_property
== property
) {
1924 drm_connector_property_set_value(connector
,
1925 intel_sdvo_connector
->top_property
, val
);
1926 if (intel_sdvo_connector
->bottom_margin
== temp_value
)
1928 intel_sdvo_connector
->top_margin
= temp_value
;
1929 intel_sdvo_connector
->bottom_margin
= temp_value
;
1930 temp_value
= intel_sdvo_connector
->max_vscan
-
1931 intel_sdvo_connector
->top_margin
;
1932 cmd
= SDVO_CMD_SET_OVERSCAN_V
;
1933 } else if (intel_sdvo_connector
->hpos_property
== property
) {
1934 if (intel_sdvo_connector
->cur_hpos
== temp_value
)
1937 cmd
= SDVO_CMD_SET_POSITION_H
;
1938 intel_sdvo_connector
->cur_hpos
= temp_value
;
1939 } else if (intel_sdvo_connector
->vpos_property
== property
) {
1940 if (intel_sdvo_connector
->cur_vpos
== temp_value
)
1943 cmd
= SDVO_CMD_SET_POSITION_V
;
1944 intel_sdvo_connector
->cur_vpos
= temp_value
;
1945 } else if (intel_sdvo_connector
->saturation_property
== property
) {
1946 if (intel_sdvo_connector
->cur_saturation
== temp_value
)
1949 cmd
= SDVO_CMD_SET_SATURATION
;
1950 intel_sdvo_connector
->cur_saturation
= temp_value
;
1951 } else if (intel_sdvo_connector
->contrast_property
== property
) {
1952 if (intel_sdvo_connector
->cur_contrast
== temp_value
)
1955 cmd
= SDVO_CMD_SET_CONTRAST
;
1956 intel_sdvo_connector
->cur_contrast
= temp_value
;
1957 } else if (intel_sdvo_connector
->hue_property
== property
) {
1958 if (intel_sdvo_connector
->cur_hue
== temp_value
)
1961 cmd
= SDVO_CMD_SET_HUE
;
1962 intel_sdvo_connector
->cur_hue
= temp_value
;
1963 } else if (intel_sdvo_connector
->brightness_property
== property
) {
1964 if (intel_sdvo_connector
->cur_brightness
== temp_value
)
1967 cmd
= SDVO_CMD_SET_BRIGHTNESS
;
1968 intel_sdvo_connector
->cur_brightness
= temp_value
;
1971 intel_sdvo_write_cmd(intel_sdvo
, cmd
, &temp_value
, 2);
1972 status
= intel_sdvo_read_response(intel_sdvo
,
1974 if (status
!= SDVO_CMD_STATUS_SUCCESS
) {
1975 DRM_DEBUG_KMS("Incorrect SDVO command \n");
1981 if (changed
&& crtc
)
1982 drm_crtc_helper_set_mode(crtc
, &crtc
->mode
, crtc
->x
,
1988 static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs
= {
1989 .dpms
= intel_sdvo_dpms
,
1990 .mode_fixup
= intel_sdvo_mode_fixup
,
1991 .prepare
= intel_encoder_prepare
,
1992 .mode_set
= intel_sdvo_mode_set
,
1993 .commit
= intel_encoder_commit
,
1996 static const struct drm_connector_funcs intel_sdvo_connector_funcs
= {
1997 .dpms
= drm_helper_connector_dpms
,
1998 .detect
= intel_sdvo_detect
,
1999 .fill_modes
= drm_helper_probe_single_connector_modes
,
2000 .set_property
= intel_sdvo_set_property
,
2001 .destroy
= intel_sdvo_destroy
,
2004 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs
= {
2005 .get_modes
= intel_sdvo_get_modes
,
2006 .mode_valid
= intel_sdvo_mode_valid
,
2007 .best_encoder
= intel_attached_encoder
,
2010 static void intel_sdvo_enc_destroy(struct drm_encoder
*encoder
)
2012 struct intel_sdvo
*intel_sdvo
= enc_to_intel_sdvo(encoder
);
2014 if (intel_sdvo
->analog_ddc_bus
)
2015 intel_i2c_destroy(intel_sdvo
->analog_ddc_bus
);
2017 if (intel_sdvo
->sdvo_lvds_fixed_mode
!= NULL
)
2018 drm_mode_destroy(encoder
->dev
,
2019 intel_sdvo
->sdvo_lvds_fixed_mode
);
2021 intel_encoder_destroy(encoder
);
2024 static const struct drm_encoder_funcs intel_sdvo_enc_funcs
= {
2025 .destroy
= intel_sdvo_enc_destroy
,
2030 * Choose the appropriate DDC bus for control bus switch command for this
2031 * SDVO output based on the controlled output.
2033 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2034 * outputs, then LVDS outputs.
2037 intel_sdvo_select_ddc_bus(struct drm_i915_private
*dev_priv
,
2038 struct intel_sdvo
*sdvo
, u32 reg
)
2040 struct sdvo_device_mapping
*mapping
;
2043 mapping
= &(dev_priv
->sdvo_mappings
[0]);
2045 mapping
= &(dev_priv
->sdvo_mappings
[1]);
2047 sdvo
->ddc_bus
= 1 << ((mapping
->ddc_pin
& 0xf0) >> 4);
2051 intel_sdvo_get_digital_encoding_mode(struct intel_sdvo
*intel_sdvo
, int device
)
2056 intel_sdvo_set_target_output(intel_sdvo
, SDVO_OUTPUT_TMDS0
);
2058 intel_sdvo_set_target_output(intel_sdvo
, SDVO_OUTPUT_TMDS1
);
2060 intel_sdvo_write_cmd(intel_sdvo
, SDVO_CMD_GET_ENCODE
, NULL
, 0);
2061 status
= intel_sdvo_read_response(intel_sdvo
, &intel_sdvo
->is_hdmi
, 1);
2062 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
2067 static struct intel_sdvo
*
2068 intel_sdvo_chan_to_intel_sdvo(struct intel_i2c_chan
*chan
)
2070 struct drm_device
*dev
= chan
->drm_dev
;
2071 struct drm_encoder
*encoder
;
2073 list_for_each_entry(encoder
, &dev
->mode_config
.encoder_list
, head
) {
2074 struct intel_sdvo
*intel_sdvo
= enc_to_intel_sdvo(encoder
);
2075 if (intel_sdvo
->base
.ddc_bus
== &chan
->adapter
)
2082 static int intel_sdvo_master_xfer(struct i2c_adapter
*i2c_adap
,
2083 struct i2c_msg msgs
[], int num
)
2085 struct intel_sdvo
*intel_sdvo
;
2086 struct i2c_algo_bit_data
*algo_data
;
2087 const struct i2c_algorithm
*algo
;
2089 algo_data
= (struct i2c_algo_bit_data
*)i2c_adap
->algo_data
;
2091 intel_sdvo_chan_to_intel_sdvo((struct intel_i2c_chan
*)
2093 if (intel_sdvo
== NULL
)
2096 algo
= intel_sdvo
->base
.i2c_bus
->algo
;
2098 intel_sdvo_set_control_bus_switch(intel_sdvo
, intel_sdvo
->ddc_bus
);
2099 return algo
->master_xfer(i2c_adap
, msgs
, num
);
2102 static struct i2c_algorithm intel_sdvo_i2c_bit_algo
= {
2103 .master_xfer
= intel_sdvo_master_xfer
,
2107 intel_sdvo_get_slave_addr(struct drm_device
*dev
, int sdvo_reg
)
2109 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
2110 struct sdvo_device_mapping
*my_mapping
, *other_mapping
;
2112 if (IS_SDVOB(sdvo_reg
)) {
2113 my_mapping
= &dev_priv
->sdvo_mappings
[0];
2114 other_mapping
= &dev_priv
->sdvo_mappings
[1];
2116 my_mapping
= &dev_priv
->sdvo_mappings
[1];
2117 other_mapping
= &dev_priv
->sdvo_mappings
[0];
2120 /* If the BIOS described our SDVO device, take advantage of it. */
2121 if (my_mapping
->slave_addr
)
2122 return my_mapping
->slave_addr
;
2124 /* If the BIOS only described a different SDVO device, use the
2125 * address that it isn't using.
2127 if (other_mapping
->slave_addr
) {
2128 if (other_mapping
->slave_addr
== 0x70)
2134 /* No SDVO device info is found for another DVO port,
2135 * so use mapping assumption we had before BIOS parsing.
2137 if (IS_SDVOB(sdvo_reg
))
2144 intel_sdvo_connector_create (struct drm_encoder
*encoder
,
2145 struct drm_connector
*connector
)
2147 drm_connector_init(encoder
->dev
, connector
, &intel_sdvo_connector_funcs
,
2148 connector
->connector_type
);
2150 drm_connector_helper_add(connector
, &intel_sdvo_connector_helper_funcs
);
2152 connector
->interlace_allowed
= 0;
2153 connector
->doublescan_allowed
= 0;
2154 connector
->display_info
.subpixel_order
= SubPixelHorizontalRGB
;
2156 drm_mode_connector_attach_encoder(connector
, encoder
);
2157 drm_sysfs_connector_add(connector
);
2161 intel_sdvo_dvi_init(struct intel_sdvo
*intel_sdvo
, int device
)
2163 struct drm_encoder
*encoder
= &intel_sdvo
->base
.enc
;
2164 struct drm_connector
*connector
;
2165 struct intel_connector
*intel_connector
;
2166 struct intel_sdvo_connector
*intel_sdvo_connector
;
2168 intel_sdvo_connector
= kzalloc(sizeof(struct intel_sdvo_connector
), GFP_KERNEL
);
2169 if (!intel_sdvo_connector
)
2173 intel_sdvo
->controlled_output
|= SDVO_OUTPUT_TMDS0
;
2174 intel_sdvo_connector
->output_flag
= SDVO_OUTPUT_TMDS0
;
2175 } else if (device
== 1) {
2176 intel_sdvo
->controlled_output
|= SDVO_OUTPUT_TMDS1
;
2177 intel_sdvo_connector
->output_flag
= SDVO_OUTPUT_TMDS1
;
2180 intel_connector
= &intel_sdvo_connector
->base
;
2181 connector
= &intel_connector
->base
;
2182 connector
->polled
= DRM_CONNECTOR_POLL_CONNECT
| DRM_CONNECTOR_POLL_DISCONNECT
;
2183 encoder
->encoder_type
= DRM_MODE_ENCODER_TMDS
;
2184 connector
->connector_type
= DRM_MODE_CONNECTOR_DVID
;
2186 if (intel_sdvo_get_supp_encode(intel_sdvo
, &intel_sdvo
->encode
)
2187 && intel_sdvo_get_digital_encoding_mode(intel_sdvo
, device
)
2188 && intel_sdvo
->is_hdmi
) {
2189 /* enable hdmi encoding mode if supported */
2190 intel_sdvo_set_encode(intel_sdvo
, SDVO_ENCODE_HDMI
);
2191 intel_sdvo_set_colorimetry(intel_sdvo
,
2192 SDVO_COLORIMETRY_RGB256
);
2193 connector
->connector_type
= DRM_MODE_CONNECTOR_HDMIA
;
2195 intel_sdvo
->base
.clone_mask
= ((1 << INTEL_SDVO_NON_TV_CLONE_BIT
) |
2196 (1 << INTEL_ANALOG_CLONE_BIT
));
2198 intel_sdvo_connector_create(encoder
, connector
);
2204 intel_sdvo_tv_init(struct intel_sdvo
*intel_sdvo
, int type
)
2206 struct drm_encoder
*encoder
= &intel_sdvo
->base
.enc
;
2207 struct drm_connector
*connector
;
2208 struct intel_connector
*intel_connector
;
2209 struct intel_sdvo_connector
*intel_sdvo_connector
;
2211 intel_sdvo_connector
= kzalloc(sizeof(struct intel_sdvo_connector
), GFP_KERNEL
);
2212 if (!intel_sdvo_connector
)
2215 intel_connector
= &intel_sdvo_connector
->base
;
2216 connector
= &intel_connector
->base
;
2217 encoder
->encoder_type
= DRM_MODE_ENCODER_TVDAC
;
2218 connector
->connector_type
= DRM_MODE_CONNECTOR_SVIDEO
;
2220 intel_sdvo
->controlled_output
|= type
;
2221 intel_sdvo_connector
->output_flag
= type
;
2223 intel_sdvo
->is_tv
= true;
2224 intel_sdvo
->base
.needs_tv_clock
= true;
2225 intel_sdvo
->base
.clone_mask
= 1 << INTEL_SDVO_TV_CLONE_BIT
;
2227 intel_sdvo_connector_create(encoder
, connector
);
2229 intel_sdvo_tv_create_property(connector
, type
);
2231 intel_sdvo_create_enhance_property(connector
);
2237 intel_sdvo_analog_init(struct intel_sdvo
*intel_sdvo
, int device
)
2239 struct drm_encoder
*encoder
= &intel_sdvo
->base
.enc
;
2240 struct drm_connector
*connector
;
2241 struct intel_connector
*intel_connector
;
2242 struct intel_sdvo_connector
*intel_sdvo_connector
;
2244 intel_sdvo_connector
= kzalloc(sizeof(struct intel_sdvo_connector
), GFP_KERNEL
);
2245 if (!intel_sdvo_connector
)
2248 intel_connector
= &intel_sdvo_connector
->base
;
2249 connector
= &intel_connector
->base
;
2250 connector
->polled
= DRM_CONNECTOR_POLL_CONNECT
;
2251 encoder
->encoder_type
= DRM_MODE_ENCODER_DAC
;
2252 connector
->connector_type
= DRM_MODE_CONNECTOR_VGA
;
2255 intel_sdvo
->controlled_output
|= SDVO_OUTPUT_RGB0
;
2256 intel_sdvo_connector
->output_flag
= SDVO_OUTPUT_RGB0
;
2257 } else if (device
== 1) {
2258 intel_sdvo
->controlled_output
|= SDVO_OUTPUT_RGB1
;
2259 intel_sdvo_connector
->output_flag
= SDVO_OUTPUT_RGB1
;
2262 intel_sdvo
->base
.clone_mask
= ((1 << INTEL_SDVO_NON_TV_CLONE_BIT
) |
2263 (1 << INTEL_ANALOG_CLONE_BIT
));
2265 intel_sdvo_connector_create(encoder
, connector
);
2270 intel_sdvo_lvds_init(struct intel_sdvo
*intel_sdvo
, int device
)
2272 struct drm_encoder
*encoder
= &intel_sdvo
->base
.enc
;
2273 struct drm_connector
*connector
;
2274 struct intel_connector
*intel_connector
;
2275 struct intel_sdvo_connector
*intel_sdvo_connector
;
2277 intel_sdvo_connector
= kzalloc(sizeof(struct intel_sdvo_connector
), GFP_KERNEL
);
2278 if (!intel_sdvo_connector
)
2281 intel_connector
= &intel_sdvo_connector
->base
;
2282 connector
= &intel_connector
->base
;
2283 encoder
->encoder_type
= DRM_MODE_ENCODER_LVDS
;
2284 connector
->connector_type
= DRM_MODE_CONNECTOR_LVDS
;
2286 intel_sdvo
->is_lvds
= true;
2289 intel_sdvo
->controlled_output
|= SDVO_OUTPUT_LVDS0
;
2290 intel_sdvo_connector
->output_flag
= SDVO_OUTPUT_LVDS0
;
2291 } else if (device
== 1) {
2292 intel_sdvo
->controlled_output
|= SDVO_OUTPUT_LVDS1
;
2293 intel_sdvo_connector
->output_flag
= SDVO_OUTPUT_LVDS1
;
2296 intel_sdvo
->base
.clone_mask
= ((1 << INTEL_ANALOG_CLONE_BIT
) |
2297 (1 << INTEL_SDVO_LVDS_CLONE_BIT
));
2299 intel_sdvo_connector_create(encoder
, connector
);
2300 intel_sdvo_create_enhance_property(connector
);
2305 intel_sdvo_output_setup(struct intel_sdvo
*intel_sdvo
, uint16_t flags
)
2307 intel_sdvo
->is_tv
= false;
2308 intel_sdvo
->base
.needs_tv_clock
= false;
2309 intel_sdvo
->is_lvds
= false;
2311 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2313 if (flags
& SDVO_OUTPUT_TMDS0
)
2314 if (!intel_sdvo_dvi_init(intel_sdvo
, 0))
2317 if ((flags
& SDVO_TMDS_MASK
) == SDVO_TMDS_MASK
)
2318 if (!intel_sdvo_dvi_init(intel_sdvo
, 1))
2321 /* TV has no XXX1 function block */
2322 if (flags
& SDVO_OUTPUT_SVID0
)
2323 if (!intel_sdvo_tv_init(intel_sdvo
, SDVO_OUTPUT_SVID0
))
2326 if (flags
& SDVO_OUTPUT_CVBS0
)
2327 if (!intel_sdvo_tv_init(intel_sdvo
, SDVO_OUTPUT_CVBS0
))
2330 if (flags
& SDVO_OUTPUT_RGB0
)
2331 if (!intel_sdvo_analog_init(intel_sdvo
, 0))
2334 if ((flags
& SDVO_RGB_MASK
) == SDVO_RGB_MASK
)
2335 if (!intel_sdvo_analog_init(intel_sdvo
, 1))
2338 if (flags
& SDVO_OUTPUT_LVDS0
)
2339 if (!intel_sdvo_lvds_init(intel_sdvo
, 0))
2342 if ((flags
& SDVO_LVDS_MASK
) == SDVO_LVDS_MASK
)
2343 if (!intel_sdvo_lvds_init(intel_sdvo
, 1))
2346 if ((flags
& SDVO_OUTPUT_MASK
) == 0) {
2347 unsigned char bytes
[2];
2349 intel_sdvo
->controlled_output
= 0;
2350 memcpy(bytes
, &intel_sdvo
->caps
.output_flags
, 2);
2351 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2352 SDVO_NAME(intel_sdvo
),
2353 bytes
[0], bytes
[1]);
2356 intel_sdvo
->base
.crtc_mask
= (1 << 0) | (1 << 1);
2361 static void intel_sdvo_tv_create_property(struct drm_connector
*connector
, int type
)
2363 struct drm_encoder
*encoder
= intel_attached_encoder(connector
);
2364 struct intel_sdvo
*intel_sdvo
= enc_to_intel_sdvo(encoder
);
2365 struct intel_sdvo_connector
*intel_sdvo_connector
= to_intel_sdvo_connector(connector
);
2366 struct intel_sdvo_tv_format format
;
2367 uint32_t format_map
, i
;
2370 intel_sdvo_set_target_output(intel_sdvo
, type
);
2372 intel_sdvo_write_cmd(intel_sdvo
,
2373 SDVO_CMD_GET_SUPPORTED_TV_FORMATS
, NULL
, 0);
2374 status
= intel_sdvo_read_response(intel_sdvo
,
2375 &format
, sizeof(format
));
2376 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
2379 memcpy(&format_map
, &format
, sizeof(format
) > sizeof(format_map
) ?
2380 sizeof(format_map
) : sizeof(format
));
2382 if (format_map
== 0)
2385 intel_sdvo_connector
->format_supported_num
= 0;
2386 for (i
= 0 ; i
< TV_FORMAT_NUM
; i
++)
2387 if (format_map
& (1 << i
)) {
2388 intel_sdvo_connector
->tv_format_supported
2389 [intel_sdvo_connector
->format_supported_num
++] =
2394 intel_sdvo_connector
->tv_format_property
=
2395 drm_property_create(
2396 connector
->dev
, DRM_MODE_PROP_ENUM
,
2397 "mode", intel_sdvo_connector
->format_supported_num
);
2399 for (i
= 0; i
< intel_sdvo_connector
->format_supported_num
; i
++)
2400 drm_property_add_enum(
2401 intel_sdvo_connector
->tv_format_property
, i
,
2402 i
, intel_sdvo_connector
->tv_format_supported
[i
]);
2404 intel_sdvo
->tv_format_name
= intel_sdvo_connector
->tv_format_supported
[0];
2405 drm_connector_attach_property(
2406 connector
, intel_sdvo_connector
->tv_format_property
, 0);
2410 static void intel_sdvo_create_enhance_property(struct drm_connector
*connector
)
2412 struct drm_encoder
*encoder
= intel_attached_encoder(connector
);
2413 struct intel_sdvo
*intel_sdvo
= enc_to_intel_sdvo(encoder
);
2414 struct intel_sdvo_connector
*intel_sdvo_connector
= to_intel_sdvo_connector(connector
);
2415 struct intel_sdvo_enhancements_reply sdvo_data
;
2416 struct drm_device
*dev
= connector
->dev
;
2418 uint16_t response
, data_value
[2];
2420 intel_sdvo_write_cmd(intel_sdvo
, SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS
,
2422 status
= intel_sdvo_read_response(intel_sdvo
, &sdvo_data
,
2424 if (status
!= SDVO_CMD_STATUS_SUCCESS
) {
2425 DRM_DEBUG_KMS(" incorrect response is returned\n");
2428 response
= *((uint16_t *)&sdvo_data
);
2430 DRM_DEBUG_KMS("No enhancement is supported\n");
2433 if (IS_TV(intel_sdvo_connector
)) {
2434 /* when horizontal overscan is supported, Add the left/right
2437 if (sdvo_data
.overscan_h
) {
2438 intel_sdvo_write_cmd(intel_sdvo
,
2439 SDVO_CMD_GET_MAX_OVERSCAN_H
, NULL
, 0);
2440 status
= intel_sdvo_read_response(intel_sdvo
,
2442 if (status
!= SDVO_CMD_STATUS_SUCCESS
) {
2443 DRM_DEBUG_KMS("Incorrect SDVO max "
2447 intel_sdvo_write_cmd(intel_sdvo
,
2448 SDVO_CMD_GET_OVERSCAN_H
, NULL
, 0);
2449 status
= intel_sdvo_read_response(intel_sdvo
,
2451 if (status
!= SDVO_CMD_STATUS_SUCCESS
) {
2452 DRM_DEBUG_KMS("Incorrect SDVO h_overscan\n");
2455 intel_sdvo_connector
->max_hscan
= data_value
[0];
2456 intel_sdvo_connector
->left_margin
= data_value
[0] - response
;
2457 intel_sdvo_connector
->right_margin
= intel_sdvo_connector
->left_margin
;
2458 intel_sdvo_connector
->left_property
=
2459 drm_property_create(dev
, DRM_MODE_PROP_RANGE
,
2461 intel_sdvo_connector
->left_property
->values
[0] = 0;
2462 intel_sdvo_connector
->left_property
->values
[1] = data_value
[0];
2463 drm_connector_attach_property(connector
,
2464 intel_sdvo_connector
->left_property
,
2465 intel_sdvo_connector
->left_margin
);
2466 intel_sdvo_connector
->right_property
=
2467 drm_property_create(dev
, DRM_MODE_PROP_RANGE
,
2469 intel_sdvo_connector
->right_property
->values
[0] = 0;
2470 intel_sdvo_connector
->right_property
->values
[1] = data_value
[0];
2471 drm_connector_attach_property(connector
,
2472 intel_sdvo_connector
->right_property
,
2473 intel_sdvo_connector
->right_margin
);
2474 DRM_DEBUG_KMS("h_overscan: max %d, "
2475 "default %d, current %d\n",
2476 data_value
[0], data_value
[1], response
);
2478 if (sdvo_data
.overscan_v
) {
2479 intel_sdvo_write_cmd(intel_sdvo
,
2480 SDVO_CMD_GET_MAX_OVERSCAN_V
, NULL
, 0);
2481 status
= intel_sdvo_read_response(intel_sdvo
,
2483 if (status
!= SDVO_CMD_STATUS_SUCCESS
) {
2484 DRM_DEBUG_KMS("Incorrect SDVO max "
2488 intel_sdvo_write_cmd(intel_sdvo
,
2489 SDVO_CMD_GET_OVERSCAN_V
, NULL
, 0);
2490 status
= intel_sdvo_read_response(intel_sdvo
,
2492 if (status
!= SDVO_CMD_STATUS_SUCCESS
) {
2493 DRM_DEBUG_KMS("Incorrect SDVO v_overscan\n");
2496 intel_sdvo_connector
->max_vscan
= data_value
[0];
2497 intel_sdvo_connector
->top_margin
= data_value
[0] - response
;
2498 intel_sdvo_connector
->bottom_margin
= intel_sdvo_connector
->top_margin
;
2499 intel_sdvo_connector
->top_property
=
2500 drm_property_create(dev
, DRM_MODE_PROP_RANGE
,
2502 intel_sdvo_connector
->top_property
->values
[0] = 0;
2503 intel_sdvo_connector
->top_property
->values
[1] = data_value
[0];
2504 drm_connector_attach_property(connector
,
2505 intel_sdvo_connector
->top_property
,
2506 intel_sdvo_connector
->top_margin
);
2507 intel_sdvo_connector
->bottom_property
=
2508 drm_property_create(dev
, DRM_MODE_PROP_RANGE
,
2509 "bottom_margin", 2);
2510 intel_sdvo_connector
->bottom_property
->values
[0] = 0;
2511 intel_sdvo_connector
->bottom_property
->values
[1] = data_value
[0];
2512 drm_connector_attach_property(connector
,
2513 intel_sdvo_connector
->bottom_property
,
2514 intel_sdvo_connector
->bottom_margin
);
2515 DRM_DEBUG_KMS("v_overscan: max %d, "
2516 "default %d, current %d\n",
2517 data_value
[0], data_value
[1], response
);
2519 if (sdvo_data
.position_h
) {
2520 intel_sdvo_write_cmd(intel_sdvo
,
2521 SDVO_CMD_GET_MAX_POSITION_H
, NULL
, 0);
2522 status
= intel_sdvo_read_response(intel_sdvo
,
2524 if (status
!= SDVO_CMD_STATUS_SUCCESS
) {
2525 DRM_DEBUG_KMS("Incorrect SDVO Max h_pos\n");
2528 intel_sdvo_write_cmd(intel_sdvo
,
2529 SDVO_CMD_GET_POSITION_H
, NULL
, 0);
2530 status
= intel_sdvo_read_response(intel_sdvo
,
2532 if (status
!= SDVO_CMD_STATUS_SUCCESS
) {
2533 DRM_DEBUG_KMS("Incorrect SDVO get h_postion\n");
2536 intel_sdvo_connector
->max_hpos
= data_value
[0];
2537 intel_sdvo_connector
->cur_hpos
= response
;
2538 intel_sdvo_connector
->hpos_property
=
2539 drm_property_create(dev
, DRM_MODE_PROP_RANGE
,
2541 intel_sdvo_connector
->hpos_property
->values
[0] = 0;
2542 intel_sdvo_connector
->hpos_property
->values
[1] = data_value
[0];
2543 drm_connector_attach_property(connector
,
2544 intel_sdvo_connector
->hpos_property
,
2545 intel_sdvo_connector
->cur_hpos
);
2546 DRM_DEBUG_KMS("h_position: max %d, "
2547 "default %d, current %d\n",
2548 data_value
[0], data_value
[1], response
);
2550 if (sdvo_data
.position_v
) {
2551 intel_sdvo_write_cmd(intel_sdvo
,
2552 SDVO_CMD_GET_MAX_POSITION_V
, NULL
, 0);
2553 status
= intel_sdvo_read_response(intel_sdvo
,
2555 if (status
!= SDVO_CMD_STATUS_SUCCESS
) {
2556 DRM_DEBUG_KMS("Incorrect SDVO Max v_pos\n");
2559 intel_sdvo_write_cmd(intel_sdvo
,
2560 SDVO_CMD_GET_POSITION_V
, NULL
, 0);
2561 status
= intel_sdvo_read_response(intel_sdvo
,
2563 if (status
!= SDVO_CMD_STATUS_SUCCESS
) {
2564 DRM_DEBUG_KMS("Incorrect SDVO get v_postion\n");
2567 intel_sdvo_connector
->max_vpos
= data_value
[0];
2568 intel_sdvo_connector
->cur_vpos
= response
;
2569 intel_sdvo_connector
->vpos_property
=
2570 drm_property_create(dev
, DRM_MODE_PROP_RANGE
,
2572 intel_sdvo_connector
->vpos_property
->values
[0] = 0;
2573 intel_sdvo_connector
->vpos_property
->values
[1] = data_value
[0];
2574 drm_connector_attach_property(connector
,
2575 intel_sdvo_connector
->vpos_property
,
2576 intel_sdvo_connector
->cur_vpos
);
2577 DRM_DEBUG_KMS("v_position: max %d, "
2578 "default %d, current %d\n",
2579 data_value
[0], data_value
[1], response
);
2581 if (sdvo_data
.saturation
) {
2582 intel_sdvo_write_cmd(intel_sdvo
,
2583 SDVO_CMD_GET_MAX_SATURATION
, NULL
, 0);
2584 status
= intel_sdvo_read_response(intel_sdvo
,
2586 if (status
!= SDVO_CMD_STATUS_SUCCESS
) {
2587 DRM_DEBUG_KMS("Incorrect SDVO Max sat\n");
2590 intel_sdvo_write_cmd(intel_sdvo
,
2591 SDVO_CMD_GET_SATURATION
, NULL
, 0);
2592 status
= intel_sdvo_read_response(intel_sdvo
,
2594 if (status
!= SDVO_CMD_STATUS_SUCCESS
) {
2595 DRM_DEBUG_KMS("Incorrect SDVO get sat\n");
2598 intel_sdvo_connector
->max_saturation
= data_value
[0];
2599 intel_sdvo_connector
->cur_saturation
= response
;
2600 intel_sdvo_connector
->saturation_property
=
2601 drm_property_create(dev
, DRM_MODE_PROP_RANGE
,
2603 intel_sdvo_connector
->saturation_property
->values
[0] = 0;
2604 intel_sdvo_connector
->saturation_property
->values
[1] =
2606 drm_connector_attach_property(connector
,
2607 intel_sdvo_connector
->saturation_property
,
2608 intel_sdvo_connector
->cur_saturation
);
2609 DRM_DEBUG_KMS("saturation: max %d, "
2610 "default %d, current %d\n",
2611 data_value
[0], data_value
[1], response
);
2613 if (sdvo_data
.contrast
) {
2614 intel_sdvo_write_cmd(intel_sdvo
,
2615 SDVO_CMD_GET_MAX_CONTRAST
, NULL
, 0);
2616 status
= intel_sdvo_read_response(intel_sdvo
,
2618 if (status
!= SDVO_CMD_STATUS_SUCCESS
) {
2619 DRM_DEBUG_KMS("Incorrect SDVO Max contrast\n");
2622 intel_sdvo_write_cmd(intel_sdvo
,
2623 SDVO_CMD_GET_CONTRAST
, NULL
, 0);
2624 status
= intel_sdvo_read_response(intel_sdvo
,
2626 if (status
!= SDVO_CMD_STATUS_SUCCESS
) {
2627 DRM_DEBUG_KMS("Incorrect SDVO get contrast\n");
2630 intel_sdvo_connector
->max_contrast
= data_value
[0];
2631 intel_sdvo_connector
->cur_contrast
= response
;
2632 intel_sdvo_connector
->contrast_property
=
2633 drm_property_create(dev
, DRM_MODE_PROP_RANGE
,
2635 intel_sdvo_connector
->contrast_property
->values
[0] = 0;
2636 intel_sdvo_connector
->contrast_property
->values
[1] = data_value
[0];
2637 drm_connector_attach_property(connector
,
2638 intel_sdvo_connector
->contrast_property
,
2639 intel_sdvo_connector
->cur_contrast
);
2640 DRM_DEBUG_KMS("contrast: max %d, "
2641 "default %d, current %d\n",
2642 data_value
[0], data_value
[1], response
);
2644 if (sdvo_data
.hue
) {
2645 intel_sdvo_write_cmd(intel_sdvo
,
2646 SDVO_CMD_GET_MAX_HUE
, NULL
, 0);
2647 status
= intel_sdvo_read_response(intel_sdvo
,
2649 if (status
!= SDVO_CMD_STATUS_SUCCESS
) {
2650 DRM_DEBUG_KMS("Incorrect SDVO Max hue\n");
2653 intel_sdvo_write_cmd(intel_sdvo
,
2654 SDVO_CMD_GET_HUE
, NULL
, 0);
2655 status
= intel_sdvo_read_response(intel_sdvo
,
2657 if (status
!= SDVO_CMD_STATUS_SUCCESS
) {
2658 DRM_DEBUG_KMS("Incorrect SDVO get hue\n");
2661 intel_sdvo_connector
->max_hue
= data_value
[0];
2662 intel_sdvo_connector
->cur_hue
= response
;
2663 intel_sdvo_connector
->hue_property
=
2664 drm_property_create(dev
, DRM_MODE_PROP_RANGE
,
2666 intel_sdvo_connector
->hue_property
->values
[0] = 0;
2667 intel_sdvo_connector
->hue_property
->values
[1] =
2669 drm_connector_attach_property(connector
,
2670 intel_sdvo_connector
->hue_property
,
2671 intel_sdvo_connector
->cur_hue
);
2672 DRM_DEBUG_KMS("hue: max %d, default %d, current %d\n",
2673 data_value
[0], data_value
[1], response
);
2676 if (IS_TV(intel_sdvo_connector
) || IS_LVDS(intel_sdvo_connector
)) {
2677 if (sdvo_data
.brightness
) {
2678 intel_sdvo_write_cmd(intel_sdvo
,
2679 SDVO_CMD_GET_MAX_BRIGHTNESS
, NULL
, 0);
2680 status
= intel_sdvo_read_response(intel_sdvo
,
2682 if (status
!= SDVO_CMD_STATUS_SUCCESS
) {
2683 DRM_DEBUG_KMS("Incorrect SDVO Max bright\n");
2686 intel_sdvo_write_cmd(intel_sdvo
,
2687 SDVO_CMD_GET_BRIGHTNESS
, NULL
, 0);
2688 status
= intel_sdvo_read_response(intel_sdvo
,
2690 if (status
!= SDVO_CMD_STATUS_SUCCESS
) {
2691 DRM_DEBUG_KMS("Incorrect SDVO get brigh\n");
2694 intel_sdvo_connector
->max_brightness
= data_value
[0];
2695 intel_sdvo_connector
->cur_brightness
= response
;
2696 intel_sdvo_connector
->brightness_property
=
2697 drm_property_create(dev
, DRM_MODE_PROP_RANGE
,
2699 intel_sdvo_connector
->brightness_property
->values
[0] = 0;
2700 intel_sdvo_connector
->brightness_property
->values
[1] =
2702 drm_connector_attach_property(connector
,
2703 intel_sdvo_connector
->brightness_property
,
2704 intel_sdvo_connector
->cur_brightness
);
2705 DRM_DEBUG_KMS("brightness: max %d, "
2706 "default %d, current %d\n",
2707 data_value
[0], data_value
[1], response
);
2713 bool intel_sdvo_init(struct drm_device
*dev
, int sdvo_reg
)
2715 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
2716 struct intel_encoder
*intel_encoder
;
2717 struct intel_sdvo
*intel_sdvo
;
2720 u32 i2c_reg
, ddc_reg
, analog_ddc_reg
;
2722 intel_sdvo
= kzalloc(sizeof(struct intel_sdvo
), GFP_KERNEL
);
2726 intel_sdvo
->sdvo_reg
= sdvo_reg
;
2728 intel_encoder
= &intel_sdvo
->base
;
2729 intel_encoder
->type
= INTEL_OUTPUT_SDVO
;
2731 if (HAS_PCH_SPLIT(dev
)) {
2732 i2c_reg
= PCH_GPIOE
;
2733 ddc_reg
= PCH_GPIOE
;
2734 analog_ddc_reg
= PCH_GPIOA
;
2738 analog_ddc_reg
= GPIOA
;
2741 /* setup the DDC bus. */
2742 if (IS_SDVOB(sdvo_reg
))
2743 intel_encoder
->i2c_bus
= intel_i2c_create(dev
, i2c_reg
, "SDVOCTRL_E for SDVOB");
2745 intel_encoder
->i2c_bus
= intel_i2c_create(dev
, i2c_reg
, "SDVOCTRL_E for SDVOC");
2747 if (!intel_encoder
->i2c_bus
)
2748 goto err_inteloutput
;
2750 intel_sdvo
->slave_addr
= intel_sdvo_get_slave_addr(dev
, sdvo_reg
);
2752 /* Save the bit-banging i2c functionality for use by the DDC wrapper */
2753 intel_sdvo_i2c_bit_algo
.functionality
= intel_encoder
->i2c_bus
->algo
->functionality
;
2755 /* Read the regs to test if we can talk to the device */
2756 for (i
= 0; i
< 0x40; i
++) {
2757 if (!intel_sdvo_read_byte(intel_sdvo
, i
, &ch
[i
])) {
2758 DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
2759 IS_SDVOB(sdvo_reg
) ? 'B' : 'C');
2764 /* setup the DDC bus. */
2765 if (IS_SDVOB(sdvo_reg
)) {
2766 intel_encoder
->ddc_bus
= intel_i2c_create(dev
, ddc_reg
, "SDVOB DDC BUS");
2767 intel_sdvo
->analog_ddc_bus
= intel_i2c_create(dev
, analog_ddc_reg
,
2768 "SDVOB/VGA DDC BUS");
2769 dev_priv
->hotplug_supported_mask
|= SDVOB_HOTPLUG_INT_STATUS
;
2771 intel_encoder
->ddc_bus
= intel_i2c_create(dev
, ddc_reg
, "SDVOC DDC BUS");
2772 intel_sdvo
->analog_ddc_bus
= intel_i2c_create(dev
, analog_ddc_reg
,
2773 "SDVOC/VGA DDC BUS");
2774 dev_priv
->hotplug_supported_mask
|= SDVOC_HOTPLUG_INT_STATUS
;
2777 if (intel_encoder
->ddc_bus
== NULL
)
2780 /* Wrap with our custom algo which switches to DDC mode */
2781 intel_encoder
->ddc_bus
->algo
= &intel_sdvo_i2c_bit_algo
;
2783 /* encoder type will be decided later */
2784 drm_encoder_init(dev
, &intel_encoder
->enc
, &intel_sdvo_enc_funcs
, 0);
2785 drm_encoder_helper_add(&intel_encoder
->enc
, &intel_sdvo_helper_funcs
);
2787 /* In default case sdvo lvds is false */
2788 intel_sdvo_get_capabilities(intel_sdvo
, &intel_sdvo
->caps
);
2790 if (intel_sdvo_output_setup(intel_sdvo
,
2791 intel_sdvo
->caps
.output_flags
) != true) {
2792 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
2793 IS_SDVOB(sdvo_reg
) ? 'B' : 'C');
2797 intel_sdvo_select_ddc_bus(dev_priv
, intel_sdvo
, sdvo_reg
);
2799 /* Set the input timing to the screen. Assume always input 0. */
2800 intel_sdvo_set_target_input(intel_sdvo
, true, false);
2802 intel_sdvo_get_input_pixel_clock_range(intel_sdvo
,
2803 &intel_sdvo
->pixel_clock_min
,
2804 &intel_sdvo
->pixel_clock_max
);
2807 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2808 "clock range %dMHz - %dMHz, "
2809 "input 1: %c, input 2: %c, "
2810 "output 1: %c, output 2: %c\n",
2811 SDVO_NAME(intel_sdvo
),
2812 intel_sdvo
->caps
.vendor_id
, intel_sdvo
->caps
.device_id
,
2813 intel_sdvo
->caps
.device_rev_id
,
2814 intel_sdvo
->pixel_clock_min
/ 1000,
2815 intel_sdvo
->pixel_clock_max
/ 1000,
2816 (intel_sdvo
->caps
.sdvo_inputs_mask
& 0x1) ? 'Y' : 'N',
2817 (intel_sdvo
->caps
.sdvo_inputs_mask
& 0x2) ? 'Y' : 'N',
2818 /* check currently supported outputs */
2819 intel_sdvo
->caps
.output_flags
&
2820 (SDVO_OUTPUT_TMDS0
| SDVO_OUTPUT_RGB0
) ? 'Y' : 'N',
2821 intel_sdvo
->caps
.output_flags
&
2822 (SDVO_OUTPUT_TMDS1
| SDVO_OUTPUT_RGB1
) ? 'Y' : 'N');
2827 if (intel_sdvo
->analog_ddc_bus
!= NULL
)
2828 intel_i2c_destroy(intel_sdvo
->analog_ddc_bus
);
2829 if (intel_encoder
->ddc_bus
!= NULL
)
2830 intel_i2c_destroy(intel_encoder
->ddc_bus
);
2831 if (intel_encoder
->i2c_bus
!= NULL
)
2832 intel_i2c_destroy(intel_encoder
->i2c_bus
);