1 /***************************************************************************
3 * Copyright (C) 2004-2008 SMSC
4 * Copyright (C) 2005-2008 ARM
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 ***************************************************************************
21 * Rewritten, heavily based on smsc911x simple driver by SMSC.
22 * Partly uses io macros from smc91x.c by Nicolas Pitre
25 * LAN9115, LAN9116, LAN9117, LAN9118
26 * LAN9215, LAN9216, LAN9217, LAN9218
32 #include <linux/crc32.h>
33 #include <linux/delay.h>
34 #include <linux/errno.h>
35 #include <linux/etherdevice.h>
36 #include <linux/ethtool.h>
37 #include <linux/init.h>
38 #include <linux/ioport.h>
39 #include <linux/kernel.h>
40 #include <linux/module.h>
41 #include <linux/netdevice.h>
42 #include <linux/platform_device.h>
43 #include <linux/sched.h>
44 #include <linux/slab.h>
45 #include <linux/timer.h>
46 #include <linux/version.h>
47 #include <linux/bug.h>
48 #include <linux/bitops.h>
49 #include <linux/irq.h>
51 #include <linux/phy.h>
52 #include <linux/smsc911x.h>
55 #define SMSC_CHIPNAME "smsc911x"
56 #define SMSC_MDIONAME "smsc911x-mdio"
57 #define SMSC_DRV_VERSION "2008-10-21"
59 MODULE_LICENSE("GPL");
60 MODULE_VERSION(SMSC_DRV_VERSION
);
63 static int debug
= 16;
68 module_param(debug
, int, 0);
69 MODULE_PARM_DESC(debug
, "Debug level (0=none,...,16=all)");
71 struct smsc911x_data
{
76 /* used to decide which workarounds apply */
77 unsigned int generation
;
79 /* device configuration (copied from platform_data during probe) */
80 struct smsc911x_platform_config config
;
82 /* This needs to be acquired before calling any of below:
83 * smsc911x_mac_read(), smsc911x_mac_write()
87 /* spinlock to ensure 16-bit accesses are serialised.
88 * unused with a 32-bit bus */
91 struct phy_device
*phy_dev
;
92 struct mii_bus
*mii_bus
;
93 int phy_irq
[PHY_MAX_ADDR
];
94 unsigned int using_extphy
;
99 unsigned int gpio_setting
;
100 unsigned int gpio_orig_setting
;
101 struct net_device
*dev
;
102 struct napi_struct napi
;
104 unsigned int software_irq_signal
;
106 #ifdef USE_PHY_WORK_AROUND
107 #define MIN_PACKET_SIZE (64)
108 char loopback_tx_pkt
[MIN_PACKET_SIZE
];
109 char loopback_rx_pkt
[MIN_PACKET_SIZE
];
110 unsigned int resetcount
;
113 /* Members for Multicast filter workaround */
114 unsigned int multicast_update_pending
;
115 unsigned int set_bits_mask
;
116 unsigned int clear_bits_mask
;
121 /* The 16-bit access functions are significantly slower, due to the locking
122 * necessary. If your bus hardware can be configured to do this for you
123 * (in response to a single 32-bit operation from software), you should use
124 * the 32-bit access functions instead. */
126 static inline u32
smsc911x_reg_read(struct smsc911x_data
*pdata
, u32 reg
)
128 if (pdata
->config
.flags
& SMSC911X_USE_32BIT
)
129 return readl(pdata
->ioaddr
+ reg
);
131 if (pdata
->config
.flags
& SMSC911X_USE_16BIT
) {
135 /* these two 16-bit reads must be performed consecutively, so
136 * must not be interrupted by our own ISR (which would start
137 * another read operation) */
138 spin_lock_irqsave(&pdata
->dev_lock
, flags
);
139 data
= ((readw(pdata
->ioaddr
+ reg
) & 0xFFFF) |
140 ((readw(pdata
->ioaddr
+ reg
+ 2) & 0xFFFF) << 16));
141 spin_unlock_irqrestore(&pdata
->dev_lock
, flags
);
150 static inline void smsc911x_reg_write(struct smsc911x_data
*pdata
, u32 reg
,
153 if (pdata
->config
.flags
& SMSC911X_USE_32BIT
) {
154 writel(val
, pdata
->ioaddr
+ reg
);
158 if (pdata
->config
.flags
& SMSC911X_USE_16BIT
) {
161 /* these two 16-bit writes must be performed consecutively, so
162 * must not be interrupted by our own ISR (which would start
163 * another read operation) */
164 spin_lock_irqsave(&pdata
->dev_lock
, flags
);
165 writew(val
& 0xFFFF, pdata
->ioaddr
+ reg
);
166 writew((val
>> 16) & 0xFFFF, pdata
->ioaddr
+ reg
+ 2);
167 spin_unlock_irqrestore(&pdata
->dev_lock
, flags
);
174 /* Writes a packet to the TX_DATA_FIFO */
176 smsc911x_tx_writefifo(struct smsc911x_data
*pdata
, unsigned int *buf
,
177 unsigned int wordcount
)
179 if (pdata
->config
.flags
& SMSC911X_USE_32BIT
) {
180 writesl(pdata
->ioaddr
+ TX_DATA_FIFO
, buf
, wordcount
);
184 if (pdata
->config
.flags
& SMSC911X_USE_16BIT
) {
186 smsc911x_reg_write(pdata
, TX_DATA_FIFO
, *buf
++);
193 /* Reads a packet out of the RX_DATA_FIFO */
195 smsc911x_rx_readfifo(struct smsc911x_data
*pdata
, unsigned int *buf
,
196 unsigned int wordcount
)
198 if (pdata
->config
.flags
& SMSC911X_USE_32BIT
) {
199 readsl(pdata
->ioaddr
+ RX_DATA_FIFO
, buf
, wordcount
);
203 if (pdata
->config
.flags
& SMSC911X_USE_16BIT
) {
205 *buf
++ = smsc911x_reg_read(pdata
, RX_DATA_FIFO
);
212 /* waits for MAC not busy, with timeout. Only called by smsc911x_mac_read
213 * and smsc911x_mac_write, so assumes mac_lock is held */
214 static int smsc911x_mac_complete(struct smsc911x_data
*pdata
)
219 SMSC_ASSERT_MAC_LOCK(pdata
);
221 for (i
= 0; i
< 40; i
++) {
222 val
= smsc911x_reg_read(pdata
, MAC_CSR_CMD
);
223 if (!(val
& MAC_CSR_CMD_CSR_BUSY_
))
226 SMSC_WARNING(HW
, "Timed out waiting for MAC not BUSY. "
227 "MAC_CSR_CMD: 0x%08X", val
);
231 /* Fetches a MAC register value. Assumes mac_lock is acquired */
232 static u32
smsc911x_mac_read(struct smsc911x_data
*pdata
, unsigned int offset
)
236 SMSC_ASSERT_MAC_LOCK(pdata
);
238 temp
= smsc911x_reg_read(pdata
, MAC_CSR_CMD
);
239 if (unlikely(temp
& MAC_CSR_CMD_CSR_BUSY_
)) {
240 SMSC_WARNING(HW
, "MAC busy at entry");
244 /* Send the MAC cmd */
245 smsc911x_reg_write(pdata
, MAC_CSR_CMD
, ((offset
& 0xFF) |
246 MAC_CSR_CMD_CSR_BUSY_
| MAC_CSR_CMD_R_NOT_W_
));
248 /* Workaround for hardware read-after-write restriction */
249 temp
= smsc911x_reg_read(pdata
, BYTE_TEST
);
251 /* Wait for the read to complete */
252 if (likely(smsc911x_mac_complete(pdata
) == 0))
253 return smsc911x_reg_read(pdata
, MAC_CSR_DATA
);
255 SMSC_WARNING(HW
, "MAC busy after read");
259 /* Set a mac register, mac_lock must be acquired before calling */
260 static void smsc911x_mac_write(struct smsc911x_data
*pdata
,
261 unsigned int offset
, u32 val
)
265 SMSC_ASSERT_MAC_LOCK(pdata
);
267 temp
= smsc911x_reg_read(pdata
, MAC_CSR_CMD
);
268 if (unlikely(temp
& MAC_CSR_CMD_CSR_BUSY_
)) {
270 "smsc911x_mac_write failed, MAC busy at entry");
274 /* Send data to write */
275 smsc911x_reg_write(pdata
, MAC_CSR_DATA
, val
);
277 /* Write the actual data */
278 smsc911x_reg_write(pdata
, MAC_CSR_CMD
, ((offset
& 0xFF) |
279 MAC_CSR_CMD_CSR_BUSY_
));
281 /* Workaround for hardware read-after-write restriction */
282 temp
= smsc911x_reg_read(pdata
, BYTE_TEST
);
284 /* Wait for the write to complete */
285 if (likely(smsc911x_mac_complete(pdata
) == 0))
289 "smsc911x_mac_write failed, MAC busy after write");
292 /* Get a phy register */
293 static int smsc911x_mii_read(struct mii_bus
*bus
, int phyaddr
, int regidx
)
295 struct smsc911x_data
*pdata
= (struct smsc911x_data
*)bus
->priv
;
300 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
302 /* Confirm MII not busy */
303 if (unlikely(smsc911x_mac_read(pdata
, MII_ACC
) & MII_ACC_MII_BUSY_
)) {
305 "MII is busy in smsc911x_mii_read???");
310 /* Set the address, index & direction (read from PHY) */
311 addr
= ((phyaddr
& 0x1F) << 11) | ((regidx
& 0x1F) << 6);
312 smsc911x_mac_write(pdata
, MII_ACC
, addr
);
314 /* Wait for read to complete w/ timeout */
315 for (i
= 0; i
< 100; i
++)
316 if (!(smsc911x_mac_read(pdata
, MII_ACC
) & MII_ACC_MII_BUSY_
)) {
317 reg
= smsc911x_mac_read(pdata
, MII_DATA
);
321 SMSC_WARNING(HW
, "Timed out waiting for MII write to finish");
325 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
329 /* Set a phy register */
330 static int smsc911x_mii_write(struct mii_bus
*bus
, int phyaddr
, int regidx
,
333 struct smsc911x_data
*pdata
= (struct smsc911x_data
*)bus
->priv
;
338 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
340 /* Confirm MII not busy */
341 if (unlikely(smsc911x_mac_read(pdata
, MII_ACC
) & MII_ACC_MII_BUSY_
)) {
343 "MII is busy in smsc911x_mii_write???");
348 /* Put the data to write in the MAC */
349 smsc911x_mac_write(pdata
, MII_DATA
, val
);
351 /* Set the address, index & direction (write to PHY) */
352 addr
= ((phyaddr
& 0x1F) << 11) | ((regidx
& 0x1F) << 6) |
354 smsc911x_mac_write(pdata
, MII_ACC
, addr
);
356 /* Wait for write to complete w/ timeout */
357 for (i
= 0; i
< 100; i
++)
358 if (!(smsc911x_mac_read(pdata
, MII_ACC
) & MII_ACC_MII_BUSY_
)) {
363 SMSC_WARNING(HW
, "Timed out waiting for MII write to finish");
367 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
371 /* Autodetects and initialises external phy for SMSC9115 and SMSC9117 flavors.
372 * If something goes wrong, returns -ENODEV to revert back to internal phy.
373 * Performed at initialisation only, so interrupts are enabled */
374 static int smsc911x_phy_initialise_external(struct smsc911x_data
*pdata
)
376 unsigned int hwcfg
= smsc911x_reg_read(pdata
, HW_CFG
);
378 /* External phy is requested, supported, and detected */
379 if (hwcfg
& HW_CFG_EXT_PHY_DET_
) {
381 /* Switch to external phy. Assuming tx and rx are stopped
382 * because smsc911x_phy_initialise is called before
383 * smsc911x_rx_initialise and tx_initialise. */
385 /* Disable phy clocks to the MAC */
386 hwcfg
&= (~HW_CFG_PHY_CLK_SEL_
);
387 hwcfg
|= HW_CFG_PHY_CLK_SEL_CLK_DIS_
;
388 smsc911x_reg_write(pdata
, HW_CFG
, hwcfg
);
389 udelay(10); /* Enough time for clocks to stop */
391 /* Switch to external phy */
392 hwcfg
|= HW_CFG_EXT_PHY_EN_
;
393 smsc911x_reg_write(pdata
, HW_CFG
, hwcfg
);
395 /* Enable phy clocks to the MAC */
396 hwcfg
&= (~HW_CFG_PHY_CLK_SEL_
);
397 hwcfg
|= HW_CFG_PHY_CLK_SEL_EXT_PHY_
;
398 smsc911x_reg_write(pdata
, HW_CFG
, hwcfg
);
399 udelay(10); /* Enough time for clocks to restart */
401 hwcfg
|= HW_CFG_SMI_SEL_
;
402 smsc911x_reg_write(pdata
, HW_CFG
, hwcfg
);
404 SMSC_TRACE(HW
, "Successfully switched to external PHY");
405 pdata
->using_extphy
= 1;
407 SMSC_WARNING(HW
, "No external PHY detected, "
408 "Using internal PHY instead.");
409 /* Use internal phy */
415 /* Fetches a tx status out of the status fifo */
416 static unsigned int smsc911x_tx_get_txstatus(struct smsc911x_data
*pdata
)
418 unsigned int result
=
419 smsc911x_reg_read(pdata
, TX_FIFO_INF
) & TX_FIFO_INF_TSUSED_
;
422 result
= smsc911x_reg_read(pdata
, TX_STATUS_FIFO
);
427 /* Fetches the next rx status */
428 static unsigned int smsc911x_rx_get_rxstatus(struct smsc911x_data
*pdata
)
430 unsigned int result
=
431 smsc911x_reg_read(pdata
, RX_FIFO_INF
) & RX_FIFO_INF_RXSUSED_
;
434 result
= smsc911x_reg_read(pdata
, RX_STATUS_FIFO
);
439 #ifdef USE_PHY_WORK_AROUND
440 static int smsc911x_phy_check_loopbackpkt(struct smsc911x_data
*pdata
)
447 for (tries
= 0; tries
< 10; tries
++) {
448 unsigned int txcmd_a
;
449 unsigned int txcmd_b
;
451 unsigned int pktlength
;
454 /* Zero-out rx packet memory */
455 memset(pdata
->loopback_rx_pkt
, 0, MIN_PACKET_SIZE
);
457 /* Write tx packet to 118 */
458 txcmd_a
= (u32
)((ulong
)pdata
->loopback_tx_pkt
& 0x03) << 16;
459 txcmd_a
|= TX_CMD_A_FIRST_SEG_
| TX_CMD_A_LAST_SEG_
;
460 txcmd_a
|= MIN_PACKET_SIZE
;
462 txcmd_b
= MIN_PACKET_SIZE
<< 16 | MIN_PACKET_SIZE
;
464 smsc911x_reg_write(pdata
, TX_DATA_FIFO
, txcmd_a
);
465 smsc911x_reg_write(pdata
, TX_DATA_FIFO
, txcmd_b
);
467 bufp
= (ulong
)pdata
->loopback_tx_pkt
& (~0x3);
468 wrsz
= MIN_PACKET_SIZE
+ 3;
469 wrsz
+= (u32
)((ulong
)pdata
->loopback_tx_pkt
& 0x3);
472 smsc911x_tx_writefifo(pdata
, (unsigned int *)bufp
, wrsz
);
474 /* Wait till transmit is done */
478 status
= smsc911x_tx_get_txstatus(pdata
);
479 } while ((i
--) && (!status
));
482 SMSC_WARNING(HW
, "Failed to transmit "
483 "during loopback test");
486 if (status
& TX_STS_ES_
) {
487 SMSC_WARNING(HW
, "Transmit encountered "
488 "errors during loopback test");
492 /* Wait till receive is done */
496 status
= smsc911x_rx_get_rxstatus(pdata
);
497 } while ((i
--) && (!status
));
501 "Failed to receive during loopback test");
504 if (status
& RX_STS_ES_
) {
505 SMSC_WARNING(HW
, "Receive encountered "
506 "errors during loopback test");
510 pktlength
= ((status
& 0x3FFF0000UL
) >> 16);
511 bufp
= (ulong
)pdata
->loopback_rx_pkt
;
512 rdsz
= pktlength
+ 3;
513 rdsz
+= (u32
)((ulong
)pdata
->loopback_rx_pkt
& 0x3);
516 smsc911x_rx_readfifo(pdata
, (unsigned int *)bufp
, rdsz
);
518 if (pktlength
!= (MIN_PACKET_SIZE
+ 4)) {
519 SMSC_WARNING(HW
, "Unexpected packet size "
520 "during loop back test, size=%d, will retry",
525 for (j
= 0; j
< MIN_PACKET_SIZE
; j
++) {
526 if (pdata
->loopback_tx_pkt
[j
]
527 != pdata
->loopback_rx_pkt
[j
]) {
533 SMSC_TRACE(HW
, "Successfully verified "
537 SMSC_WARNING(HW
, "Data mismatch "
538 "during loop back test, will retry");
546 static int smsc911x_phy_reset(struct smsc911x_data
*pdata
)
548 struct phy_device
*phy_dev
= pdata
->phy_dev
;
550 unsigned int i
= 100000;
553 BUG_ON(!phy_dev
->bus
);
555 SMSC_TRACE(HW
, "Performing PHY BCR Reset");
556 smsc911x_mii_write(phy_dev
->bus
, phy_dev
->addr
, MII_BMCR
, BMCR_RESET
);
559 temp
= smsc911x_mii_read(phy_dev
->bus
, phy_dev
->addr
,
561 } while ((i
--) && (temp
& BMCR_RESET
));
563 if (temp
& BMCR_RESET
) {
564 SMSC_WARNING(HW
, "PHY reset failed to complete.");
567 /* Extra delay required because the phy may not be completed with
568 * its reset when BMCR_RESET is cleared. Specs say 256 uS is
569 * enough delay but using 1ms here to be safe */
575 static int smsc911x_phy_loopbacktest(struct net_device
*dev
)
577 struct smsc911x_data
*pdata
= netdev_priv(dev
);
578 struct phy_device
*phy_dev
= pdata
->phy_dev
;
583 /* Initialise tx packet using broadcast destination address */
584 memset(pdata
->loopback_tx_pkt
, 0xff, ETH_ALEN
);
586 /* Use incrementing source address */
587 for (i
= 6; i
< 12; i
++)
588 pdata
->loopback_tx_pkt
[i
] = (char)i
;
590 /* Set length type field */
591 pdata
->loopback_tx_pkt
[12] = 0x00;
592 pdata
->loopback_tx_pkt
[13] = 0x00;
594 for (i
= 14; i
< MIN_PACKET_SIZE
; i
++)
595 pdata
->loopback_tx_pkt
[i
] = (char)i
;
597 val
= smsc911x_reg_read(pdata
, HW_CFG
);
598 val
&= HW_CFG_TX_FIF_SZ_
;
600 smsc911x_reg_write(pdata
, HW_CFG
, val
);
602 smsc911x_reg_write(pdata
, TX_CFG
, TX_CFG_TX_ON_
);
603 smsc911x_reg_write(pdata
, RX_CFG
,
604 (u32
)((ulong
)pdata
->loopback_rx_pkt
& 0x03) << 8);
606 for (i
= 0; i
< 10; i
++) {
607 /* Set PHY to 10/FD, no ANEG, and loopback mode */
608 smsc911x_mii_write(phy_dev
->bus
, phy_dev
->addr
, MII_BMCR
,
609 BMCR_LOOPBACK
| BMCR_FULLDPLX
);
611 /* Enable MAC tx/rx, FD */
612 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
613 smsc911x_mac_write(pdata
, MAC_CR
, MAC_CR_FDPX_
614 | MAC_CR_TXEN_
| MAC_CR_RXEN_
);
615 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
617 if (smsc911x_phy_check_loopbackpkt(pdata
) == 0) {
624 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
625 smsc911x_mac_write(pdata
, MAC_CR
, 0);
626 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
628 smsc911x_phy_reset(pdata
);
632 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
633 smsc911x_mac_write(pdata
, MAC_CR
, 0);
634 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
636 /* Cancel PHY loopback mode */
637 smsc911x_mii_write(phy_dev
->bus
, phy_dev
->addr
, MII_BMCR
, 0);
639 smsc911x_reg_write(pdata
, TX_CFG
, 0);
640 smsc911x_reg_write(pdata
, RX_CFG
, 0);
644 #endif /* USE_PHY_WORK_AROUND */
646 static void smsc911x_phy_update_flowcontrol(struct smsc911x_data
*pdata
)
648 struct phy_device
*phy_dev
= pdata
->phy_dev
;
649 u32 afc
= smsc911x_reg_read(pdata
, AFC_CFG
);
653 if (phy_dev
->duplex
== DUPLEX_FULL
) {
654 u16 lcladv
= phy_read(phy_dev
, MII_ADVERTISE
);
655 u16 rmtadv
= phy_read(phy_dev
, MII_LPA
);
656 u8 cap
= mii_resolve_flowctrl_fdx(lcladv
, rmtadv
);
658 if (cap
& FLOW_CTRL_RX
)
663 if (cap
& FLOW_CTRL_TX
)
668 SMSC_TRACE(HW
, "rx pause %s, tx pause %s",
669 (cap
& FLOW_CTRL_RX
? "enabled" : "disabled"),
670 (cap
& FLOW_CTRL_TX
? "enabled" : "disabled"));
672 SMSC_TRACE(HW
, "half duplex");
677 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
678 smsc911x_mac_write(pdata
, FLOW
, flow
);
679 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
681 smsc911x_reg_write(pdata
, AFC_CFG
, afc
);
684 /* Update link mode if anything has changed. Called periodically when the
685 * PHY is in polling mode, even if nothing has changed. */
686 static void smsc911x_phy_adjust_link(struct net_device
*dev
)
688 struct smsc911x_data
*pdata
= netdev_priv(dev
);
689 struct phy_device
*phy_dev
= pdata
->phy_dev
;
693 if (phy_dev
->duplex
!= pdata
->last_duplex
) {
695 SMSC_TRACE(HW
, "duplex state has changed");
697 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
698 mac_cr
= smsc911x_mac_read(pdata
, MAC_CR
);
699 if (phy_dev
->duplex
) {
701 "configuring for full duplex mode");
702 mac_cr
|= MAC_CR_FDPX_
;
705 "configuring for half duplex mode");
706 mac_cr
&= ~MAC_CR_FDPX_
;
708 smsc911x_mac_write(pdata
, MAC_CR
, mac_cr
);
709 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
711 smsc911x_phy_update_flowcontrol(pdata
);
712 pdata
->last_duplex
= phy_dev
->duplex
;
715 carrier
= netif_carrier_ok(dev
);
716 if (carrier
!= pdata
->last_carrier
) {
717 SMSC_TRACE(HW
, "carrier state has changed");
719 SMSC_TRACE(HW
, "configuring for carrier OK");
720 if ((pdata
->gpio_orig_setting
& GPIO_CFG_LED1_EN_
) &&
721 (!pdata
->using_extphy
)) {
722 /* Restore orginal GPIO configuration */
723 pdata
->gpio_setting
= pdata
->gpio_orig_setting
;
724 smsc911x_reg_write(pdata
, GPIO_CFG
,
725 pdata
->gpio_setting
);
728 SMSC_TRACE(HW
, "configuring for no carrier");
729 /* Check global setting that LED1
730 * usage is 10/100 indicator */
731 pdata
->gpio_setting
= smsc911x_reg_read(pdata
,
733 if ((pdata
->gpio_setting
& GPIO_CFG_LED1_EN_
)
734 && (!pdata
->using_extphy
)) {
735 /* Force 10/100 LED off, after saving
736 * orginal GPIO configuration */
737 pdata
->gpio_orig_setting
= pdata
->gpio_setting
;
739 pdata
->gpio_setting
&= ~GPIO_CFG_LED1_EN_
;
740 pdata
->gpio_setting
|= (GPIO_CFG_GPIOBUF0_
743 smsc911x_reg_write(pdata
, GPIO_CFG
,
744 pdata
->gpio_setting
);
747 pdata
->last_carrier
= carrier
;
751 static int smsc911x_mii_probe(struct net_device
*dev
)
753 struct smsc911x_data
*pdata
= netdev_priv(dev
);
754 struct phy_device
*phydev
= NULL
;
757 /* find the first phy */
758 for (phy_addr
= 0; phy_addr
< PHY_MAX_ADDR
; phy_addr
++) {
759 if (pdata
->mii_bus
->phy_map
[phy_addr
]) {
760 phydev
= pdata
->mii_bus
->phy_map
[phy_addr
];
761 SMSC_TRACE(PROBE
, "PHY %d: addr %d, phy_id 0x%08X",
762 phy_addr
, phydev
->addr
, phydev
->phy_id
);
768 pr_err("%s: no PHY found\n", dev
->name
);
772 phydev
= phy_connect(dev
, dev_name(&phydev
->dev
),
773 &smsc911x_phy_adjust_link
, 0, pdata
->config
.phy_interface
);
775 if (IS_ERR(phydev
)) {
776 pr_err("%s: Could not attach to PHY\n", dev
->name
);
777 return PTR_ERR(phydev
);
780 pr_info("%s: attached PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n",
781 dev
->name
, phydev
->drv
->name
,
782 dev_name(&phydev
->dev
), phydev
->irq
);
784 /* mask with MAC supported features */
785 phydev
->supported
&= (PHY_BASIC_FEATURES
| SUPPORTED_Pause
|
786 SUPPORTED_Asym_Pause
);
787 phydev
->advertising
= phydev
->supported
;
789 pdata
->phy_dev
= phydev
;
790 pdata
->last_duplex
= -1;
791 pdata
->last_carrier
= -1;
793 #ifdef USE_PHY_WORK_AROUND
794 if (smsc911x_phy_loopbacktest(dev
) < 0) {
795 SMSC_WARNING(HW
, "Failed Loop Back Test");
798 SMSC_TRACE(HW
, "Passed Loop Back Test");
799 #endif /* USE_PHY_WORK_AROUND */
801 SMSC_TRACE(HW
, "phy initialised succesfully");
805 static int __devinit
smsc911x_mii_init(struct platform_device
*pdev
,
806 struct net_device
*dev
)
808 struct smsc911x_data
*pdata
= netdev_priv(dev
);
811 pdata
->mii_bus
= mdiobus_alloc();
812 if (!pdata
->mii_bus
) {
817 pdata
->mii_bus
->name
= SMSC_MDIONAME
;
818 snprintf(pdata
->mii_bus
->id
, MII_BUS_ID_SIZE
, "%x", pdev
->id
);
819 pdata
->mii_bus
->priv
= pdata
;
820 pdata
->mii_bus
->read
= smsc911x_mii_read
;
821 pdata
->mii_bus
->write
= smsc911x_mii_write
;
822 pdata
->mii_bus
->irq
= pdata
->phy_irq
;
823 for (i
= 0; i
< PHY_MAX_ADDR
; ++i
)
824 pdata
->mii_bus
->irq
[i
] = PHY_POLL
;
826 pdata
->mii_bus
->parent
= &pdev
->dev
;
828 pdata
->using_extphy
= 0;
830 switch (pdata
->idrev
& 0xFFFF0000) {
835 /* External PHY supported, try to autodetect */
836 if (smsc911x_phy_initialise_external(pdata
) < 0) {
837 SMSC_TRACE(HW
, "No external PHY detected, "
838 "using internal PHY");
842 SMSC_TRACE(HW
, "External PHY is not supported, "
843 "using internal PHY");
847 if (!pdata
->using_extphy
) {
848 /* Mask all PHYs except ID 1 (internal) */
849 pdata
->mii_bus
->phy_mask
= ~(1 << 1);
852 if (mdiobus_register(pdata
->mii_bus
)) {
853 SMSC_WARNING(PROBE
, "Error registering mii bus");
854 goto err_out_free_bus_2
;
857 if (smsc911x_mii_probe(dev
) < 0) {
858 SMSC_WARNING(PROBE
, "Error registering mii bus");
859 goto err_out_unregister_bus_3
;
864 err_out_unregister_bus_3
:
865 mdiobus_unregister(pdata
->mii_bus
);
867 mdiobus_free(pdata
->mii_bus
);
872 /* Gets the number of tx statuses in the fifo */
873 static unsigned int smsc911x_tx_get_txstatcount(struct smsc911x_data
*pdata
)
875 return (smsc911x_reg_read(pdata
, TX_FIFO_INF
)
876 & TX_FIFO_INF_TSUSED_
) >> 16;
879 /* Reads tx statuses and increments counters where necessary */
880 static void smsc911x_tx_update_txcounters(struct net_device
*dev
)
882 struct smsc911x_data
*pdata
= netdev_priv(dev
);
883 unsigned int tx_stat
;
885 while ((tx_stat
= smsc911x_tx_get_txstatus(pdata
)) != 0) {
886 if (unlikely(tx_stat
& 0x80000000)) {
887 /* In this driver the packet tag is used as the packet
888 * length. Since a packet length can never reach the
889 * size of 0x8000, this bit is reserved. It is worth
890 * noting that the "reserved bit" in the warning above
891 * does not reference a hardware defined reserved bit
892 * but rather a driver defined one.
895 "Packet tag reserved bit is high");
897 if (unlikely(tx_stat
& 0x00008000)) {
898 dev
->stats
.tx_errors
++;
900 dev
->stats
.tx_packets
++;
901 dev
->stats
.tx_bytes
+= (tx_stat
>> 16);
903 if (unlikely(tx_stat
& 0x00000100)) {
904 dev
->stats
.collisions
+= 16;
905 dev
->stats
.tx_aborted_errors
+= 1;
907 dev
->stats
.collisions
+=
908 ((tx_stat
>> 3) & 0xF);
910 if (unlikely(tx_stat
& 0x00000800))
911 dev
->stats
.tx_carrier_errors
+= 1;
912 if (unlikely(tx_stat
& 0x00000200)) {
913 dev
->stats
.collisions
++;
914 dev
->stats
.tx_aborted_errors
++;
920 /* Increments the Rx error counters */
922 smsc911x_rx_counterrors(struct net_device
*dev
, unsigned int rxstat
)
926 if (unlikely(rxstat
& 0x00008000)) {
927 dev
->stats
.rx_errors
++;
928 if (unlikely(rxstat
& 0x00000002)) {
929 dev
->stats
.rx_crc_errors
++;
933 if (likely(!crc_err
)) {
934 if (unlikely((rxstat
& 0x00001020) == 0x00001020)) {
935 /* Frame type indicates length,
936 * and length error is set */
937 dev
->stats
.rx_length_errors
++;
939 if (rxstat
& RX_STS_MCAST_
)
940 dev
->stats
.multicast
++;
944 /* Quickly dumps bad packets */
946 smsc911x_rx_fastforward(struct smsc911x_data
*pdata
, unsigned int pktbytes
)
948 unsigned int pktwords
= (pktbytes
+ NET_IP_ALIGN
+ 3) >> 2;
950 if (likely(pktwords
>= 4)) {
951 unsigned int timeout
= 500;
953 smsc911x_reg_write(pdata
, RX_DP_CTRL
, RX_DP_CTRL_RX_FFWD_
);
956 val
= smsc911x_reg_read(pdata
, RX_DP_CTRL
);
957 } while (--timeout
&& (val
& RX_DP_CTRL_RX_FFWD_
));
959 if (unlikely(timeout
== 0))
960 SMSC_WARNING(HW
, "Timed out waiting for "
961 "RX FFWD to finish, RX_DP_CTRL: 0x%08X", val
);
965 temp
= smsc911x_reg_read(pdata
, RX_DATA_FIFO
);
969 /* NAPI poll function */
970 static int smsc911x_poll(struct napi_struct
*napi
, int budget
)
972 struct smsc911x_data
*pdata
=
973 container_of(napi
, struct smsc911x_data
, napi
);
974 struct net_device
*dev
= pdata
->dev
;
977 while (likely(netif_running(dev
)) && (npackets
< budget
)) {
978 unsigned int pktlength
;
979 unsigned int pktwords
;
981 unsigned int rxstat
= smsc911x_rx_get_rxstatus(pdata
);
985 /* We processed all packets available. Tell NAPI it can
986 * stop polling then re-enable rx interrupts */
987 smsc911x_reg_write(pdata
, INT_STS
, INT_STS_RSFL_
);
989 temp
= smsc911x_reg_read(pdata
, INT_EN
);
990 temp
|= INT_EN_RSFL_EN_
;
991 smsc911x_reg_write(pdata
, INT_EN
, temp
);
995 /* Count packet for NAPI scheduling, even if it has an error.
996 * Error packets still require cycles to discard */
999 pktlength
= ((rxstat
& 0x3FFF0000) >> 16);
1000 pktwords
= (pktlength
+ NET_IP_ALIGN
+ 3) >> 2;
1001 smsc911x_rx_counterrors(dev
, rxstat
);
1003 if (unlikely(rxstat
& RX_STS_ES_
)) {
1004 SMSC_WARNING(RX_ERR
,
1005 "Discarding packet with error bit set");
1006 /* Packet has an error, discard it and continue with
1008 smsc911x_rx_fastforward(pdata
, pktwords
);
1009 dev
->stats
.rx_dropped
++;
1013 skb
= netdev_alloc_skb(dev
, pktlength
+ NET_IP_ALIGN
);
1014 if (unlikely(!skb
)) {
1015 SMSC_WARNING(RX_ERR
,
1016 "Unable to allocate skb for rx packet");
1017 /* Drop the packet and stop this polling iteration */
1018 smsc911x_rx_fastforward(pdata
, pktwords
);
1019 dev
->stats
.rx_dropped
++;
1023 skb
->data
= skb
->head
;
1024 skb_reset_tail_pointer(skb
);
1026 /* Align IP on 16B boundary */
1027 skb_reserve(skb
, NET_IP_ALIGN
);
1028 skb_put(skb
, pktlength
- 4);
1029 smsc911x_rx_readfifo(pdata
, (unsigned int *)skb
->head
,
1031 skb
->protocol
= eth_type_trans(skb
, dev
);
1032 skb
->ip_summed
= CHECKSUM_NONE
;
1033 netif_receive_skb(skb
);
1035 /* Update counters */
1036 dev
->stats
.rx_packets
++;
1037 dev
->stats
.rx_bytes
+= (pktlength
- 4);
1038 dev
->last_rx
= jiffies
;
1041 /* Return total received packets */
1045 /* Returns hash bit number for given MAC address
1047 * 01 00 5E 00 00 01 -> returns bit number 31 */
1048 static unsigned int smsc911x_hash(char addr
[ETH_ALEN
])
1050 return (ether_crc(ETH_ALEN
, addr
) >> 26) & 0x3f;
1053 static void smsc911x_rx_multicast_update(struct smsc911x_data
*pdata
)
1055 /* Performs the multicast & mac_cr update. This is called when
1056 * safe on the current hardware, and with the mac_lock held */
1057 unsigned int mac_cr
;
1059 SMSC_ASSERT_MAC_LOCK(pdata
);
1061 mac_cr
= smsc911x_mac_read(pdata
, MAC_CR
);
1062 mac_cr
|= pdata
->set_bits_mask
;
1063 mac_cr
&= ~(pdata
->clear_bits_mask
);
1064 smsc911x_mac_write(pdata
, MAC_CR
, mac_cr
);
1065 smsc911x_mac_write(pdata
, HASHH
, pdata
->hashhi
);
1066 smsc911x_mac_write(pdata
, HASHL
, pdata
->hashlo
);
1067 SMSC_TRACE(HW
, "maccr 0x%08X, HASHH 0x%08X, HASHL 0x%08X",
1068 mac_cr
, pdata
->hashhi
, pdata
->hashlo
);
1071 static void smsc911x_rx_multicast_update_workaround(struct smsc911x_data
*pdata
)
1073 unsigned int mac_cr
;
1075 /* This function is only called for older LAN911x devices
1076 * (revA or revB), where MAC_CR, HASHH and HASHL should not
1077 * be modified during Rx - newer devices immediately update the
1080 * This is called from interrupt context */
1082 spin_lock(&pdata
->mac_lock
);
1084 /* Check Rx has stopped */
1085 if (smsc911x_mac_read(pdata
, MAC_CR
) & MAC_CR_RXEN_
)
1086 SMSC_WARNING(DRV
, "Rx not stopped");
1088 /* Perform the update - safe to do now Rx has stopped */
1089 smsc911x_rx_multicast_update(pdata
);
1092 mac_cr
= smsc911x_mac_read(pdata
, MAC_CR
);
1093 mac_cr
|= MAC_CR_RXEN_
;
1094 smsc911x_mac_write(pdata
, MAC_CR
, mac_cr
);
1096 pdata
->multicast_update_pending
= 0;
1098 spin_unlock(&pdata
->mac_lock
);
1101 static int smsc911x_soft_reset(struct smsc911x_data
*pdata
)
1103 unsigned int timeout
;
1106 /* Reset the LAN911x */
1107 smsc911x_reg_write(pdata
, HW_CFG
, HW_CFG_SRST_
);
1111 temp
= smsc911x_reg_read(pdata
, HW_CFG
);
1112 } while ((--timeout
) && (temp
& HW_CFG_SRST_
));
1114 if (unlikely(temp
& HW_CFG_SRST_
)) {
1115 SMSC_WARNING(DRV
, "Failed to complete reset");
1121 /* Sets the device MAC address to dev_addr, called with mac_lock held */
1123 smsc911x_set_mac_address(struct smsc911x_data
*pdata
, u8 dev_addr
[6])
1125 u32 mac_high16
= (dev_addr
[5] << 8) | dev_addr
[4];
1126 u32 mac_low32
= (dev_addr
[3] << 24) | (dev_addr
[2] << 16) |
1127 (dev_addr
[1] << 8) | dev_addr
[0];
1129 SMSC_ASSERT_MAC_LOCK(pdata
);
1131 smsc911x_mac_write(pdata
, ADDRH
, mac_high16
);
1132 smsc911x_mac_write(pdata
, ADDRL
, mac_low32
);
1135 static int smsc911x_open(struct net_device
*dev
)
1137 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1138 unsigned int timeout
;
1140 unsigned int intcfg
;
1142 /* if the phy is not yet registered, retry later*/
1143 if (!pdata
->phy_dev
) {
1144 SMSC_WARNING(HW
, "phy_dev is NULL");
1148 if (!is_valid_ether_addr(dev
->dev_addr
)) {
1149 SMSC_WARNING(HW
, "dev_addr is not a valid MAC address");
1150 return -EADDRNOTAVAIL
;
1153 /* Reset the LAN911x */
1154 if (smsc911x_soft_reset(pdata
)) {
1155 SMSC_WARNING(HW
, "soft reset failed");
1159 smsc911x_reg_write(pdata
, HW_CFG
, 0x00050000);
1160 smsc911x_reg_write(pdata
, AFC_CFG
, 0x006E3740);
1162 /* Make sure EEPROM has finished loading before setting GPIO_CFG */
1164 while ((timeout
--) &&
1165 (smsc911x_reg_read(pdata
, E2P_CMD
) & E2P_CMD_EPC_BUSY_
)) {
1169 if (unlikely(timeout
== 0))
1171 "Timed out waiting for EEPROM busy bit to clear");
1173 smsc911x_reg_write(pdata
, GPIO_CFG
, 0x70070000);
1175 /* The soft reset above cleared the device's MAC address,
1176 * restore it from local copy (set in probe) */
1177 spin_lock_irq(&pdata
->mac_lock
);
1178 smsc911x_set_mac_address(pdata
, dev
->dev_addr
);
1179 spin_unlock_irq(&pdata
->mac_lock
);
1181 /* Initialise irqs, but leave all sources disabled */
1182 smsc911x_reg_write(pdata
, INT_EN
, 0);
1183 smsc911x_reg_write(pdata
, INT_STS
, 0xFFFFFFFF);
1185 /* Set interrupt deassertion to 100uS */
1186 intcfg
= ((10 << 24) | INT_CFG_IRQ_EN_
);
1188 if (pdata
->config
.irq_polarity
) {
1189 SMSC_TRACE(IFUP
, "irq polarity: active high");
1190 intcfg
|= INT_CFG_IRQ_POL_
;
1192 SMSC_TRACE(IFUP
, "irq polarity: active low");
1195 if (pdata
->config
.irq_type
) {
1196 SMSC_TRACE(IFUP
, "irq type: push-pull");
1197 intcfg
|= INT_CFG_IRQ_TYPE_
;
1199 SMSC_TRACE(IFUP
, "irq type: open drain");
1202 smsc911x_reg_write(pdata
, INT_CFG
, intcfg
);
1204 SMSC_TRACE(IFUP
, "Testing irq handler using IRQ %d", dev
->irq
);
1205 pdata
->software_irq_signal
= 0;
1208 temp
= smsc911x_reg_read(pdata
, INT_EN
);
1209 temp
|= INT_EN_SW_INT_EN_
;
1210 smsc911x_reg_write(pdata
, INT_EN
, temp
);
1214 if (pdata
->software_irq_signal
)
1219 if (!pdata
->software_irq_signal
) {
1220 dev_warn(&dev
->dev
, "ISR failed signaling test (IRQ %d)\n",
1224 SMSC_TRACE(IFUP
, "IRQ handler passed test using IRQ %d", dev
->irq
);
1226 dev_info(&dev
->dev
, "SMSC911x/921x identified at %#08lx, IRQ: %d\n",
1227 (unsigned long)pdata
->ioaddr
, dev
->irq
);
1229 /* Bring the PHY up */
1230 phy_start(pdata
->phy_dev
);
1232 temp
= smsc911x_reg_read(pdata
, HW_CFG
);
1233 /* Preserve TX FIFO size and external PHY configuration */
1234 temp
&= (HW_CFG_TX_FIF_SZ_
|0x00000FFF);
1236 smsc911x_reg_write(pdata
, HW_CFG
, temp
);
1238 temp
= smsc911x_reg_read(pdata
, FIFO_INT
);
1239 temp
|= FIFO_INT_TX_AVAIL_LEVEL_
;
1240 temp
&= ~(FIFO_INT_RX_STS_LEVEL_
);
1241 smsc911x_reg_write(pdata
, FIFO_INT
, temp
);
1243 /* set RX Data offset to 2 bytes for alignment */
1244 smsc911x_reg_write(pdata
, RX_CFG
, (2 << 8));
1246 /* enable NAPI polling before enabling RX interrupts */
1247 napi_enable(&pdata
->napi
);
1249 temp
= smsc911x_reg_read(pdata
, INT_EN
);
1250 temp
|= (INT_EN_TDFA_EN_
| INT_EN_RSFL_EN_
| INT_EN_RXSTOP_INT_EN_
);
1251 smsc911x_reg_write(pdata
, INT_EN
, temp
);
1253 spin_lock_irq(&pdata
->mac_lock
);
1254 temp
= smsc911x_mac_read(pdata
, MAC_CR
);
1255 temp
|= (MAC_CR_TXEN_
| MAC_CR_RXEN_
| MAC_CR_HBDIS_
);
1256 smsc911x_mac_write(pdata
, MAC_CR
, temp
);
1257 spin_unlock_irq(&pdata
->mac_lock
);
1259 smsc911x_reg_write(pdata
, TX_CFG
, TX_CFG_TX_ON_
);
1261 netif_start_queue(dev
);
1265 /* Entry point for stopping the interface */
1266 static int smsc911x_stop(struct net_device
*dev
)
1268 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1271 /* Disable all device interrupts */
1272 temp
= smsc911x_reg_read(pdata
, INT_CFG
);
1273 temp
&= ~INT_CFG_IRQ_EN_
;
1274 smsc911x_reg_write(pdata
, INT_CFG
, temp
);
1276 /* Stop Tx and Rx polling */
1277 netif_stop_queue(dev
);
1278 napi_disable(&pdata
->napi
);
1280 /* At this point all Rx and Tx activity is stopped */
1281 dev
->stats
.rx_dropped
+= smsc911x_reg_read(pdata
, RX_DROP
);
1282 smsc911x_tx_update_txcounters(dev
);
1284 /* Bring the PHY down */
1286 phy_stop(pdata
->phy_dev
);
1288 SMSC_TRACE(IFDOWN
, "Interface stopped");
1292 /* Entry point for transmitting a packet */
1293 static int smsc911x_hard_start_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
1295 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1296 unsigned int freespace
;
1297 unsigned int tx_cmd_a
;
1298 unsigned int tx_cmd_b
;
1303 freespace
= smsc911x_reg_read(pdata
, TX_FIFO_INF
) & TX_FIFO_INF_TDFREE_
;
1305 if (unlikely(freespace
< TX_FIFO_LOW_THRESHOLD
))
1306 SMSC_WARNING(TX_ERR
,
1307 "Tx data fifo low, space available: %d", freespace
);
1309 /* Word alignment adjustment */
1310 tx_cmd_a
= (u32
)((ulong
)skb
->data
& 0x03) << 16;
1311 tx_cmd_a
|= TX_CMD_A_FIRST_SEG_
| TX_CMD_A_LAST_SEG_
;
1312 tx_cmd_a
|= (unsigned int)skb
->len
;
1314 tx_cmd_b
= ((unsigned int)skb
->len
) << 16;
1315 tx_cmd_b
|= (unsigned int)skb
->len
;
1317 smsc911x_reg_write(pdata
, TX_DATA_FIFO
, tx_cmd_a
);
1318 smsc911x_reg_write(pdata
, TX_DATA_FIFO
, tx_cmd_b
);
1320 bufp
= (ulong
)skb
->data
& (~0x3);
1321 wrsz
= (u32
)skb
->len
+ 3;
1322 wrsz
+= (u32
)((ulong
)skb
->data
& 0x3);
1325 smsc911x_tx_writefifo(pdata
, (unsigned int *)bufp
, wrsz
);
1326 freespace
-= (skb
->len
+ 32);
1328 dev
->trans_start
= jiffies
;
1330 if (unlikely(smsc911x_tx_get_txstatcount(pdata
) >= 30))
1331 smsc911x_tx_update_txcounters(dev
);
1333 if (freespace
< TX_FIFO_LOW_THRESHOLD
) {
1334 netif_stop_queue(dev
);
1335 temp
= smsc911x_reg_read(pdata
, FIFO_INT
);
1338 smsc911x_reg_write(pdata
, FIFO_INT
, temp
);
1341 return NETDEV_TX_OK
;
1344 /* Entry point for getting status counters */
1345 static struct net_device_stats
*smsc911x_get_stats(struct net_device
*dev
)
1347 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1348 smsc911x_tx_update_txcounters(dev
);
1349 dev
->stats
.rx_dropped
+= smsc911x_reg_read(pdata
, RX_DROP
);
1353 /* Entry point for setting addressing modes */
1354 static void smsc911x_set_multicast_list(struct net_device
*dev
)
1356 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1357 unsigned long flags
;
1359 if (dev
->flags
& IFF_PROMISC
) {
1360 /* Enabling promiscuous mode */
1361 pdata
->set_bits_mask
= MAC_CR_PRMS_
;
1362 pdata
->clear_bits_mask
= (MAC_CR_MCPAS_
| MAC_CR_HPFILT_
);
1365 } else if (dev
->flags
& IFF_ALLMULTI
) {
1366 /* Enabling all multicast mode */
1367 pdata
->set_bits_mask
= MAC_CR_MCPAS_
;
1368 pdata
->clear_bits_mask
= (MAC_CR_PRMS_
| MAC_CR_HPFILT_
);
1371 } else if (dev
->mc_count
> 0) {
1372 /* Enabling specific multicast addresses */
1373 unsigned int hash_high
= 0;
1374 unsigned int hash_low
= 0;
1375 unsigned int count
= 0;
1376 struct dev_mc_list
*mc_list
= dev
->mc_list
;
1378 pdata
->set_bits_mask
= MAC_CR_HPFILT_
;
1379 pdata
->clear_bits_mask
= (MAC_CR_PRMS_
| MAC_CR_MCPAS_
);
1383 if ((mc_list
->dmi_addrlen
) == ETH_ALEN
) {
1384 unsigned int bitnum
=
1385 smsc911x_hash(mc_list
->dmi_addr
);
1386 unsigned int mask
= 0x01 << (bitnum
& 0x1F);
1392 SMSC_WARNING(DRV
, "dmi_addrlen != 6");
1394 mc_list
= mc_list
->next
;
1396 if (count
!= (unsigned int)dev
->mc_count
)
1397 SMSC_WARNING(DRV
, "mc_count != dev->mc_count");
1399 pdata
->hashhi
= hash_high
;
1400 pdata
->hashlo
= hash_low
;
1402 /* Enabling local MAC address only */
1403 pdata
->set_bits_mask
= 0;
1404 pdata
->clear_bits_mask
=
1405 (MAC_CR_PRMS_
| MAC_CR_MCPAS_
| MAC_CR_HPFILT_
);
1410 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
1412 if (pdata
->generation
<= 1) {
1413 /* Older hardware revision - cannot change these flags while
1415 if (!pdata
->multicast_update_pending
) {
1417 SMSC_TRACE(HW
, "scheduling mcast update");
1418 pdata
->multicast_update_pending
= 1;
1420 /* Request the hardware to stop, then perform the
1421 * update when we get an RX_STOP interrupt */
1422 temp
= smsc911x_mac_read(pdata
, MAC_CR
);
1423 temp
&= ~(MAC_CR_RXEN_
);
1424 smsc911x_mac_write(pdata
, MAC_CR
, temp
);
1426 /* There is another update pending, this should now
1427 * use the newer values */
1430 /* Newer hardware revision - can write immediately */
1431 smsc911x_rx_multicast_update(pdata
);
1434 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
1437 static irqreturn_t
smsc911x_irqhandler(int irq
, void *dev_id
)
1439 struct net_device
*dev
= dev_id
;
1440 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1441 u32 intsts
= smsc911x_reg_read(pdata
, INT_STS
);
1442 u32 inten
= smsc911x_reg_read(pdata
, INT_EN
);
1443 int serviced
= IRQ_NONE
;
1446 if (unlikely(intsts
& inten
& INT_STS_SW_INT_
)) {
1447 temp
= smsc911x_reg_read(pdata
, INT_EN
);
1448 temp
&= (~INT_EN_SW_INT_EN_
);
1449 smsc911x_reg_write(pdata
, INT_EN
, temp
);
1450 smsc911x_reg_write(pdata
, INT_STS
, INT_STS_SW_INT_
);
1451 pdata
->software_irq_signal
= 1;
1453 serviced
= IRQ_HANDLED
;
1456 if (unlikely(intsts
& inten
& INT_STS_RXSTOP_INT_
)) {
1457 /* Called when there is a multicast update scheduled and
1458 * it is now safe to complete the update */
1459 SMSC_TRACE(INTR
, "RX Stop interrupt");
1460 smsc911x_reg_write(pdata
, INT_STS
, INT_STS_RXSTOP_INT_
);
1461 if (pdata
->multicast_update_pending
)
1462 smsc911x_rx_multicast_update_workaround(pdata
);
1463 serviced
= IRQ_HANDLED
;
1466 if (intsts
& inten
& INT_STS_TDFA_
) {
1467 temp
= smsc911x_reg_read(pdata
, FIFO_INT
);
1468 temp
|= FIFO_INT_TX_AVAIL_LEVEL_
;
1469 smsc911x_reg_write(pdata
, FIFO_INT
, temp
);
1470 smsc911x_reg_write(pdata
, INT_STS
, INT_STS_TDFA_
);
1471 netif_wake_queue(dev
);
1472 serviced
= IRQ_HANDLED
;
1475 if (unlikely(intsts
& inten
& INT_STS_RXE_
)) {
1476 SMSC_TRACE(INTR
, "RX Error interrupt");
1477 smsc911x_reg_write(pdata
, INT_STS
, INT_STS_RXE_
);
1478 serviced
= IRQ_HANDLED
;
1481 if (likely(intsts
& inten
& INT_STS_RSFL_
)) {
1482 if (likely(napi_schedule_prep(&pdata
->napi
))) {
1483 /* Disable Rx interrupts */
1484 temp
= smsc911x_reg_read(pdata
, INT_EN
);
1485 temp
&= (~INT_EN_RSFL_EN_
);
1486 smsc911x_reg_write(pdata
, INT_EN
, temp
);
1487 /* Schedule a NAPI poll */
1488 __napi_schedule(&pdata
->napi
);
1490 SMSC_WARNING(RX_ERR
,
1491 "napi_schedule_prep failed");
1493 serviced
= IRQ_HANDLED
;
1499 #ifdef CONFIG_NET_POLL_CONTROLLER
1500 static void smsc911x_poll_controller(struct net_device
*dev
)
1502 disable_irq(dev
->irq
);
1503 smsc911x_irqhandler(0, dev
);
1504 enable_irq(dev
->irq
);
1506 #endif /* CONFIG_NET_POLL_CONTROLLER */
1508 /* Standard ioctls for mii-tool */
1509 static int smsc911x_do_ioctl(struct net_device
*dev
, struct ifreq
*ifr
, int cmd
)
1511 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1513 if (!netif_running(dev
) || !pdata
->phy_dev
)
1516 return phy_mii_ioctl(pdata
->phy_dev
, if_mii(ifr
), cmd
);
1520 smsc911x_ethtool_getsettings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
1522 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1526 return phy_ethtool_gset(pdata
->phy_dev
, cmd
);
1530 smsc911x_ethtool_setsettings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
1532 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1534 return phy_ethtool_sset(pdata
->phy_dev
, cmd
);
1537 static void smsc911x_ethtool_getdrvinfo(struct net_device
*dev
,
1538 struct ethtool_drvinfo
*info
)
1540 strlcpy(info
->driver
, SMSC_CHIPNAME
, sizeof(info
->driver
));
1541 strlcpy(info
->version
, SMSC_DRV_VERSION
, sizeof(info
->version
));
1542 strlcpy(info
->bus_info
, dev_name(dev
->dev
.parent
),
1543 sizeof(info
->bus_info
));
1546 static int smsc911x_ethtool_nwayreset(struct net_device
*dev
)
1548 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1550 return phy_start_aneg(pdata
->phy_dev
);
1553 static u32
smsc911x_ethtool_getmsglevel(struct net_device
*dev
)
1555 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1556 return pdata
->msg_enable
;
1559 static void smsc911x_ethtool_setmsglevel(struct net_device
*dev
, u32 level
)
1561 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1562 pdata
->msg_enable
= level
;
1565 static int smsc911x_ethtool_getregslen(struct net_device
*dev
)
1567 return (((E2P_DATA
- ID_REV
) / 4 + 1) + (WUCSR
- MAC_CR
) + 1 + 32) *
1572 smsc911x_ethtool_getregs(struct net_device
*dev
, struct ethtool_regs
*regs
,
1575 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1576 struct phy_device
*phy_dev
= pdata
->phy_dev
;
1577 unsigned long flags
;
1582 regs
->version
= pdata
->idrev
;
1583 for (i
= ID_REV
; i
<= E2P_DATA
; i
+= (sizeof(u32
)))
1584 data
[j
++] = smsc911x_reg_read(pdata
, i
);
1586 for (i
= MAC_CR
; i
<= WUCSR
; i
++) {
1587 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
1588 data
[j
++] = smsc911x_mac_read(pdata
, i
);
1589 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
1592 for (i
= 0; i
<= 31; i
++)
1593 data
[j
++] = smsc911x_mii_read(phy_dev
->bus
, phy_dev
->addr
, i
);
1596 static void smsc911x_eeprom_enable_access(struct smsc911x_data
*pdata
)
1598 unsigned int temp
= smsc911x_reg_read(pdata
, GPIO_CFG
);
1599 temp
&= ~GPIO_CFG_EEPR_EN_
;
1600 smsc911x_reg_write(pdata
, GPIO_CFG
, temp
);
1604 static int smsc911x_eeprom_send_cmd(struct smsc911x_data
*pdata
, u32 op
)
1609 SMSC_TRACE(DRV
, "op 0x%08x", op
);
1610 if (smsc911x_reg_read(pdata
, E2P_CMD
) & E2P_CMD_EPC_BUSY_
) {
1611 SMSC_WARNING(DRV
, "Busy at start");
1615 e2cmd
= op
| E2P_CMD_EPC_BUSY_
;
1616 smsc911x_reg_write(pdata
, E2P_CMD
, e2cmd
);
1620 e2cmd
= smsc911x_reg_read(pdata
, E2P_CMD
);
1621 } while ((e2cmd
& E2P_CMD_EPC_BUSY_
) && (timeout
--));
1624 SMSC_TRACE(DRV
, "TIMED OUT");
1628 if (e2cmd
& E2P_CMD_EPC_TIMEOUT_
) {
1629 SMSC_TRACE(DRV
, "Error occured during eeprom operation");
1636 static int smsc911x_eeprom_read_location(struct smsc911x_data
*pdata
,
1637 u8 address
, u8
*data
)
1639 u32 op
= E2P_CMD_EPC_CMD_READ_
| address
;
1642 SMSC_TRACE(DRV
, "address 0x%x", address
);
1643 ret
= smsc911x_eeprom_send_cmd(pdata
, op
);
1646 data
[address
] = smsc911x_reg_read(pdata
, E2P_DATA
);
1651 static int smsc911x_eeprom_write_location(struct smsc911x_data
*pdata
,
1652 u8 address
, u8 data
)
1654 u32 op
= E2P_CMD_EPC_CMD_ERASE_
| address
;
1657 SMSC_TRACE(DRV
, "address 0x%x, data 0x%x", address
, data
);
1658 ret
= smsc911x_eeprom_send_cmd(pdata
, op
);
1661 op
= E2P_CMD_EPC_CMD_WRITE_
| address
;
1662 smsc911x_reg_write(pdata
, E2P_DATA
, (u32
)data
);
1663 ret
= smsc911x_eeprom_send_cmd(pdata
, op
);
1669 static int smsc911x_ethtool_get_eeprom_len(struct net_device
*dev
)
1671 return SMSC911X_EEPROM_SIZE
;
1674 static int smsc911x_ethtool_get_eeprom(struct net_device
*dev
,
1675 struct ethtool_eeprom
*eeprom
, u8
*data
)
1677 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1678 u8 eeprom_data
[SMSC911X_EEPROM_SIZE
];
1682 smsc911x_eeprom_enable_access(pdata
);
1684 len
= min(eeprom
->len
, SMSC911X_EEPROM_SIZE
);
1685 for (i
= 0; i
< len
; i
++) {
1686 int ret
= smsc911x_eeprom_read_location(pdata
, i
, eeprom_data
);
1693 memcpy(data
, &eeprom_data
[eeprom
->offset
], len
);
1698 static int smsc911x_ethtool_set_eeprom(struct net_device
*dev
,
1699 struct ethtool_eeprom
*eeprom
, u8
*data
)
1702 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1704 smsc911x_eeprom_enable_access(pdata
);
1705 smsc911x_eeprom_send_cmd(pdata
, E2P_CMD_EPC_CMD_EWEN_
);
1706 ret
= smsc911x_eeprom_write_location(pdata
, eeprom
->offset
, *data
);
1707 smsc911x_eeprom_send_cmd(pdata
, E2P_CMD_EPC_CMD_EWDS_
);
1709 /* Single byte write, according to man page */
1715 static const struct ethtool_ops smsc911x_ethtool_ops
= {
1716 .get_settings
= smsc911x_ethtool_getsettings
,
1717 .set_settings
= smsc911x_ethtool_setsettings
,
1718 .get_link
= ethtool_op_get_link
,
1719 .get_drvinfo
= smsc911x_ethtool_getdrvinfo
,
1720 .nway_reset
= smsc911x_ethtool_nwayreset
,
1721 .get_msglevel
= smsc911x_ethtool_getmsglevel
,
1722 .set_msglevel
= smsc911x_ethtool_setmsglevel
,
1723 .get_regs_len
= smsc911x_ethtool_getregslen
,
1724 .get_regs
= smsc911x_ethtool_getregs
,
1725 .get_eeprom_len
= smsc911x_ethtool_get_eeprom_len
,
1726 .get_eeprom
= smsc911x_ethtool_get_eeprom
,
1727 .set_eeprom
= smsc911x_ethtool_set_eeprom
,
1730 static const struct net_device_ops smsc911x_netdev_ops
= {
1731 .ndo_open
= smsc911x_open
,
1732 .ndo_stop
= smsc911x_stop
,
1733 .ndo_start_xmit
= smsc911x_hard_start_xmit
,
1734 .ndo_get_stats
= smsc911x_get_stats
,
1735 .ndo_set_multicast_list
= smsc911x_set_multicast_list
,
1736 .ndo_do_ioctl
= smsc911x_do_ioctl
,
1737 .ndo_validate_addr
= eth_validate_addr
,
1738 .ndo_set_mac_address
= eth_mac_addr
,
1739 #ifdef CONFIG_NET_POLL_CONTROLLER
1740 .ndo_poll_controller
= smsc911x_poll_controller
,
1744 /* Initializing private device structures, only called from probe */
1745 static int __devinit
smsc911x_init(struct net_device
*dev
)
1747 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1748 unsigned int byte_test
;
1750 SMSC_TRACE(PROBE
, "Driver Parameters:");
1751 SMSC_TRACE(PROBE
, "LAN base: 0x%08lX",
1752 (unsigned long)pdata
->ioaddr
);
1753 SMSC_TRACE(PROBE
, "IRQ: %d", dev
->irq
);
1754 SMSC_TRACE(PROBE
, "PHY will be autodetected.");
1756 spin_lock_init(&pdata
->dev_lock
);
1758 if (pdata
->ioaddr
== 0) {
1759 SMSC_WARNING(PROBE
, "pdata->ioaddr: 0x00000000");
1763 /* Check byte ordering */
1764 byte_test
= smsc911x_reg_read(pdata
, BYTE_TEST
);
1765 SMSC_TRACE(PROBE
, "BYTE_TEST: 0x%08X", byte_test
);
1766 if (byte_test
== 0x43218765) {
1767 SMSC_TRACE(PROBE
, "BYTE_TEST looks swapped, "
1768 "applying WORD_SWAP");
1769 smsc911x_reg_write(pdata
, WORD_SWAP
, 0xffffffff);
1771 /* 1 dummy read of BYTE_TEST is needed after a write to
1772 * WORD_SWAP before its contents are valid */
1773 byte_test
= smsc911x_reg_read(pdata
, BYTE_TEST
);
1775 byte_test
= smsc911x_reg_read(pdata
, BYTE_TEST
);
1778 if (byte_test
!= 0x87654321) {
1779 SMSC_WARNING(DRV
, "BYTE_TEST: 0x%08X", byte_test
);
1780 if (((byte_test
>> 16) & 0xFFFF) == (byte_test
& 0xFFFF)) {
1782 "top 16 bits equal to bottom 16 bits");
1783 SMSC_TRACE(PROBE
, "This may mean the chip is set "
1784 "for 32 bit while the bus is reading 16 bit");
1789 /* Default generation to zero (all workarounds apply) */
1790 pdata
->generation
= 0;
1792 pdata
->idrev
= smsc911x_reg_read(pdata
, ID_REV
);
1793 switch (pdata
->idrev
& 0xFFFF0000) {
1798 /* LAN911[5678] family */
1799 pdata
->generation
= pdata
->idrev
& 0x0000FFFF;
1806 /* LAN921[5678] family */
1807 pdata
->generation
= 3;
1814 /* LAN9210/LAN9211/LAN9220/LAN9221 */
1815 pdata
->generation
= 4;
1819 SMSC_WARNING(PROBE
, "LAN911x not identified, idrev: 0x%08X",
1824 SMSC_TRACE(PROBE
, "LAN911x identified, idrev: 0x%08X, generation: %d",
1825 pdata
->idrev
, pdata
->generation
);
1827 if (pdata
->generation
== 0)
1829 "This driver is not intended for this chip revision");
1831 /* Reset the LAN911x */
1832 if (smsc911x_soft_reset(pdata
))
1835 /* Disable all interrupt sources until we bring the device up */
1836 smsc911x_reg_write(pdata
, INT_EN
, 0);
1839 dev
->flags
|= IFF_MULTICAST
;
1840 netif_napi_add(dev
, &pdata
->napi
, smsc911x_poll
, SMSC_NAPI_WEIGHT
);
1841 dev
->netdev_ops
= &smsc911x_netdev_ops
;
1842 dev
->ethtool_ops
= &smsc911x_ethtool_ops
;
1847 static int __devexit
smsc911x_drv_remove(struct platform_device
*pdev
)
1849 struct net_device
*dev
;
1850 struct smsc911x_data
*pdata
;
1851 struct resource
*res
;
1853 dev
= platform_get_drvdata(pdev
);
1855 pdata
= netdev_priv(dev
);
1857 BUG_ON(!pdata
->ioaddr
);
1858 BUG_ON(!pdata
->phy_dev
);
1860 SMSC_TRACE(IFDOWN
, "Stopping driver.");
1862 phy_disconnect(pdata
->phy_dev
);
1863 pdata
->phy_dev
= NULL
;
1864 mdiobus_unregister(pdata
->mii_bus
);
1865 mdiobus_free(pdata
->mii_bus
);
1867 platform_set_drvdata(pdev
, NULL
);
1868 unregister_netdev(dev
);
1869 free_irq(dev
->irq
, dev
);
1870 res
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
,
1873 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1875 release_mem_region(res
->start
, res
->end
- res
->start
);
1877 iounmap(pdata
->ioaddr
);
1884 static int __devinit
smsc911x_drv_probe(struct platform_device
*pdev
)
1886 struct net_device
*dev
;
1887 struct smsc911x_data
*pdata
;
1888 struct smsc911x_platform_config
*config
= pdev
->dev
.platform_data
;
1889 struct resource
*res
, *irq_res
;
1890 unsigned int intcfg
= 0;
1891 int res_size
, irq_flags
;
1893 DECLARE_MAC_BUF(mac
);
1895 pr_info("%s: Driver version %s.\n", SMSC_CHIPNAME
, SMSC_DRV_VERSION
);
1897 /* platform data specifies irq & dynamic bus configuration */
1898 if (!pdev
->dev
.platform_data
) {
1899 pr_warning("%s: platform_data not provided\n", SMSC_CHIPNAME
);
1904 res
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
,
1907 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1909 pr_warning("%s: Could not allocate resource.\n",
1914 res_size
= res
->end
- res
->start
;
1916 irq_res
= platform_get_resource(pdev
, IORESOURCE_IRQ
, 0);
1918 pr_warning("%s: Could not allocate irq resource.\n",
1924 if (!request_mem_region(res
->start
, res_size
, SMSC_CHIPNAME
)) {
1929 dev
= alloc_etherdev(sizeof(struct smsc911x_data
));
1931 pr_warning("%s: Could not allocate device.\n", SMSC_CHIPNAME
);
1933 goto out_release_io_1
;
1936 SET_NETDEV_DEV(dev
, &pdev
->dev
);
1938 pdata
= netdev_priv(dev
);
1940 dev
->irq
= irq_res
->start
;
1941 irq_flags
= irq_res
->flags
& IRQF_TRIGGER_MASK
;
1942 pdata
->ioaddr
= ioremap_nocache(res
->start
, res_size
);
1944 /* copy config parameters across to pdata */
1945 memcpy(&pdata
->config
, config
, sizeof(pdata
->config
));
1948 pdata
->msg_enable
= ((1 << debug
) - 1);
1950 if (pdata
->ioaddr
== NULL
) {
1952 "Error smsc911x base address invalid");
1954 goto out_free_netdev_2
;
1957 retval
= smsc911x_init(dev
);
1959 goto out_unmap_io_3
;
1961 /* configure irq polarity and type before connecting isr */
1962 if (pdata
->config
.irq_polarity
== SMSC911X_IRQ_POLARITY_ACTIVE_HIGH
)
1963 intcfg
|= INT_CFG_IRQ_POL_
;
1965 if (pdata
->config
.irq_type
== SMSC911X_IRQ_TYPE_PUSH_PULL
)
1966 intcfg
|= INT_CFG_IRQ_TYPE_
;
1968 smsc911x_reg_write(pdata
, INT_CFG
, intcfg
);
1970 /* Ensure interrupts are globally disabled before connecting ISR */
1971 smsc911x_reg_write(pdata
, INT_EN
, 0);
1972 smsc911x_reg_write(pdata
, INT_STS
, 0xFFFFFFFF);
1974 retval
= request_irq(dev
->irq
, smsc911x_irqhandler
,
1975 irq_flags
| IRQF_DISABLED
, dev
->name
, dev
);
1978 "Unable to claim requested irq: %d", dev
->irq
);
1979 goto out_unmap_io_3
;
1982 platform_set_drvdata(pdev
, dev
);
1984 retval
= register_netdev(dev
);
1987 "Error %i registering device", retval
);
1988 goto out_unset_drvdata_4
;
1990 SMSC_TRACE(PROBE
, "Network interface: \"%s\"", dev
->name
);
1993 spin_lock_init(&pdata
->mac_lock
);
1995 retval
= smsc911x_mii_init(pdev
, dev
);
1998 "Error %i initialising mii", retval
);
1999 goto out_unregister_netdev_5
;
2002 spin_lock_irq(&pdata
->mac_lock
);
2004 /* Check if mac address has been specified when bringing interface up */
2005 if (is_valid_ether_addr(dev
->dev_addr
)) {
2006 smsc911x_set_mac_address(pdata
, dev
->dev_addr
);
2007 SMSC_TRACE(PROBE
, "MAC Address is specified by configuration");
2009 /* Try reading mac address from device. if EEPROM is present
2010 * it will already have been set */
2011 u32 mac_high16
= smsc911x_mac_read(pdata
, ADDRH
);
2012 u32 mac_low32
= smsc911x_mac_read(pdata
, ADDRL
);
2013 dev
->dev_addr
[0] = (u8
)(mac_low32
);
2014 dev
->dev_addr
[1] = (u8
)(mac_low32
>> 8);
2015 dev
->dev_addr
[2] = (u8
)(mac_low32
>> 16);
2016 dev
->dev_addr
[3] = (u8
)(mac_low32
>> 24);
2017 dev
->dev_addr
[4] = (u8
)(mac_high16
);
2018 dev
->dev_addr
[5] = (u8
)(mac_high16
>> 8);
2020 if (is_valid_ether_addr(dev
->dev_addr
)) {
2021 /* eeprom values are valid so use them */
2023 "Mac Address is read from LAN911x EEPROM");
2025 /* eeprom values are invalid, generate random MAC */
2026 random_ether_addr(dev
->dev_addr
);
2027 smsc911x_set_mac_address(pdata
, dev
->dev_addr
);
2029 "MAC Address is set to random_ether_addr");
2033 spin_unlock_irq(&pdata
->mac_lock
);
2035 dev_info(&dev
->dev
, "MAC Address: %s\n",
2036 print_mac(mac
, dev
->dev_addr
));
2040 out_unregister_netdev_5
:
2041 unregister_netdev(dev
);
2042 out_unset_drvdata_4
:
2043 platform_set_drvdata(pdev
, NULL
);
2044 free_irq(dev
->irq
, dev
);
2046 iounmap(pdata
->ioaddr
);
2050 release_mem_region(res
->start
, res
->end
- res
->start
);
2055 static struct platform_driver smsc911x_driver
= {
2056 .probe
= smsc911x_drv_probe
,
2057 .remove
= smsc911x_drv_remove
,
2059 .name
= SMSC_CHIPNAME
,
2063 /* Entry point for loading the module */
2064 static int __init
smsc911x_init_module(void)
2066 return platform_driver_register(&smsc911x_driver
);
2069 /* entry point for unloading the module */
2070 static void __exit
smsc911x_cleanup_module(void)
2072 platform_driver_unregister(&smsc911x_driver
);
2075 module_init(smsc911x_init_module
);
2076 module_exit(smsc911x_cleanup_module
);