5 select HAVE_ARCH_TRACEHOOK
7 select HAVE_PERF_EVENTS
13 config RWSEM_GENERIC_SPINLOCK
17 config RWSEM_XCHGADD_ALGORITHM
20 config GENERIC_FIND_NEXT_BIT
24 config GENERIC_HWEIGHT
28 config GENERIC_CALIBRATE_DELAY
32 config GENERIC_HARDIRQS
36 config GENERIC_HARDIRQS_NO__DO_IRQ
48 config ARCH_HAS_ILOG2_U32
52 config ARCH_HAS_ILOG2_U64
62 source "kernel/Kconfig.freezer"
65 menu "Fujitsu FR-V system setup"
70 This options switches on and off support for the FR-V MMU
71 (effectively switching between vmlinux and uClinux). Not all FR-V
72 CPUs support this. Currently only the FR451 has a sufficiently
75 config FRV_OUTOFLINE_ATOMIC_OPS
76 bool "Out-of-line the FRV atomic operations"
79 Setting this option causes the FR-V atomic operations to be mostly
80 implemented out-of-line.
82 See Documentation/frv/atomic-ops.txt for more information.
85 bool "High memory support"
89 If you wish to use more than 256MB of memory with your MMU based
90 system, you will need to select this option. The kernel can only see
91 the memory between 0xC0000000 and 0xD0000000 directly... everything
94 The arch is, however, capable of supporting up to 3GB of SDRAM.
97 bool "Allocate page tables in highmem"
101 The VM uses one page of memory for each page table. For systems
102 with a lot of RAM, this can be wasteful of precious low memory.
103 Setting this option will put user-space page tables in high memory.
108 prompt "uClinux kernel load address"
110 default UCPAGE_OFFSET_C0000000
112 This option sets the base address for the uClinux kernel. The kernel
113 will rearrange the SDRAM layout to start at this address, and move
114 itself to start there. It must be greater than 0, and it must be
115 sufficiently less than 0xE0000000 that the SDRAM does not intersect
118 The base address must also be aligned such that the SDRAM controller
119 can decode it. For instance, a 512MB SDRAM bank must be 512MB aligned.
121 config UCPAGE_OFFSET_20000000
124 config UCPAGE_OFFSET_40000000
127 config UCPAGE_OFFSET_60000000
130 config UCPAGE_OFFSET_80000000
133 config UCPAGE_OFFSET_A0000000
136 config UCPAGE_OFFSET_C0000000
137 bool "0xC0000000 (Recommended)"
143 default 0x20000000 if UCPAGE_OFFSET_20000000
144 default 0x40000000 if UCPAGE_OFFSET_40000000
145 default 0x60000000 if UCPAGE_OFFSET_60000000
146 default 0x80000000 if UCPAGE_OFFSET_80000000
147 default 0xA0000000 if UCPAGE_OFFSET_A0000000
150 config PROTECT_KERNEL
151 bool "Protect core kernel against userspace"
155 Selecting this option causes the uClinux kernel to change the
156 permittivity of DAMPR register covering the core kernel image to
157 prevent userspace accessing the underlying memory directly.
160 prompt "CPU Caching mode"
161 default FRV_DEFL_CACHE_WBACK
163 This option determines the default caching mode for the kernel.
165 Write-Back caching mode involves the all reads and writes causing
166 the affected cacheline to be read into the cache first before being
167 operated upon. Memory is not then updated by a write until the cache
168 is filled and a cacheline needs to be displaced from the cache to
169 make room. Only at that point is it written back.
171 Write-Behind caching is similar to Write-Back caching, except that a
172 write won't fetch a cacheline into the cache if there isn't already
173 one there; it will write directly to memory instead.
175 Write-Through caching only fetches cachelines from memory on a
176 read. Writes always get written directly to memory. If the affected
177 cacheline is also in cache, it will be updated too.
179 The final option is to turn of caching entirely.
181 Note that not all CPUs support Write-Behind caching. If the CPU on
182 which the kernel is running doesn't, it'll fall back to Write-Back
185 config FRV_DEFL_CACHE_WBACK
188 config FRV_DEFL_CACHE_WBEHIND
191 config FRV_DEFL_CACHE_WTHRU
194 config FRV_DEFL_CACHE_DISABLED
199 menu "CPU core support"
202 bool "Include FR401 core support"
206 This enables support for the FR401, FR401A and FR403 CPUs
209 bool "Include FR405 core support"
213 This enables support for the FR405 CPU
216 bool "Include FR451 core support"
219 This enables support for the FR451 CPU
221 config CPU_FR451_COMPILE
222 bool "Specifically compile for FR451 core"
223 depends on CPU_FR451 && !CPU_FR401 && !CPU_FR405 && !CPU_FR551
226 This causes appropriate flags to be passed to the compiler to
227 optimise for the FR451 CPU
230 bool "Include FR551 core support"
234 This enables support for the FR555 CPU
236 config CPU_FR551_COMPILE
237 bool "Specifically compile for FR551 core"
238 depends on CPU_FR551 && !CPU_FR401 && !CPU_FR405 && !CPU_FR451
241 This causes appropriate flags to be passed to the compiler to
242 optimise for the FR555 CPU
244 config FRV_L1_CACHE_SHIFT
246 default "5" if CPU_FR401 || CPU_FR405 || CPU_FR451
247 default "6" if CPU_FR551
252 prompt "System support"
256 bool "MB93091 CPU board with or without motherboard"
259 bool "MB93093 PDK unit"
265 prompt "Motherboard support"
269 bool "Use the MB93090-MB00 motherboard"
271 Select this option if the MB93091 CPU board is going to be used with
272 a MB93090-MB00 VDK motherboard
275 bool "Use standalone"
277 Select this option if the MB93091 CPU board is going to be used
278 without a motherboard
283 config FUJITSU_MB93493
284 bool "MB93493 Multimedia chip"
286 Select this option if the MB93493 multimedia chip is going to be
290 prompt "GP-Relative data support"
293 This option controls what data, if any, should be placed in the GP
294 relative data sections. Using this means that the compiler can
295 generate accesses to the data using GR16-relative addressing which
296 is faster than absolute instructions and saves space (2 instructions
299 However, the GPREL region is limited in size because the immediate
300 value used in the load and store instructions is limited to a 12-bit
303 So if the linker starts complaining that accesses to GPREL data are
304 out of range, try changing this option from the default.
306 Note that modules will always be compiled with this feature disabled
307 as the module data will not be in range of the GP base address.
310 bool "Put data objects of up to 8 bytes into GP-REL"
313 bool "Put data objects of up to 4 bytes into GP-REL"
315 config GPREL_DATA_NONE
316 bool "Don't use GP-REL"
320 config FRV_ONCPU_SERIAL
321 bool "Use on-CPU serial ports"
327 depends on MB93090_MB00
330 Some FR-V systems (such as the MB93090-MB00 VDK) have PCI
331 onboard. If you have one of these boards and you wish to use the PCI
332 facilities, say Y here.
334 config RESERVE_DMA_COHERENT
335 bool "Reserve DMA coherent memory"
336 depends on PCI && !MMU
339 Many PCI drivers require access to uncached memory for DMA device
340 communications (such as is done with some Ethernet buffer rings). If
341 a fully featured MMU is available, this can be done through page
342 table settings, but if not, a region has to be set aside and marked
343 with a special DAMPR register.
345 Setting this option causes uClinux to set aside a portion of the
346 available memory for use in this manner. The memory will then be
347 unavailable for normal kernel use.
349 source "drivers/pci/Kconfig"
351 source "drivers/pcmcia/Kconfig"
353 #config MATH_EMULATION
354 # bool "Math emulation support (EXPERIMENTAL)"
355 # depends on EXPERIMENTAL
357 # At some point in the future, this will cause floating-point math
358 # instructions to be emulated by the kernel on machines that lack a
359 # floating-point math coprocessor. Thrill-seekers and chronically
360 # sleep-deprived psychotic hacker types can say Y now, everyone else
361 # should probably wait a while.
363 menu "Power management options"
365 config ARCH_SUSPEND_POSSIBLE
369 source kernel/power/Kconfig
375 menu "Executable formats"
377 source "fs/Kconfig.binfmt"
383 source "drivers/Kconfig"
387 source "arch/frv/Kconfig.debug"
389 source "security/Kconfig"
391 source "crypto/Kconfig"