ACPI: thinkpad-acpi: change thinkpad-acpi input default and kconfig help
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / ide / ide-iops.c
blob92578b6832e9fbb2e31dd0287f1664ae979ab082
1 /*
2 * linux/drivers/ide/ide-iops.c Version 0.37 Mar 05, 2003
4 * Copyright (C) 2000-2002 Andre Hedrick <andre@linux-ide.org>
5 * Copyright (C) 2003 Red Hat <alan@redhat.com>
7 */
9 #include <linux/module.h>
10 #include <linux/types.h>
11 #include <linux/string.h>
12 #include <linux/kernel.h>
13 #include <linux/timer.h>
14 #include <linux/mm.h>
15 #include <linux/interrupt.h>
16 #include <linux/major.h>
17 #include <linux/errno.h>
18 #include <linux/genhd.h>
19 #include <linux/blkpg.h>
20 #include <linux/slab.h>
21 #include <linux/pci.h>
22 #include <linux/delay.h>
23 #include <linux/hdreg.h>
24 #include <linux/ide.h>
25 #include <linux/bitops.h>
26 #include <linux/nmi.h>
28 #include <asm/byteorder.h>
29 #include <asm/irq.h>
30 #include <asm/uaccess.h>
31 #include <asm/io.h>
34 * Conventional PIO operations for ATA devices
37 static u8 ide_inb (unsigned long port)
39 return (u8) inb(port);
42 static u16 ide_inw (unsigned long port)
44 return (u16) inw(port);
47 static void ide_insw (unsigned long port, void *addr, u32 count)
49 insw(port, addr, count);
52 static void ide_insl (unsigned long port, void *addr, u32 count)
54 insl(port, addr, count);
57 static void ide_outb (u8 val, unsigned long port)
59 outb(val, port);
62 static void ide_outbsync (ide_drive_t *drive, u8 addr, unsigned long port)
64 outb(addr, port);
67 static void ide_outw (u16 val, unsigned long port)
69 outw(val, port);
72 static void ide_outsw (unsigned long port, void *addr, u32 count)
74 outsw(port, addr, count);
77 static void ide_outsl (unsigned long port, void *addr, u32 count)
79 outsl(port, addr, count);
82 void default_hwif_iops (ide_hwif_t *hwif)
84 hwif->OUTB = ide_outb;
85 hwif->OUTBSYNC = ide_outbsync;
86 hwif->OUTW = ide_outw;
87 hwif->OUTSW = ide_outsw;
88 hwif->OUTSL = ide_outsl;
89 hwif->INB = ide_inb;
90 hwif->INW = ide_inw;
91 hwif->INSW = ide_insw;
92 hwif->INSL = ide_insl;
96 * MMIO operations, typically used for SATA controllers
99 static u8 ide_mm_inb (unsigned long port)
101 return (u8) readb((void __iomem *) port);
104 static u16 ide_mm_inw (unsigned long port)
106 return (u16) readw((void __iomem *) port);
109 static void ide_mm_insw (unsigned long port, void *addr, u32 count)
111 __ide_mm_insw((void __iomem *) port, addr, count);
114 static void ide_mm_insl (unsigned long port, void *addr, u32 count)
116 __ide_mm_insl((void __iomem *) port, addr, count);
119 static void ide_mm_outb (u8 value, unsigned long port)
121 writeb(value, (void __iomem *) port);
124 static void ide_mm_outbsync (ide_drive_t *drive, u8 value, unsigned long port)
126 writeb(value, (void __iomem *) port);
129 static void ide_mm_outw (u16 value, unsigned long port)
131 writew(value, (void __iomem *) port);
134 static void ide_mm_outsw (unsigned long port, void *addr, u32 count)
136 __ide_mm_outsw((void __iomem *) port, addr, count);
139 static void ide_mm_outsl (unsigned long port, void *addr, u32 count)
141 __ide_mm_outsl((void __iomem *) port, addr, count);
144 void default_hwif_mmiops (ide_hwif_t *hwif)
146 hwif->OUTB = ide_mm_outb;
147 /* Most systems will need to override OUTBSYNC, alas however
148 this one is controller specific! */
149 hwif->OUTBSYNC = ide_mm_outbsync;
150 hwif->OUTW = ide_mm_outw;
151 hwif->OUTSW = ide_mm_outsw;
152 hwif->OUTSL = ide_mm_outsl;
153 hwif->INB = ide_mm_inb;
154 hwif->INW = ide_mm_inw;
155 hwif->INSW = ide_mm_insw;
156 hwif->INSL = ide_mm_insl;
159 EXPORT_SYMBOL(default_hwif_mmiops);
161 u32 ide_read_24 (ide_drive_t *drive)
163 u8 hcyl = HWIF(drive)->INB(IDE_HCYL_REG);
164 u8 lcyl = HWIF(drive)->INB(IDE_LCYL_REG);
165 u8 sect = HWIF(drive)->INB(IDE_SECTOR_REG);
166 return (hcyl<<16)|(lcyl<<8)|sect;
169 void SELECT_DRIVE (ide_drive_t *drive)
171 if (HWIF(drive)->selectproc)
172 HWIF(drive)->selectproc(drive);
173 HWIF(drive)->OUTB(drive->select.all, IDE_SELECT_REG);
176 EXPORT_SYMBOL(SELECT_DRIVE);
178 void SELECT_INTERRUPT (ide_drive_t *drive)
180 if (HWIF(drive)->intrproc)
181 HWIF(drive)->intrproc(drive);
182 else
183 HWIF(drive)->OUTB(drive->ctl|2, IDE_CONTROL_REG);
186 void SELECT_MASK (ide_drive_t *drive, int mask)
188 if (HWIF(drive)->maskproc)
189 HWIF(drive)->maskproc(drive, mask);
192 void QUIRK_LIST (ide_drive_t *drive)
194 if (HWIF(drive)->quirkproc)
195 drive->quirk_list = HWIF(drive)->quirkproc(drive);
199 * Some localbus EIDE interfaces require a special access sequence
200 * when using 32-bit I/O instructions to transfer data. We call this
201 * the "vlb_sync" sequence, which consists of three successive reads
202 * of the sector count register location, with interrupts disabled
203 * to ensure that the reads all happen together.
205 static void ata_vlb_sync(ide_drive_t *drive, unsigned long port)
207 (void) HWIF(drive)->INB(port);
208 (void) HWIF(drive)->INB(port);
209 (void) HWIF(drive)->INB(port);
213 * This is used for most PIO data transfers *from* the IDE interface
215 static void ata_input_data(ide_drive_t *drive, void *buffer, u32 wcount)
217 ide_hwif_t *hwif = HWIF(drive);
218 u8 io_32bit = drive->io_32bit;
220 if (io_32bit) {
221 if (io_32bit & 2) {
222 unsigned long flags;
223 local_irq_save(flags);
224 ata_vlb_sync(drive, IDE_NSECTOR_REG);
225 hwif->INSL(IDE_DATA_REG, buffer, wcount);
226 local_irq_restore(flags);
227 } else
228 hwif->INSL(IDE_DATA_REG, buffer, wcount);
229 } else {
230 hwif->INSW(IDE_DATA_REG, buffer, wcount<<1);
235 * This is used for most PIO data transfers *to* the IDE interface
237 static void ata_output_data(ide_drive_t *drive, void *buffer, u32 wcount)
239 ide_hwif_t *hwif = HWIF(drive);
240 u8 io_32bit = drive->io_32bit;
242 if (io_32bit) {
243 if (io_32bit & 2) {
244 unsigned long flags;
245 local_irq_save(flags);
246 ata_vlb_sync(drive, IDE_NSECTOR_REG);
247 hwif->OUTSL(IDE_DATA_REG, buffer, wcount);
248 local_irq_restore(flags);
249 } else
250 hwif->OUTSL(IDE_DATA_REG, buffer, wcount);
251 } else {
252 hwif->OUTSW(IDE_DATA_REG, buffer, wcount<<1);
257 * The following routines are mainly used by the ATAPI drivers.
259 * These routines will round up any request for an odd number of bytes,
260 * so if an odd bytecount is specified, be sure that there's at least one
261 * extra byte allocated for the buffer.
264 static void atapi_input_bytes(ide_drive_t *drive, void *buffer, u32 bytecount)
266 ide_hwif_t *hwif = HWIF(drive);
268 ++bytecount;
269 #if defined(CONFIG_ATARI) || defined(CONFIG_Q40)
270 if (MACH_IS_ATARI || MACH_IS_Q40) {
271 /* Atari has a byte-swapped IDE interface */
272 insw_swapw(IDE_DATA_REG, buffer, bytecount / 2);
273 return;
275 #endif /* CONFIG_ATARI || CONFIG_Q40 */
276 hwif->ata_input_data(drive, buffer, bytecount / 4);
277 if ((bytecount & 0x03) >= 2)
278 hwif->INSW(IDE_DATA_REG, ((u8 *)buffer)+(bytecount & ~0x03), 1);
281 static void atapi_output_bytes(ide_drive_t *drive, void *buffer, u32 bytecount)
283 ide_hwif_t *hwif = HWIF(drive);
285 ++bytecount;
286 #if defined(CONFIG_ATARI) || defined(CONFIG_Q40)
287 if (MACH_IS_ATARI || MACH_IS_Q40) {
288 /* Atari has a byte-swapped IDE interface */
289 outsw_swapw(IDE_DATA_REG, buffer, bytecount / 2);
290 return;
292 #endif /* CONFIG_ATARI || CONFIG_Q40 */
293 hwif->ata_output_data(drive, buffer, bytecount / 4);
294 if ((bytecount & 0x03) >= 2)
295 hwif->OUTSW(IDE_DATA_REG, ((u8*)buffer)+(bytecount & ~0x03), 1);
298 void default_hwif_transport(ide_hwif_t *hwif)
300 hwif->ata_input_data = ata_input_data;
301 hwif->ata_output_data = ata_output_data;
302 hwif->atapi_input_bytes = atapi_input_bytes;
303 hwif->atapi_output_bytes = atapi_output_bytes;
307 * Beginning of Taskfile OPCODE Library and feature sets.
309 void ide_fix_driveid (struct hd_driveid *id)
311 #ifndef __LITTLE_ENDIAN
312 # ifdef __BIG_ENDIAN
313 int i;
314 u16 *stringcast;
316 id->config = __le16_to_cpu(id->config);
317 id->cyls = __le16_to_cpu(id->cyls);
318 id->reserved2 = __le16_to_cpu(id->reserved2);
319 id->heads = __le16_to_cpu(id->heads);
320 id->track_bytes = __le16_to_cpu(id->track_bytes);
321 id->sector_bytes = __le16_to_cpu(id->sector_bytes);
322 id->sectors = __le16_to_cpu(id->sectors);
323 id->vendor0 = __le16_to_cpu(id->vendor0);
324 id->vendor1 = __le16_to_cpu(id->vendor1);
325 id->vendor2 = __le16_to_cpu(id->vendor2);
326 stringcast = (u16 *)&id->serial_no[0];
327 for (i = 0; i < (20/2); i++)
328 stringcast[i] = __le16_to_cpu(stringcast[i]);
329 id->buf_type = __le16_to_cpu(id->buf_type);
330 id->buf_size = __le16_to_cpu(id->buf_size);
331 id->ecc_bytes = __le16_to_cpu(id->ecc_bytes);
332 stringcast = (u16 *)&id->fw_rev[0];
333 for (i = 0; i < (8/2); i++)
334 stringcast[i] = __le16_to_cpu(stringcast[i]);
335 stringcast = (u16 *)&id->model[0];
336 for (i = 0; i < (40/2); i++)
337 stringcast[i] = __le16_to_cpu(stringcast[i]);
338 id->dword_io = __le16_to_cpu(id->dword_io);
339 id->reserved50 = __le16_to_cpu(id->reserved50);
340 id->field_valid = __le16_to_cpu(id->field_valid);
341 id->cur_cyls = __le16_to_cpu(id->cur_cyls);
342 id->cur_heads = __le16_to_cpu(id->cur_heads);
343 id->cur_sectors = __le16_to_cpu(id->cur_sectors);
344 id->cur_capacity0 = __le16_to_cpu(id->cur_capacity0);
345 id->cur_capacity1 = __le16_to_cpu(id->cur_capacity1);
346 id->lba_capacity = __le32_to_cpu(id->lba_capacity);
347 id->dma_1word = __le16_to_cpu(id->dma_1word);
348 id->dma_mword = __le16_to_cpu(id->dma_mword);
349 id->eide_pio_modes = __le16_to_cpu(id->eide_pio_modes);
350 id->eide_dma_min = __le16_to_cpu(id->eide_dma_min);
351 id->eide_dma_time = __le16_to_cpu(id->eide_dma_time);
352 id->eide_pio = __le16_to_cpu(id->eide_pio);
353 id->eide_pio_iordy = __le16_to_cpu(id->eide_pio_iordy);
354 for (i = 0; i < 2; ++i)
355 id->words69_70[i] = __le16_to_cpu(id->words69_70[i]);
356 for (i = 0; i < 4; ++i)
357 id->words71_74[i] = __le16_to_cpu(id->words71_74[i]);
358 id->queue_depth = __le16_to_cpu(id->queue_depth);
359 for (i = 0; i < 4; ++i)
360 id->words76_79[i] = __le16_to_cpu(id->words76_79[i]);
361 id->major_rev_num = __le16_to_cpu(id->major_rev_num);
362 id->minor_rev_num = __le16_to_cpu(id->minor_rev_num);
363 id->command_set_1 = __le16_to_cpu(id->command_set_1);
364 id->command_set_2 = __le16_to_cpu(id->command_set_2);
365 id->cfsse = __le16_to_cpu(id->cfsse);
366 id->cfs_enable_1 = __le16_to_cpu(id->cfs_enable_1);
367 id->cfs_enable_2 = __le16_to_cpu(id->cfs_enable_2);
368 id->csf_default = __le16_to_cpu(id->csf_default);
369 id->dma_ultra = __le16_to_cpu(id->dma_ultra);
370 id->trseuc = __le16_to_cpu(id->trseuc);
371 id->trsEuc = __le16_to_cpu(id->trsEuc);
372 id->CurAPMvalues = __le16_to_cpu(id->CurAPMvalues);
373 id->mprc = __le16_to_cpu(id->mprc);
374 id->hw_config = __le16_to_cpu(id->hw_config);
375 id->acoustic = __le16_to_cpu(id->acoustic);
376 id->msrqs = __le16_to_cpu(id->msrqs);
377 id->sxfert = __le16_to_cpu(id->sxfert);
378 id->sal = __le16_to_cpu(id->sal);
379 id->spg = __le32_to_cpu(id->spg);
380 id->lba_capacity_2 = __le64_to_cpu(id->lba_capacity_2);
381 for (i = 0; i < 22; i++)
382 id->words104_125[i] = __le16_to_cpu(id->words104_125[i]);
383 id->last_lun = __le16_to_cpu(id->last_lun);
384 id->word127 = __le16_to_cpu(id->word127);
385 id->dlf = __le16_to_cpu(id->dlf);
386 id->csfo = __le16_to_cpu(id->csfo);
387 for (i = 0; i < 26; i++)
388 id->words130_155[i] = __le16_to_cpu(id->words130_155[i]);
389 id->word156 = __le16_to_cpu(id->word156);
390 for (i = 0; i < 3; i++)
391 id->words157_159[i] = __le16_to_cpu(id->words157_159[i]);
392 id->cfa_power = __le16_to_cpu(id->cfa_power);
393 for (i = 0; i < 14; i++)
394 id->words161_175[i] = __le16_to_cpu(id->words161_175[i]);
395 for (i = 0; i < 31; i++)
396 id->words176_205[i] = __le16_to_cpu(id->words176_205[i]);
397 for (i = 0; i < 48; i++)
398 id->words206_254[i] = __le16_to_cpu(id->words206_254[i]);
399 id->integrity_word = __le16_to_cpu(id->integrity_word);
400 # else
401 # error "Please fix <asm/byteorder.h>"
402 # endif
403 #endif
406 /* FIXME: exported for use by the USB storage (isd200.c) code only */
407 EXPORT_SYMBOL(ide_fix_driveid);
409 void ide_fixstring (u8 *s, const int bytecount, const int byteswap)
411 u8 *p = s, *end = &s[bytecount & ~1]; /* bytecount must be even */
413 if (byteswap) {
414 /* convert from big-endian to host byte order */
415 for (p = end ; p != s;) {
416 unsigned short *pp = (unsigned short *) (p -= 2);
417 *pp = ntohs(*pp);
420 /* strip leading blanks */
421 while (s != end && *s == ' ')
422 ++s;
423 /* compress internal blanks and strip trailing blanks */
424 while (s != end && *s) {
425 if (*s++ != ' ' || (s != end && *s && *s != ' '))
426 *p++ = *(s-1);
428 /* wipe out trailing garbage */
429 while (p != end)
430 *p++ = '\0';
433 EXPORT_SYMBOL(ide_fixstring);
436 * Needed for PCI irq sharing
438 int drive_is_ready (ide_drive_t *drive)
440 ide_hwif_t *hwif = HWIF(drive);
441 u8 stat = 0;
443 if (drive->waiting_for_dma)
444 return hwif->ide_dma_test_irq(drive);
446 #if 0
447 /* need to guarantee 400ns since last command was issued */
448 udelay(1);
449 #endif
451 #ifdef CONFIG_IDEPCI_SHARE_IRQ
453 * We do a passive status test under shared PCI interrupts on
454 * cards that truly share the ATA side interrupt, but may also share
455 * an interrupt with another pci card/device. We make no assumptions
456 * about possible isa-pnp and pci-pnp issues yet.
458 if (IDE_CONTROL_REG)
459 stat = hwif->INB(IDE_ALTSTATUS_REG);
460 else
461 #endif /* CONFIG_IDEPCI_SHARE_IRQ */
462 /* Note: this may clear a pending IRQ!! */
463 stat = hwif->INB(IDE_STATUS_REG);
465 if (stat & BUSY_STAT)
466 /* drive busy: definitely not interrupting */
467 return 0;
469 /* drive ready: *might* be interrupting */
470 return 1;
473 EXPORT_SYMBOL(drive_is_ready);
476 * Global for All, and taken from ide-pmac.c. Can be called
477 * with spinlock held & IRQs disabled, so don't schedule !
479 int wait_for_ready (ide_drive_t *drive, int timeout)
481 ide_hwif_t *hwif = HWIF(drive);
482 u8 stat = 0;
484 while(--timeout) {
485 stat = hwif->INB(IDE_STATUS_REG);
486 if (!(stat & BUSY_STAT)) {
487 if (drive->ready_stat == 0)
488 break;
489 else if ((stat & drive->ready_stat)||(stat & ERR_STAT))
490 break;
492 mdelay(1);
494 if ((stat & ERR_STAT) || timeout <= 0) {
495 if (stat & ERR_STAT) {
496 printk(KERN_ERR "%s: wait_for_ready, "
497 "error status: %x\n", drive->name, stat);
499 return 1;
501 return 0;
505 * This routine busy-waits for the drive status to be not "busy".
506 * It then checks the status for all of the "good" bits and none
507 * of the "bad" bits, and if all is okay it returns 0. All other
508 * cases return 1 after invoking ide_error() -- caller should just return.
510 * This routine should get fixed to not hog the cpu during extra long waits..
511 * That could be done by busy-waiting for the first jiffy or two, and then
512 * setting a timer to wake up at half second intervals thereafter,
513 * until timeout is achieved, before timing out.
515 int ide_wait_stat (ide_startstop_t *startstop, ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout)
517 ide_hwif_t *hwif = HWIF(drive);
518 u8 stat;
519 int i;
520 unsigned long flags;
522 /* bail early if we've exceeded max_failures */
523 if (drive->max_failures && (drive->failures > drive->max_failures)) {
524 *startstop = ide_stopped;
525 return 1;
528 udelay(1); /* spec allows drive 400ns to assert "BUSY" */
529 if ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) {
530 local_irq_set(flags);
531 timeout += jiffies;
532 while ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) {
533 if (time_after(jiffies, timeout)) {
535 * One last read after the timeout in case
536 * heavy interrupt load made us not make any
537 * progress during the timeout..
539 stat = hwif->INB(IDE_STATUS_REG);
540 if (!(stat & BUSY_STAT))
541 break;
543 local_irq_restore(flags);
544 *startstop = ide_error(drive, "status timeout", stat);
545 return 1;
548 local_irq_restore(flags);
551 * Allow status to settle, then read it again.
552 * A few rare drives vastly violate the 400ns spec here,
553 * so we'll wait up to 10usec for a "good" status
554 * rather than expensively fail things immediately.
555 * This fix courtesy of Matthew Faupel & Niccolo Rigacci.
557 for (i = 0; i < 10; i++) {
558 udelay(1);
559 if (OK_STAT((stat = hwif->INB(IDE_STATUS_REG)), good, bad))
560 return 0;
562 *startstop = ide_error(drive, "status error", stat);
563 return 1;
566 EXPORT_SYMBOL(ide_wait_stat);
569 * All hosts that use the 80c ribbon must use!
570 * The name is derived from upper byte of word 93 and the 80c ribbon.
572 u8 eighty_ninty_three (ide_drive_t *drive)
574 ide_hwif_t *hwif = drive->hwif;
575 struct hd_driveid *id = drive->id;
577 if (hwif->cbl == ATA_CBL_PATA40_SHORT)
578 return 1;
580 if (hwif->cbl != ATA_CBL_PATA80)
581 goto no_80w;
583 /* Check for SATA but only if we are ATA5 or higher */
584 if (id->hw_config == 0 && (id->major_rev_num & 0x7FE0))
585 return 1;
588 * FIXME:
589 * - change master/slave IDENTIFY order
590 * - force bit13 (80c cable present) check
591 * (unless the slave device is pre-ATA3)
593 #ifndef CONFIG_IDEDMA_IVB
594 if (id->hw_config & 0x4000)
595 #else
596 if (id->hw_config & 0x6000)
597 #endif
598 return 1;
600 no_80w:
601 if (drive->udma33_warned == 1)
602 return 0;
604 printk(KERN_WARNING "%s: %s side 80-wire cable detection failed, "
605 "limiting max speed to UDMA33\n",
606 drive->name,
607 hwif->cbl == ATA_CBL_PATA80 ? "drive" : "host");
609 drive->udma33_warned = 1;
611 return 0;
614 int ide_ata66_check (ide_drive_t *drive, ide_task_t *args)
616 if ((args->tfRegister[IDE_COMMAND_OFFSET] == WIN_SETFEATURES) &&
617 (args->tfRegister[IDE_SECTOR_OFFSET] > XFER_UDMA_2) &&
618 (args->tfRegister[IDE_FEATURE_OFFSET] == SETFEATURES_XFER)) {
619 if (eighty_ninty_three(drive) == 0) {
620 printk(KERN_WARNING "%s: UDMA speeds >UDMA33 cannot "
621 "be set\n", drive->name);
622 return 1;
626 return 0;
630 * Backside of HDIO_DRIVE_CMD call of SETFEATURES_XFER.
631 * 1 : Safe to update drive->id DMA registers.
632 * 0 : OOPs not allowed.
634 int set_transfer (ide_drive_t *drive, ide_task_t *args)
636 if ((args->tfRegister[IDE_COMMAND_OFFSET] == WIN_SETFEATURES) &&
637 (args->tfRegister[IDE_SECTOR_OFFSET] >= XFER_SW_DMA_0) &&
638 (args->tfRegister[IDE_FEATURE_OFFSET] == SETFEATURES_XFER) &&
639 (drive->id->dma_ultra ||
640 drive->id->dma_mword ||
641 drive->id->dma_1word))
642 return 1;
644 return 0;
647 #ifdef CONFIG_BLK_DEV_IDEDMA
648 static u8 ide_auto_reduce_xfer (ide_drive_t *drive)
650 if (!drive->crc_count)
651 return drive->current_speed;
652 drive->crc_count = 0;
654 switch(drive->current_speed) {
655 case XFER_UDMA_7: return XFER_UDMA_6;
656 case XFER_UDMA_6: return XFER_UDMA_5;
657 case XFER_UDMA_5: return XFER_UDMA_4;
658 case XFER_UDMA_4: return XFER_UDMA_3;
659 case XFER_UDMA_3: return XFER_UDMA_2;
660 case XFER_UDMA_2: return XFER_UDMA_1;
661 case XFER_UDMA_1: return XFER_UDMA_0;
663 * OOPS we do not goto non Ultra DMA modes
664 * without iCRC's available we force
665 * the system to PIO and make the user
666 * invoke the ATA-1 ATA-2 DMA modes.
668 case XFER_UDMA_0:
669 default: return XFER_PIO_4;
672 #endif /* CONFIG_BLK_DEV_IDEDMA */
675 * Update the
677 int ide_driveid_update (ide_drive_t *drive)
679 ide_hwif_t *hwif = HWIF(drive);
680 struct hd_driveid *id;
681 #if 0
682 id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC);
683 if (!id)
684 return 0;
686 taskfile_lib_get_identify(drive, (char *)&id);
688 ide_fix_driveid(id);
689 if (id) {
690 drive->id->dma_ultra = id->dma_ultra;
691 drive->id->dma_mword = id->dma_mword;
692 drive->id->dma_1word = id->dma_1word;
693 /* anything more ? */
694 kfree(id);
696 return 1;
697 #else
699 * Re-read drive->id for possible DMA mode
700 * change (copied from ide-probe.c)
702 unsigned long timeout, flags;
704 SELECT_MASK(drive, 1);
705 if (IDE_CONTROL_REG)
706 hwif->OUTB(drive->ctl,IDE_CONTROL_REG);
707 msleep(50);
708 hwif->OUTB(WIN_IDENTIFY, IDE_COMMAND_REG);
709 timeout = jiffies + WAIT_WORSTCASE;
710 do {
711 if (time_after(jiffies, timeout)) {
712 SELECT_MASK(drive, 0);
713 return 0; /* drive timed-out */
715 msleep(50); /* give drive a breather */
716 } while (hwif->INB(IDE_ALTSTATUS_REG) & BUSY_STAT);
717 msleep(50); /* wait for IRQ and DRQ_STAT */
718 if (!OK_STAT(hwif->INB(IDE_STATUS_REG),DRQ_STAT,BAD_R_STAT)) {
719 SELECT_MASK(drive, 0);
720 printk("%s: CHECK for good STATUS\n", drive->name);
721 return 0;
723 local_irq_save(flags);
724 SELECT_MASK(drive, 0);
725 id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC);
726 if (!id) {
727 local_irq_restore(flags);
728 return 0;
730 ata_input_data(drive, id, SECTOR_WORDS);
731 (void) hwif->INB(IDE_STATUS_REG); /* clear drive IRQ */
732 local_irq_enable();
733 local_irq_restore(flags);
734 ide_fix_driveid(id);
735 if (id) {
736 drive->id->dma_ultra = id->dma_ultra;
737 drive->id->dma_mword = id->dma_mword;
738 drive->id->dma_1word = id->dma_1word;
739 /* anything more ? */
740 kfree(id);
743 return 1;
744 #endif
748 * Similar to ide_wait_stat(), except it never calls ide_error internally.
749 * This is a kludge to handle the new ide_config_drive_speed() function,
750 * and should not otherwise be used anywhere. Eventually, the tuneproc's
751 * should be updated to return ide_startstop_t, in which case we can get
752 * rid of this abomination again. :) -ml
754 * It is gone..........
756 * const char *msg == consider adding for verbose errors.
758 int ide_config_drive_speed (ide_drive_t *drive, u8 speed)
760 ide_hwif_t *hwif = HWIF(drive);
761 int i, error = 1;
762 u8 stat;
764 // while (HWGROUP(drive)->busy)
765 // msleep(50);
767 #ifdef CONFIG_BLK_DEV_IDEDMA
768 if (hwif->ide_dma_check) /* check if host supports DMA */
769 hwif->dma_host_off(drive);
770 #endif
773 * Don't use ide_wait_cmd here - it will
774 * attempt to set_geometry and recalibrate,
775 * but for some reason these don't work at
776 * this point (lost interrupt).
779 * Select the drive, and issue the SETFEATURES command
781 disable_irq_nosync(hwif->irq);
784 * FIXME: we race against the running IRQ here if
785 * this is called from non IRQ context. If we use
786 * disable_irq() we hang on the error path. Work
787 * is needed.
790 udelay(1);
791 SELECT_DRIVE(drive);
792 SELECT_MASK(drive, 0);
793 udelay(1);
794 if (IDE_CONTROL_REG)
795 hwif->OUTB(drive->ctl | 2, IDE_CONTROL_REG);
796 hwif->OUTB(speed, IDE_NSECTOR_REG);
797 hwif->OUTB(SETFEATURES_XFER, IDE_FEATURE_REG);
798 hwif->OUTB(WIN_SETFEATURES, IDE_COMMAND_REG);
799 if ((IDE_CONTROL_REG) && (drive->quirk_list == 2))
800 hwif->OUTB(drive->ctl, IDE_CONTROL_REG);
801 udelay(1);
803 * Wait for drive to become non-BUSY
805 if ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) {
806 unsigned long flags, timeout;
807 local_irq_set(flags);
808 timeout = jiffies + WAIT_CMD;
809 while ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) {
810 if (time_after(jiffies, timeout))
811 break;
813 local_irq_restore(flags);
817 * Allow status to settle, then read it again.
818 * A few rare drives vastly violate the 400ns spec here,
819 * so we'll wait up to 10usec for a "good" status
820 * rather than expensively fail things immediately.
821 * This fix courtesy of Matthew Faupel & Niccolo Rigacci.
823 for (i = 0; i < 10; i++) {
824 udelay(1);
825 if (OK_STAT((stat = hwif->INB(IDE_STATUS_REG)), DRIVE_READY, BUSY_STAT|DRQ_STAT|ERR_STAT)) {
826 error = 0;
827 break;
831 SELECT_MASK(drive, 0);
833 enable_irq(hwif->irq);
835 if (error) {
836 (void) ide_dump_status(drive, "set_drive_speed_status", stat);
837 return error;
840 drive->id->dma_ultra &= ~0xFF00;
841 drive->id->dma_mword &= ~0x0F00;
842 drive->id->dma_1word &= ~0x0F00;
844 #ifdef CONFIG_BLK_DEV_IDEDMA
845 if (speed >= XFER_SW_DMA_0)
846 hwif->dma_host_on(drive);
847 else if (hwif->ide_dma_check) /* check if host supports DMA */
848 hwif->dma_off_quietly(drive);
849 #endif
851 switch(speed) {
852 case XFER_UDMA_7: drive->id->dma_ultra |= 0x8080; break;
853 case XFER_UDMA_6: drive->id->dma_ultra |= 0x4040; break;
854 case XFER_UDMA_5: drive->id->dma_ultra |= 0x2020; break;
855 case XFER_UDMA_4: drive->id->dma_ultra |= 0x1010; break;
856 case XFER_UDMA_3: drive->id->dma_ultra |= 0x0808; break;
857 case XFER_UDMA_2: drive->id->dma_ultra |= 0x0404; break;
858 case XFER_UDMA_1: drive->id->dma_ultra |= 0x0202; break;
859 case XFER_UDMA_0: drive->id->dma_ultra |= 0x0101; break;
860 case XFER_MW_DMA_2: drive->id->dma_mword |= 0x0404; break;
861 case XFER_MW_DMA_1: drive->id->dma_mword |= 0x0202; break;
862 case XFER_MW_DMA_0: drive->id->dma_mword |= 0x0101; break;
863 case XFER_SW_DMA_2: drive->id->dma_1word |= 0x0404; break;
864 case XFER_SW_DMA_1: drive->id->dma_1word |= 0x0202; break;
865 case XFER_SW_DMA_0: drive->id->dma_1word |= 0x0101; break;
866 default: break;
868 if (!drive->init_speed)
869 drive->init_speed = speed;
870 drive->current_speed = speed;
871 return error;
874 EXPORT_SYMBOL(ide_config_drive_speed);
878 * This should get invoked any time we exit the driver to
879 * wait for an interrupt response from a drive. handler() points
880 * at the appropriate code to handle the next interrupt, and a
881 * timer is started to prevent us from waiting forever in case
882 * something goes wrong (see the ide_timer_expiry() handler later on).
884 * See also ide_execute_command
886 static void __ide_set_handler (ide_drive_t *drive, ide_handler_t *handler,
887 unsigned int timeout, ide_expiry_t *expiry)
889 ide_hwgroup_t *hwgroup = HWGROUP(drive);
891 if (hwgroup->handler != NULL) {
892 printk(KERN_CRIT "%s: ide_set_handler: handler not null; "
893 "old=%p, new=%p\n",
894 drive->name, hwgroup->handler, handler);
896 hwgroup->handler = handler;
897 hwgroup->expiry = expiry;
898 hwgroup->timer.expires = jiffies + timeout;
899 hwgroup->req_gen_timer = hwgroup->req_gen;
900 add_timer(&hwgroup->timer);
903 void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler,
904 unsigned int timeout, ide_expiry_t *expiry)
906 unsigned long flags;
907 spin_lock_irqsave(&ide_lock, flags);
908 __ide_set_handler(drive, handler, timeout, expiry);
909 spin_unlock_irqrestore(&ide_lock, flags);
912 EXPORT_SYMBOL(ide_set_handler);
915 * ide_execute_command - execute an IDE command
916 * @drive: IDE drive to issue the command against
917 * @command: command byte to write
918 * @handler: handler for next phase
919 * @timeout: timeout for command
920 * @expiry: handler to run on timeout
922 * Helper function to issue an IDE command. This handles the
923 * atomicity requirements, command timing and ensures that the
924 * handler and IRQ setup do not race. All IDE command kick off
925 * should go via this function or do equivalent locking.
928 void ide_execute_command(ide_drive_t *drive, task_ioreg_t cmd, ide_handler_t *handler, unsigned timeout, ide_expiry_t *expiry)
930 unsigned long flags;
931 ide_hwgroup_t *hwgroup = HWGROUP(drive);
932 ide_hwif_t *hwif = HWIF(drive);
934 spin_lock_irqsave(&ide_lock, flags);
936 BUG_ON(hwgroup->handler);
937 hwgroup->handler = handler;
938 hwgroup->expiry = expiry;
939 hwgroup->timer.expires = jiffies + timeout;
940 hwgroup->req_gen_timer = hwgroup->req_gen;
941 add_timer(&hwgroup->timer);
942 hwif->OUTBSYNC(drive, cmd, IDE_COMMAND_REG);
943 /* Drive takes 400nS to respond, we must avoid the IRQ being
944 serviced before that.
946 FIXME: we could skip this delay with care on non shared
947 devices
949 ndelay(400);
950 spin_unlock_irqrestore(&ide_lock, flags);
953 EXPORT_SYMBOL(ide_execute_command);
956 /* needed below */
957 static ide_startstop_t do_reset1 (ide_drive_t *, int);
960 * atapi_reset_pollfunc() gets invoked to poll the interface for completion every 50ms
961 * during an atapi drive reset operation. If the drive has not yet responded,
962 * and we have not yet hit our maximum waiting time, then the timer is restarted
963 * for another 50ms.
965 static ide_startstop_t atapi_reset_pollfunc (ide_drive_t *drive)
967 ide_hwgroup_t *hwgroup = HWGROUP(drive);
968 ide_hwif_t *hwif = HWIF(drive);
969 u8 stat;
971 SELECT_DRIVE(drive);
972 udelay (10);
974 if (OK_STAT(stat = hwif->INB(IDE_STATUS_REG), 0, BUSY_STAT)) {
975 printk("%s: ATAPI reset complete\n", drive->name);
976 } else {
977 if (time_before(jiffies, hwgroup->poll_timeout)) {
978 BUG_ON(HWGROUP(drive)->handler != NULL);
979 ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL);
980 /* continue polling */
981 return ide_started;
983 /* end of polling */
984 hwgroup->polling = 0;
985 printk("%s: ATAPI reset timed-out, status=0x%02x\n",
986 drive->name, stat);
987 /* do it the old fashioned way */
988 return do_reset1(drive, 1);
990 /* done polling */
991 hwgroup->polling = 0;
992 hwgroup->resetting = 0;
993 return ide_stopped;
997 * reset_pollfunc() gets invoked to poll the interface for completion every 50ms
998 * during an ide reset operation. If the drives have not yet responded,
999 * and we have not yet hit our maximum waiting time, then the timer is restarted
1000 * for another 50ms.
1002 static ide_startstop_t reset_pollfunc (ide_drive_t *drive)
1004 ide_hwgroup_t *hwgroup = HWGROUP(drive);
1005 ide_hwif_t *hwif = HWIF(drive);
1006 u8 tmp;
1008 if (hwif->reset_poll != NULL) {
1009 if (hwif->reset_poll(drive)) {
1010 printk(KERN_ERR "%s: host reset_poll failure for %s.\n",
1011 hwif->name, drive->name);
1012 return ide_stopped;
1016 if (!OK_STAT(tmp = hwif->INB(IDE_STATUS_REG), 0, BUSY_STAT)) {
1017 if (time_before(jiffies, hwgroup->poll_timeout)) {
1018 BUG_ON(HWGROUP(drive)->handler != NULL);
1019 ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL);
1020 /* continue polling */
1021 return ide_started;
1023 printk("%s: reset timed-out, status=0x%02x\n", hwif->name, tmp);
1024 drive->failures++;
1025 } else {
1026 printk("%s: reset: ", hwif->name);
1027 if ((tmp = hwif->INB(IDE_ERROR_REG)) == 1) {
1028 printk("success\n");
1029 drive->failures = 0;
1030 } else {
1031 drive->failures++;
1032 printk("master: ");
1033 switch (tmp & 0x7f) {
1034 case 1: printk("passed");
1035 break;
1036 case 2: printk("formatter device error");
1037 break;
1038 case 3: printk("sector buffer error");
1039 break;
1040 case 4: printk("ECC circuitry error");
1041 break;
1042 case 5: printk("controlling MPU error");
1043 break;
1044 default:printk("error (0x%02x?)", tmp);
1046 if (tmp & 0x80)
1047 printk("; slave: failed");
1048 printk("\n");
1051 hwgroup->polling = 0; /* done polling */
1052 hwgroup->resetting = 0; /* done reset attempt */
1053 return ide_stopped;
1056 static void check_dma_crc(ide_drive_t *drive)
1058 #ifdef CONFIG_BLK_DEV_IDEDMA
1059 if (drive->crc_count) {
1060 drive->hwif->dma_off_quietly(drive);
1061 ide_set_xfer_rate(drive, ide_auto_reduce_xfer(drive));
1062 if (drive->current_speed >= XFER_SW_DMA_0)
1063 (void) HWIF(drive)->ide_dma_on(drive);
1064 } else
1065 ide_dma_off(drive);
1066 #endif
1069 static void ide_disk_pre_reset(ide_drive_t *drive)
1071 int legacy = (drive->id->cfs_enable_2 & 0x0400) ? 0 : 1;
1073 drive->special.all = 0;
1074 drive->special.b.set_geometry = legacy;
1075 drive->special.b.recalibrate = legacy;
1076 if (OK_TO_RESET_CONTROLLER)
1077 drive->mult_count = 0;
1078 if (!drive->keep_settings && !drive->using_dma)
1079 drive->mult_req = 0;
1080 if (drive->mult_req != drive->mult_count)
1081 drive->special.b.set_multmode = 1;
1084 static void pre_reset(ide_drive_t *drive)
1086 if (drive->media == ide_disk)
1087 ide_disk_pre_reset(drive);
1088 else
1089 drive->post_reset = 1;
1091 if (!drive->keep_settings) {
1092 if (drive->using_dma) {
1093 check_dma_crc(drive);
1094 } else {
1095 drive->unmask = 0;
1096 drive->io_32bit = 0;
1098 return;
1100 if (drive->using_dma)
1101 check_dma_crc(drive);
1103 if (HWIF(drive)->pre_reset != NULL)
1104 HWIF(drive)->pre_reset(drive);
1106 if (drive->current_speed != 0xff)
1107 drive->desired_speed = drive->current_speed;
1108 drive->current_speed = 0xff;
1112 * do_reset1() attempts to recover a confused drive by resetting it.
1113 * Unfortunately, resetting a disk drive actually resets all devices on
1114 * the same interface, so it can really be thought of as resetting the
1115 * interface rather than resetting the drive.
1117 * ATAPI devices have their own reset mechanism which allows them to be
1118 * individually reset without clobbering other devices on the same interface.
1120 * Unfortunately, the IDE interface does not generate an interrupt to let
1121 * us know when the reset operation has finished, so we must poll for this.
1122 * Equally poor, though, is the fact that this may a very long time to complete,
1123 * (up to 30 seconds worstcase). So, instead of busy-waiting here for it,
1124 * we set a timer to poll at 50ms intervals.
1126 static ide_startstop_t do_reset1 (ide_drive_t *drive, int do_not_try_atapi)
1128 unsigned int unit;
1129 unsigned long flags;
1130 ide_hwif_t *hwif;
1131 ide_hwgroup_t *hwgroup;
1133 spin_lock_irqsave(&ide_lock, flags);
1134 hwif = HWIF(drive);
1135 hwgroup = HWGROUP(drive);
1137 /* We must not reset with running handlers */
1138 BUG_ON(hwgroup->handler != NULL);
1140 /* For an ATAPI device, first try an ATAPI SRST. */
1141 if (drive->media != ide_disk && !do_not_try_atapi) {
1142 hwgroup->resetting = 1;
1143 pre_reset(drive);
1144 SELECT_DRIVE(drive);
1145 udelay (20);
1146 hwif->OUTBSYNC(drive, WIN_SRST, IDE_COMMAND_REG);
1147 ndelay(400);
1148 hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
1149 hwgroup->polling = 1;
1150 __ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL);
1151 spin_unlock_irqrestore(&ide_lock, flags);
1152 return ide_started;
1156 * First, reset any device state data we were maintaining
1157 * for any of the drives on this interface.
1159 for (unit = 0; unit < MAX_DRIVES; ++unit)
1160 pre_reset(&hwif->drives[unit]);
1162 #if OK_TO_RESET_CONTROLLER
1163 if (!IDE_CONTROL_REG) {
1164 spin_unlock_irqrestore(&ide_lock, flags);
1165 return ide_stopped;
1168 hwgroup->resetting = 1;
1170 * Note that we also set nIEN while resetting the device,
1171 * to mask unwanted interrupts from the interface during the reset.
1172 * However, due to the design of PC hardware, this will cause an
1173 * immediate interrupt due to the edge transition it produces.
1174 * This single interrupt gives us a "fast poll" for drives that
1175 * recover from reset very quickly, saving us the first 50ms wait time.
1177 /* set SRST and nIEN */
1178 hwif->OUTBSYNC(drive, drive->ctl|6,IDE_CONTROL_REG);
1179 /* more than enough time */
1180 udelay(10);
1181 if (drive->quirk_list == 2) {
1182 /* clear SRST and nIEN */
1183 hwif->OUTBSYNC(drive, drive->ctl, IDE_CONTROL_REG);
1184 } else {
1185 /* clear SRST, leave nIEN */
1186 hwif->OUTBSYNC(drive, drive->ctl|2, IDE_CONTROL_REG);
1188 /* more than enough time */
1189 udelay(10);
1190 hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
1191 hwgroup->polling = 1;
1192 __ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL);
1195 * Some weird controller like resetting themselves to a strange
1196 * state when the disks are reset this way. At least, the Winbond
1197 * 553 documentation says that
1199 if (hwif->resetproc != NULL) {
1200 hwif->resetproc(drive);
1203 #endif /* OK_TO_RESET_CONTROLLER */
1205 spin_unlock_irqrestore(&ide_lock, flags);
1206 return ide_started;
1210 * ide_do_reset() is the entry point to the drive/interface reset code.
1213 ide_startstop_t ide_do_reset (ide_drive_t *drive)
1215 return do_reset1(drive, 0);
1218 EXPORT_SYMBOL(ide_do_reset);
1221 * ide_wait_not_busy() waits for the currently selected device on the hwif
1222 * to report a non-busy status, see comments in probe_hwif().
1224 int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout)
1226 u8 stat = 0;
1228 while(timeout--) {
1230 * Turn this into a schedule() sleep once I'm sure
1231 * about locking issues (2.5 work ?).
1233 mdelay(1);
1234 stat = hwif->INB(hwif->io_ports[IDE_STATUS_OFFSET]);
1235 if ((stat & BUSY_STAT) == 0)
1236 return 0;
1238 * Assume a value of 0xff means nothing is connected to
1239 * the interface and it doesn't implement the pull-down
1240 * resistor on D7.
1242 if (stat == 0xff)
1243 return -ENODEV;
1244 touch_softlockup_watchdog();
1245 touch_nmi_watchdog();
1247 return -EBUSY;
1250 EXPORT_SYMBOL_GPL(ide_wait_not_busy);