drivers/net/wireless/mwifiex/decl.h

   1 /*
   2  * Marvell Wireless LAN device driver: generic data structures and APIs
   3  *
   4  * Copyright (C) 2011, Marvell International Ltd.
   5  *
   6  * This software file (the "File") is distributed by Marvell International
   7  * Ltd. under the terms of the GNU General Public License Version 2, June 1991
   8  * (the "License").  You may use, redistribute and/or modify this File in
   9  * accordance with the terms and conditions of the License, a copy of which
  10  * is available by writing to the Free Software Foundation, Inc.,
  11  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
  12  * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
  13  *
  14  * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
  15  * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
  16  * ARE EXPRESSLY DISCLAIMED.  The License provides additional details about
  17  * this warranty disclaimer.
  18  */
  19
  20 #ifndef _MWIFIEX_DECL_H_
  21 #define _MWIFIEX_DECL_H_
  22
  23 #undef pr_fmt
  24 #define pr_fmt(fmt)     KBUILD_MODNAME ": " fmt
  25
  26 #include <linux/wait.h>
  27 #include <linux/timer.h>
  28 #include <linux/ieee80211.h>
  29
  30
  31 #define MWIFIEX_MAX_BSS_NUM         (1)
  32
  33 #define MWIFIEX_MIN_DATA_HEADER_LEN 32  /* (sizeof(mwifiex_txpd)) */
  34
  35 #define MWIFIEX_MAX_TX_BASTREAM_SUPPORTED       2
  36 #define MWIFIEX_MAX_RX_BASTREAM_SUPPORTED       16
  37
  38 #define MWIFIEX_AMPDU_DEF_TXWINSIZE        32
  39 #define MWIFIEX_AMPDU_DEF_RXWINSIZE        16
  40 #define MWIFIEX_DEFAULT_BLOCK_ACK_TIMEOUT  0xffff
  41
  42 #define MWIFIEX_RATE_INDEX_HRDSSS0 0
  43 #define MWIFIEX_RATE_INDEX_HRDSSS3 3
  44 #define MWIFIEX_RATE_INDEX_OFDM0   4
  45 #define MWIFIEX_RATE_INDEX_OFDM7   11
  46 #define MWIFIEX_RATE_INDEX_MCS0    12
  47
  48 #define MWIFIEX_RATE_BITMAP_OFDM0  16
  49 #define MWIFIEX_RATE_BITMAP_OFDM7  23
  50 #define MWIFIEX_RATE_BITMAP_MCS0   32
  51 #define MWIFIEX_RATE_BITMAP_MCS127 159
  52
  53 #define MWIFIEX_RX_DATA_BUF_SIZE     (4 * 1024)
  54 #define MWIFIEX_RX_CMD_BUF_SIZE      (2 * 1024)
  55
  56 #define MWIFIEX_RTS_MIN_VALUE              (0)
  57 #define MWIFIEX_RTS_MAX_VALUE              (2347)
  58 #define MWIFIEX_FRAG_MIN_VALUE             (256)
  59 #define MWIFIEX_FRAG_MAX_VALUE             (2346)
  60
  61 #define MWIFIEX_SDIO_BLOCK_SIZE            256
  62
  63 #define MWIFIEX_BUF_FLAG_REQUEUED_PKT      BIT(0)
  64
  65 enum mwifiex_error_code {
  66         MWIFIEX_ERROR_NO_ERROR = 0,
  67         MWIFIEX_ERROR_FW_NOT_READY = 0x00000001,
  68         MWIFIEX_ERROR_FW_BUSY,
  69         MWIFIEX_ERROR_FW_CMDRESP,
  70         MWIFIEX_ERROR_PKT_SIZE_INVALID = 0x80000001,
  71         MWIFIEX_ERROR_PKT_TIMEOUT,
  72         MWIFIEX_ERROR_CMD_INVALID,
  73         MWIFIEX_ERROR_CMD_TIMEOUT,
  74         MWIFIEX_ERROR_CMD_DNLD_FAIL,
  75         MWIFIEX_ERROR_CMD_CANCEL,
  76         MWIFIEX_ERROR_CMD_RESP_FAIL,
  77         MWIFIEX_ERROR_ASSOC_FAIL,
  78         MWIFIEX_ERROR_EVENT_UNKNOWN,
  79         MWIFIEX_ERROR_INVALID_PARAMETER,
  80 };
  81
  82 enum mwifiex_bss_type {
  83         MWIFIEX_BSS_TYPE_STA = 0,
  84         MWIFIEX_BSS_TYPE_UAP = 1,
  85         MWIFIEX_BSS_TYPE_ANY = 0xff,
  86 };
  87
  88 enum mwifiex_bss_role {
  89         MWIFIEX_BSS_ROLE_STA = 0,
  90         MWIFIEX_BSS_ROLE_UAP = 1,
  91         MWIFIEX_BSS_ROLE_ANY = 0xff,
  92 };
  93
  94 #define BSS_ROLE_BIT_MASK    BIT(0)
  95
  96 #define GET_BSS_ROLE(priv)   ((priv)->bss_role & BSS_ROLE_BIT_MASK)
  97
  98 enum mwifiex_data_frame_type {
  99         MWIFIEX_DATA_FRAME_TYPE_ETH_II = 0,
 100         MWIFIEX_DATA_FRAME_TYPE_802_11,
 101 };
 102
 103 struct mwifiex_fw_image {
 104         u8 *helper_buf;
 105         u32 helper_len;
 106         u8 *fw_buf;
 107         u32 fw_len;
 108 };
 109
 110 struct mwifiex_802_11_ssid {
 111         u32 ssid_len;
 112         u8 ssid[IEEE80211_MAX_SSID_LEN];
 113 };
 114
 115 struct mwifiex_wait_queue {
 116         u32 bss_index;
 117         wait_queue_head_t *wait;
 118         u16 *condition;
 119         u32 start_time;
 120         int status;
 121         u32 enabled;
 122 };
 123
 124 struct mwifiex_rxinfo {
 125         u8 bss_index;
 126         struct sk_buff *parent;
 127         u8 use_count;
 128 };
 129
 130 struct mwifiex_txinfo {
 131         u32 status_code;
 132         u8 flags;
 133         u8 bss_index;
 134 };
 135
 136 struct mwifiex_bss_attr {
 137         u32 bss_type;
 138         u32 frame_type;
 139         u32 active;
 140         u32 bss_priority;
 141         u32 bss_num;
 142 };
 143
 144 enum mwifiex_cmd_result_e {
 145         MWIFIEX_CMD_RESULT_SUCCESS = 0,
 146         MWIFIEX_CMD_RESULT_FAILURE = 1,
 147         MWIFIEX_CMD_RESULT_TIMEOUT = 2,
 148         MWIFIEX_CMD_RESULT_INVALID_DATA = 3
 149 } __packed;
 150
 151 enum mwifiex_wmm_ac_e {
 152         WMM_AC_BK,
 153         WMM_AC_BE,
 154         WMM_AC_VI,
 155         WMM_AC_VO
 156 } __packed;
 157
 158 enum mwifiex_wmm_queue_config_action_e {
 159         MWIFIEX_WMM_QUEUE_CONFIG_ACTION_GET = 0,
 160         MWIFIEX_WMM_QUEUE_CONFIG_ACTION_SET = 1,
 161         MWIFIEX_WMM_QUEUE_CONFIG_ACTION_DEFAULT = 2,
 162         MWIFIEX_WMM_QUEUE_CONFIG_ACTION_MAX
 163 } __packed;
 164
 165 enum mwifiex_wmm_queue_stats_action_e {
 166         MWIFIEX_WMM_STATS_ACTION_START = 0,
 167         MWIFIEX_WMM_STATS_ACTION_STOP = 1,
 168         MWIFIEX_WMM_STATS_ACTION_GET_CLR = 2,
 169         MWIFIEX_WMM_STATS_ACTION_SET_CFG = 3,   /* Not currently used */
 170         MWIFIEX_WMM_STATS_ACTION_GET_CFG = 4,   /* Not currently used */
 171         MWIFIEX_WMM_STATS_ACTION_MAX
 172 } __packed;
 173
 174 struct mwifiex_device {
 175         struct mwifiex_bss_attr bss_attr[MWIFIEX_MAX_BSS_NUM];
 176 };
 177 #endif /* !_MWIFIEX_DECL_H_ */