[CIFS] Correct cifs tcp retry when some data sent before getting EAGAIN.
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / pcmcia / hd64465_ss.c
blob316f8bcc878be674fa22cba22e4781b14fc3ec43
1 /*
2 * $Id: hd64465_ss.c,v 1.7 2003/07/06 14:42:50 lethal Exp $
4 * Device driver for the PCMCIA controller module of the
5 * Hitachi HD64465 handheld companion chip.
7 * Note that the HD64465 provides a very thin PCMCIA host bridge
8 * layer, requiring a lot of the work of supporting cards to be
9 * performed by the processor. For example: mapping of card
10 * interrupts to processor IRQs is done by IRQ demuxing software;
11 * IO and memory mappings are fixed; setting voltages according
12 * to card Voltage Select pins etc is done in software.
14 * Note also that this driver uses only the simple, fixed,
15 * 16MB, 16-bit wide mappings to PCMCIA spaces defined by the
16 * HD64465. Larger mappings, smaller mappings, or mappings of
17 * different width to the same socket, are all possible only by
18 * involving the SH7750's MMU, which is considered unnecessary here.
19 * The downside is that it may be possible for some drivers to
20 * break because they need or expect 8-bit mappings.
22 * This driver currently supports only the following configuration:
23 * SH7750 CPU, HD64465, TPS2206 voltage control chip.
25 * by Greg Banks <gbanks@pocketpenguins.com>
26 * (c) 2000 PocketPenguins Inc
29 #include <linux/types.h>
30 #include <linux/module.h>
31 #include <linux/init.h>
32 #include <linux/string.h>
33 #include <linux/kernel.h>
34 #include <linux/ioport.h>
35 #include <linux/mm.h>
36 #include <linux/vmalloc.h>
37 #include <asm/errno.h>
38 #include <linux/irq.h>
39 #include <linux/interrupt.h>
40 #include <linux/device.h>
42 #include <asm/io.h>
43 #include <asm/hd64465/hd64465.h>
44 #include <asm/hd64465/io.h>
46 #include <pcmcia/cs_types.h>
47 #include <pcmcia/cs.h>
48 #include <pcmcia/cistpl.h>
49 #include <pcmcia/ds.h>
50 #include <pcmcia/ss.h>
51 #include <pcmcia/bulkmem.h>
52 #include "cs_internal.h"
54 #define MODNAME "hd64465_ss"
56 /* #define HD64465_DEBUG 1 */
58 #if HD64465_DEBUG
59 #define DPRINTK(args...) printk(MODNAME ": " args)
60 #else
61 #define DPRINTK(args...)
62 #endif
64 extern int hd64465_io_debug;
65 extern void * p3_ioremap(unsigned long phys_addr, unsigned long size, unsigned long flags);
66 extern void p3_iounmap(void *addr);
68 /*============================================================*/
70 #define HS_IO_MAP_SIZE (64*1024)
72 typedef struct hs_socket_t
74 unsigned int number;
75 u_int irq;
76 u_long mem_base;
77 void *io_base;
78 u_long mem_length;
79 u_int ctrl_base;
80 socket_state_t state;
81 pccard_io_map io_maps[MAX_IO_WIN];
82 pccard_mem_map mem_maps[MAX_WIN];
83 struct pcmcia_socket socket;
84 } hs_socket_t;
88 #define HS_MAX_SOCKETS 2
89 static hs_socket_t hs_sockets[HS_MAX_SOCKETS];
91 #define hs_in(sp, r) inb((sp)->ctrl_base + (r))
92 #define hs_out(sp, v, r) outb(v, (sp)->ctrl_base + (r))
95 /* translate a boolean value to a bit in a register */
96 #define bool_to_regbit(sp, r, bi, bo) \
97 do { \
98 unsigned short v = hs_in(sp, r); \
99 if (bo) \
100 v |= (bi); \
101 else \
102 v &= ~(bi); \
103 hs_out(sp, v, r); \
104 } while(0)
106 /* register offsets from HD64465_REG_PCC[01]ISR */
107 #define ISR 0x0
108 #define GCR 0x2
109 #define CSCR 0x4
110 #define CSCIER 0x6
111 #define SCR 0x8
114 /* Mask and values for CSCIER register */
115 #define IER_MASK 0x80
116 #define IER_ON 0x3f /* interrupts on */
117 #define IER_OFF 0x00 /* interrupts off */
119 /*============================================================*/
121 #if HD64465_DEBUG > 10
123 static void cis_hex_dump(const unsigned char *x, int len)
125 int i;
127 for (i=0 ; i<len ; i++)
129 if (!(i & 0xf))
130 printk("\n%08x", (unsigned)(x + i));
131 printk(" %02x", *(volatile unsigned short*)x);
132 x += 2;
134 printk("\n");
137 #endif
138 /*============================================================*/
141 * This code helps create the illusion that the IREQ line from
142 * the PC card is mapped to one of the CPU's IRQ lines by the
143 * host bridge hardware (which is how every host bridge *except*
144 * the HD64465 works). In particular, it supports enabling
145 * and disabling the IREQ line by code which knows nothing
146 * about the host bridge (e.g. device drivers, IDE code) using
147 * the request_irq(), free_irq(), probe_irq_on() and probe_irq_off()
148 * functions. Also, it supports sharing the mapped IRQ with
149 * real hardware IRQs from the -IRL0-3 lines.
152 #define HS_NUM_MAPPED_IRQS 16 /* Limitation of the PCMCIA code */
153 static struct
155 /* index is mapped irq number */
156 hs_socket_t *sock;
157 hw_irq_controller *old_handler;
158 } hs_mapped_irq[HS_NUM_MAPPED_IRQS];
160 static void hs_socket_enable_ireq(hs_socket_t *sp)
162 unsigned short cscier;
164 DPRINTK("hs_socket_enable_ireq(sock=%d)\n", sp->number);
166 cscier = hs_in(sp, CSCIER);
167 cscier &= ~HD64465_PCCCSCIER_PIREQE_MASK;
168 cscier |= HD64465_PCCCSCIER_PIREQE_LEVEL;
169 hs_out(sp, cscier, CSCIER);
172 static void hs_socket_disable_ireq(hs_socket_t *sp)
174 unsigned short cscier;
176 DPRINTK("hs_socket_disable_ireq(sock=%d)\n", sp->number);
178 cscier = hs_in(sp, CSCIER);
179 cscier &= ~HD64465_PCCCSCIER_PIREQE_MASK;
180 hs_out(sp, cscier, CSCIER);
183 static unsigned int hs_startup_irq(unsigned int irq)
185 hs_socket_enable_ireq(hs_mapped_irq[irq].sock);
186 hs_mapped_irq[irq].old_handler->startup(irq);
187 return 0;
190 static void hs_shutdown_irq(unsigned int irq)
192 hs_socket_disable_ireq(hs_mapped_irq[irq].sock);
193 hs_mapped_irq[irq].old_handler->shutdown(irq);
196 static void hs_enable_irq(unsigned int irq)
198 hs_socket_enable_ireq(hs_mapped_irq[irq].sock);
199 hs_mapped_irq[irq].old_handler->enable(irq);
202 static void hs_disable_irq(unsigned int irq)
204 hs_socket_disable_ireq(hs_mapped_irq[irq].sock);
205 hs_mapped_irq[irq].old_handler->disable(irq);
208 extern struct hw_interrupt_type no_irq_type;
210 static void hs_mask_and_ack_irq(unsigned int irq)
212 hs_socket_disable_ireq(hs_mapped_irq[irq].sock);
213 /* ack_none() spuriously complains about an unexpected IRQ */
214 if (hs_mapped_irq[irq].old_handler != &no_irq_type)
215 hs_mapped_irq[irq].old_handler->ack(irq);
218 static void hs_end_irq(unsigned int irq)
220 hs_socket_enable_ireq(hs_mapped_irq[irq].sock);
221 hs_mapped_irq[irq].old_handler->end(irq);
225 static struct hw_interrupt_type hd64465_ss_irq_type = {
226 .typename = "PCMCIA-IRQ",
227 .startup = hs_startup_irq,
228 .shutdown = hs_shutdown_irq,
229 .enable = hs_enable_irq,
230 .disable = hs_disable_irq,
231 .ack = hs_mask_and_ack_irq,
232 .end = hs_end_irq
236 * This function should only ever be called with interrupts disabled.
238 static void hs_map_irq(hs_socket_t *sp, unsigned int irq)
240 DPRINTK("hs_map_irq(sock=%d irq=%d)\n", sp->number, irq);
242 if (irq >= HS_NUM_MAPPED_IRQS)
243 return;
245 hs_mapped_irq[irq].sock = sp;
246 /* insert ourselves as the irq controller */
247 hs_mapped_irq[irq].old_handler = irq_desc[irq].handler;
248 irq_desc[irq].handler = &hd64465_ss_irq_type;
253 * This function should only ever be called with interrupts disabled.
255 static void hs_unmap_irq(hs_socket_t *sp, unsigned int irq)
257 DPRINTK("hs_unmap_irq(sock=%d irq=%d)\n", sp->number, irq);
259 if (irq >= HS_NUM_MAPPED_IRQS)
260 return;
262 /* restore the original irq controller */
263 irq_desc[irq].handler = hs_mapped_irq[irq].old_handler;
266 /*============================================================*/
270 * Set Vpp and Vcc (in tenths of a Volt). Does not
271 * support the hi-Z state.
273 * Note, this assumes the board uses a TPS2206 chip to control
274 * the Vcc and Vpp voltages to the hs_sockets. If your board
275 * uses the MIC2563 (also supported by the HD64465) then you
276 * will have to modify this function.
278 /* 0V 3.3V 5.5V */
279 static const u_char hs_tps2206_avcc[3] = { 0x00, 0x04, 0x08 };
280 static const u_char hs_tps2206_bvcc[3] = { 0x00, 0x80, 0x40 };
282 static int hs_set_voltages(hs_socket_t *sp, int Vcc, int Vpp)
284 u_int psr;
285 u_int vcci = 0;
286 u_int sock = sp->number;
288 DPRINTK("hs_set_voltage(%d, %d, %d)\n", sock, Vcc, Vpp);
290 switch (Vcc)
292 case 0: vcci = 0; break;
293 case 33: vcci = 1; break;
294 case 50: vcci = 2; break;
295 default: return 0;
298 /* Note: Vpp = 120 not supported -- Greg Banks */
299 if (Vpp != 0 && Vpp != Vcc)
300 return 0;
302 /* The PSR register holds 8 of the 9 bits which control
303 * the TPS2206 via its serial interface.
305 psr = inw(HD64465_REG_PCCPSR);
306 switch (sock)
308 case 0:
309 psr &= 0x0f;
310 psr |= hs_tps2206_avcc[vcci];
311 psr |= (Vpp == 0 ? 0x00 : 0x02);
312 break;
313 case 1:
314 psr &= 0xf0;
315 psr |= hs_tps2206_bvcc[vcci];
316 psr |= (Vpp == 0 ? 0x00 : 0x20);
317 break;
319 outw(psr, HD64465_REG_PCCPSR);
321 return 1;
325 /*============================================================*/
328 * Drive the RESET line to the card.
330 static void hs_reset_socket(hs_socket_t *sp, int on)
332 unsigned short v;
334 v = hs_in(sp, GCR);
335 if (on)
336 v |= HD64465_PCCGCR_PCCR;
337 else
338 v &= ~HD64465_PCCGCR_PCCR;
339 hs_out(sp, v, GCR);
342 /*============================================================*/
344 static int hs_init(struct pcmcia_socket *s)
346 hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
348 DPRINTK("hs_init(%d)\n", sp->number);
350 return 0;
353 /*============================================================*/
356 static int hs_get_status(struct pcmcia_socket *s, u_int *value)
358 hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
359 unsigned int isr;
360 u_int status = 0;
363 isr = hs_in(sp, ISR);
365 /* Card is seated and powered when *both* CD pins are low */
366 if ((isr & HD64465_PCCISR_PCD_MASK) == 0)
368 status |= SS_DETECT; /* card present */
370 switch (isr & HD64465_PCCISR_PBVD_MASK)
372 case HD64465_PCCISR_PBVD_BATGOOD:
373 break;
374 case HD64465_PCCISR_PBVD_BATWARN:
375 status |= SS_BATWARN;
376 break;
377 default:
378 status |= SS_BATDEAD;
379 break;
382 if (isr & HD64465_PCCISR_PREADY)
383 status |= SS_READY;
385 if (isr & HD64465_PCCISR_PMWP)
386 status |= SS_WRPROT;
388 /* Voltage Select pins interpreted as per Table 4-5 of the std.
389 * Assuming we have the TPS2206, the socket is a "Low Voltage
390 * key, 3.3V and 5V available, no X.XV available".
392 switch (isr & (HD64465_PCCISR_PVS2|HD64465_PCCISR_PVS1))
394 case HD64465_PCCISR_PVS1:
395 printk(KERN_NOTICE MODNAME ": cannot handle X.XV card, ignored\n");
396 status = 0;
397 break;
398 case 0:
399 case HD64465_PCCISR_PVS2:
400 /* 3.3V */
401 status |= SS_3VCARD;
402 break;
403 case HD64465_PCCISR_PVS2|HD64465_PCCISR_PVS1:
404 /* 5V */
405 break;
408 /* TODO: SS_POWERON */
409 /* TODO: SS_STSCHG */
412 DPRINTK("hs_get_status(%d) = %x\n", sock, status);
414 *value = status;
415 return 0;
418 /*============================================================*/
420 static int hs_get_socket(struct pcmcia_socket *s, socket_state_t *state)
422 hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
424 DPRINTK("hs_get_socket(%d)\n", sock);
426 *state = sp->state;
427 return 0;
430 /*============================================================*/
432 static int hs_set_socket(struct pcmcia_socket *s, socket_state_t *state)
434 hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
435 u_long flags;
436 u_int changed;
437 unsigned short cscier;
439 DPRINTK("hs_set_socket(sock=%d, flags=%x, csc_mask=%x, Vcc=%d, Vpp=%d, io_irq=%d)\n",
440 sock, state->flags, state->csc_mask, state->Vcc, state->Vpp, state->io_irq);
442 local_irq_save(flags); /* Don't want interrupts happening here */
444 if (state->Vpp != sp->state.Vpp ||
445 state->Vcc != sp->state.Vcc) {
446 if (!hs_set_voltages(sp, state->Vcc, state->Vpp)) {
447 local_irq_restore(flags);
448 return -EINVAL;
452 /* hd64465_io_debug = 1; */
454 * Handle changes in the Card Status Change mask,
455 * by propagating to the CSCR register
457 changed = sp->state.csc_mask ^ state->csc_mask;
458 cscier = hs_in(sp, CSCIER);
460 if (changed & SS_DETECT) {
461 if (state->csc_mask & SS_DETECT)
462 cscier |= HD64465_PCCCSCIER_PCDE;
463 else
464 cscier &= ~HD64465_PCCCSCIER_PCDE;
467 if (changed & SS_READY) {
468 if (state->csc_mask & SS_READY)
469 cscier |= HD64465_PCCCSCIER_PRE;
470 else
471 cscier &= ~HD64465_PCCCSCIER_PRE;
474 if (changed & SS_BATDEAD) {
475 if (state->csc_mask & SS_BATDEAD)
476 cscier |= HD64465_PCCCSCIER_PBDE;
477 else
478 cscier &= ~HD64465_PCCCSCIER_PBDE;
481 if (changed & SS_BATWARN) {
482 if (state->csc_mask & SS_BATWARN)
483 cscier |= HD64465_PCCCSCIER_PBWE;
484 else
485 cscier &= ~HD64465_PCCCSCIER_PBWE;
488 if (changed & SS_STSCHG) {
489 if (state->csc_mask & SS_STSCHG)
490 cscier |= HD64465_PCCCSCIER_PSCE;
491 else
492 cscier &= ~HD64465_PCCCSCIER_PSCE;
495 hs_out(sp, cscier, CSCIER);
497 if (sp->state.io_irq && !state->io_irq)
498 hs_unmap_irq(sp, sp->state.io_irq);
499 else if (!sp->state.io_irq && state->io_irq)
500 hs_map_irq(sp, state->io_irq);
504 * Handle changes in the flags field,
505 * by propagating to config registers.
507 changed = sp->state.flags ^ state->flags;
509 if (changed & SS_IOCARD) {
510 DPRINTK("card type: %s\n",
511 (state->flags & SS_IOCARD ? "i/o" : "memory" ));
512 bool_to_regbit(sp, GCR, HD64465_PCCGCR_PCCT,
513 state->flags & SS_IOCARD);
516 if (changed & SS_RESET) {
517 DPRINTK("%s reset card\n",
518 (state->flags & SS_RESET ? "start" : "stop"));
519 bool_to_regbit(sp, GCR, HD64465_PCCGCR_PCCR,
520 state->flags & SS_RESET);
523 if (changed & SS_OUTPUT_ENA) {
524 DPRINTK("%sabling card output\n",
525 (state->flags & SS_OUTPUT_ENA ? "en" : "dis"));
526 bool_to_regbit(sp, GCR, HD64465_PCCGCR_PDRV,
527 state->flags & SS_OUTPUT_ENA);
530 /* TODO: SS_SPKR_ENA */
532 /* hd64465_io_debug = 0; */
533 sp->state = *state;
535 local_irq_restore(flags);
537 #if HD64465_DEBUG > 10
538 if (state->flags & SS_OUTPUT_ENA)
539 cis_hex_dump((const unsigned char*)sp->mem_base, 0x100);
540 #endif
541 return 0;
544 /*============================================================*/
546 static int hs_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io)
548 hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
549 int map = io->map;
550 int sock = sp->number;
551 struct pccard_io_map *sio;
552 pgprot_t prot;
554 DPRINTK("hs_set_io_map(sock=%d, map=%d, flags=0x%x, speed=%dns, start=%#lx, stop=%#lx)\n",
555 sock, map, io->flags, io->speed, io->start, io->stop);
556 if (map >= MAX_IO_WIN)
557 return -EINVAL;
558 sio = &sp->io_maps[map];
560 /* check for null changes */
561 if (io->flags == sio->flags &&
562 io->start == sio->start &&
563 io->stop == sio->stop)
564 return 0;
566 if (io->flags & MAP_AUTOSZ)
567 prot = PAGE_KERNEL_PCC(sock, _PAGE_PCC_IODYN);
568 else if (io->flags & MAP_16BIT)
569 prot = PAGE_KERNEL_PCC(sock, _PAGE_PCC_IO16);
570 else
571 prot = PAGE_KERNEL_PCC(sock, _PAGE_PCC_IO8);
573 /* TODO: handle MAP_USE_WAIT */
574 if (io->flags & MAP_USE_WAIT)
575 printk(KERN_INFO MODNAME ": MAP_USE_WAIT unimplemented\n");
576 /* TODO: handle MAP_PREFETCH */
577 if (io->flags & MAP_PREFETCH)
578 printk(KERN_INFO MODNAME ": MAP_PREFETCH unimplemented\n");
579 /* TODO: handle MAP_WRPROT */
580 if (io->flags & MAP_WRPROT)
581 printk(KERN_INFO MODNAME ": MAP_WRPROT unimplemented\n");
582 /* TODO: handle MAP_0WS */
583 if (io->flags & MAP_0WS)
584 printk(KERN_INFO MODNAME ": MAP_0WS unimplemented\n");
586 if (io->flags & MAP_ACTIVE) {
587 unsigned long pstart, psize, paddrbase;
589 paddrbase = virt_to_phys((void*)(sp->mem_base + 2 * HD64465_PCC_WINDOW));
590 pstart = io->start & PAGE_MASK;
591 psize = ((io->stop + PAGE_SIZE) & PAGE_MASK) - pstart;
594 * Change PTEs in only that portion of the mapping requested
595 * by the caller. This means that most of the time, most of
596 * the PTEs in the io_vma will be unmapped and only the bottom
597 * page will be mapped. But the code allows for weird cards
598 * that might want IO ports > 4K.
600 sp->io_base = p3_ioremap(paddrbase + pstart, psize, pgprot_val(prot));
603 * Change the mapping used by inb() outb() etc
605 hd64465_port_map(io->start,
606 io->stop - io->start + 1,
607 (unsigned long)sp->io_base + io->start, 0);
608 } else {
609 hd64465_port_unmap(sio->start, sio->stop - sio->start + 1);
610 p3_iounmap(sp->io_base);
613 *sio = *io;
614 return 0;
617 /*============================================================*/
619 static int hs_set_mem_map(struct pcmcia_socket *s, struct pccard_mem_map *mem)
621 hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
622 struct pccard_mem_map *smem;
623 int map = mem->map;
624 unsigned long paddr;
626 #if 0
627 DPRINTK("hs_set_mem_map(sock=%d, map=%d, flags=0x%x, card_start=0x%08x)\n",
628 sock, map, mem->flags, mem->card_start);
629 #endif
631 if (map >= MAX_WIN)
632 return -EINVAL;
633 smem = &sp->mem_maps[map];
635 paddr = sp->mem_base; /* base of Attribute mapping */
636 if (!(mem->flags & MAP_ATTRIB))
637 paddr += HD64465_PCC_WINDOW; /* base of Common mapping */
638 paddr += mem->card_start;
640 /* Because we specified SS_CAP_STATIC_MAP, we are obliged
641 * at this time to report the system address corresponding
642 * to the card address requested. This is how Socket Services
643 * queries our fixed mapping. I wish this fact had been
644 * documented - Greg Banks.
646 mem->static_start = paddr;
648 *smem = *mem;
650 return 0;
653 /* TODO: do we need to use the MMU to access Common memory ??? */
655 /*============================================================*/
658 * This function is registered with the HD64465 glue code to do a
659 * secondary demux step on the PCMCIA interrupts. It handles
660 * mapping the IREQ request from the card to a standard Linux
661 * IRQ, as requested by SocketServices.
663 static int hs_irq_demux(int irq, void *dev)
665 hs_socket_t *sp = (hs_socket_t *)dev;
666 u_int cscr;
668 DPRINTK("hs_irq_demux(irq=%d)\n", irq);
670 if (sp->state.io_irq &&
671 (cscr = hs_in(sp, CSCR)) & HD64465_PCCCSCR_PIREQ) {
672 cscr &= ~HD64465_PCCCSCR_PIREQ;
673 hs_out(sp, cscr, CSCR);
674 return sp->state.io_irq;
677 return irq;
680 /*============================================================*/
683 * Interrupt handling routine.
686 static irqreturn_t hs_interrupt(int irq, void *dev, struct pt_regs *regs)
688 hs_socket_t *sp = (hs_socket_t *)dev;
689 u_int events = 0;
690 u_int cscr;
693 cscr = hs_in(sp, CSCR);
695 DPRINTK("hs_interrupt, cscr=%04x\n", cscr);
697 /* check for bus-related changes to be reported to Socket Services */
698 if (cscr & HD64465_PCCCSCR_PCDC) {
699 /* double-check for a 16-bit card, as we don't support CardBus */
700 if ((hs_in(sp, ISR) & HD64465_PCCISR_PCD_MASK) != 0) {
701 printk(KERN_NOTICE MODNAME
702 ": socket %d, card not a supported card type or not inserted correctly\n",
703 sp->number);
704 /* Don't do the rest unless a card is present */
705 cscr &= ~(HD64465_PCCCSCR_PCDC|
706 HD64465_PCCCSCR_PRC|
707 HD64465_PCCCSCR_PBW|
708 HD64465_PCCCSCR_PBD|
709 HD64465_PCCCSCR_PSC);
710 } else {
711 cscr &= ~HD64465_PCCCSCR_PCDC;
712 events |= SS_DETECT; /* card insertion or removal */
715 if (cscr & HD64465_PCCCSCR_PRC) {
716 cscr &= ~HD64465_PCCCSCR_PRC;
717 events |= SS_READY; /* ready signal changed */
719 if (cscr & HD64465_PCCCSCR_PBW) {
720 cscr &= ~HD64465_PCCCSCR_PSC;
721 events |= SS_BATWARN; /* battery warning */
723 if (cscr & HD64465_PCCCSCR_PBD) {
724 cscr &= ~HD64465_PCCCSCR_PSC;
725 events |= SS_BATDEAD; /* battery dead */
727 if (cscr & HD64465_PCCCSCR_PSC) {
728 cscr &= ~HD64465_PCCCSCR_PSC;
729 events |= SS_STSCHG; /* STSCHG (status changed) signal */
732 if (cscr & HD64465_PCCCSCR_PIREQ) {
733 cscr &= ~HD64465_PCCCSCR_PIREQ;
735 /* This should have been dealt with during irq demux */
736 printk(KERN_NOTICE MODNAME ": unexpected IREQ from card\n");
739 hs_out(sp, cscr, CSCR);
741 if (events)
742 pcmcia_parse_events(&sp->socket, events);
744 return IRQ_HANDLED;
747 /*============================================================*/
749 static struct pccard_operations hs_operations = {
750 .init = hs_init,
751 .get_status = hs_get_status,
752 .get_socket = hs_get_socket,
753 .set_socket = hs_set_socket,
754 .set_io_map = hs_set_io_map,
755 .set_mem_map = hs_set_mem_map,
758 static int hs_init_socket(hs_socket_t *sp, int irq, unsigned long mem_base,
759 unsigned int ctrl_base)
761 unsigned short v;
762 int i, err;
764 memset(sp, 0, sizeof(*sp));
765 sp->irq = irq;
766 sp->mem_base = mem_base;
767 sp->mem_length = 4*HD64465_PCC_WINDOW; /* 16MB */
768 sp->ctrl_base = ctrl_base;
770 for (i=0 ; i<MAX_IO_WIN ; i++)
771 sp->io_maps[i].map = i;
772 for (i=0 ; i<MAX_WIN ; i++)
773 sp->mem_maps[i].map = i;
775 hd64465_register_irq_demux(sp->irq, hs_irq_demux, sp);
777 if ((err = request_irq(sp->irq, hs_interrupt, SA_INTERRUPT, MODNAME, sp)) < 0)
778 return err;
779 if (request_mem_region(sp->mem_base, sp->mem_length, MODNAME) == 0) {
780 sp->mem_base = 0;
781 return -ENOMEM;
785 /* According to section 3.2 of the PCMCIA standard, low-voltage
786 * capable cards must implement cold insertion, i.e. Vpp and
787 * Vcc set to 0 before card is inserted.
789 /*hs_set_voltages(sp, 0, 0);*/
791 /* hi-Z the outputs to the card and set 16MB map mode */
792 v = hs_in(sp, GCR);
793 v &= ~HD64465_PCCGCR_PCCT; /* memory-only card */
794 hs_out(sp, v, GCR);
796 v = hs_in(sp, GCR);
797 v |= HD64465_PCCGCR_PDRV; /* enable outputs to card */
798 hs_out(sp, v, GCR);
800 v = hs_in(sp, GCR);
801 v |= HD64465_PCCGCR_PMMOD; /* 16MB mapping mode */
802 hs_out(sp, v, GCR);
804 v = hs_in(sp, GCR);
805 /* lowest 16MB of Common */
806 v &= ~(HD64465_PCCGCR_PPA25|HD64465_PCCGCR_PPA24);
807 hs_out(sp, v, GCR);
809 hs_reset_socket(sp, 1);
811 printk(KERN_INFO "HD64465 PCMCIA bridge socket %d at 0x%08lx irq %d\n",
812 i, sp->mem_base, sp->irq);
814 return 0;
817 static void hs_exit_socket(hs_socket_t *sp)
819 unsigned short cscier, gcr;
820 unsigned long flags;
822 local_irq_save(flags);
824 /* turn off interrupts in hardware */
825 cscier = hs_in(sp, CSCIER);
826 cscier = (cscier & IER_MASK) | IER_OFF;
827 hs_out(sp, cscier, CSCIER);
829 /* hi-Z the outputs to the card */
830 gcr = hs_in(sp, GCR);
831 gcr &= HD64465_PCCGCR_PDRV;
832 hs_out(sp, gcr, GCR);
834 /* power the card down */
835 hs_set_voltages(sp, 0, 0);
837 if (sp->mem_base != 0)
838 release_mem_region(sp->mem_base, sp->mem_length);
839 if (sp->irq != 0) {
840 free_irq(sp->irq, hs_interrupt);
841 hd64465_unregister_irq_demux(sp->irq);
844 local_irq_restore(flags);
847 static int hd64465_suspend(struct device *dev, pm_message_t state, u32 level)
849 int ret = 0;
850 if (level == SUSPEND_SAVE_STATE)
851 ret = pcmcia_socket_dev_suspend(dev, state);
852 return ret;
855 static int hd64465_resume(struct device *dev, u32 level)
857 int ret = 0;
858 if (level == RESUME_RESTORE_STATE)
859 ret = pcmcia_socket_dev_resume(dev);
860 return ret;
863 static struct device_driver hd64465_driver = {
864 .name = "hd64465-pcmcia",
865 .bus = &platform_bus_type,
866 .suspend = hd64465_suspend,
867 .resume = hd64465_resume,
870 static struct platform_device hd64465_device = {
871 .name = "hd64465-pcmcia",
872 .id = 0,
875 static int __init init_hs(void)
877 int i;
878 unsigned short v;
880 /* hd64465_io_debug = 1; */
881 if (driver_register(&hd64465_driver))
882 return -EINVAL;
884 /* Wake both sockets out of STANDBY mode */
885 /* TODO: wait 15ms */
886 v = inw(HD64465_REG_SMSCR);
887 v &= ~(HD64465_SMSCR_PC0ST|HD64465_SMSCR_PC1ST);
888 outw(v, HD64465_REG_SMSCR);
890 /* keep power controller out of shutdown mode */
891 v = inb(HD64465_REG_PCC0SCR);
892 v |= HD64465_PCCSCR_SHDN;
893 outb(v, HD64465_REG_PCC0SCR);
895 /* use serial (TPS2206) power controller */
896 v = inb(HD64465_REG_PCC0CSCR);
897 v |= HD64465_PCCCSCR_PSWSEL;
898 outb(v, HD64465_REG_PCC0CSCR);
901 * Setup hs_sockets[] structures and request system resources.
902 * TODO: on memory allocation failure, power down the socket
903 * before quitting.
905 for (i=0; i<HS_MAX_SOCKETS; i++) {
906 hs_set_voltages(&hs_sockets[i], 0, 0);
908 hs_sockets[i].socket.features |= SS_CAP_PCCARD | SS_CAP_STATIC_MAP; /* mappings are fixed in host memory */
909 hs_sockets[i].socket.resource_ops = &pccard_static_ops;
910 hs_sockets[i].socket.irq_mask = 0xffde;/*0xffff*/ /* IRQs mapped in s/w so can do any, really */
911 hs_sockets[i].socket.map_size = HD64465_PCC_WINDOW; /* 16MB fixed window size */
913 hs_sockets[i].socket.owner = THIS_MODULE;
914 hs_sockets[i].socket.ss_entry = &hs_operations;
917 i = hs_init_socket(&hs_sockets[0],
918 HD64465_IRQ_PCMCIA0,
919 HD64465_PCC0_BASE,
920 HD64465_REG_PCC0ISR);
921 if (i < 0) {
922 unregister_driver(&hd64465_driver);
923 return i;
925 i = hs_init_socket(&hs_sockets[1],
926 HD64465_IRQ_PCMCIA1,
927 HD64465_PCC1_BASE,
928 HD64465_REG_PCC1ISR);
929 if (i < 0) {
930 unregister_driver(&hd64465_driver);
931 return i;
934 /* hd64465_io_debug = 0; */
936 platform_device_register(&hd64465_device);
938 for (i=0; i<HS_MAX_SOCKETS; i++) {
939 unsigned int ret;
940 hs_sockets[i].socket.dev.dev = &hd64465_device.dev;
941 hs_sockets[i].number = i;
942 ret = pcmcia_register_socket(&hs_sockets[i].socket);
943 if (ret && i)
944 pcmcia_unregister_socket(&hs_sockets[0].socket);
947 return 0;
950 static void __exit exit_hs(void)
952 int i;
954 for (i=0 ; i<HS_MAX_SOCKETS ; i++) {
955 pcmcia_unregister_socket(&hs_sockets[i].socket);
956 hs_exit_socket(&hs_sockets[i]);
959 platform_device_unregister(&hd64465_device);
960 unregister_driver(&hd64465_driver);
963 module_init(init_hs);
964 module_exit(exit_hs);
966 /*============================================================*/
967 /*END*/