drivers/net/phy: fix kernel-doc notation
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / include / asm-x86 / numaq.h
blob94b86c31239aad607ff00e344e67233b42882f82
1 /*
2 * Written by: Patricia Gaughen, IBM Corporation
4 * Copyright (C) 2002, IBM Corp.
6 * All rights reserved.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
16 * NON INFRINGEMENT. See the GNU General Public License for more
17 * details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 * Send feedback to <gone@us.ibm.com>
26 #ifndef NUMAQ_H
27 #define NUMAQ_H
29 #ifdef CONFIG_X86_NUMAQ
31 extern int get_memcfg_numaq(void);
34 * SYS_CFG_DATA_PRIV_ADDR, struct eachquadmem, and struct sys_cfg_data are the
36 #define SYS_CFG_DATA_PRIV_ADDR 0x0009d000 /* place for scd in private
37 quad space */
40 * Communication area for each processor on lynxer-processor tests.
42 * NOTE: If you change the size of this eachproc structure you need
43 * to change the definition for EACH_QUAD_SIZE.
45 struct eachquadmem {
46 unsigned int priv_mem_start; /* Starting address of this */
47 /* quad's private memory. */
48 /* This is always 0. */
49 /* In MB. */
50 unsigned int priv_mem_size; /* Size of this quad's */
51 /* private memory. */
52 /* In MB. */
53 unsigned int low_shrd_mem_strp_start;/* Starting address of this */
54 /* quad's low shared block */
55 /* (untranslated). */
56 /* In MB. */
57 unsigned int low_shrd_mem_start; /* Starting address of this */
58 /* quad's low shared memory */
59 /* (untranslated). */
60 /* In MB. */
61 unsigned int low_shrd_mem_size; /* Size of this quad's low */
62 /* shared memory. */
63 /* In MB. */
64 unsigned int lmmio_copb_start; /* Starting address of this */
65 /* quad's local memory */
66 /* mapped I/O in the */
67 /* compatibility OPB. */
68 /* In MB. */
69 unsigned int lmmio_copb_size; /* Size of this quad's local */
70 /* memory mapped I/O in the */
71 /* compatibility OPB. */
72 /* In MB. */
73 unsigned int lmmio_nopb_start; /* Starting address of this */
74 /* quad's local memory */
75 /* mapped I/O in the */
76 /* non-compatibility OPB. */
77 /* In MB. */
78 unsigned int lmmio_nopb_size; /* Size of this quad's local */
79 /* memory mapped I/O in the */
80 /* non-compatibility OPB. */
81 /* In MB. */
82 unsigned int io_apic_0_start; /* Starting address of I/O */
83 /* APIC 0. */
84 unsigned int io_apic_0_sz; /* Size I/O APIC 0. */
85 unsigned int io_apic_1_start; /* Starting address of I/O */
86 /* APIC 1. */
87 unsigned int io_apic_1_sz; /* Size I/O APIC 1. */
88 unsigned int hi_shrd_mem_start; /* Starting address of this */
89 /* quad's high shared memory.*/
90 /* In MB. */
91 unsigned int hi_shrd_mem_size; /* Size of this quad's high */
92 /* shared memory. */
93 /* In MB. */
94 unsigned int mps_table_addr; /* Address of this quad's */
95 /* MPS tables from BIOS, */
96 /* in system space.*/
97 unsigned int lcl_MDC_pio_addr; /* Port-I/O address for */
98 /* local access of MDC. */
99 unsigned int rmt_MDC_mmpio_addr; /* MM-Port-I/O address for */
100 /* remote access of MDC. */
101 unsigned int mm_port_io_start; /* Starting address of this */
102 /* quad's memory mapped Port */
103 /* I/O space. */
104 unsigned int mm_port_io_size; /* Size of this quad's memory*/
105 /* mapped Port I/O space. */
106 unsigned int mm_rmt_io_apic_start; /* Starting address of this */
107 /* quad's memory mapped */
108 /* remote I/O APIC space. */
109 unsigned int mm_rmt_io_apic_size; /* Size of this quad's memory*/
110 /* mapped remote I/O APIC */
111 /* space. */
112 unsigned int mm_isa_start; /* Starting address of this */
113 /* quad's memory mapped ISA */
114 /* space (contains MDC */
115 /* memory space). */
116 unsigned int mm_isa_size; /* Size of this quad's memory*/
117 /* mapped ISA space (contains*/
118 /* MDC memory space). */
119 unsigned int rmt_qmi_addr; /* Remote addr to access QMI.*/
120 unsigned int lcl_qmi_addr; /* Local addr to access QMI. */
124 * Note: This structure must be NOT be changed unless the multiproc and
125 * OS are changed to reflect the new structure.
127 struct sys_cfg_data {
128 unsigned int quad_id;
129 unsigned int bsp_proc_id; /* Boot Strap Processor in this quad. */
130 unsigned int scd_version; /* Version number of this table. */
131 unsigned int first_quad_id;
132 unsigned int quads_present31_0; /* 1 bit for each quad */
133 unsigned int quads_present63_32; /* 1 bit for each quad */
134 unsigned int config_flags;
135 unsigned int boot_flags;
136 unsigned int csr_start_addr; /* Absolute value (not in MB) */
137 unsigned int csr_size; /* Absolute value (not in MB) */
138 unsigned int lcl_apic_start_addr; /* Absolute value (not in MB) */
139 unsigned int lcl_apic_size; /* Absolute value (not in MB) */
140 unsigned int low_shrd_mem_base; /* 0 or 512MB or 1GB */
141 unsigned int low_shrd_mem_quad_offset; /* 0,128M,256M,512M,1G */
142 /* may not be totally populated */
143 unsigned int split_mem_enbl; /* 0 for no low shared memory */
144 unsigned int mmio_sz; /* Size of total system memory mapped I/O */
145 /* (in MB). */
146 unsigned int quad_spin_lock; /* Spare location used for quad */
147 /* bringup. */
148 unsigned int nonzero55; /* For checksumming. */
149 unsigned int nonzeroaa; /* For checksumming. */
150 unsigned int scd_magic_number;
151 unsigned int system_type;
152 unsigned int checksum;
154 * memory configuration area for each quad
156 struct eachquadmem eq[MAX_NUMNODES]; /* indexed by quad id */
159 static inline unsigned long *get_zholes_size(int nid)
161 return NULL;
163 #endif /* CONFIG_X86_NUMAQ */
164 #endif /* NUMAQ_H */