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rt2x00: Push beacon TX descriptor writing to drivers.
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / net / wireless / rt2x00 / rt2500usb.c
blobd19f29a53523bd5abbf62a6a59ded5076d1b5684
1 /*
2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 <http://rt2x00.serialmonkey.com>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21 /*
22 Module: rt2500usb
23 Abstract: rt2500usb device specific routines.
24 Supported chipsets: RT2570.
25 */
26
27 #include <linux/delay.h>
28 #include <linux/etherdevice.h>
29 #include <linux/init.h>
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/slab.h>
33 #include <linux/usb.h>
34
35 #include "rt2x00.h"
36 #include "rt2x00usb.h"
37 #include "rt2500usb.h"
38
39 /*
40 * Allow hardware encryption to be disabled.
41 */
42 static int modparam_nohwcrypt = 0;
43 module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO);
44 MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
45
46 /*
47 * Register access.
48 * All access to the CSR registers will go through the methods
49 * rt2500usb_register_read and rt2500usb_register_write.
50 * BBP and RF register require indirect register access,
51 * and use the CSR registers BBPCSR and RFCSR to achieve this.
52 * These indirect registers work with busy bits,
53 * and we will try maximal REGISTER_BUSY_COUNT times to access
54 * the register while taking a REGISTER_BUSY_DELAY us delay
55 * between each attampt. When the busy bit is still set at that time,
56 * the access attempt is considered to have failed,
57 * and we will print an error.
58 * If the csr_mutex is already held then the _lock variants must
59 * be used instead.
60 */
61 static inline void rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
62 const unsigned int offset,
63 u16 *value)
64 {
65 __le16 reg;
66 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
67 USB_VENDOR_REQUEST_IN, offset,
68 &reg, sizeof(reg), REGISTER_TIMEOUT);
69 *value = le16_to_cpu(reg);
70 }
71
72 static inline void rt2500usb_register_read_lock(struct rt2x00_dev *rt2x00dev,
73 const unsigned int offset,
74 u16 *value)
75 {
76 __le16 reg;
77 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ,
78 USB_VENDOR_REQUEST_IN, offset,
79 &reg, sizeof(reg), REGISTER_TIMEOUT);
80 *value = le16_to_cpu(reg);
81 }
82
83 static inline void rt2500usb_register_multiread(struct rt2x00_dev *rt2x00dev,
84 const unsigned int offset,
85 void *value, const u16 length)
86 {
87 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
88 USB_VENDOR_REQUEST_IN, offset,
89 value, length,
90 REGISTER_TIMEOUT16(length));
91 }
92
93 static inline void rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
94 const unsigned int offset,
95 u16 value)
96 {
97 __le16 reg = cpu_to_le16(value);
98 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
99 USB_VENDOR_REQUEST_OUT, offset,
100 &reg, sizeof(reg), REGISTER_TIMEOUT);
101 }
102
103 static inline void rt2500usb_register_write_lock(struct rt2x00_dev *rt2x00dev,
104 const unsigned int offset,
105 u16 value)
106 {
107 __le16 reg = cpu_to_le16(value);
108 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_WRITE,
109 USB_VENDOR_REQUEST_OUT, offset,
110 &reg, sizeof(reg), REGISTER_TIMEOUT);
111 }
112
113 static inline void rt2500usb_register_multiwrite(struct rt2x00_dev *rt2x00dev,
114 const unsigned int offset,
115 void *value, const u16 length)
116 {
117 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
118 USB_VENDOR_REQUEST_OUT, offset,
119 value, length,
120 REGISTER_TIMEOUT16(length));
121 }
122
123 static int rt2500usb_regbusy_read(struct rt2x00_dev *rt2x00dev,
124 const unsigned int offset,
125 struct rt2x00_field16 field,
126 u16 *reg)
127 {
128 unsigned int i;
129
130 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
131 rt2500usb_register_read_lock(rt2x00dev, offset, reg);
132 if (!rt2x00_get_field16(*reg, field))
133 return 1;
134 udelay(REGISTER_BUSY_DELAY);
135 }
136
137 ERROR(rt2x00dev, "Indirect register access failed: "
138 "offset=0x%.08x, value=0x%.08x\n", offset, *reg);
139 *reg = ~0;
140
141 return 0;
142 }
143
144 #define WAIT_FOR_BBP(__dev, __reg) \
145 rt2500usb_regbusy_read((__dev), PHY_CSR8, PHY_CSR8_BUSY, (__reg))
146 #define WAIT_FOR_RF(__dev, __reg) \
147 rt2500usb_regbusy_read((__dev), PHY_CSR10, PHY_CSR10_RF_BUSY, (__reg))
148
149 static void rt2500usb_bbp_write(struct rt2x00_dev *rt2x00dev,
150 const unsigned int word, const u8 value)
151 {
152 u16 reg;
153
154 mutex_lock(&rt2x00dev->csr_mutex);
155
156 /*
157 * Wait until the BBP becomes available, afterwards we
158 * can safely write the new data into the register.
159 */
160 if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
161 reg = 0;
162 rt2x00_set_field16(&reg, PHY_CSR7_DATA, value);
163 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
164 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 0);
165
166 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
167 }
168
169 mutex_unlock(&rt2x00dev->csr_mutex);
170 }
171
172 static void rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev,
173 const unsigned int word, u8 *value)
174 {
175 u16 reg;
176
177 mutex_lock(&rt2x00dev->csr_mutex);
178
179 /*
180 * Wait until the BBP becomes available, afterwards we
181 * can safely write the read request into the register.
182 * After the data has been written, we wait until hardware
183 * returns the correct value, if at any time the register
184 * doesn't become available in time, reg will be 0xffffffff
185 * which means we return 0xff to the caller.
186 */
187 if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
188 reg = 0;
189 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
190 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 1);
191
192 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
193
194 if (WAIT_FOR_BBP(rt2x00dev, &reg))
195 rt2500usb_register_read_lock(rt2x00dev, PHY_CSR7, &reg);
196 }
197
198 *value = rt2x00_get_field16(reg, PHY_CSR7_DATA);
199
200 mutex_unlock(&rt2x00dev->csr_mutex);
201 }
202
203 static void rt2500usb_rf_write(struct rt2x00_dev *rt2x00dev,
204 const unsigned int word, const u32 value)
205 {
206 u16 reg;
207
208 mutex_lock(&rt2x00dev->csr_mutex);
209
210 /*
211 * Wait until the RF becomes available, afterwards we
212 * can safely write the new data into the register.
213 */
214 if (WAIT_FOR_RF(rt2x00dev, &reg)) {
215 reg = 0;
216 rt2x00_set_field16(&reg, PHY_CSR9_RF_VALUE, value);
217 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR9, reg);
218
219 reg = 0;
220 rt2x00_set_field16(&reg, PHY_CSR10_RF_VALUE, value >> 16);
221 rt2x00_set_field16(&reg, PHY_CSR10_RF_NUMBER_OF_BITS, 20);
222 rt2x00_set_field16(&reg, PHY_CSR10_RF_IF_SELECT, 0);
223 rt2x00_set_field16(&reg, PHY_CSR10_RF_BUSY, 1);
224
225 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR10, reg);
226 rt2x00_rf_write(rt2x00dev, word, value);
227 }
228
229 mutex_unlock(&rt2x00dev->csr_mutex);
230 }
231
232 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
233 static void _rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
234 const unsigned int offset,
235 u32 *value)
236 {
237 rt2500usb_register_read(rt2x00dev, offset, (u16 *)value);
238 }
239
240 static void _rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
241 const unsigned int offset,
242 u32 value)
243 {
244 rt2500usb_register_write(rt2x00dev, offset, value);
245 }
246
247 static const struct rt2x00debug rt2500usb_rt2x00debug = {
248 .owner = THIS_MODULE,
249 .csr = {
250 .read = _rt2500usb_register_read,
251 .write = _rt2500usb_register_write,
252 .flags = RT2X00DEBUGFS_OFFSET,
253 .word_base = CSR_REG_BASE,
254 .word_size = sizeof(u16),
255 .word_count = CSR_REG_SIZE / sizeof(u16),
256 },
257 .eeprom = {
258 .read = rt2x00_eeprom_read,
259 .write = rt2x00_eeprom_write,
260 .word_base = EEPROM_BASE,
261 .word_size = sizeof(u16),
262 .word_count = EEPROM_SIZE / sizeof(u16),
263 },
264 .bbp = {
265 .read = rt2500usb_bbp_read,
266 .write = rt2500usb_bbp_write,
267 .word_base = BBP_BASE,
268 .word_size = sizeof(u8),
269 .word_count = BBP_SIZE / sizeof(u8),
270 },
271 .rf = {
272 .read = rt2x00_rf_read,
273 .write = rt2500usb_rf_write,
274 .word_base = RF_BASE,
275 .word_size = sizeof(u32),
276 .word_count = RF_SIZE / sizeof(u32),
277 },
278 };
279 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
280
281 static int rt2500usb_rfkill_poll(struct rt2x00_dev *rt2x00dev)
282 {
283 u16 reg;
284
285 rt2500usb_register_read(rt2x00dev, MAC_CSR19, &reg);
286 return rt2x00_get_field32(reg, MAC_CSR19_BIT7);
287 }
288
289 #ifdef CONFIG_RT2X00_LIB_LEDS
290 static void rt2500usb_brightness_set(struct led_classdev *led_cdev,
291 enum led_brightness brightness)
292 {
293 struct rt2x00_led *led =
294 container_of(led_cdev, struct rt2x00_led, led_dev);
295 unsigned int enabled = brightness != LED_OFF;
296 u16 reg;
297
298 rt2500usb_register_read(led->rt2x00dev, MAC_CSR20, &reg);
299
300 if (led->type == LED_TYPE_RADIO || led->type == LED_TYPE_ASSOC)
301 rt2x00_set_field16(&reg, MAC_CSR20_LINK, enabled);
302 else if (led->type == LED_TYPE_ACTIVITY)
303 rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, enabled);
304
305 rt2500usb_register_write(led->rt2x00dev, MAC_CSR20, reg);
306 }
307
308 static int rt2500usb_blink_set(struct led_classdev *led_cdev,
309 unsigned long *delay_on,
310 unsigned long *delay_off)
311 {
312 struct rt2x00_led *led =
313 container_of(led_cdev, struct rt2x00_led, led_dev);
314 u16 reg;
315
316 rt2500usb_register_read(led->rt2x00dev, MAC_CSR21, &reg);
317 rt2x00_set_field16(&reg, MAC_CSR21_ON_PERIOD, *delay_on);
318 rt2x00_set_field16(&reg, MAC_CSR21_OFF_PERIOD, *delay_off);
319 rt2500usb_register_write(led->rt2x00dev, MAC_CSR21, reg);
320
321 return 0;
322 }
323
324 static void rt2500usb_init_led(struct rt2x00_dev *rt2x00dev,
325 struct rt2x00_led *led,
326 enum led_type type)
327 {
328 led->rt2x00dev = rt2x00dev;
329 led->type = type;
330 led->led_dev.brightness_set = rt2500usb_brightness_set;
331 led->led_dev.blink_set = rt2500usb_blink_set;
332 led->flags = LED_INITIALIZED;
333 }
334 #endif /* CONFIG_RT2X00_LIB_LEDS */
335
336 /*
337 * Configuration handlers.
338 */
339
340 /*
341 * rt2500usb does not differentiate between shared and pairwise
342 * keys, so we should use the same function for both key types.
343 */
344 static int rt2500usb_config_key(struct rt2x00_dev *rt2x00dev,
345 struct rt2x00lib_crypto *crypto,
346 struct ieee80211_key_conf *key)
347 {
348 int timeout;
349 u32 mask;
350 u16 reg;
351
352 if (crypto->cmd == SET_KEY) {
353 /*
354 * Pairwise key will always be entry 0, but this
355 * could collide with a shared key on the same
356 * position...
357 */
358 mask = TXRX_CSR0_KEY_ID.bit_mask;
359
360 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
361 reg &= mask;
362
363 if (reg && reg == mask)
364 return -ENOSPC;
365
366 reg = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
367
368 key->hw_key_idx += reg ? ffz(reg) : 0;
369
370 /*
371 * The encryption key doesn't fit within the CSR cache,
372 * this means we should allocate it separately and use
373 * rt2x00usb_vendor_request() to send the key to the hardware.
374 */
375 reg = KEY_ENTRY(key->hw_key_idx);
376 timeout = REGISTER_TIMEOUT32(sizeof(crypto->key));
377 rt2x00usb_vendor_request_large_buff(rt2x00dev, USB_MULTI_WRITE,
378 USB_VENDOR_REQUEST_OUT, reg,
379 crypto->key,
380 sizeof(crypto->key),
381 timeout);
382
383 /*
384 * The driver does not support the IV/EIV generation
385 * in hardware. However it demands the data to be provided
386 * both separately as well as inside the frame.
387 * We already provided the CONFIG_CRYPTO_COPY_IV to rt2x00lib
388 * to ensure rt2x00lib will not strip the data from the
389 * frame after the copy, now we must tell mac80211
390 * to generate the IV/EIV data.
391 */
392 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
393 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
394 }
395
396 /*
397 * TXRX_CSR0_KEY_ID contains only single-bit fields to indicate
398 * a particular key is valid.
399 */
400 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
401 rt2x00_set_field16(&reg, TXRX_CSR0_ALGORITHM, crypto->cipher);
402 rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
403
404 mask = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
405 if (crypto->cmd == SET_KEY)
406 mask |= 1 << key->hw_key_idx;
407 else if (crypto->cmd == DISABLE_KEY)
408 mask &= ~(1 << key->hw_key_idx);
409 rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, mask);
410 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
411
412 return 0;
413 }
414
415 static void rt2500usb_config_filter(struct rt2x00_dev *rt2x00dev,
416 const unsigned int filter_flags)
417 {
418 u16 reg;
419
420 /*
421 * Start configuration steps.
422 * Note that the version error will always be dropped
423 * and broadcast frames will always be accepted since
424 * there is no filter for it at this time.
425 */
426 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
427 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CRC,
428 !(filter_flags & FIF_FCSFAIL));
429 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_PHYSICAL,
430 !(filter_flags & FIF_PLCPFAIL));
431 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CONTROL,
432 !(filter_flags & FIF_CONTROL));
433 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_NOT_TO_ME,
434 !(filter_flags & FIF_PROMISC_IN_BSS));
435 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_TODS,
436 !(filter_flags & FIF_PROMISC_IN_BSS) &&
437 !rt2x00dev->intf_ap_count);
438 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_VERSION_ERROR, 1);
439 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_MULTICAST,
440 !(filter_flags & FIF_ALLMULTI));
441 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_BROADCAST, 0);
442 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
443 }
444
445 static void rt2500usb_config_intf(struct rt2x00_dev *rt2x00dev,
446 struct rt2x00_intf *intf,
447 struct rt2x00intf_conf *conf,
448 const unsigned int flags)
449 {
450 unsigned int bcn_preload;
451 u16 reg;
452
453 if (flags & CONFIG_UPDATE_TYPE) {
454 /*
455 * Enable beacon config
456 */
457 bcn_preload = PREAMBLE + GET_DURATION(IEEE80211_HEADER, 20);
458 rt2500usb_register_read(rt2x00dev, TXRX_CSR20, &reg);
459 rt2x00_set_field16(&reg, TXRX_CSR20_OFFSET, bcn_preload >> 6);
460 rt2x00_set_field16(&reg, TXRX_CSR20_BCN_EXPECT_WINDOW,
461 2 * (conf->type != NL80211_IFTYPE_STATION));
462 rt2500usb_register_write(rt2x00dev, TXRX_CSR20, reg);
463
464 /*
465 * Enable synchronisation.
466 */
467 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
468 rt2x00_set_field16(&reg, TXRX_CSR18_OFFSET, 0);
469 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
470
471 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
472 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
473 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, conf->sync);
474 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
475 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
476 }
477
478 if (flags & CONFIG_UPDATE_MAC)
479 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR2, conf->mac,
480 (3 * sizeof(__le16)));
481
482 if (flags & CONFIG_UPDATE_BSSID)
483 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR5, conf->bssid,
484 (3 * sizeof(__le16)));
485 }
486
487 static void rt2500usb_config_erp(struct rt2x00_dev *rt2x00dev,
488 struct rt2x00lib_erp *erp)
489 {
490 u16 reg;
491
492 rt2500usb_register_read(rt2x00dev, TXRX_CSR10, &reg);
493 rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE,
494 !!erp->short_preamble);
495 rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg);
496
497 rt2500usb_register_write(rt2x00dev, TXRX_CSR11, erp->basic_rates);
498
499 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
500 rt2x00_set_field16(&reg, TXRX_CSR18_INTERVAL, erp->beacon_int * 4);
501 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
502
503 rt2500usb_register_write(rt2x00dev, MAC_CSR10, erp->slot_time);
504 rt2500usb_register_write(rt2x00dev, MAC_CSR11, erp->sifs);
505 rt2500usb_register_write(rt2x00dev, MAC_CSR12, erp->eifs);
506 }
507
508 static void rt2500usb_config_ant(struct rt2x00_dev *rt2x00dev,
509 struct antenna_setup *ant)
510 {
511 u8 r2;
512 u8 r14;
513 u16 csr5;
514 u16 csr6;
515
516 /*
517 * We should never come here because rt2x00lib is supposed
518 * to catch this and send us the correct antenna explicitely.
519 */
520 BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||
521 ant->tx == ANTENNA_SW_DIVERSITY);
522
523 rt2500usb_bbp_read(rt2x00dev, 2, &r2);
524 rt2500usb_bbp_read(rt2x00dev, 14, &r14);
525 rt2500usb_register_read(rt2x00dev, PHY_CSR5, &csr5);
526 rt2500usb_register_read(rt2x00dev, PHY_CSR6, &csr6);
527
528 /*
529 * Configure the TX antenna.
530 */
531 switch (ant->tx) {
532 case ANTENNA_HW_DIVERSITY:
533 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 1);
534 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 1);
535 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 1);
536 break;
537 case ANTENNA_A:
538 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0);
539 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 0);
540 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 0);
541 break;
542 case ANTENNA_B:
543 default:
544 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2);
545 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 2);
546 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 2);
547 break;
548 }
549
550 /*
551 * Configure the RX antenna.
552 */
553 switch (ant->rx) {
554 case ANTENNA_HW_DIVERSITY:
555 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 1);
556 break;
557 case ANTENNA_A:
558 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0);
559 break;
560 case ANTENNA_B:
561 default:
562 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2);
563 break;
564 }
565
566 /*
567 * RT2525E and RT5222 need to flip TX I/Q
568 */
569 if (rt2x00_rf(rt2x00dev, RF2525E) || rt2x00_rf(rt2x00dev, RF5222)) {
570 rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);
571 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1);
572 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1);
573
574 /*
575 * RT2525E does not need RX I/Q Flip.
576 */
577 if (rt2x00_rf(rt2x00dev, RF2525E))
578 rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);
579 } else {
580 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0);
581 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 0);
582 }
583
584 rt2500usb_bbp_write(rt2x00dev, 2, r2);
585 rt2500usb_bbp_write(rt2x00dev, 14, r14);
586 rt2500usb_register_write(rt2x00dev, PHY_CSR5, csr5);
587 rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6);
588 }
589
590 static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev,
591 struct rf_channel *rf, const int txpower)
592 {
593 /*
594 * Set TXpower.
595 */
596 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
597
598 /*
599 * For RT2525E we should first set the channel to half band higher.
600 */
601 if (rt2x00_rf(rt2x00dev, RF2525E)) {
602 static const u32 vals[] = {
603 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2,
604 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba,
605 0x000008ba, 0x000008be, 0x000008b7, 0x00000902,
606 0x00000902, 0x00000906
607 };
608
609 rt2500usb_rf_write(rt2x00dev, 2, vals[rf->channel - 1]);
610 if (rf->rf4)
611 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
612 }
613
614 rt2500usb_rf_write(rt2x00dev, 1, rf->rf1);
615 rt2500usb_rf_write(rt2x00dev, 2, rf->rf2);
616 rt2500usb_rf_write(rt2x00dev, 3, rf->rf3);
617 if (rf->rf4)
618 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
619 }
620
621 static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev,
622 const int txpower)
623 {
624 u32 rf3;
625
626 rt2x00_rf_read(rt2x00dev, 3, &rf3);
627 rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
628 rt2500usb_rf_write(rt2x00dev, 3, rf3);
629 }
630
631 static void rt2500usb_config_ps(struct rt2x00_dev *rt2x00dev,
632 struct rt2x00lib_conf *libconf)
633 {
634 enum dev_state state =
635 (libconf->conf->flags & IEEE80211_CONF_PS) ?
636 STATE_SLEEP : STATE_AWAKE;
637 u16 reg;
638
639 if (state == STATE_SLEEP) {
640 rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
641 rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON,
642 rt2x00dev->beacon_int - 20);
643 rt2x00_set_field16(&reg, MAC_CSR18_BEACONS_BEFORE_WAKEUP,
644 libconf->conf->listen_interval - 1);
645
646 /* We must first disable autowake before it can be enabled */
647 rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 0);
648 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
649
650 rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 1);
651 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
652 } else {
653 rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
654 rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 0);
655 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
656 }
657
658 rt2x00dev->ops->lib->set_device_state(rt2x00dev, state);
659 }
660
661 static void rt2500usb_config(struct rt2x00_dev *rt2x00dev,
662 struct rt2x00lib_conf *libconf,
663 const unsigned int flags)
664 {
665 if (flags & IEEE80211_CONF_CHANGE_CHANNEL)
666 rt2500usb_config_channel(rt2x00dev, &libconf->rf,
667 libconf->conf->power_level);
668 if ((flags & IEEE80211_CONF_CHANGE_POWER) &&
669 !(flags & IEEE80211_CONF_CHANGE_CHANNEL))
670 rt2500usb_config_txpower(rt2x00dev,
671 libconf->conf->power_level);
672 if (flags & IEEE80211_CONF_CHANGE_PS)
673 rt2500usb_config_ps(rt2x00dev, libconf);
674 }
675
676 /*
677 * Link tuning
678 */
679 static void rt2500usb_link_stats(struct rt2x00_dev *rt2x00dev,
680 struct link_qual *qual)
681 {
682 u16 reg;
683
684 /*
685 * Update FCS error count from register.
686 */
687 rt2500usb_register_read(rt2x00dev, STA_CSR0, &reg);
688 qual->rx_failed = rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR);
689
690 /*
691 * Update False CCA count from register.
692 */
693 rt2500usb_register_read(rt2x00dev, STA_CSR3, &reg);
694 qual->false_cca = rt2x00_get_field16(reg, STA_CSR3_FALSE_CCA_ERROR);
695 }
696
697 static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev,
698 struct link_qual *qual)
699 {
700 u16 eeprom;
701 u16 value;
702
703 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &eeprom);
704 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R24_LOW);
705 rt2500usb_bbp_write(rt2x00dev, 24, value);
706
707 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &eeprom);
708 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R25_LOW);
709 rt2500usb_bbp_write(rt2x00dev, 25, value);
710
711 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &eeprom);
712 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R61_LOW);
713 rt2500usb_bbp_write(rt2x00dev, 61, value);
714
715 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &eeprom);
716 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_VGCUPPER);
717 rt2500usb_bbp_write(rt2x00dev, 17, value);
718
719 qual->vgc_level = value;
720 }
721
722 /*
723 * Initialization functions.
724 */
725 static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev)
726 {
727 u16 reg;
728
729 rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0x0001,
730 USB_MODE_TEST, REGISTER_TIMEOUT);
731 rt2x00usb_vendor_request_sw(rt2x00dev, USB_SINGLE_WRITE, 0x0308,
732 0x00f0, REGISTER_TIMEOUT);
733
734 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
735 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 1);
736 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
737
738 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x1111);
739 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x1e11);
740
741 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
742 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 1);
743 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 1);
744 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
745 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
746
747 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
748 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
749 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
750 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
751 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
752
753 rt2500usb_register_read(rt2x00dev, TXRX_CSR5, &reg);
754 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0, 13);
755 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0_VALID, 1);
756 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1, 12);
757 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1_VALID, 1);
758 rt2500usb_register_write(rt2x00dev, TXRX_CSR5, reg);
759
760 rt2500usb_register_read(rt2x00dev, TXRX_CSR6, &reg);
761 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0, 10);
762 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0_VALID, 1);
763 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1, 11);
764 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1_VALID, 1);
765 rt2500usb_register_write(rt2x00dev, TXRX_CSR6, reg);
766
767 rt2500usb_register_read(rt2x00dev, TXRX_CSR7, &reg);
768 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0, 7);
769 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0_VALID, 1);
770 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1, 6);
771 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1_VALID, 1);
772 rt2500usb_register_write(rt2x00dev, TXRX_CSR7, reg);
773
774 rt2500usb_register_read(rt2x00dev, TXRX_CSR8, &reg);
775 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0, 5);
776 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0_VALID, 1);
777 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1, 0);
778 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1_VALID, 0);
779 rt2500usb_register_write(rt2x00dev, TXRX_CSR8, reg);
780
781 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
782 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 0);
783 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, 0);
784 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 0);
785 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
786 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
787
788 rt2500usb_register_write(rt2x00dev, TXRX_CSR21, 0xe78f);
789 rt2500usb_register_write(rt2x00dev, MAC_CSR9, 0xff1d);
790
791 if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
792 return -EBUSY;
793
794 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
795 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
796 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
797 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 1);
798 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
799
800 if (rt2x00_rev(rt2x00dev) >= RT2570_VERSION_C) {
801 rt2500usb_register_read(rt2x00dev, PHY_CSR2, &reg);
802 rt2x00_set_field16(&reg, PHY_CSR2_LNA, 0);
803 } else {
804 reg = 0;
805 rt2x00_set_field16(&reg, PHY_CSR2_LNA, 1);
806 rt2x00_set_field16(&reg, PHY_CSR2_LNA_MODE, 3);
807 }
808 rt2500usb_register_write(rt2x00dev, PHY_CSR2, reg);
809
810 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0002);
811 rt2500usb_register_write(rt2x00dev, MAC_CSR22, 0x0053);
812 rt2500usb_register_write(rt2x00dev, MAC_CSR15, 0x01ee);
813 rt2500usb_register_write(rt2x00dev, MAC_CSR16, 0x0000);
814
815 rt2500usb_register_read(rt2x00dev, MAC_CSR8, &reg);
816 rt2x00_set_field16(&reg, MAC_CSR8_MAX_FRAME_UNIT,
817 rt2x00dev->rx->data_size);
818 rt2500usb_register_write(rt2x00dev, MAC_CSR8, reg);
819
820 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
821 rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
822 rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, 0);
823 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
824
825 rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
826 rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON, 90);
827 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
828
829 rt2500usb_register_read(rt2x00dev, PHY_CSR4, &reg);
830 rt2x00_set_field16(&reg, PHY_CSR4_LOW_RF_LE, 1);
831 rt2500usb_register_write(rt2x00dev, PHY_CSR4, reg);
832
833 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
834 rt2x00_set_field16(&reg, TXRX_CSR1_AUTO_SEQUENCE, 1);
835 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
836
837 return 0;
838 }
839
840 static int rt2500usb_wait_bbp_ready(struct rt2x00_dev *rt2x00dev)
841 {
842 unsigned int i;
843 u8 value;
844
845 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
846 rt2500usb_bbp_read(rt2x00dev, 0, &value);
847 if ((value != 0xff) && (value != 0x00))
848 return 0;
849 udelay(REGISTER_BUSY_DELAY);
850 }
851
852 ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
853 return -EACCES;
854 }
855
856 static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev)
857 {
858 unsigned int i;
859 u16 eeprom;
860 u8 value;
861 u8 reg_id;
862
863 if (unlikely(rt2500usb_wait_bbp_ready(rt2x00dev)))
864 return -EACCES;
865
866 rt2500usb_bbp_write(rt2x00dev, 3, 0x02);
867 rt2500usb_bbp_write(rt2x00dev, 4, 0x19);
868 rt2500usb_bbp_write(rt2x00dev, 14, 0x1c);
869 rt2500usb_bbp_write(rt2x00dev, 15, 0x30);
870 rt2500usb_bbp_write(rt2x00dev, 16, 0xac);
871 rt2500usb_bbp_write(rt2x00dev, 18, 0x18);
872 rt2500usb_bbp_write(rt2x00dev, 19, 0xff);
873 rt2500usb_bbp_write(rt2x00dev, 20, 0x1e);
874 rt2500usb_bbp_write(rt2x00dev, 21, 0x08);
875 rt2500usb_bbp_write(rt2x00dev, 22, 0x08);
876 rt2500usb_bbp_write(rt2x00dev, 23, 0x08);
877 rt2500usb_bbp_write(rt2x00dev, 24, 0x80);
878 rt2500usb_bbp_write(rt2x00dev, 25, 0x50);
879 rt2500usb_bbp_write(rt2x00dev, 26, 0x08);
880 rt2500usb_bbp_write(rt2x00dev, 27, 0x23);
881 rt2500usb_bbp_write(rt2x00dev, 30, 0x10);
882 rt2500usb_bbp_write(rt2x00dev, 31, 0x2b);
883 rt2500usb_bbp_write(rt2x00dev, 32, 0xb9);
884 rt2500usb_bbp_write(rt2x00dev, 34, 0x12);
885 rt2500usb_bbp_write(rt2x00dev, 35, 0x50);
886 rt2500usb_bbp_write(rt2x00dev, 39, 0xc4);
887 rt2500usb_bbp_write(rt2x00dev, 40, 0x02);
888 rt2500usb_bbp_write(rt2x00dev, 41, 0x60);
889 rt2500usb_bbp_write(rt2x00dev, 53, 0x10);
890 rt2500usb_bbp_write(rt2x00dev, 54, 0x18);
891 rt2500usb_bbp_write(rt2x00dev, 56, 0x08);
892 rt2500usb_bbp_write(rt2x00dev, 57, 0x10);
893 rt2500usb_bbp_write(rt2x00dev, 58, 0x08);
894 rt2500usb_bbp_write(rt2x00dev, 61, 0x60);
895 rt2500usb_bbp_write(rt2x00dev, 62, 0x10);
896 rt2500usb_bbp_write(rt2x00dev, 75, 0xff);
897
898 for (i = 0; i < EEPROM_BBP_SIZE; i++) {
899 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
900
901 if (eeprom != 0xffff && eeprom != 0x0000) {
902 reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
903 value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
904 rt2500usb_bbp_write(rt2x00dev, reg_id, value);
905 }
906 }
907
908 return 0;
909 }
910
911 /*
912 * Device state switch handlers.
913 */
914 static void rt2500usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
915 enum dev_state state)
916 {
917 u16 reg;
918
919 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
920 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX,
921 (state == STATE_RADIO_RX_OFF) ||
922 (state == STATE_RADIO_RX_OFF_LINK));
923 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
924 }
925
926 static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev)
927 {
928 /*
929 * Initialize all registers.
930 */
931 if (unlikely(rt2500usb_init_registers(rt2x00dev) ||
932 rt2500usb_init_bbp(rt2x00dev)))
933 return -EIO;
934
935 return 0;
936 }
937
938 static void rt2500usb_disable_radio(struct rt2x00_dev *rt2x00dev)
939 {
940 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x2121);
941 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x2121);
942
943 /*
944 * Disable synchronisation.
945 */
946 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
947
948 rt2x00usb_disable_radio(rt2x00dev);
949 }
950
951 static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev,
952 enum dev_state state)
953 {
954 u16 reg;
955 u16 reg2;
956 unsigned int i;
957 char put_to_sleep;
958 char bbp_state;
959 char rf_state;
960
961 put_to_sleep = (state != STATE_AWAKE);
962
963 reg = 0;
964 rt2x00_set_field16(&reg, MAC_CSR17_BBP_DESIRE_STATE, state);
965 rt2x00_set_field16(&reg, MAC_CSR17_RF_DESIRE_STATE, state);
966 rt2x00_set_field16(&reg, MAC_CSR17_PUT_TO_SLEEP, put_to_sleep);
967 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
968 rt2x00_set_field16(&reg, MAC_CSR17_SET_STATE, 1);
969 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
970
971 /*
972 * Device is not guaranteed to be in the requested state yet.
973 * We must wait until the register indicates that the
974 * device has entered the correct state.
975 */
976 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
977 rt2500usb_register_read(rt2x00dev, MAC_CSR17, &reg2);
978 bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE);
979 rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE);
980 if (bbp_state == state && rf_state == state)
981 return 0;
982 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
983 msleep(30);
984 }
985
986 return -EBUSY;
987 }
988
989 static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev,
990 enum dev_state state)
991 {
992 int retval = 0;
993
994 switch (state) {
995 case STATE_RADIO_ON:
996 retval = rt2500usb_enable_radio(rt2x00dev);
997 break;
998 case STATE_RADIO_OFF:
999 rt2500usb_disable_radio(rt2x00dev);
1000 break;
1001 case STATE_RADIO_RX_ON:
1002 case STATE_RADIO_RX_ON_LINK:
1003 case STATE_RADIO_RX_OFF:
1004 case STATE_RADIO_RX_OFF_LINK:
1005 rt2500usb_toggle_rx(rt2x00dev, state);
1006 break;
1007 case STATE_RADIO_IRQ_ON:
1008 case STATE_RADIO_IRQ_OFF:
1009 /* No support, but no error either */
1010 break;
1011 case STATE_DEEP_SLEEP:
1012 case STATE_SLEEP:
1013 case STATE_STANDBY:
1014 case STATE_AWAKE:
1015 retval = rt2500usb_set_state(rt2x00dev, state);
1016 break;
1017 default:
1018 retval = -ENOTSUPP;
1019 break;
1020 }
1021
1022 if (unlikely(retval))
1023 ERROR(rt2x00dev, "Device failed to enter state %d (%d).\n",
1024 state, retval);
1025
1026 return retval;
1027 }
1028
1029 /*
1030 * TX descriptor initialization
1031 */
1032 static void rt2500usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
1033 struct sk_buff *skb,
1034 struct txentry_desc *txdesc)
1035 {
1036 struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
1037 __le32 *txd = (__le32 *)(skb->data - TXD_DESC_SIZE);
1038 u32 word;
1039
1040 /*
1041 * Start writing the descriptor words.
1042 */
1043 rt2x00_desc_read(txd, 0, &word);
1044 rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, txdesc->retry_limit);
1045 rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
1046 test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
1047 rt2x00_set_field32(&word, TXD_W0_ACK,
1048 test_bit(ENTRY_TXD_ACK, &txdesc->flags));
1049 rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
1050 test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags));
1051 rt2x00_set_field32(&word, TXD_W0_OFDM,
1052 (txdesc->rate_mode == RATE_MODE_OFDM));
1053 rt2x00_set_field32(&word, TXD_W0_NEW_SEQ,
1054 test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags));
1055 rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs);
1056 rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, txdesc->length);
1057 rt2x00_set_field32(&word, TXD_W0_CIPHER, !!txdesc->cipher);
1058 rt2x00_set_field32(&word, TXD_W0_KEY_ID, txdesc->key_idx);
1059 rt2x00_desc_write(txd, 0, word);
1060
1061 rt2x00_desc_read(txd, 1, &word);
1062 rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, txdesc->iv_offset);
1063 rt2x00_set_field32(&word, TXD_W1_AIFS, txdesc->aifs);
1064 rt2x00_set_field32(&word, TXD_W1_CWMIN, txdesc->cw_min);
1065 rt2x00_set_field32(&word, TXD_W1_CWMAX, txdesc->cw_max);
1066 rt2x00_desc_write(txd, 1, word);
1067
1068 rt2x00_desc_read(txd, 2, &word);
1069 rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->signal);
1070 rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->service);
1071 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, txdesc->length_low);
1072 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, txdesc->length_high);
1073 rt2x00_desc_write(txd, 2, word);
1074
1075 if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags)) {
1076 _rt2x00_desc_write(txd, 3, skbdesc->iv[0]);
1077 _rt2x00_desc_write(txd, 4, skbdesc->iv[1]);
1078 }
1079
1080 /*
1081 * Register descriptor details in skb frame descriptor.
1082 */
1083 skbdesc->desc = txd;
1084 skbdesc->desc_len = TXD_DESC_SIZE;
1085 }
1086
1087 /*
1088 * TX data initialization
1089 */
1090 static void rt2500usb_beacondone(struct urb *urb);
1091
1092 static void rt2500usb_write_beacon(struct queue_entry *entry,
1093 struct txentry_desc *txdesc)
1094 {
1095 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
1096 struct usb_device *usb_dev = to_usb_device_intf(rt2x00dev->dev);
1097 struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
1098 int pipe = usb_sndbulkpipe(usb_dev, entry->queue->usb_endpoint);
1099 int length;
1100 u16 reg, reg0;
1101
1102 /*
1103 * Disable beaconing while we are reloading the beacon data,
1104 * otherwise we might be sending out invalid data.
1105 */
1106 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
1107 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
1108 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1109
1110 /*
1111 * Write the TX descriptor for the beacon.
1112 */
1113 rt2500usb_write_tx_desc(rt2x00dev, entry->skb, txdesc);
1114
1115 /*
1116 * Dump beacon to userspace through debugfs.
1117 */
1118 rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_BEACON, entry->skb);
1119
1120 /*
1121 * Take the descriptor in front of the skb into account.
1122 */
1123 skb_push(entry->skb, TXD_DESC_SIZE);
1124
1125 /*
1126 * USB devices cannot blindly pass the skb->len as the
1127 * length of the data to usb_fill_bulk_urb. Pass the skb
1128 * to the driver to determine what the length should be.
1129 */
1130 length = rt2x00dev->ops->lib->get_tx_data_len(entry);
1131
1132 usb_fill_bulk_urb(bcn_priv->urb, usb_dev, pipe,
1133 entry->skb->data, length, rt2500usb_beacondone,
1134 entry);
1135
1136 /*
1137 * Second we need to create the guardian byte.
1138 * We only need a single byte, so lets recycle
1139 * the 'flags' field we are not using for beacons.
1140 */
1141 bcn_priv->guardian_data = 0;
1142 usb_fill_bulk_urb(bcn_priv->guardian_urb, usb_dev, pipe,
1143 &bcn_priv->guardian_data, 1, rt2500usb_beacondone,
1144 entry);
1145
1146 /*
1147 * Send out the guardian byte.
1148 */
1149 usb_submit_urb(bcn_priv->guardian_urb, GFP_ATOMIC);
1150
1151 /*
1152 * Enable beaconing again.
1153 */
1154 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
1155 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
1156 reg0 = reg;
1157 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 1);
1158 /*
1159 * Beacon generation will fail initially.
1160 * To prevent this we need to change the TXRX_CSR19
1161 * register several times (reg0 is the same as reg
1162 * except for TXRX_CSR19_BEACON_GEN, which is 0 in reg0
1163 * and 1 in reg).
1164 */
1165 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1166 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg0);
1167 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1168 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg0);
1169 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1170 }
1171
1172 static int rt2500usb_get_tx_data_len(struct queue_entry *entry)
1173 {
1174 int length;
1175
1176 /*
1177 * The length _must_ be a multiple of 2,
1178 * but it must _not_ be a multiple of the USB packet size.
1179 */
1180 length = roundup(entry->skb->len, 2);
1181 length += (2 * !(length % entry->queue->usb_maxpacket));
1182
1183 return length;
1184 }
1185
1186 /*
1187 * RX control handlers
1188 */
1189 static void rt2500usb_fill_rxdone(struct queue_entry *entry,
1190 struct rxdone_entry_desc *rxdesc)
1191 {
1192 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
1193 struct queue_entry_priv_usb *entry_priv = entry->priv_data;
1194 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
1195 __le32 *rxd =
1196 (__le32 *)(entry->skb->data +
1197 (entry_priv->urb->actual_length -
1198 entry->queue->desc_size));
1199 u32 word0;
1200 u32 word1;
1201
1202 /*
1203 * Copy descriptor to the skbdesc->desc buffer, making it safe from moving of
1204 * frame data in rt2x00usb.
1205 */
1206 memcpy(skbdesc->desc, rxd, skbdesc->desc_len);
1207 rxd = (__le32 *)skbdesc->desc;
1208
1209 /*
1210 * It is now safe to read the descriptor on all architectures.
1211 */
1212 rt2x00_desc_read(rxd, 0, &word0);
1213 rt2x00_desc_read(rxd, 1, &word1);
1214
1215 if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
1216 rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
1217 if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR))
1218 rxdesc->flags |= RX_FLAG_FAILED_PLCP_CRC;
1219
1220 rxdesc->cipher = rt2x00_get_field32(word0, RXD_W0_CIPHER);
1221 if (rt2x00_get_field32(word0, RXD_W0_CIPHER_ERROR))
1222 rxdesc->cipher_status = RX_CRYPTO_FAIL_KEY;
1223
1224 if (rxdesc->cipher != CIPHER_NONE) {
1225 _rt2x00_desc_read(rxd, 2, &rxdesc->iv[0]);
1226 _rt2x00_desc_read(rxd, 3, &rxdesc->iv[1]);
1227 rxdesc->dev_flags |= RXDONE_CRYPTO_IV;
1228
1229 /* ICV is located at the end of frame */
1230
1231 rxdesc->flags |= RX_FLAG_MMIC_STRIPPED;
1232 if (rxdesc->cipher_status == RX_CRYPTO_SUCCESS)
1233 rxdesc->flags |= RX_FLAG_DECRYPTED;
1234 else if (rxdesc->cipher_status == RX_CRYPTO_FAIL_MIC)
1235 rxdesc->flags |= RX_FLAG_MMIC_ERROR;
1236 }
1237
1238 /*
1239 * Obtain the status about this packet.
1240 * When frame was received with an OFDM bitrate,
1241 * the signal is the PLCP value. If it was received with
1242 * a CCK bitrate the signal is the rate in 100kbit/s.
1243 */
1244 rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
1245 rxdesc->rssi =
1246 rt2x00_get_field32(word1, RXD_W1_RSSI) - rt2x00dev->rssi_offset;
1247 rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
1248
1249 if (rt2x00_get_field32(word0, RXD_W0_OFDM))
1250 rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP;
1251 else
1252 rxdesc->dev_flags |= RXDONE_SIGNAL_BITRATE;
1253 if (rt2x00_get_field32(word0, RXD_W0_MY_BSS))
1254 rxdesc->dev_flags |= RXDONE_MY_BSS;
1255
1256 /*
1257 * Adjust the skb memory window to the frame boundaries.
1258 */
1259 skb_trim(entry->skb, rxdesc->size);
1260 }
1261
1262 /*
1263 * Interrupt functions.
1264 */
1265 static void rt2500usb_beacondone(struct urb *urb)
1266 {
1267 struct queue_entry *entry = (struct queue_entry *)urb->context;
1268 struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
1269
1270 if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &entry->queue->rt2x00dev->flags))
1271 return;
1272
1273 /*
1274 * Check if this was the guardian beacon,
1275 * if that was the case we need to send the real beacon now.
1276 * Otherwise we should free the sk_buffer, the device
1277 * should be doing the rest of the work now.
1278 */
1279 if (bcn_priv->guardian_urb == urb) {
1280 usb_submit_urb(bcn_priv->urb, GFP_ATOMIC);
1281 } else if (bcn_priv->urb == urb) {
1282 dev_kfree_skb(entry->skb);
1283 entry->skb = NULL;
1284 }
1285 }
1286
1287 /*
1288 * Device probe functions.
1289 */
1290 static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
1291 {
1292 u16 word;
1293 u8 *mac;
1294 u8 bbp;
1295
1296 rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
1297
1298 /*
1299 * Start validation of the data that has been read.
1300 */
1301 mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
1302 if (!is_valid_ether_addr(mac)) {
1303 random_ether_addr(mac);
1304 EEPROM(rt2x00dev, "MAC: %pM\n", mac);
1305 }
1306
1307 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
1308 if (word == 0xffff) {
1309 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
1310 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT,
1311 ANTENNA_SW_DIVERSITY);
1312 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT,
1313 ANTENNA_SW_DIVERSITY);
1314 rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE,
1315 LED_MODE_DEFAULT);
1316 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
1317 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
1318 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522);
1319 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1320 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
1321 }
1322
1323 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
1324 if (word == 0xffff) {
1325 rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0);
1326 rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0);
1327 rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0);
1328 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
1329 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
1330 }
1331
1332 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &word);
1333 if (word == 0xffff) {
1334 rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI,
1335 DEFAULT_RSSI_OFFSET);
1336 rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word);
1337 EEPROM(rt2x00dev, "Calibrate offset: 0x%04x\n", word);
1338 }
1339
1340 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &word);
1341 if (word == 0xffff) {
1342 rt2x00_set_field16(&word, EEPROM_BBPTUNE_THRESHOLD, 45);
1343 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE, word);
1344 EEPROM(rt2x00dev, "BBPtune: 0x%04x\n", word);
1345 }
1346
1347 /*
1348 * Switch lower vgc bound to current BBP R17 value,
1349 * lower the value a bit for better quality.
1350 */
1351 rt2500usb_bbp_read(rt2x00dev, 17, &bbp);
1352 bbp -= 6;
1353
1354 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &word);
1355 if (word == 0xffff) {
1356 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCUPPER, 0x40);
1357 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
1358 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
1359 EEPROM(rt2x00dev, "BBPtune vgc: 0x%04x\n", word);
1360 } else {
1361 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
1362 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
1363 }
1364
1365 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &word);
1366 if (word == 0xffff) {
1367 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_LOW, 0x48);
1368 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41);
1369 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word);
1370 EEPROM(rt2x00dev, "BBPtune r17: 0x%04x\n", word);
1371 }
1372
1373 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &word);
1374 if (word == 0xffff) {
1375 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_LOW, 0x40);
1376 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_HIGH, 0x80);
1377 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R24, word);
1378 EEPROM(rt2x00dev, "BBPtune r24: 0x%04x\n", word);
1379 }
1380
1381 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &word);
1382 if (word == 0xffff) {
1383 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_LOW, 0x40);
1384 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_HIGH, 0x50);
1385 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R25, word);
1386 EEPROM(rt2x00dev, "BBPtune r25: 0x%04x\n", word);
1387 }
1388
1389 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &word);
1390 if (word == 0xffff) {
1391 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_LOW, 0x60);
1392 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_HIGH, 0x6d);
1393 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R61, word);
1394 EEPROM(rt2x00dev, "BBPtune r61: 0x%04x\n", word);
1395 }
1396
1397 return 0;
1398 }
1399
1400 static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1401 {
1402 u16 reg;
1403 u16 value;
1404 u16 eeprom;
1405
1406 /*
1407 * Read EEPROM word for configuration.
1408 */
1409 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
1410
1411 /*
1412 * Identify RF chipset.
1413 */
1414 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1415 rt2500usb_register_read(rt2x00dev, MAC_CSR0, &reg);
1416 rt2x00_set_chip(rt2x00dev, RT2570, value, reg);
1417
1418 if (((reg & 0xfff0) != 0) || ((reg & 0x0000000f) == 0)) {
1419 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
1420 return -ENODEV;
1421 }
1422
1423 if (!rt2x00_rf(rt2x00dev, RF2522) &&
1424 !rt2x00_rf(rt2x00dev, RF2523) &&
1425 !rt2x00_rf(rt2x00dev, RF2524) &&
1426 !rt2x00_rf(rt2x00dev, RF2525) &&
1427 !rt2x00_rf(rt2x00dev, RF2525E) &&
1428 !rt2x00_rf(rt2x00dev, RF5222)) {
1429 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
1430 return -ENODEV;
1431 }
1432
1433 /*
1434 * Identify default antenna configuration.
1435 */
1436 rt2x00dev->default_ant.tx =
1437 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
1438 rt2x00dev->default_ant.rx =
1439 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
1440
1441 /*
1442 * When the eeprom indicates SW_DIVERSITY use HW_DIVERSITY instead.
1443 * I am not 100% sure about this, but the legacy drivers do not
1444 * indicate antenna swapping in software is required when
1445 * diversity is enabled.
1446 */
1447 if (rt2x00dev->default_ant.tx == ANTENNA_SW_DIVERSITY)
1448 rt2x00dev->default_ant.tx = ANTENNA_HW_DIVERSITY;
1449 if (rt2x00dev->default_ant.rx == ANTENNA_SW_DIVERSITY)
1450 rt2x00dev->default_ant.rx = ANTENNA_HW_DIVERSITY;
1451
1452 /*
1453 * Store led mode, for correct led behaviour.
1454 */
1455 #ifdef CONFIG_RT2X00_LIB_LEDS
1456 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE);
1457
1458 rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO);
1459 if (value == LED_MODE_TXRX_ACTIVITY ||
1460 value == LED_MODE_DEFAULT ||
1461 value == LED_MODE_ASUS)
1462 rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_qual,
1463 LED_TYPE_ACTIVITY);
1464 #endif /* CONFIG_RT2X00_LIB_LEDS */
1465
1466 /*
1467 * Detect if this device has an hardware controlled radio.
1468 */
1469 if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_HARDWARE_RADIO))
1470 __set_bit(CONFIG_SUPPORT_HW_BUTTON, &rt2x00dev->flags);
1471
1472 /*
1473 * Check if the BBP tuning should be disabled.
1474 */
1475 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
1476 if (rt2x00_get_field16(eeprom, EEPROM_NIC_DYN_BBP_TUNE))
1477 __set_bit(CONFIG_DISABLE_LINK_TUNING, &rt2x00dev->flags);
1478
1479 /*
1480 * Read the RSSI <-> dBm offset information.
1481 */
1482 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &eeprom);
1483 rt2x00dev->rssi_offset =
1484 rt2x00_get_field16(eeprom, EEPROM_CALIBRATE_OFFSET_RSSI);
1485
1486 return 0;
1487 }
1488
1489 /*
1490 * RF value list for RF2522
1491 * Supports: 2.4 GHz
1492 */
1493 static const struct rf_channel rf_vals_bg_2522[] = {
1494 { 1, 0x00002050, 0x000c1fda, 0x00000101, 0 },
1495 { 2, 0x00002050, 0x000c1fee, 0x00000101, 0 },
1496 { 3, 0x00002050, 0x000c2002, 0x00000101, 0 },
1497 { 4, 0x00002050, 0x000c2016, 0x00000101, 0 },
1498 { 5, 0x00002050, 0x000c202a, 0x00000101, 0 },
1499 { 6, 0x00002050, 0x000c203e, 0x00000101, 0 },
1500 { 7, 0x00002050, 0x000c2052, 0x00000101, 0 },
1501 { 8, 0x00002050, 0x000c2066, 0x00000101, 0 },
1502 { 9, 0x00002050, 0x000c207a, 0x00000101, 0 },
1503 { 10, 0x00002050, 0x000c208e, 0x00000101, 0 },
1504 { 11, 0x00002050, 0x000c20a2, 0x00000101, 0 },
1505 { 12, 0x00002050, 0x000c20b6, 0x00000101, 0 },
1506 { 13, 0x00002050, 0x000c20ca, 0x00000101, 0 },
1507 { 14, 0x00002050, 0x000c20fa, 0x00000101, 0 },
1508 };
1509
1510 /*
1511 * RF value list for RF2523
1512 * Supports: 2.4 GHz
1513 */
1514 static const struct rf_channel rf_vals_bg_2523[] = {
1515 { 1, 0x00022010, 0x00000c9e, 0x000e0111, 0x00000a1b },
1516 { 2, 0x00022010, 0x00000ca2, 0x000e0111, 0x00000a1b },
1517 { 3, 0x00022010, 0x00000ca6, 0x000e0111, 0x00000a1b },
1518 { 4, 0x00022010, 0x00000caa, 0x000e0111, 0x00000a1b },
1519 { 5, 0x00022010, 0x00000cae, 0x000e0111, 0x00000a1b },
1520 { 6, 0x00022010, 0x00000cb2, 0x000e0111, 0x00000a1b },
1521 { 7, 0x00022010, 0x00000cb6, 0x000e0111, 0x00000a1b },
1522 { 8, 0x00022010, 0x00000cba, 0x000e0111, 0x00000a1b },
1523 { 9, 0x00022010, 0x00000cbe, 0x000e0111, 0x00000a1b },
1524 { 10, 0x00022010, 0x00000d02, 0x000e0111, 0x00000a1b },
1525 { 11, 0x00022010, 0x00000d06, 0x000e0111, 0x00000a1b },
1526 { 12, 0x00022010, 0x00000d0a, 0x000e0111, 0x00000a1b },
1527 { 13, 0x00022010, 0x00000d0e, 0x000e0111, 0x00000a1b },
1528 { 14, 0x00022010, 0x00000d1a, 0x000e0111, 0x00000a03 },
1529 };
1530
1531 /*
1532 * RF value list for RF2524
1533 * Supports: 2.4 GHz
1534 */
1535 static const struct rf_channel rf_vals_bg_2524[] = {
1536 { 1, 0x00032020, 0x00000c9e, 0x00000101, 0x00000a1b },
1537 { 2, 0x00032020, 0x00000ca2, 0x00000101, 0x00000a1b },
1538 { 3, 0x00032020, 0x00000ca6, 0x00000101, 0x00000a1b },
1539 { 4, 0x00032020, 0x00000caa, 0x00000101, 0x00000a1b },
1540 { 5, 0x00032020, 0x00000cae, 0x00000101, 0x00000a1b },
1541 { 6, 0x00032020, 0x00000cb2, 0x00000101, 0x00000a1b },
1542 { 7, 0x00032020, 0x00000cb6, 0x00000101, 0x00000a1b },
1543 { 8, 0x00032020, 0x00000cba, 0x00000101, 0x00000a1b },
1544 { 9, 0x00032020, 0x00000cbe, 0x00000101, 0x00000a1b },
1545 { 10, 0x00032020, 0x00000d02, 0x00000101, 0x00000a1b },
1546 { 11, 0x00032020, 0x00000d06, 0x00000101, 0x00000a1b },
1547 { 12, 0x00032020, 0x00000d0a, 0x00000101, 0x00000a1b },
1548 { 13, 0x00032020, 0x00000d0e, 0x00000101, 0x00000a1b },
1549 { 14, 0x00032020, 0x00000d1a, 0x00000101, 0x00000a03 },
1550 };
1551
1552 /*
1553 * RF value list for RF2525
1554 * Supports: 2.4 GHz
1555 */
1556 static const struct rf_channel rf_vals_bg_2525[] = {
1557 { 1, 0x00022020, 0x00080c9e, 0x00060111, 0x00000a1b },
1558 { 2, 0x00022020, 0x00080ca2, 0x00060111, 0x00000a1b },
1559 { 3, 0x00022020, 0x00080ca6, 0x00060111, 0x00000a1b },
1560 { 4, 0x00022020, 0x00080caa, 0x00060111, 0x00000a1b },
1561 { 5, 0x00022020, 0x00080cae, 0x00060111, 0x00000a1b },
1562 { 6, 0x00022020, 0x00080cb2, 0x00060111, 0x00000a1b },
1563 { 7, 0x00022020, 0x00080cb6, 0x00060111, 0x00000a1b },
1564 { 8, 0x00022020, 0x00080cba, 0x00060111, 0x00000a1b },
1565 { 9, 0x00022020, 0x00080cbe, 0x00060111, 0x00000a1b },
1566 { 10, 0x00022020, 0x00080d02, 0x00060111, 0x00000a1b },
1567 { 11, 0x00022020, 0x00080d06, 0x00060111, 0x00000a1b },
1568 { 12, 0x00022020, 0x00080d0a, 0x00060111, 0x00000a1b },
1569 { 13, 0x00022020, 0x00080d0e, 0x00060111, 0x00000a1b },
1570 { 14, 0x00022020, 0x00080d1a, 0x00060111, 0x00000a03 },
1571 };
1572
1573 /*
1574 * RF value list for RF2525e
1575 * Supports: 2.4 GHz
1576 */
1577 static const struct rf_channel rf_vals_bg_2525e[] = {
1578 { 1, 0x00022010, 0x0000089a, 0x00060111, 0x00000e1b },
1579 { 2, 0x00022010, 0x0000089e, 0x00060111, 0x00000e07 },
1580 { 3, 0x00022010, 0x0000089e, 0x00060111, 0x00000e1b },
1581 { 4, 0x00022010, 0x000008a2, 0x00060111, 0x00000e07 },
1582 { 5, 0x00022010, 0x000008a2, 0x00060111, 0x00000e1b },
1583 { 6, 0x00022010, 0x000008a6, 0x00060111, 0x00000e07 },
1584 { 7, 0x00022010, 0x000008a6, 0x00060111, 0x00000e1b },
1585 { 8, 0x00022010, 0x000008aa, 0x00060111, 0x00000e07 },
1586 { 9, 0x00022010, 0x000008aa, 0x00060111, 0x00000e1b },
1587 { 10, 0x00022010, 0x000008ae, 0x00060111, 0x00000e07 },
1588 { 11, 0x00022010, 0x000008ae, 0x00060111, 0x00000e1b },
1589 { 12, 0x00022010, 0x000008b2, 0x00060111, 0x00000e07 },
1590 { 13, 0x00022010, 0x000008b2, 0x00060111, 0x00000e1b },
1591 { 14, 0x00022010, 0x000008b6, 0x00060111, 0x00000e23 },
1592 };
1593
1594 /*
1595 * RF value list for RF5222
1596 * Supports: 2.4 GHz & 5.2 GHz
1597 */
1598 static const struct rf_channel rf_vals_5222[] = {
1599 { 1, 0x00022020, 0x00001136, 0x00000101, 0x00000a0b },
1600 { 2, 0x00022020, 0x0000113a, 0x00000101, 0x00000a0b },
1601 { 3, 0x00022020, 0x0000113e, 0x00000101, 0x00000a0b },
1602 { 4, 0x00022020, 0x00001182, 0x00000101, 0x00000a0b },
1603 { 5, 0x00022020, 0x00001186, 0x00000101, 0x00000a0b },
1604 { 6, 0x00022020, 0x0000118a, 0x00000101, 0x00000a0b },
1605 { 7, 0x00022020, 0x0000118e, 0x00000101, 0x00000a0b },
1606 { 8, 0x00022020, 0x00001192, 0x00000101, 0x00000a0b },
1607 { 9, 0x00022020, 0x00001196, 0x00000101, 0x00000a0b },
1608 { 10, 0x00022020, 0x0000119a, 0x00000101, 0x00000a0b },
1609 { 11, 0x00022020, 0x0000119e, 0x00000101, 0x00000a0b },
1610 { 12, 0x00022020, 0x000011a2, 0x00000101, 0x00000a0b },
1611 { 13, 0x00022020, 0x000011a6, 0x00000101, 0x00000a0b },
1612 { 14, 0x00022020, 0x000011ae, 0x00000101, 0x00000a1b },
1613
1614 /* 802.11 UNI / HyperLan 2 */
1615 { 36, 0x00022010, 0x00018896, 0x00000101, 0x00000a1f },
1616 { 40, 0x00022010, 0x0001889a, 0x00000101, 0x00000a1f },
1617 { 44, 0x00022010, 0x0001889e, 0x00000101, 0x00000a1f },
1618 { 48, 0x00022010, 0x000188a2, 0x00000101, 0x00000a1f },
1619 { 52, 0x00022010, 0x000188a6, 0x00000101, 0x00000a1f },
1620 { 66, 0x00022010, 0x000188aa, 0x00000101, 0x00000a1f },
1621 { 60, 0x00022010, 0x000188ae, 0x00000101, 0x00000a1f },
1622 { 64, 0x00022010, 0x000188b2, 0x00000101, 0x00000a1f },
1623
1624 /* 802.11 HyperLan 2 */
1625 { 100, 0x00022010, 0x00008802, 0x00000101, 0x00000a0f },
1626 { 104, 0x00022010, 0x00008806, 0x00000101, 0x00000a0f },
1627 { 108, 0x00022010, 0x0000880a, 0x00000101, 0x00000a0f },
1628 { 112, 0x00022010, 0x0000880e, 0x00000101, 0x00000a0f },
1629 { 116, 0x00022010, 0x00008812, 0x00000101, 0x00000a0f },
1630 { 120, 0x00022010, 0x00008816, 0x00000101, 0x00000a0f },
1631 { 124, 0x00022010, 0x0000881a, 0x00000101, 0x00000a0f },
1632 { 128, 0x00022010, 0x0000881e, 0x00000101, 0x00000a0f },
1633 { 132, 0x00022010, 0x00008822, 0x00000101, 0x00000a0f },
1634 { 136, 0x00022010, 0x00008826, 0x00000101, 0x00000a0f },
1635
1636 /* 802.11 UNII */
1637 { 140, 0x00022010, 0x0000882a, 0x00000101, 0x00000a0f },
1638 { 149, 0x00022020, 0x000090a6, 0x00000101, 0x00000a07 },
1639 { 153, 0x00022020, 0x000090ae, 0x00000101, 0x00000a07 },
1640 { 157, 0x00022020, 0x000090b6, 0x00000101, 0x00000a07 },
1641 { 161, 0x00022020, 0x000090be, 0x00000101, 0x00000a07 },
1642 };
1643
1644 static int rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
1645 {
1646 struct hw_mode_spec *spec = &rt2x00dev->spec;
1647 struct channel_info *info;
1648 char *tx_power;
1649 unsigned int i;
1650
1651 /*
1652 * Initialize all hw fields.
1653 */
1654 rt2x00dev->hw->flags =
1655 IEEE80211_HW_RX_INCLUDES_FCS |
1656 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1657 IEEE80211_HW_SIGNAL_DBM |
1658 IEEE80211_HW_SUPPORTS_PS |
1659 IEEE80211_HW_PS_NULLFUNC_STACK;
1660
1661 SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev);
1662 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
1663 rt2x00_eeprom_addr(rt2x00dev,
1664 EEPROM_MAC_ADDR_0));
1665
1666 /*
1667 * Initialize hw_mode information.
1668 */
1669 spec->supported_bands = SUPPORT_BAND_2GHZ;
1670 spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
1671
1672 if (rt2x00_rf(rt2x00dev, RF2522)) {
1673 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522);
1674 spec->channels = rf_vals_bg_2522;
1675 } else if (rt2x00_rf(rt2x00dev, RF2523)) {
1676 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523);
1677 spec->channels = rf_vals_bg_2523;
1678 } else if (rt2x00_rf(rt2x00dev, RF2524)) {
1679 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524);
1680 spec->channels = rf_vals_bg_2524;
1681 } else if (rt2x00_rf(rt2x00dev, RF2525)) {
1682 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525);
1683 spec->channels = rf_vals_bg_2525;
1684 } else if (rt2x00_rf(rt2x00dev, RF2525E)) {
1685 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e);
1686 spec->channels = rf_vals_bg_2525e;
1687 } else if (rt2x00_rf(rt2x00dev, RF5222)) {
1688 spec->supported_bands |= SUPPORT_BAND_5GHZ;
1689 spec->num_channels = ARRAY_SIZE(rf_vals_5222);
1690 spec->channels = rf_vals_5222;
1691 }
1692
1693 /*
1694 * Create channel information array
1695 */
1696 info = kzalloc(spec->num_channels * sizeof(*info), GFP_KERNEL);
1697 if (!info)
1698 return -ENOMEM;
1699
1700 spec->channels_info = info;
1701
1702 tx_power = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START);
1703 for (i = 0; i < 14; i++)
1704 info[i].tx_power1 = TXPOWER_FROM_DEV(tx_power[i]);
1705
1706 if (spec->num_channels > 14) {
1707 for (i = 14; i < spec->num_channels; i++)
1708 info[i].tx_power1 = DEFAULT_TXPOWER;
1709 }
1710
1711 return 0;
1712 }
1713
1714 static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev)
1715 {
1716 int retval;
1717
1718 /*
1719 * Allocate eeprom data.
1720 */
1721 retval = rt2500usb_validate_eeprom(rt2x00dev);
1722 if (retval)
1723 return retval;
1724
1725 retval = rt2500usb_init_eeprom(rt2x00dev);
1726 if (retval)
1727 return retval;
1728
1729 /*
1730 * Initialize hw specifications.
1731 */
1732 retval = rt2500usb_probe_hw_mode(rt2x00dev);
1733 if (retval)
1734 return retval;
1735
1736 /*
1737 * This device requires the atim queue
1738 */
1739 __set_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
1740 __set_bit(DRIVER_REQUIRE_BEACON_GUARD, &rt2x00dev->flags);
1741 if (!modparam_nohwcrypt) {
1742 __set_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags);
1743 __set_bit(DRIVER_REQUIRE_COPY_IV, &rt2x00dev->flags);
1744 }
1745 __set_bit(CONFIG_DISABLE_LINK_TUNING, &rt2x00dev->flags);
1746
1747 /*
1748 * Set the rssi offset.
1749 */
1750 rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
1751
1752 return 0;
1753 }
1754
1755 static const struct ieee80211_ops rt2500usb_mac80211_ops = {
1756 .tx = rt2x00mac_tx,
1757 .start = rt2x00mac_start,
1758 .stop = rt2x00mac_stop,
1759 .add_interface = rt2x00mac_add_interface,
1760 .remove_interface = rt2x00mac_remove_interface,
1761 .config = rt2x00mac_config,
1762 .configure_filter = rt2x00mac_configure_filter,
1763 .set_tim = rt2x00mac_set_tim,
1764 .set_key = rt2x00mac_set_key,
1765 .get_stats = rt2x00mac_get_stats,
1766 .bss_info_changed = rt2x00mac_bss_info_changed,
1767 .conf_tx = rt2x00mac_conf_tx,
1768 .rfkill_poll = rt2x00mac_rfkill_poll,
1769 };
1770
1771 static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = {
1772 .probe_hw = rt2500usb_probe_hw,
1773 .initialize = rt2x00usb_initialize,
1774 .uninitialize = rt2x00usb_uninitialize,
1775 .clear_entry = rt2x00usb_clear_entry,
1776 .set_device_state = rt2500usb_set_device_state,
1777 .rfkill_poll = rt2500usb_rfkill_poll,
1778 .link_stats = rt2500usb_link_stats,
1779 .reset_tuner = rt2500usb_reset_tuner,
1780 .write_tx_desc = rt2500usb_write_tx_desc,
1781 .write_tx_data = rt2x00usb_write_tx_data,
1782 .write_beacon = rt2500usb_write_beacon,
1783 .get_tx_data_len = rt2500usb_get_tx_data_len,
1784 .kick_tx_queue = rt2x00usb_kick_tx_queue,
1785 .kill_tx_queue = rt2x00usb_kill_tx_queue,
1786 .fill_rxdone = rt2500usb_fill_rxdone,
1787 .config_shared_key = rt2500usb_config_key,
1788 .config_pairwise_key = rt2500usb_config_key,
1789 .config_filter = rt2500usb_config_filter,
1790 .config_intf = rt2500usb_config_intf,
1791 .config_erp = rt2500usb_config_erp,
1792 .config_ant = rt2500usb_config_ant,
1793 .config = rt2500usb_config,
1794 };
1795
1796 static const struct data_queue_desc rt2500usb_queue_rx = {
1797 .entry_num = RX_ENTRIES,
1798 .data_size = DATA_FRAME_SIZE,
1799 .desc_size = RXD_DESC_SIZE,
1800 .priv_size = sizeof(struct queue_entry_priv_usb),
1801 };
1802
1803 static const struct data_queue_desc rt2500usb_queue_tx = {
1804 .entry_num = TX_ENTRIES,
1805 .data_size = DATA_FRAME_SIZE,
1806 .desc_size = TXD_DESC_SIZE,
1807 .priv_size = sizeof(struct queue_entry_priv_usb),
1808 };
1809
1810 static const struct data_queue_desc rt2500usb_queue_bcn = {
1811 .entry_num = BEACON_ENTRIES,
1812 .data_size = MGMT_FRAME_SIZE,
1813 .desc_size = TXD_DESC_SIZE,
1814 .priv_size = sizeof(struct queue_entry_priv_usb_bcn),
1815 };
1816
1817 static const struct data_queue_desc rt2500usb_queue_atim = {
1818 .entry_num = ATIM_ENTRIES,
1819 .data_size = DATA_FRAME_SIZE,
1820 .desc_size = TXD_DESC_SIZE,
1821 .priv_size = sizeof(struct queue_entry_priv_usb),
1822 };
1823
1824 static const struct rt2x00_ops rt2500usb_ops = {
1825 .name = KBUILD_MODNAME,
1826 .max_sta_intf = 1,
1827 .max_ap_intf = 1,
1828 .eeprom_size = EEPROM_SIZE,
1829 .rf_size = RF_SIZE,
1830 .tx_queues = NUM_TX_QUEUES,
1831 .extra_tx_headroom = TXD_DESC_SIZE,
1832 .rx = &rt2500usb_queue_rx,
1833 .tx = &rt2500usb_queue_tx,
1834 .bcn = &rt2500usb_queue_bcn,
1835 .atim = &rt2500usb_queue_atim,
1836 .lib = &rt2500usb_rt2x00_ops,
1837 .hw = &rt2500usb_mac80211_ops,
1838 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
1839 .debugfs = &rt2500usb_rt2x00debug,
1840 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
1841 };
1842
1843 /*
1844 * rt2500usb module information.
1845 */
1846 static struct usb_device_id rt2500usb_device_table[] = {
1847 /* ASUS */
1848 { USB_DEVICE(0x0b05, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
1849 { USB_DEVICE(0x0b05, 0x1707), USB_DEVICE_DATA(&rt2500usb_ops) },
1850 /* Belkin */
1851 { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt2500usb_ops) },
1852 { USB_DEVICE(0x050d, 0x7051), USB_DEVICE_DATA(&rt2500usb_ops) },
1853 { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt2500usb_ops) },
1854 /* Cisco Systems */
1855 { USB_DEVICE(0x13b1, 0x000d), USB_DEVICE_DATA(&rt2500usb_ops) },
1856 { USB_DEVICE(0x13b1, 0x0011), USB_DEVICE_DATA(&rt2500usb_ops) },
1857 { USB_DEVICE(0x13b1, 0x001a), USB_DEVICE_DATA(&rt2500usb_ops) },
1858 /* CNet */
1859 { USB_DEVICE(0x1371, 0x9022), USB_DEVICE_DATA(&rt2500usb_ops) },
1860 /* Conceptronic */
1861 { USB_DEVICE(0x14b2, 0x3c02), USB_DEVICE_DATA(&rt2500usb_ops) },
1862 /* D-LINK */
1863 { USB_DEVICE(0x2001, 0x3c00), USB_DEVICE_DATA(&rt2500usb_ops) },
1864 /* Gigabyte */
1865 { USB_DEVICE(0x1044, 0x8001), USB_DEVICE_DATA(&rt2500usb_ops) },
1866 { USB_DEVICE(0x1044, 0x8007), USB_DEVICE_DATA(&rt2500usb_ops) },
1867 /* Hercules */
1868 { USB_DEVICE(0x06f8, 0xe000), USB_DEVICE_DATA(&rt2500usb_ops) },
1869 /* Melco */
1870 { USB_DEVICE(0x0411, 0x005e), USB_DEVICE_DATA(&rt2500usb_ops) },
1871 { USB_DEVICE(0x0411, 0x0066), USB_DEVICE_DATA(&rt2500usb_ops) },
1872 { USB_DEVICE(0x0411, 0x0067), USB_DEVICE_DATA(&rt2500usb_ops) },
1873 { USB_DEVICE(0x0411, 0x008b), USB_DEVICE_DATA(&rt2500usb_ops) },
1874 { USB_DEVICE(0x0411, 0x0097), USB_DEVICE_DATA(&rt2500usb_ops) },
1875 /* MSI */
1876 { USB_DEVICE(0x0db0, 0x6861), USB_DEVICE_DATA(&rt2500usb_ops) },
1877 { USB_DEVICE(0x0db0, 0x6865), USB_DEVICE_DATA(&rt2500usb_ops) },
1878 { USB_DEVICE(0x0db0, 0x6869), USB_DEVICE_DATA(&rt2500usb_ops) },
1879 /* Ralink */
1880 { USB_DEVICE(0x148f, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
1881 { USB_DEVICE(0x148f, 0x2570), USB_DEVICE_DATA(&rt2500usb_ops) },
1882 { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt2500usb_ops) },
1883 { USB_DEVICE(0x148f, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
1884 /* Sagem */
1885 { USB_DEVICE(0x079b, 0x004b), USB_DEVICE_DATA(&rt2500usb_ops) },
1886 /* Siemens */
1887 { USB_DEVICE(0x0681, 0x3c06), USB_DEVICE_DATA(&rt2500usb_ops) },
1888 /* SMC */
1889 { USB_DEVICE(0x0707, 0xee13), USB_DEVICE_DATA(&rt2500usb_ops) },
1890 /* Spairon */
1891 { USB_DEVICE(0x114b, 0x0110), USB_DEVICE_DATA(&rt2500usb_ops) },
1892 /* SURECOM */
1893 { USB_DEVICE(0x0769, 0x11f3), USB_DEVICE_DATA(&rt2500usb_ops) },
1894 /* Trust */
1895 { USB_DEVICE(0x0eb0, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
1896 /* VTech */
1897 { USB_DEVICE(0x0f88, 0x3012), USB_DEVICE_DATA(&rt2500usb_ops) },
1898 /* Zinwell */
1899 { USB_DEVICE(0x5a57, 0x0260), USB_DEVICE_DATA(&rt2500usb_ops) },
1900 { 0, }
1901 };
1902
1903 MODULE_AUTHOR(DRV_PROJECT);
1904 MODULE_VERSION(DRV_VERSION);
1905 MODULE_DESCRIPTION("Ralink RT2500 USB Wireless LAN driver.");
1906 MODULE_SUPPORTED_DEVICE("Ralink RT2570 USB chipset based cards");
1907 MODULE_DEVICE_TABLE(usb, rt2500usb_device_table);
1908 MODULE_LICENSE("GPL");
1909
1910 static struct usb_driver rt2500usb_driver = {
1911 .name = KBUILD_MODNAME,
1912 .id_table = rt2500usb_device_table,
1913 .probe = rt2x00usb_probe,
1914 .disconnect = rt2x00usb_disconnect,
1915 .suspend = rt2x00usb_suspend,
1916 .resume = rt2x00usb_resume,
1917 };
1918
1919 static int __init rt2500usb_init(void)
1920 {
1921 return usb_register(&rt2500usb_driver);
1922 }
1923
1924 static void __exit rt2500usb_exit(void)
1925 {
1926 usb_deregister(&rt2500usb_driver);
1927 }
1928
1929 module_init(rt2500usb_init);
1930 module_exit(rt2500usb_exit);
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree