?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
mmc: kconfig: remove EXPERIMENTAL from the DMA selection of atmel-mci
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / net / smsc911x.c
blobc6d47d10590c6955f0d76bd72680a90fb9bdfd41
1 /***************************************************************************
2 *
3 * Copyright (C) 2004-2008 SMSC
4 * Copyright (C) 2005-2008 ARM
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 *
20 ***************************************************************************
21 * Rewritten, heavily based on smsc911x simple driver by SMSC.
22 * Partly uses io macros from smc91x.c by Nicolas Pitre
23 *
24 * Supported devices:
25 * LAN9115, LAN9116, LAN9117, LAN9118
26 * LAN9215, LAN9216, LAN9217, LAN9218
27 * LAN9210, LAN9211
28 * LAN9220, LAN9221
29 *
30 */
31
32 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
33
34 #include <linux/crc32.h>
35 #include <linux/delay.h>
36 #include <linux/errno.h>
37 #include <linux/etherdevice.h>
38 #include <linux/ethtool.h>
39 #include <linux/init.h>
40 #include <linux/ioport.h>
41 #include <linux/kernel.h>
42 #include <linux/module.h>
43 #include <linux/netdevice.h>
44 #include <linux/platform_device.h>
45 #include <linux/sched.h>
46 #include <linux/timer.h>
47 #include <linux/bug.h>
48 #include <linux/bitops.h>
49 #include <linux/irq.h>
50 #include <linux/io.h>
51 #include <linux/swab.h>
52 #include <linux/phy.h>
53 #include <linux/smsc911x.h>
54 #include <linux/device.h>
55 #include "smsc911x.h"
56
57 #define SMSC_CHIPNAME "smsc911x"
58 #define SMSC_MDIONAME "smsc911x-mdio"
59 #define SMSC_DRV_VERSION "2008-10-21"
60
61 MODULE_LICENSE("GPL");
62 MODULE_VERSION(SMSC_DRV_VERSION);
63 MODULE_ALIAS("platform:smsc911x");
64
65 #if USE_DEBUG > 0
66 static int debug = 16;
67 #else
68 static int debug = 3;
69 #endif
70
71 module_param(debug, int, 0);
72 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
73
74 struct smsc911x_data;
75
76 struct smsc911x_ops {
77 u32 (*reg_read)(struct smsc911x_data *pdata, u32 reg);
78 void (*reg_write)(struct smsc911x_data *pdata, u32 reg, u32 val);
79 void (*rx_readfifo)(struct smsc911x_data *pdata,
80 unsigned int *buf, unsigned int wordcount);
81 void (*tx_writefifo)(struct smsc911x_data *pdata,
82 unsigned int *buf, unsigned int wordcount);
83 };
84
85 struct smsc911x_data {
86 void __iomem *ioaddr;
87
88 unsigned int idrev;
89
90 /* used to decide which workarounds apply */
91 unsigned int generation;
92
93 /* device configuration (copied from platform_data during probe) */
94 struct smsc911x_platform_config config;
95
96 /* This needs to be acquired before calling any of below:
97 * smsc911x_mac_read(), smsc911x_mac_write()
98 */
99 spinlock_t mac_lock;
100
101 /* spinlock to ensure register accesses are serialised */
102 spinlock_t dev_lock;
103
104 struct phy_device *phy_dev;
105 struct mii_bus *mii_bus;
106 int phy_irq[PHY_MAX_ADDR];
107 unsigned int using_extphy;
108 int last_duplex;
109 int last_carrier;
110
111 u32 msg_enable;
112 unsigned int gpio_setting;
113 unsigned int gpio_orig_setting;
114 struct net_device *dev;
115 struct napi_struct napi;
116
117 unsigned int software_irq_signal;
118
119 #ifdef USE_PHY_WORK_AROUND
120 #define MIN_PACKET_SIZE (64)
121 char loopback_tx_pkt[MIN_PACKET_SIZE];
122 char loopback_rx_pkt[MIN_PACKET_SIZE];
123 unsigned int resetcount;
124 #endif
125
126 /* Members for Multicast filter workaround */
127 unsigned int multicast_update_pending;
128 unsigned int set_bits_mask;
129 unsigned int clear_bits_mask;
130 unsigned int hashhi;
131 unsigned int hashlo;
132
133 /* register access functions */
134 const struct smsc911x_ops *ops;
135 };
136
137 /* Easy access to information */
138 #define __smsc_shift(pdata, reg) ((reg) << ((pdata)->config.shift))
139
140 static inline u32 __smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
141 {
142 if (pdata->config.flags & SMSC911X_USE_32BIT)
143 return readl(pdata->ioaddr + reg);
144
145 if (pdata->config.flags & SMSC911X_USE_16BIT)
146 return ((readw(pdata->ioaddr + reg) & 0xFFFF) |
147 ((readw(pdata->ioaddr + reg + 2) & 0xFFFF) << 16));
148
149 BUG();
150 return 0;
151 }
152
153 static inline u32
154 __smsc911x_reg_read_shift(struct smsc911x_data *pdata, u32 reg)
155 {
156 if (pdata->config.flags & SMSC911X_USE_32BIT)
157 return readl(pdata->ioaddr + __smsc_shift(pdata, reg));
158
159 if (pdata->config.flags & SMSC911X_USE_16BIT)
160 return (readw(pdata->ioaddr +
161 __smsc_shift(pdata, reg)) & 0xFFFF) |
162 ((readw(pdata->ioaddr +
163 __smsc_shift(pdata, reg + 2)) & 0xFFFF) << 16);
164
165 BUG();
166 return 0;
167 }
168
169 static inline u32 smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
170 {
171 u32 data;
172 unsigned long flags;
173
174 spin_lock_irqsave(&pdata->dev_lock, flags);
175 data = pdata->ops->reg_read(pdata, reg);
176 spin_unlock_irqrestore(&pdata->dev_lock, flags);
177
178 return data;
179 }
180
181 static inline void __smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
182 u32 val)
183 {
184 if (pdata->config.flags & SMSC911X_USE_32BIT) {
185 writel(val, pdata->ioaddr + reg);
186 return;
187 }
188
189 if (pdata->config.flags & SMSC911X_USE_16BIT) {
190 writew(val & 0xFFFF, pdata->ioaddr + reg);
191 writew((val >> 16) & 0xFFFF, pdata->ioaddr + reg + 2);
192 return;
193 }
194
195 BUG();
196 }
197
198 static inline void
199 __smsc911x_reg_write_shift(struct smsc911x_data *pdata, u32 reg, u32 val)
200 {
201 if (pdata->config.flags & SMSC911X_USE_32BIT) {
202 writel(val, pdata->ioaddr + __smsc_shift(pdata, reg));
203 return;
204 }
205
206 if (pdata->config.flags & SMSC911X_USE_16BIT) {
207 writew(val & 0xFFFF,
208 pdata->ioaddr + __smsc_shift(pdata, reg));
209 writew((val >> 16) & 0xFFFF,
210 pdata->ioaddr + __smsc_shift(pdata, reg + 2));
211 return;
212 }
213
214 BUG();
215 }
216
217 static inline void smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
218 u32 val)
219 {
220 unsigned long flags;
221
222 spin_lock_irqsave(&pdata->dev_lock, flags);
223 pdata->ops->reg_write(pdata, reg, val);
224 spin_unlock_irqrestore(&pdata->dev_lock, flags);
225 }
226
227 /* Writes a packet to the TX_DATA_FIFO */
228 static inline void
229 smsc911x_tx_writefifo(struct smsc911x_data *pdata, unsigned int *buf,
230 unsigned int wordcount)
231 {
232 unsigned long flags;
233
234 spin_lock_irqsave(&pdata->dev_lock, flags);
235
236 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
237 while (wordcount--)
238 __smsc911x_reg_write(pdata, TX_DATA_FIFO,
239 swab32(*buf++));
240 goto out;
241 }
242
243 if (pdata->config.flags & SMSC911X_USE_32BIT) {
244 writesl(pdata->ioaddr + TX_DATA_FIFO, buf, wordcount);
245 goto out;
246 }
247
248 if (pdata->config.flags & SMSC911X_USE_16BIT) {
249 while (wordcount--)
250 __smsc911x_reg_write(pdata, TX_DATA_FIFO, *buf++);
251 goto out;
252 }
253
254 BUG();
255 out:
256 spin_unlock_irqrestore(&pdata->dev_lock, flags);
257 }
258
259 /* Writes a packet to the TX_DATA_FIFO - shifted version */
260 static inline void
261 smsc911x_tx_writefifo_shift(struct smsc911x_data *pdata, unsigned int *buf,
262 unsigned int wordcount)
263 {
264 unsigned long flags;
265
266 spin_lock_irqsave(&pdata->dev_lock, flags);
267
268 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
269 while (wordcount--)
270 __smsc911x_reg_write_shift(pdata, TX_DATA_FIFO,
271 swab32(*buf++));
272 goto out;
273 }
274
275 if (pdata->config.flags & SMSC911X_USE_32BIT) {
276 writesl(pdata->ioaddr + __smsc_shift(pdata,
277 TX_DATA_FIFO), buf, wordcount);
278 goto out;
279 }
280
281 if (pdata->config.flags & SMSC911X_USE_16BIT) {
282 while (wordcount--)
283 __smsc911x_reg_write_shift(pdata,
284 TX_DATA_FIFO, *buf++);
285 goto out;
286 }
287
288 BUG();
289 out:
290 spin_unlock_irqrestore(&pdata->dev_lock, flags);
291 }
292
293 /* Reads a packet out of the RX_DATA_FIFO */
294 static inline void
295 smsc911x_rx_readfifo(struct smsc911x_data *pdata, unsigned int *buf,
296 unsigned int wordcount)
297 {
298 unsigned long flags;
299
300 spin_lock_irqsave(&pdata->dev_lock, flags);
301
302 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
303 while (wordcount--)
304 *buf++ = swab32(__smsc911x_reg_read(pdata,
305 RX_DATA_FIFO));
306 goto out;
307 }
308
309 if (pdata->config.flags & SMSC911X_USE_32BIT) {
310 readsl(pdata->ioaddr + RX_DATA_FIFO, buf, wordcount);
311 goto out;
312 }
313
314 if (pdata->config.flags & SMSC911X_USE_16BIT) {
315 while (wordcount--)
316 *buf++ = __smsc911x_reg_read(pdata, RX_DATA_FIFO);
317 goto out;
318 }
319
320 BUG();
321 out:
322 spin_unlock_irqrestore(&pdata->dev_lock, flags);
323 }
324
325 /* Reads a packet out of the RX_DATA_FIFO - shifted version */
326 static inline void
327 smsc911x_rx_readfifo_shift(struct smsc911x_data *pdata, unsigned int *buf,
328 unsigned int wordcount)
329 {
330 unsigned long flags;
331
332 spin_lock_irqsave(&pdata->dev_lock, flags);
333
334 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
335 while (wordcount--)
336 *buf++ = swab32(__smsc911x_reg_read_shift(pdata,
337 RX_DATA_FIFO));
338 goto out;
339 }
340
341 if (pdata->config.flags & SMSC911X_USE_32BIT) {
342 readsl(pdata->ioaddr + __smsc_shift(pdata,
343 RX_DATA_FIFO), buf, wordcount);
344 goto out;
345 }
346
347 if (pdata->config.flags & SMSC911X_USE_16BIT) {
348 while (wordcount--)
349 *buf++ = __smsc911x_reg_read_shift(pdata,
350 RX_DATA_FIFO);
351 goto out;
352 }
353
354 BUG();
355 out:
356 spin_unlock_irqrestore(&pdata->dev_lock, flags);
357 }
358
359 /* waits for MAC not busy, with timeout. Only called by smsc911x_mac_read
360 * and smsc911x_mac_write, so assumes mac_lock is held */
361 static int smsc911x_mac_complete(struct smsc911x_data *pdata)
362 {
363 int i;
364 u32 val;
365
366 SMSC_ASSERT_MAC_LOCK(pdata);
367
368 for (i = 0; i < 40; i++) {
369 val = smsc911x_reg_read(pdata, MAC_CSR_CMD);
370 if (!(val & MAC_CSR_CMD_CSR_BUSY_))
371 return 0;
372 }
373 SMSC_WARN(pdata, hw, "Timed out waiting for MAC not BUSY. "
374 "MAC_CSR_CMD: 0x%08X", val);
375 return -EIO;
376 }
377
378 /* Fetches a MAC register value. Assumes mac_lock is acquired */
379 static u32 smsc911x_mac_read(struct smsc911x_data *pdata, unsigned int offset)
380 {
381 unsigned int temp;
382
383 SMSC_ASSERT_MAC_LOCK(pdata);
384
385 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
386 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
387 SMSC_WARN(pdata, hw, "MAC busy at entry");
388 return 0xFFFFFFFF;
389 }
390
391 /* Send the MAC cmd */
392 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
393 MAC_CSR_CMD_CSR_BUSY_ | MAC_CSR_CMD_R_NOT_W_));
394
395 /* Workaround for hardware read-after-write restriction */
396 temp = smsc911x_reg_read(pdata, BYTE_TEST);
397
398 /* Wait for the read to complete */
399 if (likely(smsc911x_mac_complete(pdata) == 0))
400 return smsc911x_reg_read(pdata, MAC_CSR_DATA);
401
402 SMSC_WARN(pdata, hw, "MAC busy after read");
403 return 0xFFFFFFFF;
404 }
405
406 /* Set a mac register, mac_lock must be acquired before calling */
407 static void smsc911x_mac_write(struct smsc911x_data *pdata,
408 unsigned int offset, u32 val)
409 {
410 unsigned int temp;
411
412 SMSC_ASSERT_MAC_LOCK(pdata);
413
414 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
415 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
416 SMSC_WARN(pdata, hw,
417 "smsc911x_mac_write failed, MAC busy at entry");
418 return;
419 }
420
421 /* Send data to write */
422 smsc911x_reg_write(pdata, MAC_CSR_DATA, val);
423
424 /* Write the actual data */
425 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
426 MAC_CSR_CMD_CSR_BUSY_));
427
428 /* Workaround for hardware read-after-write restriction */
429 temp = smsc911x_reg_read(pdata, BYTE_TEST);
430
431 /* Wait for the write to complete */
432 if (likely(smsc911x_mac_complete(pdata) == 0))
433 return;
434
435 SMSC_WARN(pdata, hw, "smsc911x_mac_write failed, MAC busy after write");
436 }
437
438 /* Get a phy register */
439 static int smsc911x_mii_read(struct mii_bus *bus, int phyaddr, int regidx)
440 {
441 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
442 unsigned long flags;
443 unsigned int addr;
444 int i, reg;
445
446 spin_lock_irqsave(&pdata->mac_lock, flags);
447
448 /* Confirm MII not busy */
449 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
450 SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_read???");
451 reg = -EIO;
452 goto out;
453 }
454
455 /* Set the address, index & direction (read from PHY) */
456 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6);
457 smsc911x_mac_write(pdata, MII_ACC, addr);
458
459 /* Wait for read to complete w/ timeout */
460 for (i = 0; i < 100; i++)
461 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
462 reg = smsc911x_mac_read(pdata, MII_DATA);
463 goto out;
464 }
465
466 SMSC_WARN(pdata, hw, "Timed out waiting for MII read to finish");
467 reg = -EIO;
468
469 out:
470 spin_unlock_irqrestore(&pdata->mac_lock, flags);
471 return reg;
472 }
473
474 /* Set a phy register */
475 static int smsc911x_mii_write(struct mii_bus *bus, int phyaddr, int regidx,
476 u16 val)
477 {
478 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
479 unsigned long flags;
480 unsigned int addr;
481 int i, reg;
482
483 spin_lock_irqsave(&pdata->mac_lock, flags);
484
485 /* Confirm MII not busy */
486 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
487 SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_write???");
488 reg = -EIO;
489 goto out;
490 }
491
492 /* Put the data to write in the MAC */
493 smsc911x_mac_write(pdata, MII_DATA, val);
494
495 /* Set the address, index & direction (write to PHY) */
496 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6) |
497 MII_ACC_MII_WRITE_;
498 smsc911x_mac_write(pdata, MII_ACC, addr);
499
500 /* Wait for write to complete w/ timeout */
501 for (i = 0; i < 100; i++)
502 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
503 reg = 0;
504 goto out;
505 }
506
507 SMSC_WARN(pdata, hw, "Timed out waiting for MII write to finish");
508 reg = -EIO;
509
510 out:
511 spin_unlock_irqrestore(&pdata->mac_lock, flags);
512 return reg;
513 }
514
515 /* Switch to external phy. Assumes tx and rx are stopped. */
516 static void smsc911x_phy_enable_external(struct smsc911x_data *pdata)
517 {
518 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
519
520 /* Disable phy clocks to the MAC */
521 hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
522 hwcfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
523 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
524 udelay(10); /* Enough time for clocks to stop */
525
526 /* Switch to external phy */
527 hwcfg |= HW_CFG_EXT_PHY_EN_;
528 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
529
530 /* Enable phy clocks to the MAC */
531 hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
532 hwcfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
533 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
534 udelay(10); /* Enough time for clocks to restart */
535
536 hwcfg |= HW_CFG_SMI_SEL_;
537 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
538 }
539
540 /* Autodetects and enables external phy if present on supported chips.
541 * autodetection can be overridden by specifying SMSC911X_FORCE_INTERNAL_PHY
542 * or SMSC911X_FORCE_EXTERNAL_PHY in the platform_data flags. */
543 static void smsc911x_phy_initialise_external(struct smsc911x_data *pdata)
544 {
545 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
546
547 if (pdata->config.flags & SMSC911X_FORCE_INTERNAL_PHY) {
548 SMSC_TRACE(pdata, hw, "Forcing internal PHY");
549 pdata->using_extphy = 0;
550 } else if (pdata->config.flags & SMSC911X_FORCE_EXTERNAL_PHY) {
551 SMSC_TRACE(pdata, hw, "Forcing external PHY");
552 smsc911x_phy_enable_external(pdata);
553 pdata->using_extphy = 1;
554 } else if (hwcfg & HW_CFG_EXT_PHY_DET_) {
555 SMSC_TRACE(pdata, hw,
556 "HW_CFG EXT_PHY_DET set, using external PHY");
557 smsc911x_phy_enable_external(pdata);
558 pdata->using_extphy = 1;
559 } else {
560 SMSC_TRACE(pdata, hw,
561 "HW_CFG EXT_PHY_DET clear, using internal PHY");
562 pdata->using_extphy = 0;
563 }
564 }
565
566 /* Fetches a tx status out of the status fifo */
567 static unsigned int smsc911x_tx_get_txstatus(struct smsc911x_data *pdata)
568 {
569 unsigned int result =
570 smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TSUSED_;
571
572 if (result != 0)
573 result = smsc911x_reg_read(pdata, TX_STATUS_FIFO);
574
575 return result;
576 }
577
578 /* Fetches the next rx status */
579 static unsigned int smsc911x_rx_get_rxstatus(struct smsc911x_data *pdata)
580 {
581 unsigned int result =
582 smsc911x_reg_read(pdata, RX_FIFO_INF) & RX_FIFO_INF_RXSUSED_;
583
584 if (result != 0)
585 result = smsc911x_reg_read(pdata, RX_STATUS_FIFO);
586
587 return result;
588 }
589
590 #ifdef USE_PHY_WORK_AROUND
591 static int smsc911x_phy_check_loopbackpkt(struct smsc911x_data *pdata)
592 {
593 unsigned int tries;
594 u32 wrsz;
595 u32 rdsz;
596 ulong bufp;
597
598 for (tries = 0; tries < 10; tries++) {
599 unsigned int txcmd_a;
600 unsigned int txcmd_b;
601 unsigned int status;
602 unsigned int pktlength;
603 unsigned int i;
604
605 /* Zero-out rx packet memory */
606 memset(pdata->loopback_rx_pkt, 0, MIN_PACKET_SIZE);
607
608 /* Write tx packet to 118 */
609 txcmd_a = (u32)((ulong)pdata->loopback_tx_pkt & 0x03) << 16;
610 txcmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
611 txcmd_a |= MIN_PACKET_SIZE;
612
613 txcmd_b = MIN_PACKET_SIZE << 16 | MIN_PACKET_SIZE;
614
615 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_a);
616 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_b);
617
618 bufp = (ulong)pdata->loopback_tx_pkt & (~0x3);
619 wrsz = MIN_PACKET_SIZE + 3;
620 wrsz += (u32)((ulong)pdata->loopback_tx_pkt & 0x3);
621 wrsz >>= 2;
622
623 pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
624
625 /* Wait till transmit is done */
626 i = 60;
627 do {
628 udelay(5);
629 status = smsc911x_tx_get_txstatus(pdata);
630 } while ((i--) && (!status));
631
632 if (!status) {
633 SMSC_WARN(pdata, hw,
634 "Failed to transmit during loopback test");
635 continue;
636 }
637 if (status & TX_STS_ES_) {
638 SMSC_WARN(pdata, hw,
639 "Transmit encountered errors during loopback test");
640 continue;
641 }
642
643 /* Wait till receive is done */
644 i = 60;
645 do {
646 udelay(5);
647 status = smsc911x_rx_get_rxstatus(pdata);
648 } while ((i--) && (!status));
649
650 if (!status) {
651 SMSC_WARN(pdata, hw,
652 "Failed to receive during loopback test");
653 continue;
654 }
655 if (status & RX_STS_ES_) {
656 SMSC_WARN(pdata, hw,
657 "Receive encountered errors during loopback test");
658 continue;
659 }
660
661 pktlength = ((status & 0x3FFF0000UL) >> 16);
662 bufp = (ulong)pdata->loopback_rx_pkt;
663 rdsz = pktlength + 3;
664 rdsz += (u32)((ulong)pdata->loopback_rx_pkt & 0x3);
665 rdsz >>= 2;
666
667 pdata->ops->rx_readfifo(pdata, (unsigned int *)bufp, rdsz);
668
669 if (pktlength != (MIN_PACKET_SIZE + 4)) {
670 SMSC_WARN(pdata, hw, "Unexpected packet size "
671 "during loop back test, size=%d, will retry",
672 pktlength);
673 } else {
674 unsigned int j;
675 int mismatch = 0;
676 for (j = 0; j < MIN_PACKET_SIZE; j++) {
677 if (pdata->loopback_tx_pkt[j]
678 != pdata->loopback_rx_pkt[j]) {
679 mismatch = 1;
680 break;
681 }
682 }
683 if (!mismatch) {
684 SMSC_TRACE(pdata, hw, "Successfully verified "
685 "loopback packet");
686 return 0;
687 } else {
688 SMSC_WARN(pdata, hw, "Data mismatch "
689 "during loop back test, will retry");
690 }
691 }
692 }
693
694 return -EIO;
695 }
696
697 static int smsc911x_phy_reset(struct smsc911x_data *pdata)
698 {
699 struct phy_device *phy_dev = pdata->phy_dev;
700 unsigned int temp;
701 unsigned int i = 100000;
702
703 BUG_ON(!phy_dev);
704 BUG_ON(!phy_dev->bus);
705
706 SMSC_TRACE(pdata, hw, "Performing PHY BCR Reset");
707 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, BMCR_RESET);
708 do {
709 msleep(1);
710 temp = smsc911x_mii_read(phy_dev->bus, phy_dev->addr,
711 MII_BMCR);
712 } while ((i--) && (temp & BMCR_RESET));
713
714 if (temp & BMCR_RESET) {
715 SMSC_WARN(pdata, hw, "PHY reset failed to complete");
716 return -EIO;
717 }
718 /* Extra delay required because the phy may not be completed with
719 * its reset when BMCR_RESET is cleared. Specs say 256 uS is
720 * enough delay but using 1ms here to be safe */
721 msleep(1);
722
723 return 0;
724 }
725
726 static int smsc911x_phy_loopbacktest(struct net_device *dev)
727 {
728 struct smsc911x_data *pdata = netdev_priv(dev);
729 struct phy_device *phy_dev = pdata->phy_dev;
730 int result = -EIO;
731 unsigned int i, val;
732 unsigned long flags;
733
734 /* Initialise tx packet using broadcast destination address */
735 memset(pdata->loopback_tx_pkt, 0xff, ETH_ALEN);
736
737 /* Use incrementing source address */
738 for (i = 6; i < 12; i++)
739 pdata->loopback_tx_pkt[i] = (char)i;
740
741 /* Set length type field */
742 pdata->loopback_tx_pkt[12] = 0x00;
743 pdata->loopback_tx_pkt[13] = 0x00;
744
745 for (i = 14; i < MIN_PACKET_SIZE; i++)
746 pdata->loopback_tx_pkt[i] = (char)i;
747
748 val = smsc911x_reg_read(pdata, HW_CFG);
749 val &= HW_CFG_TX_FIF_SZ_;
750 val |= HW_CFG_SF_;
751 smsc911x_reg_write(pdata, HW_CFG, val);
752
753 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
754 smsc911x_reg_write(pdata, RX_CFG,
755 (u32)((ulong)pdata->loopback_rx_pkt & 0x03) << 8);
756
757 for (i = 0; i < 10; i++) {
758 /* Set PHY to 10/FD, no ANEG, and loopback mode */
759 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR,
760 BMCR_LOOPBACK | BMCR_FULLDPLX);
761
762 /* Enable MAC tx/rx, FD */
763 spin_lock_irqsave(&pdata->mac_lock, flags);
764 smsc911x_mac_write(pdata, MAC_CR, MAC_CR_FDPX_
765 | MAC_CR_TXEN_ | MAC_CR_RXEN_);
766 spin_unlock_irqrestore(&pdata->mac_lock, flags);
767
768 if (smsc911x_phy_check_loopbackpkt(pdata) == 0) {
769 result = 0;
770 break;
771 }
772 pdata->resetcount++;
773
774 /* Disable MAC rx */
775 spin_lock_irqsave(&pdata->mac_lock, flags);
776 smsc911x_mac_write(pdata, MAC_CR, 0);
777 spin_unlock_irqrestore(&pdata->mac_lock, flags);
778
779 smsc911x_phy_reset(pdata);
780 }
781
782 /* Disable MAC */
783 spin_lock_irqsave(&pdata->mac_lock, flags);
784 smsc911x_mac_write(pdata, MAC_CR, 0);
785 spin_unlock_irqrestore(&pdata->mac_lock, flags);
786
787 /* Cancel PHY loopback mode */
788 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, 0);
789
790 smsc911x_reg_write(pdata, TX_CFG, 0);
791 smsc911x_reg_write(pdata, RX_CFG, 0);
792
793 return result;
794 }
795 #endif /* USE_PHY_WORK_AROUND */
796
797 static void smsc911x_phy_update_flowcontrol(struct smsc911x_data *pdata)
798 {
799 struct phy_device *phy_dev = pdata->phy_dev;
800 u32 afc = smsc911x_reg_read(pdata, AFC_CFG);
801 u32 flow;
802 unsigned long flags;
803
804 if (phy_dev->duplex == DUPLEX_FULL) {
805 u16 lcladv = phy_read(phy_dev, MII_ADVERTISE);
806 u16 rmtadv = phy_read(phy_dev, MII_LPA);
807 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
808
809 if (cap & FLOW_CTRL_RX)
810 flow = 0xFFFF0002;
811 else
812 flow = 0;
813
814 if (cap & FLOW_CTRL_TX)
815 afc |= 0xF;
816 else
817 afc &= ~0xF;
818
819 SMSC_TRACE(pdata, hw, "rx pause %s, tx pause %s",
820 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
821 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
822 } else {
823 SMSC_TRACE(pdata, hw, "half duplex");
824 flow = 0;
825 afc |= 0xF;
826 }
827
828 spin_lock_irqsave(&pdata->mac_lock, flags);
829 smsc911x_mac_write(pdata, FLOW, flow);
830 spin_unlock_irqrestore(&pdata->mac_lock, flags);
831
832 smsc911x_reg_write(pdata, AFC_CFG, afc);
833 }
834
835 /* Update link mode if anything has changed. Called periodically when the
836 * PHY is in polling mode, even if nothing has changed. */
837 static void smsc911x_phy_adjust_link(struct net_device *dev)
838 {
839 struct smsc911x_data *pdata = netdev_priv(dev);
840 struct phy_device *phy_dev = pdata->phy_dev;
841 unsigned long flags;
842 int carrier;
843
844 if (phy_dev->duplex != pdata->last_duplex) {
845 unsigned int mac_cr;
846 SMSC_TRACE(pdata, hw, "duplex state has changed");
847
848 spin_lock_irqsave(&pdata->mac_lock, flags);
849 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
850 if (phy_dev->duplex) {
851 SMSC_TRACE(pdata, hw,
852 "configuring for full duplex mode");
853 mac_cr |= MAC_CR_FDPX_;
854 } else {
855 SMSC_TRACE(pdata, hw,
856 "configuring for half duplex mode");
857 mac_cr &= ~MAC_CR_FDPX_;
858 }
859 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
860 spin_unlock_irqrestore(&pdata->mac_lock, flags);
861
862 smsc911x_phy_update_flowcontrol(pdata);
863 pdata->last_duplex = phy_dev->duplex;
864 }
865
866 carrier = netif_carrier_ok(dev);
867 if (carrier != pdata->last_carrier) {
868 SMSC_TRACE(pdata, hw, "carrier state has changed");
869 if (carrier) {
870 SMSC_TRACE(pdata, hw, "configuring for carrier OK");
871 if ((pdata->gpio_orig_setting & GPIO_CFG_LED1_EN_) &&
872 (!pdata->using_extphy)) {
873 /* Restore original GPIO configuration */
874 pdata->gpio_setting = pdata->gpio_orig_setting;
875 smsc911x_reg_write(pdata, GPIO_CFG,
876 pdata->gpio_setting);
877 }
878 } else {
879 SMSC_TRACE(pdata, hw, "configuring for no carrier");
880 /* Check global setting that LED1
881 * usage is 10/100 indicator */
882 pdata->gpio_setting = smsc911x_reg_read(pdata,
883 GPIO_CFG);
884 if ((pdata->gpio_setting & GPIO_CFG_LED1_EN_) &&
885 (!pdata->using_extphy)) {
886 /* Force 10/100 LED off, after saving
887 * original GPIO configuration */
888 pdata->gpio_orig_setting = pdata->gpio_setting;
889
890 pdata->gpio_setting &= ~GPIO_CFG_LED1_EN_;
891 pdata->gpio_setting |= (GPIO_CFG_GPIOBUF0_
892 | GPIO_CFG_GPIODIR0_
893 | GPIO_CFG_GPIOD0_);
894 smsc911x_reg_write(pdata, GPIO_CFG,
895 pdata->gpio_setting);
896 }
897 }
898 pdata->last_carrier = carrier;
899 }
900 }
901
902 static int smsc911x_mii_probe(struct net_device *dev)
903 {
904 struct smsc911x_data *pdata = netdev_priv(dev);
905 struct phy_device *phydev = NULL;
906 int ret;
907
908 /* find the first phy */
909 phydev = phy_find_first(pdata->mii_bus);
910 if (!phydev) {
911 netdev_err(dev, "no PHY found\n");
912 return -ENODEV;
913 }
914
915 SMSC_TRACE(pdata, probe, "PHY: addr %d, phy_id 0x%08X",
916 phydev->addr, phydev->phy_id);
917
918 ret = phy_connect_direct(dev, phydev,
919 &smsc911x_phy_adjust_link, 0,
920 pdata->config.phy_interface);
921
922 if (ret) {
923 netdev_err(dev, "Could not attach to PHY\n");
924 return ret;
925 }
926
927 netdev_info(dev,
928 "attached PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n",
929 phydev->drv->name, dev_name(&phydev->dev), phydev->irq);
930
931 /* mask with MAC supported features */
932 phydev->supported &= (PHY_BASIC_FEATURES | SUPPORTED_Pause |
933 SUPPORTED_Asym_Pause);
934 phydev->advertising = phydev->supported;
935
936 pdata->phy_dev = phydev;
937 pdata->last_duplex = -1;
938 pdata->last_carrier = -1;
939
940 #ifdef USE_PHY_WORK_AROUND
941 if (smsc911x_phy_loopbacktest(dev) < 0) {
942 SMSC_WARN(pdata, hw, "Failed Loop Back Test");
943 return -ENODEV;
944 }
945 SMSC_TRACE(pdata, hw, "Passed Loop Back Test");
946 #endif /* USE_PHY_WORK_AROUND */
947
948 SMSC_TRACE(pdata, hw, "phy initialised successfully");
949 return 0;
950 }
951
952 static int __devinit smsc911x_mii_init(struct platform_device *pdev,
953 struct net_device *dev)
954 {
955 struct smsc911x_data *pdata = netdev_priv(dev);
956 int err = -ENXIO, i;
957
958 pdata->mii_bus = mdiobus_alloc();
959 if (!pdata->mii_bus) {
960 err = -ENOMEM;
961 goto err_out_1;
962 }
963
964 pdata->mii_bus->name = SMSC_MDIONAME;
965 snprintf(pdata->mii_bus->id, MII_BUS_ID_SIZE, "%x", pdev->id);
966 pdata->mii_bus->priv = pdata;
967 pdata->mii_bus->read = smsc911x_mii_read;
968 pdata->mii_bus->write = smsc911x_mii_write;
969 pdata->mii_bus->irq = pdata->phy_irq;
970 for (i = 0; i < PHY_MAX_ADDR; ++i)
971 pdata->mii_bus->irq[i] = PHY_POLL;
972
973 pdata->mii_bus->parent = &pdev->dev;
974
975 switch (pdata->idrev & 0xFFFF0000) {
976 case 0x01170000:
977 case 0x01150000:
978 case 0x117A0000:
979 case 0x115A0000:
980 /* External PHY supported, try to autodetect */
981 smsc911x_phy_initialise_external(pdata);
982 break;
983 default:
984 SMSC_TRACE(pdata, hw, "External PHY is not supported, "
985 "using internal PHY");
986 pdata->using_extphy = 0;
987 break;
988 }
989
990 if (!pdata->using_extphy) {
991 /* Mask all PHYs except ID 1 (internal) */
992 pdata->mii_bus->phy_mask = ~(1 << 1);
993 }
994
995 if (mdiobus_register(pdata->mii_bus)) {
996 SMSC_WARN(pdata, probe, "Error registering mii bus");
997 goto err_out_free_bus_2;
998 }
999
1000 if (smsc911x_mii_probe(dev) < 0) {
1001 SMSC_WARN(pdata, probe, "Error registering mii bus");
1002 goto err_out_unregister_bus_3;
1003 }
1004
1005 return 0;
1006
1007 err_out_unregister_bus_3:
1008 mdiobus_unregister(pdata->mii_bus);
1009 err_out_free_bus_2:
1010 mdiobus_free(pdata->mii_bus);
1011 err_out_1:
1012 return err;
1013 }
1014
1015 /* Gets the number of tx statuses in the fifo */
1016 static unsigned int smsc911x_tx_get_txstatcount(struct smsc911x_data *pdata)
1017 {
1018 return (smsc911x_reg_read(pdata, TX_FIFO_INF)
1019 & TX_FIFO_INF_TSUSED_) >> 16;
1020 }
1021
1022 /* Reads tx statuses and increments counters where necessary */
1023 static void smsc911x_tx_update_txcounters(struct net_device *dev)
1024 {
1025 struct smsc911x_data *pdata = netdev_priv(dev);
1026 unsigned int tx_stat;
1027
1028 while ((tx_stat = smsc911x_tx_get_txstatus(pdata)) != 0) {
1029 if (unlikely(tx_stat & 0x80000000)) {
1030 /* In this driver the packet tag is used as the packet
1031 * length. Since a packet length can never reach the
1032 * size of 0x8000, this bit is reserved. It is worth
1033 * noting that the "reserved bit" in the warning above
1034 * does not reference a hardware defined reserved bit
1035 * but rather a driver defined one.
1036 */
1037 SMSC_WARN(pdata, hw, "Packet tag reserved bit is high");
1038 } else {
1039 if (unlikely(tx_stat & TX_STS_ES_)) {
1040 dev->stats.tx_errors++;
1041 } else {
1042 dev->stats.tx_packets++;
1043 dev->stats.tx_bytes += (tx_stat >> 16);
1044 }
1045 if (unlikely(tx_stat & TX_STS_EXCESS_COL_)) {
1046 dev->stats.collisions += 16;
1047 dev->stats.tx_aborted_errors += 1;
1048 } else {
1049 dev->stats.collisions +=
1050 ((tx_stat >> 3) & 0xF);
1051 }
1052 if (unlikely(tx_stat & TX_STS_LOST_CARRIER_))
1053 dev->stats.tx_carrier_errors += 1;
1054 if (unlikely(tx_stat & TX_STS_LATE_COL_)) {
1055 dev->stats.collisions++;
1056 dev->stats.tx_aborted_errors++;
1057 }
1058 }
1059 }
1060 }
1061
1062 /* Increments the Rx error counters */
1063 static void
1064 smsc911x_rx_counterrors(struct net_device *dev, unsigned int rxstat)
1065 {
1066 int crc_err = 0;
1067
1068 if (unlikely(rxstat & RX_STS_ES_)) {
1069 dev->stats.rx_errors++;
1070 if (unlikely(rxstat & RX_STS_CRC_ERR_)) {
1071 dev->stats.rx_crc_errors++;
1072 crc_err = 1;
1073 }
1074 }
1075 if (likely(!crc_err)) {
1076 if (unlikely((rxstat & RX_STS_FRAME_TYPE_) &&
1077 (rxstat & RX_STS_LENGTH_ERR_)))
1078 dev->stats.rx_length_errors++;
1079 if (rxstat & RX_STS_MCAST_)
1080 dev->stats.multicast++;
1081 }
1082 }
1083
1084 /* Quickly dumps bad packets */
1085 static void
1086 smsc911x_rx_fastforward(struct smsc911x_data *pdata, unsigned int pktbytes)
1087 {
1088 unsigned int pktwords = (pktbytes + NET_IP_ALIGN + 3) >> 2;
1089
1090 if (likely(pktwords >= 4)) {
1091 unsigned int timeout = 500;
1092 unsigned int val;
1093 smsc911x_reg_write(pdata, RX_DP_CTRL, RX_DP_CTRL_RX_FFWD_);
1094 do {
1095 udelay(1);
1096 val = smsc911x_reg_read(pdata, RX_DP_CTRL);
1097 } while ((val & RX_DP_CTRL_RX_FFWD_) && --timeout);
1098
1099 if (unlikely(timeout == 0))
1100 SMSC_WARN(pdata, hw, "Timed out waiting for "
1101 "RX FFWD to finish, RX_DP_CTRL: 0x%08X", val);
1102 } else {
1103 unsigned int temp;
1104 while (pktwords--)
1105 temp = smsc911x_reg_read(pdata, RX_DATA_FIFO);
1106 }
1107 }
1108
1109 /* NAPI poll function */
1110 static int smsc911x_poll(struct napi_struct *napi, int budget)
1111 {
1112 struct smsc911x_data *pdata =
1113 container_of(napi, struct smsc911x_data, napi);
1114 struct net_device *dev = pdata->dev;
1115 int npackets = 0;
1116
1117 while (npackets < budget) {
1118 unsigned int pktlength;
1119 unsigned int pktwords;
1120 struct sk_buff *skb;
1121 unsigned int rxstat = smsc911x_rx_get_rxstatus(pdata);
1122
1123 if (!rxstat) {
1124 unsigned int temp;
1125 /* We processed all packets available. Tell NAPI it can
1126 * stop polling then re-enable rx interrupts */
1127 smsc911x_reg_write(pdata, INT_STS, INT_STS_RSFL_);
1128 napi_complete(napi);
1129 temp = smsc911x_reg_read(pdata, INT_EN);
1130 temp |= INT_EN_RSFL_EN_;
1131 smsc911x_reg_write(pdata, INT_EN, temp);
1132 break;
1133 }
1134
1135 /* Count packet for NAPI scheduling, even if it has an error.
1136 * Error packets still require cycles to discard */
1137 npackets++;
1138
1139 pktlength = ((rxstat & 0x3FFF0000) >> 16);
1140 pktwords = (pktlength + NET_IP_ALIGN + 3) >> 2;
1141 smsc911x_rx_counterrors(dev, rxstat);
1142
1143 if (unlikely(rxstat & RX_STS_ES_)) {
1144 SMSC_WARN(pdata, rx_err,
1145 "Discarding packet with error bit set");
1146 /* Packet has an error, discard it and continue with
1147 * the next */
1148 smsc911x_rx_fastforward(pdata, pktwords);
1149 dev->stats.rx_dropped++;
1150 continue;
1151 }
1152
1153 skb = netdev_alloc_skb(dev, pktlength + NET_IP_ALIGN);
1154 if (unlikely(!skb)) {
1155 SMSC_WARN(pdata, rx_err,
1156 "Unable to allocate skb for rx packet");
1157 /* Drop the packet and stop this polling iteration */
1158 smsc911x_rx_fastforward(pdata, pktwords);
1159 dev->stats.rx_dropped++;
1160 break;
1161 }
1162
1163 skb->data = skb->head;
1164 skb_reset_tail_pointer(skb);
1165
1166 /* Align IP on 16B boundary */
1167 skb_reserve(skb, NET_IP_ALIGN);
1168 skb_put(skb, pktlength - 4);
1169 pdata->ops->rx_readfifo(pdata,
1170 (unsigned int *)skb->head, pktwords);
1171 skb->protocol = eth_type_trans(skb, dev);
1172 skb_checksum_none_assert(skb);
1173 netif_receive_skb(skb);
1174
1175 /* Update counters */
1176 dev->stats.rx_packets++;
1177 dev->stats.rx_bytes += (pktlength - 4);
1178 }
1179
1180 /* Return total received packets */
1181 return npackets;
1182 }
1183
1184 /* Returns hash bit number for given MAC address
1185 * Example:
1186 * 01 00 5E 00 00 01 -> returns bit number 31 */
1187 static unsigned int smsc911x_hash(char addr[ETH_ALEN])
1188 {
1189 return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
1190 }
1191
1192 static void smsc911x_rx_multicast_update(struct smsc911x_data *pdata)
1193 {
1194 /* Performs the multicast & mac_cr update. This is called when
1195 * safe on the current hardware, and with the mac_lock held */
1196 unsigned int mac_cr;
1197
1198 SMSC_ASSERT_MAC_LOCK(pdata);
1199
1200 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1201 mac_cr |= pdata->set_bits_mask;
1202 mac_cr &= ~(pdata->clear_bits_mask);
1203 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1204 smsc911x_mac_write(pdata, HASHH, pdata->hashhi);
1205 smsc911x_mac_write(pdata, HASHL, pdata->hashlo);
1206 SMSC_TRACE(pdata, hw, "maccr 0x%08X, HASHH 0x%08X, HASHL 0x%08X",
1207 mac_cr, pdata->hashhi, pdata->hashlo);
1208 }
1209
1210 static void smsc911x_rx_multicast_update_workaround(struct smsc911x_data *pdata)
1211 {
1212 unsigned int mac_cr;
1213
1214 /* This function is only called for older LAN911x devices
1215 * (revA or revB), where MAC_CR, HASHH and HASHL should not
1216 * be modified during Rx - newer devices immediately update the
1217 * registers.
1218 *
1219 * This is called from interrupt context */
1220
1221 spin_lock(&pdata->mac_lock);
1222
1223 /* Check Rx has stopped */
1224 if (smsc911x_mac_read(pdata, MAC_CR) & MAC_CR_RXEN_)
1225 SMSC_WARN(pdata, drv, "Rx not stopped");
1226
1227 /* Perform the update - safe to do now Rx has stopped */
1228 smsc911x_rx_multicast_update(pdata);
1229
1230 /* Re-enable Rx */
1231 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1232 mac_cr |= MAC_CR_RXEN_;
1233 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1234
1235 pdata->multicast_update_pending = 0;
1236
1237 spin_unlock(&pdata->mac_lock);
1238 }
1239
1240 static int smsc911x_soft_reset(struct smsc911x_data *pdata)
1241 {
1242 unsigned int timeout;
1243 unsigned int temp;
1244
1245 /* Reset the LAN911x */
1246 smsc911x_reg_write(pdata, HW_CFG, HW_CFG_SRST_);
1247 timeout = 10;
1248 do {
1249 udelay(10);
1250 temp = smsc911x_reg_read(pdata, HW_CFG);
1251 } while ((--timeout) && (temp & HW_CFG_SRST_));
1252
1253 if (unlikely(temp & HW_CFG_SRST_)) {
1254 SMSC_WARN(pdata, drv, "Failed to complete reset");
1255 return -EIO;
1256 }
1257 return 0;
1258 }
1259
1260 /* Sets the device MAC address to dev_addr, called with mac_lock held */
1261 static void
1262 smsc911x_set_hw_mac_address(struct smsc911x_data *pdata, u8 dev_addr[6])
1263 {
1264 u32 mac_high16 = (dev_addr[5] << 8) | dev_addr[4];
1265 u32 mac_low32 = (dev_addr[3] << 24) | (dev_addr[2] << 16) |
1266 (dev_addr[1] << 8) | dev_addr[0];
1267
1268 SMSC_ASSERT_MAC_LOCK(pdata);
1269
1270 smsc911x_mac_write(pdata, ADDRH, mac_high16);
1271 smsc911x_mac_write(pdata, ADDRL, mac_low32);
1272 }
1273
1274 static int smsc911x_open(struct net_device *dev)
1275 {
1276 struct smsc911x_data *pdata = netdev_priv(dev);
1277 unsigned int timeout;
1278 unsigned int temp;
1279 unsigned int intcfg;
1280
1281 /* if the phy is not yet registered, retry later*/
1282 if (!pdata->phy_dev) {
1283 SMSC_WARN(pdata, hw, "phy_dev is NULL");
1284 return -EAGAIN;
1285 }
1286
1287 if (!is_valid_ether_addr(dev->dev_addr)) {
1288 SMSC_WARN(pdata, hw, "dev_addr is not a valid MAC address");
1289 return -EADDRNOTAVAIL;
1290 }
1291
1292 /* Reset the LAN911x */
1293 if (smsc911x_soft_reset(pdata)) {
1294 SMSC_WARN(pdata, hw, "soft reset failed");
1295 return -EIO;
1296 }
1297
1298 smsc911x_reg_write(pdata, HW_CFG, 0x00050000);
1299 smsc911x_reg_write(pdata, AFC_CFG, 0x006E3740);
1300
1301 /* Increase the legal frame size of VLAN tagged frames to 1522 bytes */
1302 spin_lock_irq(&pdata->mac_lock);
1303 smsc911x_mac_write(pdata, VLAN1, ETH_P_8021Q);
1304 spin_unlock_irq(&pdata->mac_lock);
1305
1306 /* Make sure EEPROM has finished loading before setting GPIO_CFG */
1307 timeout = 50;
1308 while ((smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) &&
1309 --timeout) {
1310 udelay(10);
1311 }
1312
1313 if (unlikely(timeout == 0))
1314 SMSC_WARN(pdata, ifup,
1315 "Timed out waiting for EEPROM busy bit to clear");
1316
1317 smsc911x_reg_write(pdata, GPIO_CFG, 0x70070000);
1318
1319 /* The soft reset above cleared the device's MAC address,
1320 * restore it from local copy (set in probe) */
1321 spin_lock_irq(&pdata->mac_lock);
1322 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
1323 spin_unlock_irq(&pdata->mac_lock);
1324
1325 /* Initialise irqs, but leave all sources disabled */
1326 smsc911x_reg_write(pdata, INT_EN, 0);
1327 smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF);
1328
1329 /* Set interrupt deassertion to 100uS */
1330 intcfg = ((10 << 24) | INT_CFG_IRQ_EN_);
1331
1332 if (pdata->config.irq_polarity) {
1333 SMSC_TRACE(pdata, ifup, "irq polarity: active high");
1334 intcfg |= INT_CFG_IRQ_POL_;
1335 } else {
1336 SMSC_TRACE(pdata, ifup, "irq polarity: active low");
1337 }
1338
1339 if (pdata->config.irq_type) {
1340 SMSC_TRACE(pdata, ifup, "irq type: push-pull");
1341 intcfg |= INT_CFG_IRQ_TYPE_;
1342 } else {
1343 SMSC_TRACE(pdata, ifup, "irq type: open drain");
1344 }
1345
1346 smsc911x_reg_write(pdata, INT_CFG, intcfg);
1347
1348 SMSC_TRACE(pdata, ifup, "Testing irq handler using IRQ %d", dev->irq);
1349 pdata->software_irq_signal = 0;
1350 smp_wmb();
1351
1352 temp = smsc911x_reg_read(pdata, INT_EN);
1353 temp |= INT_EN_SW_INT_EN_;
1354 smsc911x_reg_write(pdata, INT_EN, temp);
1355
1356 timeout = 1000;
1357 while (timeout--) {
1358 if (pdata->software_irq_signal)
1359 break;
1360 msleep(1);
1361 }
1362
1363 if (!pdata->software_irq_signal) {
1364 netdev_warn(dev, "ISR failed signaling test (IRQ %d)\n",
1365 dev->irq);
1366 return -ENODEV;
1367 }
1368 SMSC_TRACE(pdata, ifup, "IRQ handler passed test using IRQ %d",
1369 dev->irq);
1370
1371 netdev_info(dev, "SMSC911x/921x identified at %#08lx, IRQ: %d\n",
1372 (unsigned long)pdata->ioaddr, dev->irq);
1373
1374 /* Reset the last known duplex and carrier */
1375 pdata->last_duplex = -1;
1376 pdata->last_carrier = -1;
1377
1378 /* Bring the PHY up */
1379 phy_start(pdata->phy_dev);
1380
1381 temp = smsc911x_reg_read(pdata, HW_CFG);
1382 /* Preserve TX FIFO size and external PHY configuration */
1383 temp &= (HW_CFG_TX_FIF_SZ_|0x00000FFF);
1384 temp |= HW_CFG_SF_;
1385 smsc911x_reg_write(pdata, HW_CFG, temp);
1386
1387 temp = smsc911x_reg_read(pdata, FIFO_INT);
1388 temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1389 temp &= ~(FIFO_INT_RX_STS_LEVEL_);
1390 smsc911x_reg_write(pdata, FIFO_INT, temp);
1391
1392 /* set RX Data offset to 2 bytes for alignment */
1393 smsc911x_reg_write(pdata, RX_CFG, (2 << 8));
1394
1395 /* enable NAPI polling before enabling RX interrupts */
1396 napi_enable(&pdata->napi);
1397
1398 temp = smsc911x_reg_read(pdata, INT_EN);
1399 temp |= (INT_EN_TDFA_EN_ | INT_EN_RSFL_EN_ | INT_EN_RXSTOP_INT_EN_);
1400 smsc911x_reg_write(pdata, INT_EN, temp);
1401
1402 spin_lock_irq(&pdata->mac_lock);
1403 temp = smsc911x_mac_read(pdata, MAC_CR);
1404 temp |= (MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
1405 smsc911x_mac_write(pdata, MAC_CR, temp);
1406 spin_unlock_irq(&pdata->mac_lock);
1407
1408 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
1409
1410 netif_start_queue(dev);
1411 return 0;
1412 }
1413
1414 /* Entry point for stopping the interface */
1415 static int smsc911x_stop(struct net_device *dev)
1416 {
1417 struct smsc911x_data *pdata = netdev_priv(dev);
1418 unsigned int temp;
1419
1420 /* Disable all device interrupts */
1421 temp = smsc911x_reg_read(pdata, INT_CFG);
1422 temp &= ~INT_CFG_IRQ_EN_;
1423 smsc911x_reg_write(pdata, INT_CFG, temp);
1424
1425 /* Stop Tx and Rx polling */
1426 netif_stop_queue(dev);
1427 napi_disable(&pdata->napi);
1428
1429 /* At this point all Rx and Tx activity is stopped */
1430 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1431 smsc911x_tx_update_txcounters(dev);
1432
1433 /* Bring the PHY down */
1434 if (pdata->phy_dev)
1435 phy_stop(pdata->phy_dev);
1436
1437 SMSC_TRACE(pdata, ifdown, "Interface stopped");
1438 return 0;
1439 }
1440
1441 /* Entry point for transmitting a packet */
1442 static int smsc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
1443 {
1444 struct smsc911x_data *pdata = netdev_priv(dev);
1445 unsigned int freespace;
1446 unsigned int tx_cmd_a;
1447 unsigned int tx_cmd_b;
1448 unsigned int temp;
1449 u32 wrsz;
1450 ulong bufp;
1451
1452 freespace = smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TDFREE_;
1453
1454 if (unlikely(freespace < TX_FIFO_LOW_THRESHOLD))
1455 SMSC_WARN(pdata, tx_err,
1456 "Tx data fifo low, space available: %d", freespace);
1457
1458 /* Word alignment adjustment */
1459 tx_cmd_a = (u32)((ulong)skb->data & 0x03) << 16;
1460 tx_cmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
1461 tx_cmd_a |= (unsigned int)skb->len;
1462
1463 tx_cmd_b = ((unsigned int)skb->len) << 16;
1464 tx_cmd_b |= (unsigned int)skb->len;
1465
1466 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_a);
1467 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_b);
1468
1469 bufp = (ulong)skb->data & (~0x3);
1470 wrsz = (u32)skb->len + 3;
1471 wrsz += (u32)((ulong)skb->data & 0x3);
1472 wrsz >>= 2;
1473
1474 pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
1475 freespace -= (skb->len + 32);
1476 dev_kfree_skb(skb);
1477
1478 if (unlikely(smsc911x_tx_get_txstatcount(pdata) >= 30))
1479 smsc911x_tx_update_txcounters(dev);
1480
1481 if (freespace < TX_FIFO_LOW_THRESHOLD) {
1482 netif_stop_queue(dev);
1483 temp = smsc911x_reg_read(pdata, FIFO_INT);
1484 temp &= 0x00FFFFFF;
1485 temp |= 0x32000000;
1486 smsc911x_reg_write(pdata, FIFO_INT, temp);
1487 }
1488
1489 return NETDEV_TX_OK;
1490 }
1491
1492 /* Entry point for getting status counters */
1493 static struct net_device_stats *smsc911x_get_stats(struct net_device *dev)
1494 {
1495 struct smsc911x_data *pdata = netdev_priv(dev);
1496 smsc911x_tx_update_txcounters(dev);
1497 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1498 return &dev->stats;
1499 }
1500
1501 /* Entry point for setting addressing modes */
1502 static void smsc911x_set_multicast_list(struct net_device *dev)
1503 {
1504 struct smsc911x_data *pdata = netdev_priv(dev);
1505 unsigned long flags;
1506
1507 if (dev->flags & IFF_PROMISC) {
1508 /* Enabling promiscuous mode */
1509 pdata->set_bits_mask = MAC_CR_PRMS_;
1510 pdata->clear_bits_mask = (MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1511 pdata->hashhi = 0;
1512 pdata->hashlo = 0;
1513 } else if (dev->flags & IFF_ALLMULTI) {
1514 /* Enabling all multicast mode */
1515 pdata->set_bits_mask = MAC_CR_MCPAS_;
1516 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_HPFILT_);
1517 pdata->hashhi = 0;
1518 pdata->hashlo = 0;
1519 } else if (!netdev_mc_empty(dev)) {
1520 /* Enabling specific multicast addresses */
1521 unsigned int hash_high = 0;
1522 unsigned int hash_low = 0;
1523 struct netdev_hw_addr *ha;
1524
1525 pdata->set_bits_mask = MAC_CR_HPFILT_;
1526 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1527
1528 netdev_for_each_mc_addr(ha, dev) {
1529 unsigned int bitnum = smsc911x_hash(ha->addr);
1530 unsigned int mask = 0x01 << (bitnum & 0x1F);
1531
1532 if (bitnum & 0x20)
1533 hash_high |= mask;
1534 else
1535 hash_low |= mask;
1536 }
1537
1538 pdata->hashhi = hash_high;
1539 pdata->hashlo = hash_low;
1540 } else {
1541 /* Enabling local MAC address only */
1542 pdata->set_bits_mask = 0;
1543 pdata->clear_bits_mask =
1544 (MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1545 pdata->hashhi = 0;
1546 pdata->hashlo = 0;
1547 }
1548
1549 spin_lock_irqsave(&pdata->mac_lock, flags);
1550
1551 if (pdata->generation <= 1) {
1552 /* Older hardware revision - cannot change these flags while
1553 * receiving data */
1554 if (!pdata->multicast_update_pending) {
1555 unsigned int temp;
1556 SMSC_TRACE(pdata, hw, "scheduling mcast update");
1557 pdata->multicast_update_pending = 1;
1558
1559 /* Request the hardware to stop, then perform the
1560 * update when we get an RX_STOP interrupt */
1561 temp = smsc911x_mac_read(pdata, MAC_CR);
1562 temp &= ~(MAC_CR_RXEN_);
1563 smsc911x_mac_write(pdata, MAC_CR, temp);
1564 } else {
1565 /* There is another update pending, this should now
1566 * use the newer values */
1567 }
1568 } else {
1569 /* Newer hardware revision - can write immediately */
1570 smsc911x_rx_multicast_update(pdata);
1571 }
1572
1573 spin_unlock_irqrestore(&pdata->mac_lock, flags);
1574 }
1575
1576 static irqreturn_t smsc911x_irqhandler(int irq, void *dev_id)
1577 {
1578 struct net_device *dev = dev_id;
1579 struct smsc911x_data *pdata = netdev_priv(dev);
1580 u32 intsts = smsc911x_reg_read(pdata, INT_STS);
1581 u32 inten = smsc911x_reg_read(pdata, INT_EN);
1582 int serviced = IRQ_NONE;
1583 u32 temp;
1584
1585 if (unlikely(intsts & inten & INT_STS_SW_INT_)) {
1586 temp = smsc911x_reg_read(pdata, INT_EN);
1587 temp &= (~INT_EN_SW_INT_EN_);
1588 smsc911x_reg_write(pdata, INT_EN, temp);
1589 smsc911x_reg_write(pdata, INT_STS, INT_STS_SW_INT_);
1590 pdata->software_irq_signal = 1;
1591 smp_wmb();
1592 serviced = IRQ_HANDLED;
1593 }
1594
1595 if (unlikely(intsts & inten & INT_STS_RXSTOP_INT_)) {
1596 /* Called when there is a multicast update scheduled and
1597 * it is now safe to complete the update */
1598 SMSC_TRACE(pdata, intr, "RX Stop interrupt");
1599 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXSTOP_INT_);
1600 if (pdata->multicast_update_pending)
1601 smsc911x_rx_multicast_update_workaround(pdata);
1602 serviced = IRQ_HANDLED;
1603 }
1604
1605 if (intsts & inten & INT_STS_TDFA_) {
1606 temp = smsc911x_reg_read(pdata, FIFO_INT);
1607 temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1608 smsc911x_reg_write(pdata, FIFO_INT, temp);
1609 smsc911x_reg_write(pdata, INT_STS, INT_STS_TDFA_);
1610 netif_wake_queue(dev);
1611 serviced = IRQ_HANDLED;
1612 }
1613
1614 if (unlikely(intsts & inten & INT_STS_RXE_)) {
1615 SMSC_TRACE(pdata, intr, "RX Error interrupt");
1616 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXE_);
1617 serviced = IRQ_HANDLED;
1618 }
1619
1620 if (likely(intsts & inten & INT_STS_RSFL_)) {
1621 if (likely(napi_schedule_prep(&pdata->napi))) {
1622 /* Disable Rx interrupts */
1623 temp = smsc911x_reg_read(pdata, INT_EN);
1624 temp &= (~INT_EN_RSFL_EN_);
1625 smsc911x_reg_write(pdata, INT_EN, temp);
1626 /* Schedule a NAPI poll */
1627 __napi_schedule(&pdata->napi);
1628 } else {
1629 SMSC_WARN(pdata, rx_err, "napi_schedule_prep failed");
1630 }
1631 serviced = IRQ_HANDLED;
1632 }
1633
1634 return serviced;
1635 }
1636
1637 #ifdef CONFIG_NET_POLL_CONTROLLER
1638 static void smsc911x_poll_controller(struct net_device *dev)
1639 {
1640 disable_irq(dev->irq);
1641 smsc911x_irqhandler(0, dev);
1642 enable_irq(dev->irq);
1643 }
1644 #endif /* CONFIG_NET_POLL_CONTROLLER */
1645
1646 static int smsc911x_set_mac_address(struct net_device *dev, void *p)
1647 {
1648 struct smsc911x_data *pdata = netdev_priv(dev);
1649 struct sockaddr *addr = p;
1650
1651 /* On older hardware revisions we cannot change the mac address
1652 * registers while receiving data. Newer devices can safely change
1653 * this at any time. */
1654 if (pdata->generation <= 1 && netif_running(dev))
1655 return -EBUSY;
1656
1657 if (!is_valid_ether_addr(addr->sa_data))
1658 return -EADDRNOTAVAIL;
1659
1660 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
1661
1662 spin_lock_irq(&pdata->mac_lock);
1663 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
1664 spin_unlock_irq(&pdata->mac_lock);
1665
1666 netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr);
1667
1668 return 0;
1669 }
1670
1671 /* Standard ioctls for mii-tool */
1672 static int smsc911x_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1673 {
1674 struct smsc911x_data *pdata = netdev_priv(dev);
1675
1676 if (!netif_running(dev) || !pdata->phy_dev)
1677 return -EINVAL;
1678
1679 return phy_mii_ioctl(pdata->phy_dev, ifr, cmd);
1680 }
1681
1682 static int
1683 smsc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1684 {
1685 struct smsc911x_data *pdata = netdev_priv(dev);
1686
1687 cmd->maxtxpkt = 1;
1688 cmd->maxrxpkt = 1;
1689 return phy_ethtool_gset(pdata->phy_dev, cmd);
1690 }
1691
1692 static int
1693 smsc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1694 {
1695 struct smsc911x_data *pdata = netdev_priv(dev);
1696
1697 return phy_ethtool_sset(pdata->phy_dev, cmd);
1698 }
1699
1700 static void smsc911x_ethtool_getdrvinfo(struct net_device *dev,
1701 struct ethtool_drvinfo *info)
1702 {
1703 strlcpy(info->driver, SMSC_CHIPNAME, sizeof(info->driver));
1704 strlcpy(info->version, SMSC_DRV_VERSION, sizeof(info->version));
1705 strlcpy(info->bus_info, dev_name(dev->dev.parent),
1706 sizeof(info->bus_info));
1707 }
1708
1709 static int smsc911x_ethtool_nwayreset(struct net_device *dev)
1710 {
1711 struct smsc911x_data *pdata = netdev_priv(dev);
1712
1713 return phy_start_aneg(pdata->phy_dev);
1714 }
1715
1716 static u32 smsc911x_ethtool_getmsglevel(struct net_device *dev)
1717 {
1718 struct smsc911x_data *pdata = netdev_priv(dev);
1719 return pdata->msg_enable;
1720 }
1721
1722 static void smsc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
1723 {
1724 struct smsc911x_data *pdata = netdev_priv(dev);
1725 pdata->msg_enable = level;
1726 }
1727
1728 static int smsc911x_ethtool_getregslen(struct net_device *dev)
1729 {
1730 return (((E2P_DATA - ID_REV) / 4 + 1) + (WUCSR - MAC_CR) + 1 + 32) *
1731 sizeof(u32);
1732 }
1733
1734 static void
1735 smsc911x_ethtool_getregs(struct net_device *dev, struct ethtool_regs *regs,
1736 void *buf)
1737 {
1738 struct smsc911x_data *pdata = netdev_priv(dev);
1739 struct phy_device *phy_dev = pdata->phy_dev;
1740 unsigned long flags;
1741 unsigned int i;
1742 unsigned int j = 0;
1743 u32 *data = buf;
1744
1745 regs->version = pdata->idrev;
1746 for (i = ID_REV; i <= E2P_DATA; i += (sizeof(u32)))
1747 data[j++] = smsc911x_reg_read(pdata, i);
1748
1749 for (i = MAC_CR; i <= WUCSR; i++) {
1750 spin_lock_irqsave(&pdata->mac_lock, flags);
1751 data[j++] = smsc911x_mac_read(pdata, i);
1752 spin_unlock_irqrestore(&pdata->mac_lock, flags);
1753 }
1754
1755 for (i = 0; i <= 31; i++)
1756 data[j++] = smsc911x_mii_read(phy_dev->bus, phy_dev->addr, i);
1757 }
1758
1759 static void smsc911x_eeprom_enable_access(struct smsc911x_data *pdata)
1760 {
1761 unsigned int temp = smsc911x_reg_read(pdata, GPIO_CFG);
1762 temp &= ~GPIO_CFG_EEPR_EN_;
1763 smsc911x_reg_write(pdata, GPIO_CFG, temp);
1764 msleep(1);
1765 }
1766
1767 static int smsc911x_eeprom_send_cmd(struct smsc911x_data *pdata, u32 op)
1768 {
1769 int timeout = 100;
1770 u32 e2cmd;
1771
1772 SMSC_TRACE(pdata, drv, "op 0x%08x", op);
1773 if (smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) {
1774 SMSC_WARN(pdata, drv, "Busy at start");
1775 return -EBUSY;
1776 }
1777
1778 e2cmd = op | E2P_CMD_EPC_BUSY_;
1779 smsc911x_reg_write(pdata, E2P_CMD, e2cmd);
1780
1781 do {
1782 msleep(1);
1783 e2cmd = smsc911x_reg_read(pdata, E2P_CMD);
1784 } while ((e2cmd & E2P_CMD_EPC_BUSY_) && (--timeout));
1785
1786 if (!timeout) {
1787 SMSC_TRACE(pdata, drv, "TIMED OUT");
1788 return -EAGAIN;
1789 }
1790
1791 if (e2cmd & E2P_CMD_EPC_TIMEOUT_) {
1792 SMSC_TRACE(pdata, drv, "Error occurred during eeprom operation");
1793 return -EINVAL;
1794 }
1795
1796 return 0;
1797 }
1798
1799 static int smsc911x_eeprom_read_location(struct smsc911x_data *pdata,
1800 u8 address, u8 *data)
1801 {
1802 u32 op = E2P_CMD_EPC_CMD_READ_ | address;
1803 int ret;
1804
1805 SMSC_TRACE(pdata, drv, "address 0x%x", address);
1806 ret = smsc911x_eeprom_send_cmd(pdata, op);
1807
1808 if (!ret)
1809 data[address] = smsc911x_reg_read(pdata, E2P_DATA);
1810
1811 return ret;
1812 }
1813
1814 static int smsc911x_eeprom_write_location(struct smsc911x_data *pdata,
1815 u8 address, u8 data)
1816 {
1817 u32 op = E2P_CMD_EPC_CMD_ERASE_ | address;
1818 u32 temp;
1819 int ret;
1820
1821 SMSC_TRACE(pdata, drv, "address 0x%x, data 0x%x", address, data);
1822 ret = smsc911x_eeprom_send_cmd(pdata, op);
1823
1824 if (!ret) {
1825 op = E2P_CMD_EPC_CMD_WRITE_ | address;
1826 smsc911x_reg_write(pdata, E2P_DATA, (u32)data);
1827
1828 /* Workaround for hardware read-after-write restriction */
1829 temp = smsc911x_reg_read(pdata, BYTE_TEST);
1830
1831 ret = smsc911x_eeprom_send_cmd(pdata, op);
1832 }
1833
1834 return ret;
1835 }
1836
1837 static int smsc911x_ethtool_get_eeprom_len(struct net_device *dev)
1838 {
1839 return SMSC911X_EEPROM_SIZE;
1840 }
1841
1842 static int smsc911x_ethtool_get_eeprom(struct net_device *dev,
1843 struct ethtool_eeprom *eeprom, u8 *data)
1844 {
1845 struct smsc911x_data *pdata = netdev_priv(dev);
1846 u8 eeprom_data[SMSC911X_EEPROM_SIZE];
1847 int len;
1848 int i;
1849
1850 smsc911x_eeprom_enable_access(pdata);
1851
1852 len = min(eeprom->len, SMSC911X_EEPROM_SIZE);
1853 for (i = 0; i < len; i++) {
1854 int ret = smsc911x_eeprom_read_location(pdata, i, eeprom_data);
1855 if (ret < 0) {
1856 eeprom->len = 0;
1857 return ret;
1858 }
1859 }
1860
1861 memcpy(data, &eeprom_data[eeprom->offset], len);
1862 eeprom->len = len;
1863 return 0;
1864 }
1865
1866 static int smsc911x_ethtool_set_eeprom(struct net_device *dev,
1867 struct ethtool_eeprom *eeprom, u8 *data)
1868 {
1869 int ret;
1870 struct smsc911x_data *pdata = netdev_priv(dev);
1871
1872 smsc911x_eeprom_enable_access(pdata);
1873 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWEN_);
1874 ret = smsc911x_eeprom_write_location(pdata, eeprom->offset, *data);
1875 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWDS_);
1876
1877 /* Single byte write, according to man page */
1878 eeprom->len = 1;
1879
1880 return ret;
1881 }
1882
1883 static const struct ethtool_ops smsc911x_ethtool_ops = {
1884 .get_settings = smsc911x_ethtool_getsettings,
1885 .set_settings = smsc911x_ethtool_setsettings,
1886 .get_link = ethtool_op_get_link,
1887 .get_drvinfo = smsc911x_ethtool_getdrvinfo,
1888 .nway_reset = smsc911x_ethtool_nwayreset,
1889 .get_msglevel = smsc911x_ethtool_getmsglevel,
1890 .set_msglevel = smsc911x_ethtool_setmsglevel,
1891 .get_regs_len = smsc911x_ethtool_getregslen,
1892 .get_regs = smsc911x_ethtool_getregs,
1893 .get_eeprom_len = smsc911x_ethtool_get_eeprom_len,
1894 .get_eeprom = smsc911x_ethtool_get_eeprom,
1895 .set_eeprom = smsc911x_ethtool_set_eeprom,
1896 };
1897
1898 static const struct net_device_ops smsc911x_netdev_ops = {
1899 .ndo_open = smsc911x_open,
1900 .ndo_stop = smsc911x_stop,
1901 .ndo_start_xmit = smsc911x_hard_start_xmit,
1902 .ndo_get_stats = smsc911x_get_stats,
1903 .ndo_set_multicast_list = smsc911x_set_multicast_list,
1904 .ndo_do_ioctl = smsc911x_do_ioctl,
1905 .ndo_change_mtu = eth_change_mtu,
1906 .ndo_validate_addr = eth_validate_addr,
1907 .ndo_set_mac_address = smsc911x_set_mac_address,
1908 #ifdef CONFIG_NET_POLL_CONTROLLER
1909 .ndo_poll_controller = smsc911x_poll_controller,
1910 #endif
1911 };
1912
1913 /* copies the current mac address from hardware to dev->dev_addr */
1914 static void __devinit smsc911x_read_mac_address(struct net_device *dev)
1915 {
1916 struct smsc911x_data *pdata = netdev_priv(dev);
1917 u32 mac_high16 = smsc911x_mac_read(pdata, ADDRH);
1918 u32 mac_low32 = smsc911x_mac_read(pdata, ADDRL);
1919
1920 dev->dev_addr[0] = (u8)(mac_low32);
1921 dev->dev_addr[1] = (u8)(mac_low32 >> 8);
1922 dev->dev_addr[2] = (u8)(mac_low32 >> 16);
1923 dev->dev_addr[3] = (u8)(mac_low32 >> 24);
1924 dev->dev_addr[4] = (u8)(mac_high16);
1925 dev->dev_addr[5] = (u8)(mac_high16 >> 8);
1926 }
1927
1928 /* Initializing private device structures, only called from probe */
1929 static int __devinit smsc911x_init(struct net_device *dev)
1930 {
1931 struct smsc911x_data *pdata = netdev_priv(dev);
1932 unsigned int byte_test;
1933
1934 SMSC_TRACE(pdata, probe, "Driver Parameters:");
1935 SMSC_TRACE(pdata, probe, "LAN base: 0x%08lX",
1936 (unsigned long)pdata->ioaddr);
1937 SMSC_TRACE(pdata, probe, "IRQ: %d", dev->irq);
1938 SMSC_TRACE(pdata, probe, "PHY will be autodetected.");
1939
1940 spin_lock_init(&pdata->dev_lock);
1941 spin_lock_init(&pdata->mac_lock);
1942
1943 if (pdata->ioaddr == 0) {
1944 SMSC_WARN(pdata, probe, "pdata->ioaddr: 0x00000000");
1945 return -ENODEV;
1946 }
1947
1948 /* Check byte ordering */
1949 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
1950 SMSC_TRACE(pdata, probe, "BYTE_TEST: 0x%08X", byte_test);
1951 if (byte_test == 0x43218765) {
1952 SMSC_TRACE(pdata, probe, "BYTE_TEST looks swapped, "
1953 "applying WORD_SWAP");
1954 smsc911x_reg_write(pdata, WORD_SWAP, 0xffffffff);
1955
1956 /* 1 dummy read of BYTE_TEST is needed after a write to
1957 * WORD_SWAP before its contents are valid */
1958 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
1959
1960 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
1961 }
1962
1963 if (byte_test != 0x87654321) {
1964 SMSC_WARN(pdata, drv, "BYTE_TEST: 0x%08X", byte_test);
1965 if (((byte_test >> 16) & 0xFFFF) == (byte_test & 0xFFFF)) {
1966 SMSC_WARN(pdata, probe,
1967 "top 16 bits equal to bottom 16 bits");
1968 SMSC_TRACE(pdata, probe,
1969 "This may mean the chip is set "
1970 "for 32 bit while the bus is reading 16 bit");
1971 }
1972 return -ENODEV;
1973 }
1974
1975 /* Default generation to zero (all workarounds apply) */
1976 pdata->generation = 0;
1977
1978 pdata->idrev = smsc911x_reg_read(pdata, ID_REV);
1979 switch (pdata->idrev & 0xFFFF0000) {
1980 case 0x01180000:
1981 case 0x01170000:
1982 case 0x01160000:
1983 case 0x01150000:
1984 /* LAN911[5678] family */
1985 pdata->generation = pdata->idrev & 0x0000FFFF;
1986 break;
1987
1988 case 0x118A0000:
1989 case 0x117A0000:
1990 case 0x116A0000:
1991 case 0x115A0000:
1992 /* LAN921[5678] family */
1993 pdata->generation = 3;
1994 break;
1995
1996 case 0x92100000:
1997 case 0x92110000:
1998 case 0x92200000:
1999 case 0x92210000:
2000 /* LAN9210/LAN9211/LAN9220/LAN9221 */
2001 pdata->generation = 4;
2002 break;
2003
2004 default:
2005 SMSC_WARN(pdata, probe, "LAN911x not identified, idrev: 0x%08X",
2006 pdata->idrev);
2007 return -ENODEV;
2008 }
2009
2010 SMSC_TRACE(pdata, probe,
2011 "LAN911x identified, idrev: 0x%08X, generation: %d",
2012 pdata->idrev, pdata->generation);
2013
2014 if (pdata->generation == 0)
2015 SMSC_WARN(pdata, probe,
2016 "This driver is not intended for this chip revision");
2017
2018 /* workaround for platforms without an eeprom, where the mac address
2019 * is stored elsewhere and set by the bootloader. This saves the
2020 * mac address before resetting the device */
2021 if (pdata->config.flags & SMSC911X_SAVE_MAC_ADDRESS) {
2022 spin_lock_irq(&pdata->mac_lock);
2023 smsc911x_read_mac_address(dev);
2024 spin_unlock_irq(&pdata->mac_lock);
2025 }
2026
2027 /* Reset the LAN911x */
2028 if (smsc911x_soft_reset(pdata))
2029 return -ENODEV;
2030
2031 /* Disable all interrupt sources until we bring the device up */
2032 smsc911x_reg_write(pdata, INT_EN, 0);
2033
2034 ether_setup(dev);
2035 dev->flags |= IFF_MULTICAST;
2036 netif_napi_add(dev, &pdata->napi, smsc911x_poll, SMSC_NAPI_WEIGHT);
2037 dev->netdev_ops = &smsc911x_netdev_ops;
2038 dev->ethtool_ops = &smsc911x_ethtool_ops;
2039
2040 return 0;
2041 }
2042
2043 static int __devexit smsc911x_drv_remove(struct platform_device *pdev)
2044 {
2045 struct net_device *dev;
2046 struct smsc911x_data *pdata;
2047 struct resource *res;
2048
2049 dev = platform_get_drvdata(pdev);
2050 BUG_ON(!dev);
2051 pdata = netdev_priv(dev);
2052 BUG_ON(!pdata);
2053 BUG_ON(!pdata->ioaddr);
2054 BUG_ON(!pdata->phy_dev);
2055
2056 SMSC_TRACE(pdata, ifdown, "Stopping driver");
2057
2058 phy_disconnect(pdata->phy_dev);
2059 pdata->phy_dev = NULL;
2060 mdiobus_unregister(pdata->mii_bus);
2061 mdiobus_free(pdata->mii_bus);
2062
2063 platform_set_drvdata(pdev, NULL);
2064 unregister_netdev(dev);
2065 free_irq(dev->irq, dev);
2066 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
2067 "smsc911x-memory");
2068 if (!res)
2069 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2070
2071 release_mem_region(res->start, resource_size(res));
2072
2073 iounmap(pdata->ioaddr);
2074
2075 free_netdev(dev);
2076
2077 return 0;
2078 }
2079
2080 /* standard register acces */
2081 static const struct smsc911x_ops standard_smsc911x_ops = {
2082 .reg_read = __smsc911x_reg_read,
2083 .reg_write = __smsc911x_reg_write,
2084 .rx_readfifo = smsc911x_rx_readfifo,
2085 .tx_writefifo = smsc911x_tx_writefifo,
2086 };
2087
2088 /* shifted register access */
2089 static const struct smsc911x_ops shifted_smsc911x_ops = {
2090 .reg_read = __smsc911x_reg_read_shift,
2091 .reg_write = __smsc911x_reg_write_shift,
2092 .rx_readfifo = smsc911x_rx_readfifo_shift,
2093 .tx_writefifo = smsc911x_tx_writefifo_shift,
2094 };
2095
2096 static int __devinit smsc911x_drv_probe(struct platform_device *pdev)
2097 {
2098 struct net_device *dev;
2099 struct smsc911x_data *pdata;
2100 struct smsc911x_platform_config *config = pdev->dev.platform_data;
2101 struct resource *res, *irq_res;
2102 unsigned int intcfg = 0;
2103 int res_size, irq_flags;
2104 int retval;
2105
2106 pr_info("Driver version %s\n", SMSC_DRV_VERSION);
2107
2108 /* platform data specifies irq & dynamic bus configuration */
2109 if (!pdev->dev.platform_data) {
2110 pr_warn("platform_data not provided\n");
2111 retval = -ENODEV;
2112 goto out_0;
2113 }
2114
2115 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
2116 "smsc911x-memory");
2117 if (!res)
2118 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2119 if (!res) {
2120 pr_warn("Could not allocate resource\n");
2121 retval = -ENODEV;
2122 goto out_0;
2123 }
2124 res_size = resource_size(res);
2125
2126 irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
2127 if (!irq_res) {
2128 pr_warn("Could not allocate irq resource\n");
2129 retval = -ENODEV;
2130 goto out_0;
2131 }
2132
2133 if (!request_mem_region(res->start, res_size, SMSC_CHIPNAME)) {
2134 retval = -EBUSY;
2135 goto out_0;
2136 }
2137
2138 dev = alloc_etherdev(sizeof(struct smsc911x_data));
2139 if (!dev) {
2140 pr_warn("Could not allocate device\n");
2141 retval = -ENOMEM;
2142 goto out_release_io_1;
2143 }
2144
2145 SET_NETDEV_DEV(dev, &pdev->dev);
2146
2147 pdata = netdev_priv(dev);
2148
2149 dev->irq = irq_res->start;
2150 irq_flags = irq_res->flags & IRQF_TRIGGER_MASK;
2151 pdata->ioaddr = ioremap_nocache(res->start, res_size);
2152
2153 /* copy config parameters across to pdata */
2154 memcpy(&pdata->config, config, sizeof(pdata->config));
2155
2156 pdata->dev = dev;
2157 pdata->msg_enable = ((1 << debug) - 1);
2158
2159 if (pdata->ioaddr == NULL) {
2160 SMSC_WARN(pdata, probe, "Error smsc911x base address invalid");
2161 retval = -ENOMEM;
2162 goto out_free_netdev_2;
2163 }
2164
2165 /* assume standard, non-shifted, access to HW registers */
2166 pdata->ops = &standard_smsc911x_ops;
2167 /* apply the right access if shifting is needed */
2168 if (config->shift)
2169 pdata->ops = &shifted_smsc911x_ops;
2170
2171 retval = smsc911x_init(dev);
2172 if (retval < 0)
2173 goto out_unmap_io_3;
2174
2175 /* configure irq polarity and type before connecting isr */
2176 if (pdata->config.irq_polarity == SMSC911X_IRQ_POLARITY_ACTIVE_HIGH)
2177 intcfg |= INT_CFG_IRQ_POL_;
2178
2179 if (pdata->config.irq_type == SMSC911X_IRQ_TYPE_PUSH_PULL)
2180 intcfg |= INT_CFG_IRQ_TYPE_;
2181
2182 smsc911x_reg_write(pdata, INT_CFG, intcfg);
2183
2184 /* Ensure interrupts are globally disabled before connecting ISR */
2185 smsc911x_reg_write(pdata, INT_EN, 0);
2186 smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF);
2187
2188 retval = request_irq(dev->irq, smsc911x_irqhandler,
2189 irq_flags | IRQF_SHARED, dev->name, dev);
2190 if (retval) {
2191 SMSC_WARN(pdata, probe,
2192 "Unable to claim requested irq: %d", dev->irq);
2193 goto out_unmap_io_3;
2194 }
2195
2196 platform_set_drvdata(pdev, dev);
2197
2198 retval = register_netdev(dev);
2199 if (retval) {
2200 SMSC_WARN(pdata, probe, "Error %i registering device", retval);
2201 goto out_unset_drvdata_4;
2202 } else {
2203 SMSC_TRACE(pdata, probe,
2204 "Network interface: \"%s\"", dev->name);
2205 }
2206
2207 retval = smsc911x_mii_init(pdev, dev);
2208 if (retval) {
2209 SMSC_WARN(pdata, probe, "Error %i initialising mii", retval);
2210 goto out_unregister_netdev_5;
2211 }
2212
2213 spin_lock_irq(&pdata->mac_lock);
2214
2215 /* Check if mac address has been specified when bringing interface up */
2216 if (is_valid_ether_addr(dev->dev_addr)) {
2217 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
2218 SMSC_TRACE(pdata, probe,
2219 "MAC Address is specified by configuration");
2220 } else if (is_valid_ether_addr(pdata->config.mac)) {
2221 memcpy(dev->dev_addr, pdata->config.mac, 6);
2222 SMSC_TRACE(pdata, probe,
2223 "MAC Address specified by platform data");
2224 } else {
2225 /* Try reading mac address from device. if EEPROM is present
2226 * it will already have been set */
2227 smsc_get_mac(dev);
2228
2229 if (is_valid_ether_addr(dev->dev_addr)) {
2230 /* eeprom values are valid so use them */
2231 SMSC_TRACE(pdata, probe,
2232 "Mac Address is read from LAN911x EEPROM");
2233 } else {
2234 /* eeprom values are invalid, generate random MAC */
2235 random_ether_addr(dev->dev_addr);
2236 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
2237 SMSC_TRACE(pdata, probe,
2238 "MAC Address is set to random_ether_addr");
2239 }
2240 }
2241
2242 spin_unlock_irq(&pdata->mac_lock);
2243
2244 netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr);
2245
2246 return 0;
2247
2248 out_unregister_netdev_5:
2249 unregister_netdev(dev);
2250 out_unset_drvdata_4:
2251 platform_set_drvdata(pdev, NULL);
2252 free_irq(dev->irq, dev);
2253 out_unmap_io_3:
2254 iounmap(pdata->ioaddr);
2255 out_free_netdev_2:
2256 free_netdev(dev);
2257 out_release_io_1:
2258 release_mem_region(res->start, resource_size(res));
2259 out_0:
2260 return retval;
2261 }
2262
2263 #ifdef CONFIG_PM
2264 /* This implementation assumes the devices remains powered on its VDDVARIO
2265 * pins during suspend. */
2266
2267 /* TODO: implement freeze/thaw callbacks for hibernation.*/
2268
2269 static int smsc911x_suspend(struct device *dev)
2270 {
2271 struct net_device *ndev = dev_get_drvdata(dev);
2272 struct smsc911x_data *pdata = netdev_priv(ndev);
2273
2274 /* enable wake on LAN, energy detection and the external PME
2275 * signal. */
2276 smsc911x_reg_write(pdata, PMT_CTRL,
2277 PMT_CTRL_PM_MODE_D1_ | PMT_CTRL_WOL_EN_ |
2278 PMT_CTRL_ED_EN_ | PMT_CTRL_PME_EN_);
2279
2280 return 0;
2281 }
2282
2283 static int smsc911x_resume(struct device *dev)
2284 {
2285 struct net_device *ndev = dev_get_drvdata(dev);
2286 struct smsc911x_data *pdata = netdev_priv(ndev);
2287 unsigned int to = 100;
2288
2289 /* Note 3.11 from the datasheet:
2290 * "When the LAN9220 is in a power saving state, a write of any
2291 * data to the BYTE_TEST register will wake-up the device."
2292 */
2293 smsc911x_reg_write(pdata, BYTE_TEST, 0);
2294
2295 /* poll the READY bit in PMT_CTRL. Any other access to the device is
2296 * forbidden while this bit isn't set. Try for 100ms and return -EIO
2297 * if it failed. */
2298 while (!(smsc911x_reg_read(pdata, PMT_CTRL) & PMT_CTRL_READY_) && --to)
2299 udelay(1000);
2300
2301 return (to == 0) ? -EIO : 0;
2302 }
2303
2304 static const struct dev_pm_ops smsc911x_pm_ops = {
2305 .suspend = smsc911x_suspend,
2306 .resume = smsc911x_resume,
2307 };
2308
2309 #define SMSC911X_PM_OPS (&smsc911x_pm_ops)
2310
2311 #else
2312 #define SMSC911X_PM_OPS NULL
2313 #endif
2314
2315 static struct platform_driver smsc911x_driver = {
2316 .probe = smsc911x_drv_probe,
2317 .remove = __devexit_p(smsc911x_drv_remove),
2318 .driver = {
2319 .name = SMSC_CHIPNAME,
2320 .owner = THIS_MODULE,
2321 .pm = SMSC911X_PM_OPS,
2322 },
2323 };
2324
2325 /* Entry point for loading the module */
2326 static int __init smsc911x_init_module(void)
2327 {
2328 SMSC_INITIALIZE();
2329 return platform_driver_register(&smsc911x_driver);
2330 }
2331
2332 /* entry point for unloading the module */
2333 static void __exit smsc911x_cleanup_module(void)
2334 {
2335 platform_driver_unregister(&smsc911x_driver);
2336 }
2337
2338 module_init(smsc911x_init_module);
2339 module_exit(smsc911x_cleanup_module);
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree