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ide-floppy: move all ioctl handling to ide-floppy_ioctl.c (take 2)
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / blackfin / kernel / bfin_gpio.c
blob6e08f425bb44076fa39443e23ab75d1db429afa1
1 /*
2 * File: arch/blackfin/kernel/bfin_gpio.c
3 * Based on:
4 * Author: Michael Hennerich (hennerich@blackfin.uclinux.org)
5 *
6 * Created:
7 * Description: GPIO Abstraction Layer
8 *
9 * Modified:
10 * Copyright 2008 Analog Devices Inc.
11 *
12 * Bugs: Enter bugs at http://blackfin.uclinux.org/
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, see the file COPYING, or write
26 * to the Free Software Foundation, Inc.,
27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
28 */
29
30 /*
31 * Number BF537/6/4 BF561 BF533/2/1 BF549/8/4/2
32 *
33 * GPIO_0 PF0 PF0 PF0 PA0...PJ13
34 * GPIO_1 PF1 PF1 PF1
35 * GPIO_2 PF2 PF2 PF2
36 * GPIO_3 PF3 PF3 PF3
37 * GPIO_4 PF4 PF4 PF4
38 * GPIO_5 PF5 PF5 PF5
39 * GPIO_6 PF6 PF6 PF6
40 * GPIO_7 PF7 PF7 PF7
41 * GPIO_8 PF8 PF8 PF8
42 * GPIO_9 PF9 PF9 PF9
43 * GPIO_10 PF10 PF10 PF10
44 * GPIO_11 PF11 PF11 PF11
45 * GPIO_12 PF12 PF12 PF12
46 * GPIO_13 PF13 PF13 PF13
47 * GPIO_14 PF14 PF14 PF14
48 * GPIO_15 PF15 PF15 PF15
49 * GPIO_16 PG0 PF16
50 * GPIO_17 PG1 PF17
51 * GPIO_18 PG2 PF18
52 * GPIO_19 PG3 PF19
53 * GPIO_20 PG4 PF20
54 * GPIO_21 PG5 PF21
55 * GPIO_22 PG6 PF22
56 * GPIO_23 PG7 PF23
57 * GPIO_24 PG8 PF24
58 * GPIO_25 PG9 PF25
59 * GPIO_26 PG10 PF26
60 * GPIO_27 PG11 PF27
61 * GPIO_28 PG12 PF28
62 * GPIO_29 PG13 PF29
63 * GPIO_30 PG14 PF30
64 * GPIO_31 PG15 PF31
65 * GPIO_32 PH0 PF32
66 * GPIO_33 PH1 PF33
67 * GPIO_34 PH2 PF34
68 * GPIO_35 PH3 PF35
69 * GPIO_36 PH4 PF36
70 * GPIO_37 PH5 PF37
71 * GPIO_38 PH6 PF38
72 * GPIO_39 PH7 PF39
73 * GPIO_40 PH8 PF40
74 * GPIO_41 PH9 PF41
75 * GPIO_42 PH10 PF42
76 * GPIO_43 PH11 PF43
77 * GPIO_44 PH12 PF44
78 * GPIO_45 PH13 PF45
79 * GPIO_46 PH14 PF46
80 * GPIO_47 PH15 PF47
81 */
82
83 #include <linux/delay.h>
84 #include <linux/module.h>
85 #include <linux/err.h>
86 #include <linux/proc_fs.h>
87 #include <asm/blackfin.h>
88 #include <asm/gpio.h>
89 #include <asm/portmux.h>
90 #include <linux/irq.h>
91
92 #if ANOMALY_05000311 || ANOMALY_05000323
93 enum {
94 AWA_data = SYSCR,
95 AWA_data_clear = SYSCR,
96 AWA_data_set = SYSCR,
97 AWA_toggle = SYSCR,
98 AWA_maska = BFIN_UART_SCR,
99 AWA_maska_clear = BFIN_UART_SCR,
100 AWA_maska_set = BFIN_UART_SCR,
101 AWA_maska_toggle = BFIN_UART_SCR,
102 AWA_maskb = BFIN_UART_GCTL,
103 AWA_maskb_clear = BFIN_UART_GCTL,
104 AWA_maskb_set = BFIN_UART_GCTL,
105 AWA_maskb_toggle = BFIN_UART_GCTL,
106 AWA_dir = SPORT1_STAT,
107 AWA_polar = SPORT1_STAT,
108 AWA_edge = SPORT1_STAT,
109 AWA_both = SPORT1_STAT,
110 #if ANOMALY_05000311
111 AWA_inen = TIMER_ENABLE,
112 #elif ANOMALY_05000323
113 AWA_inen = DMA1_1_CONFIG,
114 #endif
115 };
116 /* Anomaly Workaround */
117 #define AWA_DUMMY_READ(name) bfin_read16(AWA_ ## name)
118 #else
119 #define AWA_DUMMY_READ(...) do { } while (0)
120 #endif
121
122 #ifdef BF533_FAMILY
123 static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
124 (struct gpio_port_t *) FIO_FLAG_D,
125 };
126 #endif
127
128 #if defined(BF527_FAMILY) || defined(BF537_FAMILY)
129 static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
130 (struct gpio_port_t *) PORTFIO,
131 (struct gpio_port_t *) PORTGIO,
132 (struct gpio_port_t *) PORTHIO,
133 };
134
135 static unsigned short *port_fer[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
136 (unsigned short *) PORTF_FER,
137 (unsigned short *) PORTG_FER,
138 (unsigned short *) PORTH_FER,
139 };
140 #endif
141
142 #ifdef BF527_FAMILY
143 static unsigned short *port_mux[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
144 (unsigned short *) PORTF_MUX,
145 (unsigned short *) PORTG_MUX,
146 (unsigned short *) PORTH_MUX,
147 };
148
149 static const
150 u8 pmux_offset[][16] =
151 {{ 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, 4, 6, 8, 8, 10, 10 }, /* PORTF */
152 { 0, 0, 0, 0, 0, 2, 2, 4, 4, 6, 8, 10, 10, 10, 12, 12 }, /* PORTG */
153 { 0, 0, 0, 0, 0, 0, 0, 0, 2, 4, 4, 4, 4, 4, 4, 4 }, /* PORTH */
154 };
155 #endif
156
157 #ifdef BF561_FAMILY
158 static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
159 (struct gpio_port_t *) FIO0_FLAG_D,
160 (struct gpio_port_t *) FIO1_FLAG_D,
161 (struct gpio_port_t *) FIO2_FLAG_D,
162 };
163 #endif
164
165 #ifdef BF548_FAMILY
166 static struct gpio_port_t *gpio_array[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
167 (struct gpio_port_t *)PORTA_FER,
168 (struct gpio_port_t *)PORTB_FER,
169 (struct gpio_port_t *)PORTC_FER,
170 (struct gpio_port_t *)PORTD_FER,
171 (struct gpio_port_t *)PORTE_FER,
172 (struct gpio_port_t *)PORTF_FER,
173 (struct gpio_port_t *)PORTG_FER,
174 (struct gpio_port_t *)PORTH_FER,
175 (struct gpio_port_t *)PORTI_FER,
176 (struct gpio_port_t *)PORTJ_FER,
177 };
178 #endif
179
180 static unsigned short reserved_gpio_map[gpio_bank(MAX_BLACKFIN_GPIOS)];
181 static unsigned short reserved_peri_map[gpio_bank(MAX_RESOURCES)];
182
183 #define RESOURCE_LABEL_SIZE 16
184
185 static struct str_ident {
186 char name[RESOURCE_LABEL_SIZE];
187 } str_ident[MAX_RESOURCES];
188
189 #if defined(CONFIG_PM)
190 #if defined(CONFIG_BF54x)
191 static struct gpio_port_s gpio_bank_saved[gpio_bank(MAX_BLACKFIN_GPIOS)];
192 #else
193 static unsigned short wakeup_map[gpio_bank(MAX_BLACKFIN_GPIOS)];
194 static unsigned char wakeup_flags_map[MAX_BLACKFIN_GPIOS];
195 static struct gpio_port_s gpio_bank_saved[gpio_bank(MAX_BLACKFIN_GPIOS)];
196
197 #ifdef BF533_FAMILY
198 static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG_INTB};
199 #endif
200
201 #ifdef BF537_FAMILY
202 static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG_INTB, IRQ_PORTG_INTB, IRQ_MAC_TX};
203 #endif
204
205 #ifdef BF527_FAMILY
206 static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PORTF_INTB, IRQ_PORTG_INTB, IRQ_PORTH_INTB};
207 #endif
208
209 #ifdef BF561_FAMILY
210 static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG0_INTB, IRQ_PROG1_INTB, IRQ_PROG2_INTB};
211 #endif
212 #endif
213 #endif /* CONFIG_PM */
214
215 #if defined(BF548_FAMILY)
216 inline int check_gpio(unsigned gpio)
217 {
218 if (gpio == GPIO_PB15 || gpio == GPIO_PC14 || gpio == GPIO_PC15
219 || gpio == GPIO_PH14 || gpio == GPIO_PH15
220 || gpio == GPIO_PJ14 || gpio == GPIO_PJ15
221 || gpio > MAX_BLACKFIN_GPIOS)
222 return -EINVAL;
223 return 0;
224 }
225 #else
226 inline int check_gpio(unsigned gpio)
227 {
228 if (gpio >= MAX_BLACKFIN_GPIOS)
229 return -EINVAL;
230 return 0;
231 }
232 #endif
233
234 static void gpio_error(unsigned gpio)
235 {
236 printk(KERN_ERR "bfin-gpio: GPIO %d wasn't requested!\n", gpio);
237 }
238
239 static void set_label(unsigned short ident, const char *label)
240 {
241 if (label) {
242 strncpy(str_ident[ident].name, label,
243 RESOURCE_LABEL_SIZE);
244 str_ident[ident].name[RESOURCE_LABEL_SIZE - 1] = 0;
245 }
246 }
247
248 static char *get_label(unsigned short ident)
249 {
250 return (*str_ident[ident].name ? str_ident[ident].name : "UNKNOWN");
251 }
252
253 static int cmp_label(unsigned short ident, const char *label)
254 {
255 if (label == NULL) {
256 dump_stack();
257 printk(KERN_ERR "Please provide none-null label\n");
258 }
259
260 if (label)
261 return strncmp(str_ident[ident].name,
262 label, strlen(label));
263 else
264 return -EINVAL;
265 }
266
267 #if defined(BF527_FAMILY) || defined(BF537_FAMILY)
268 static void port_setup(unsigned gpio, unsigned short usage)
269 {
270 if (!check_gpio(gpio)) {
271 if (usage == GPIO_USAGE)
272 *port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio);
273 else
274 *port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
275 SSYNC();
276 }
277 }
278 #elif defined(BF548_FAMILY)
279 static void port_setup(unsigned gpio, unsigned short usage)
280 {
281 if (usage == GPIO_USAGE)
282 gpio_array[gpio_bank(gpio)]->port_fer &= ~gpio_bit(gpio);
283 else
284 gpio_array[gpio_bank(gpio)]->port_fer |= gpio_bit(gpio);
285 SSYNC();
286 }
287 #else
288 # define port_setup(...) do { } while (0)
289 #endif
290
291 #ifdef BF537_FAMILY
292 static struct {
293 unsigned short res;
294 unsigned short offset;
295 } port_mux_lut[] = {
296 {.res = P_PPI0_D13, .offset = 11},
297 {.res = P_PPI0_D14, .offset = 11},
298 {.res = P_PPI0_D15, .offset = 11},
299 {.res = P_SPORT1_TFS, .offset = 11},
300 {.res = P_SPORT1_TSCLK, .offset = 11},
301 {.res = P_SPORT1_DTPRI, .offset = 11},
302 {.res = P_PPI0_D10, .offset = 10},
303 {.res = P_PPI0_D11, .offset = 10},
304 {.res = P_PPI0_D12, .offset = 10},
305 {.res = P_SPORT1_RSCLK, .offset = 10},
306 {.res = P_SPORT1_RFS, .offset = 10},
307 {.res = P_SPORT1_DRPRI, .offset = 10},
308 {.res = P_PPI0_D8, .offset = 9},
309 {.res = P_PPI0_D9, .offset = 9},
310 {.res = P_SPORT1_DRSEC, .offset = 9},
311 {.res = P_SPORT1_DTSEC, .offset = 9},
312 {.res = P_TMR2, .offset = 8},
313 {.res = P_PPI0_FS3, .offset = 8},
314 {.res = P_TMR3, .offset = 7},
315 {.res = P_SPI0_SSEL4, .offset = 7},
316 {.res = P_TMR4, .offset = 6},
317 {.res = P_SPI0_SSEL5, .offset = 6},
318 {.res = P_TMR5, .offset = 5},
319 {.res = P_SPI0_SSEL6, .offset = 5},
320 {.res = P_UART1_RX, .offset = 4},
321 {.res = P_UART1_TX, .offset = 4},
322 {.res = P_TMR6, .offset = 4},
323 {.res = P_TMR7, .offset = 4},
324 {.res = P_UART0_RX, .offset = 3},
325 {.res = P_UART0_TX, .offset = 3},
326 {.res = P_DMAR0, .offset = 3},
327 {.res = P_DMAR1, .offset = 3},
328 {.res = P_SPORT0_DTSEC, .offset = 1},
329 {.res = P_SPORT0_DRSEC, .offset = 1},
330 {.res = P_CAN0_RX, .offset = 1},
331 {.res = P_CAN0_TX, .offset = 1},
332 {.res = P_SPI0_SSEL7, .offset = 1},
333 {.res = P_SPORT0_TFS, .offset = 0},
334 {.res = P_SPORT0_DTPRI, .offset = 0},
335 {.res = P_SPI0_SSEL2, .offset = 0},
336 {.res = P_SPI0_SSEL3, .offset = 0},
337 };
338
339 static void portmux_setup(unsigned short per, unsigned short function)
340 {
341 u16 y, offset, muxreg;
342
343 for (y = 0; y < ARRAY_SIZE(port_mux_lut); y++) {
344 if (port_mux_lut[y].res == per) {
345
346 /* SET PORTMUX REG */
347
348 offset = port_mux_lut[y].offset;
349 muxreg = bfin_read_PORT_MUX();
350
351 if (offset != 1)
352 muxreg &= ~(1 << offset);
353 else
354 muxreg &= ~(3 << 1);
355
356 muxreg |= (function << offset);
357 bfin_write_PORT_MUX(muxreg);
358 }
359 }
360 }
361 #elif defined(BF548_FAMILY)
362 inline void portmux_setup(unsigned short portno, unsigned short function)
363 {
364 u32 pmux;
365
366 pmux = gpio_array[gpio_bank(portno)]->port_mux;
367
368 pmux &= ~(0x3 << (2 * gpio_sub_n(portno)));
369 pmux |= (function & 0x3) << (2 * gpio_sub_n(portno));
370
371 gpio_array[gpio_bank(portno)]->port_mux = pmux;
372 }
373
374 inline u16 get_portmux(unsigned short portno)
375 {
376 u32 pmux;
377
378 pmux = gpio_array[gpio_bank(portno)]->port_mux;
379
380 return (pmux >> (2 * gpio_sub_n(portno)) & 0x3);
381 }
382 #elif defined(BF527_FAMILY)
383 inline void portmux_setup(unsigned short portno, unsigned short function)
384 {
385 u16 pmux, ident = P_IDENT(portno);
386 u8 offset = pmux_offset[gpio_bank(ident)][gpio_sub_n(ident)];
387
388 pmux = *port_mux[gpio_bank(ident)];
389 pmux &= ~(3 << offset);
390 pmux |= (function & 3) << offset;
391 *port_mux[gpio_bank(ident)] = pmux;
392 SSYNC();
393 }
394 #else
395 # define portmux_setup(...) do { } while (0)
396 #endif
397
398 static int __init bfin_gpio_init(void)
399 {
400 printk(KERN_INFO "Blackfin GPIO Controller\n");
401
402 return 0;
403 }
404 arch_initcall(bfin_gpio_init);
405
406
407 #ifndef BF548_FAMILY
408 /***********************************************************
409 *
410 * FUNCTIONS: Blackfin General Purpose Ports Access Functions
411 *
412 * INPUTS/OUTPUTS:
413 * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
414 *
415 *
416 * DESCRIPTION: These functions abstract direct register access
417 * to Blackfin processor General Purpose
418 * Ports Regsiters
419 *
420 * CAUTION: These functions do not belong to the GPIO Driver API
421 *************************************************************
422 * MODIFICATION HISTORY :
423 **************************************************************/
424
425 /* Set a specific bit */
426
427 #define SET_GPIO(name) \
428 void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
429 { \
430 unsigned long flags; \
431 local_irq_save(flags); \
432 if (arg) \
433 gpio_bankb[gpio_bank(gpio)]->name |= gpio_bit(gpio); \
434 else \
435 gpio_bankb[gpio_bank(gpio)]->name &= ~gpio_bit(gpio); \
436 AWA_DUMMY_READ(name); \
437 local_irq_restore(flags); \
438 } \
439 EXPORT_SYMBOL(set_gpio_ ## name);
440
441 SET_GPIO(dir)
442 SET_GPIO(inen)
443 SET_GPIO(polar)
444 SET_GPIO(edge)
445 SET_GPIO(both)
446
447
448 #if ANOMALY_05000311 || ANOMALY_05000323
449 #define SET_GPIO_SC(name) \
450 void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
451 { \
452 unsigned long flags; \
453 local_irq_save(flags); \
454 if (arg) \
455 gpio_bankb[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
456 else \
457 gpio_bankb[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
458 AWA_DUMMY_READ(name); \
459 local_irq_restore(flags); \
460 } \
461 EXPORT_SYMBOL(set_gpio_ ## name);
462 #else
463 #define SET_GPIO_SC(name) \
464 void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
465 { \
466 if (arg) \
467 gpio_bankb[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
468 else \
469 gpio_bankb[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
470 } \
471 EXPORT_SYMBOL(set_gpio_ ## name);
472 #endif
473
474 SET_GPIO_SC(maska)
475 SET_GPIO_SC(maskb)
476 SET_GPIO_SC(data)
477
478 #if ANOMALY_05000311 || ANOMALY_05000323
479 void set_gpio_toggle(unsigned gpio)
480 {
481 unsigned long flags;
482 local_irq_save(flags);
483 gpio_bankb[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
484 AWA_DUMMY_READ(toggle);
485 local_irq_restore(flags);
486 }
487 #else
488 void set_gpio_toggle(unsigned gpio)
489 {
490 gpio_bankb[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
491 }
492 #endif
493 EXPORT_SYMBOL(set_gpio_toggle);
494
495
496 /*Set current PORT date (16-bit word)*/
497
498 #if ANOMALY_05000311 || ANOMALY_05000323
499 #define SET_GPIO_P(name) \
500 void set_gpiop_ ## name(unsigned gpio, unsigned short arg) \
501 { \
502 unsigned long flags; \
503 local_irq_save(flags); \
504 gpio_bankb[gpio_bank(gpio)]->name = arg; \
505 AWA_DUMMY_READ(name); \
506 local_irq_restore(flags); \
507 } \
508 EXPORT_SYMBOL(set_gpiop_ ## name);
509 #else
510 #define SET_GPIO_P(name) \
511 void set_gpiop_ ## name(unsigned gpio, unsigned short arg) \
512 { \
513 gpio_bankb[gpio_bank(gpio)]->name = arg; \
514 } \
515 EXPORT_SYMBOL(set_gpiop_ ## name);
516 #endif
517
518 SET_GPIO_P(data)
519 SET_GPIO_P(dir)
520 SET_GPIO_P(inen)
521 SET_GPIO_P(polar)
522 SET_GPIO_P(edge)
523 SET_GPIO_P(both)
524 SET_GPIO_P(maska)
525 SET_GPIO_P(maskb)
526
527 /* Get a specific bit */
528 #if ANOMALY_05000311 || ANOMALY_05000323
529 #define GET_GPIO(name) \
530 unsigned short get_gpio_ ## name(unsigned gpio) \
531 { \
532 unsigned long flags; \
533 unsigned short ret; \
534 local_irq_save(flags); \
535 ret = 0x01 & (gpio_bankb[gpio_bank(gpio)]->name >> gpio_sub_n(gpio)); \
536 AWA_DUMMY_READ(name); \
537 local_irq_restore(flags); \
538 return ret; \
539 } \
540 EXPORT_SYMBOL(get_gpio_ ## name);
541 #else
542 #define GET_GPIO(name) \
543 unsigned short get_gpio_ ## name(unsigned gpio) \
544 { \
545 return (0x01 & (gpio_bankb[gpio_bank(gpio)]->name >> gpio_sub_n(gpio))); \
546 } \
547 EXPORT_SYMBOL(get_gpio_ ## name);
548 #endif
549
550 GET_GPIO(data)
551 GET_GPIO(dir)
552 GET_GPIO(inen)
553 GET_GPIO(polar)
554 GET_GPIO(edge)
555 GET_GPIO(both)
556 GET_GPIO(maska)
557 GET_GPIO(maskb)
558
559 /*Get current PORT date (16-bit word)*/
560
561 #if ANOMALY_05000311 || ANOMALY_05000323
562 #define GET_GPIO_P(name) \
563 unsigned short get_gpiop_ ## name(unsigned gpio) \
564 { \
565 unsigned long flags; \
566 unsigned short ret; \
567 local_irq_save(flags); \
568 ret = (gpio_bankb[gpio_bank(gpio)]->name); \
569 AWA_DUMMY_READ(name); \
570 local_irq_restore(flags); \
571 return ret; \
572 } \
573 EXPORT_SYMBOL(get_gpiop_ ## name);
574 #else
575 #define GET_GPIO_P(name) \
576 unsigned short get_gpiop_ ## name(unsigned gpio) \
577 { \
578 return (gpio_bankb[gpio_bank(gpio)]->name);\
579 } \
580 EXPORT_SYMBOL(get_gpiop_ ## name);
581 #endif
582
583 GET_GPIO_P(data)
584 GET_GPIO_P(dir)
585 GET_GPIO_P(inen)
586 GET_GPIO_P(polar)
587 GET_GPIO_P(edge)
588 GET_GPIO_P(both)
589 GET_GPIO_P(maska)
590 GET_GPIO_P(maskb)
591
592
593 #ifdef CONFIG_PM
594 /***********************************************************
595 *
596 * FUNCTIONS: Blackfin PM Setup API
597 *
598 * INPUTS/OUTPUTS:
599 * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
600 * type -
601 * PM_WAKE_RISING
602 * PM_WAKE_FALLING
603 * PM_WAKE_HIGH
604 * PM_WAKE_LOW
605 * PM_WAKE_BOTH_EDGES
606 *
607 * DESCRIPTION: Blackfin PM Driver API
608 *
609 * CAUTION:
610 *************************************************************
611 * MODIFICATION HISTORY :
612 **************************************************************/
613 int gpio_pm_wakeup_request(unsigned gpio, unsigned char type)
614 {
615 unsigned long flags;
616
617 if ((check_gpio(gpio) < 0) || !type)
618 return -EINVAL;
619
620 local_irq_save(flags);
621 wakeup_map[gpio_bank(gpio)] |= gpio_bit(gpio);
622 wakeup_flags_map[gpio] = type;
623 local_irq_restore(flags);
624
625 return 0;
626 }
627 EXPORT_SYMBOL(gpio_pm_wakeup_request);
628
629 void gpio_pm_wakeup_free(unsigned gpio)
630 {
631 unsigned long flags;
632
633 if (check_gpio(gpio) < 0)
634 return;
635
636 local_irq_save(flags);
637
638 wakeup_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
639
640 local_irq_restore(flags);
641 }
642 EXPORT_SYMBOL(gpio_pm_wakeup_free);
643
644 static int bfin_gpio_wakeup_type(unsigned gpio, unsigned char type)
645 {
646 port_setup(gpio, GPIO_USAGE);
647 set_gpio_dir(gpio, 0);
648 set_gpio_inen(gpio, 1);
649
650 if (type & (PM_WAKE_RISING | PM_WAKE_FALLING))
651 set_gpio_edge(gpio, 1);
652 else
653 set_gpio_edge(gpio, 0);
654
655 if ((type & (PM_WAKE_BOTH_EDGES)) == (PM_WAKE_BOTH_EDGES))
656 set_gpio_both(gpio, 1);
657 else
658 set_gpio_both(gpio, 0);
659
660 if ((type & (PM_WAKE_FALLING | PM_WAKE_LOW)))
661 set_gpio_polar(gpio, 1);
662 else
663 set_gpio_polar(gpio, 0);
664
665 SSYNC();
666
667 return 0;
668 }
669
670 u32 bfin_pm_standby_setup(void)
671 {
672 u16 bank, mask, i, gpio;
673
674 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
675 mask = wakeup_map[gpio_bank(i)];
676 bank = gpio_bank(i);
677
678 gpio_bank_saved[bank].maskb = gpio_bankb[bank]->maskb;
679 gpio_bankb[bank]->maskb = 0;
680
681 if (mask) {
682 #if defined(BF527_FAMILY) || defined(BF537_FAMILY)
683 gpio_bank_saved[bank].fer = *port_fer[bank];
684 #endif
685 gpio_bank_saved[bank].inen = gpio_bankb[bank]->inen;
686 gpio_bank_saved[bank].polar = gpio_bankb[bank]->polar;
687 gpio_bank_saved[bank].dir = gpio_bankb[bank]->dir;
688 gpio_bank_saved[bank].edge = gpio_bankb[bank]->edge;
689 gpio_bank_saved[bank].both = gpio_bankb[bank]->both;
690 gpio_bank_saved[bank].reserved =
691 reserved_gpio_map[bank];
692
693 gpio = i;
694
695 while (mask) {
696 if ((mask & 1) && (wakeup_flags_map[gpio] !=
697 PM_WAKE_IGNORE)) {
698 reserved_gpio_map[gpio_bank(gpio)] |=
699 gpio_bit(gpio);
700 bfin_gpio_wakeup_type(gpio,
701 wakeup_flags_map[gpio]);
702 set_gpio_data(gpio, 0); /*Clear*/
703 }
704 gpio++;
705 mask >>= 1;
706 }
707
708 bfin_internal_set_wake(sic_iwr_irqs[bank], 1);
709 gpio_bankb[bank]->maskb_set = wakeup_map[gpio_bank(i)];
710 }
711 }
712
713 AWA_DUMMY_READ(maskb_set);
714
715 return 0;
716 }
717
718 void bfin_pm_standby_restore(void)
719 {
720 u16 bank, mask, i;
721
722 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
723 mask = wakeup_map[gpio_bank(i)];
724 bank = gpio_bank(i);
725
726 if (mask) {
727 #if defined(BF527_FAMILY) || defined(BF537_FAMILY)
728 *port_fer[bank] = gpio_bank_saved[bank].fer;
729 #endif
730 gpio_bankb[bank]->inen = gpio_bank_saved[bank].inen;
731 gpio_bankb[bank]->dir = gpio_bank_saved[bank].dir;
732 gpio_bankb[bank]->polar = gpio_bank_saved[bank].polar;
733 gpio_bankb[bank]->edge = gpio_bank_saved[bank].edge;
734 gpio_bankb[bank]->both = gpio_bank_saved[bank].both;
735
736 reserved_gpio_map[bank] =
737 gpio_bank_saved[bank].reserved;
738 bfin_internal_set_wake(sic_iwr_irqs[bank], 0);
739 }
740
741 gpio_bankb[bank]->maskb = gpio_bank_saved[bank].maskb;
742 }
743 AWA_DUMMY_READ(maskb);
744 }
745
746 void bfin_gpio_pm_hibernate_suspend(void)
747 {
748 int i, bank;
749
750 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
751 bank = gpio_bank(i);
752
753 #if defined(BF527_FAMILY) || defined(BF537_FAMILY)
754 gpio_bank_saved[bank].fer = *port_fer[bank];
755 #ifdef BF527_FAMILY
756 gpio_bank_saved[bank].mux = *port_mux[bank];
757 #else
758 if (bank == 0)
759 gpio_bank_saved[bank].mux = bfin_read_PORT_MUX();
760 #endif
761 #endif
762 gpio_bank_saved[bank].data = gpio_bankb[bank]->data;
763 gpio_bank_saved[bank].inen = gpio_bankb[bank]->inen;
764 gpio_bank_saved[bank].polar = gpio_bankb[bank]->polar;
765 gpio_bank_saved[bank].dir = gpio_bankb[bank]->dir;
766 gpio_bank_saved[bank].edge = gpio_bankb[bank]->edge;
767 gpio_bank_saved[bank].both = gpio_bankb[bank]->both;
768 gpio_bank_saved[bank].maska = gpio_bankb[bank]->maska;
769 }
770
771 AWA_DUMMY_READ(maska);
772 }
773
774 void bfin_gpio_pm_hibernate_restore(void)
775 {
776 int i, bank;
777
778 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
779 bank = gpio_bank(i);
780
781 #if defined(BF527_FAMILY) || defined(BF537_FAMILY)
782 #ifdef BF527_FAMILY
783 *port_mux[bank] = gpio_bank_saved[bank].mux;
784 #else
785 if (bank == 0)
786 bfin_write_PORT_MUX(gpio_bank_saved[bank].mux);
787 #endif
788 *port_fer[bank] = gpio_bank_saved[bank].fer;
789 #endif
790 gpio_bankb[bank]->inen = gpio_bank_saved[bank].inen;
791 gpio_bankb[bank]->dir = gpio_bank_saved[bank].dir;
792 gpio_bankb[bank]->polar = gpio_bank_saved[bank].polar;
793 gpio_bankb[bank]->edge = gpio_bank_saved[bank].edge;
794 gpio_bankb[bank]->both = gpio_bank_saved[bank].both;
795
796 gpio_bankb[bank]->data_set = gpio_bank_saved[bank].data
797 | gpio_bank_saved[bank].dir;
798
799 gpio_bankb[bank]->maska = gpio_bank_saved[bank].maska;
800 }
801 AWA_DUMMY_READ(maska);
802 }
803
804
805 #endif
806 #else /* BF548_FAMILY */
807 #ifdef CONFIG_PM
808
809 u32 bfin_pm_standby_setup(void)
810 {
811 return 0;
812 }
813
814 void bfin_pm_standby_restore(void)
815 {
816
817 }
818
819 void bfin_gpio_pm_hibernate_suspend(void)
820 {
821 int i, bank;
822
823 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
824 bank = gpio_bank(i);
825
826 gpio_bank_saved[bank].fer = gpio_array[bank]->port_fer;
827 gpio_bank_saved[bank].mux = gpio_array[bank]->port_mux;
828 gpio_bank_saved[bank].data = gpio_array[bank]->port_data;
829 gpio_bank_saved[bank].data = gpio_array[bank]->port_data;
830 gpio_bank_saved[bank].inen = gpio_array[bank]->port_inen;
831 gpio_bank_saved[bank].dir = gpio_array[bank]->port_dir_set;
832 }
833 }
834
835 void bfin_gpio_pm_hibernate_restore(void)
836 {
837 int i, bank;
838
839 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
840 bank = gpio_bank(i);
841
842 gpio_array[bank]->port_mux = gpio_bank_saved[bank].mux;
843 gpio_array[bank]->port_fer = gpio_bank_saved[bank].fer;
844 gpio_array[bank]->port_inen = gpio_bank_saved[bank].inen;
845 gpio_array[bank]->port_dir_set = gpio_bank_saved[bank].dir;
846 gpio_array[bank]->port_set = gpio_bank_saved[bank].data
847 | gpio_bank_saved[bank].dir;
848 }
849 }
850 #endif
851
852 unsigned short get_gpio_dir(unsigned gpio)
853 {
854 return (0x01 & (gpio_array[gpio_bank(gpio)]->port_dir_clear >> gpio_sub_n(gpio)));
855 }
856 EXPORT_SYMBOL(get_gpio_dir);
857
858 #endif /* BF548_FAMILY */
859
860 /***********************************************************
861 *
862 * FUNCTIONS: Blackfin Peripheral Resource Allocation
863 * and PortMux Setup
864 *
865 * INPUTS/OUTPUTS:
866 * per Peripheral Identifier
867 * label String
868 *
869 * DESCRIPTION: Blackfin Peripheral Resource Allocation and Setup API
870 *
871 * CAUTION:
872 *************************************************************
873 * MODIFICATION HISTORY :
874 **************************************************************/
875
876 #ifdef BF548_FAMILY
877 int peripheral_request(unsigned short per, const char *label)
878 {
879 unsigned long flags;
880 unsigned short ident = P_IDENT(per);
881
882 /*
883 * Don't cares are pins with only one dedicated function
884 */
885
886 if (per & P_DONTCARE)
887 return 0;
888
889 if (!(per & P_DEFINED))
890 return -ENODEV;
891
892 if (check_gpio(ident) < 0)
893 return -EINVAL;
894
895 local_irq_save(flags);
896
897 if (unlikely(reserved_gpio_map[gpio_bank(ident)] & gpio_bit(ident))) {
898 dump_stack();
899 printk(KERN_ERR
900 "%s: Peripheral %d is already reserved as GPIO by %s !\n",
901 __func__, ident, get_label(ident));
902 local_irq_restore(flags);
903 return -EBUSY;
904 }
905
906 if (unlikely(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident))) {
907
908 u16 funct = get_portmux(ident);
909
910 /*
911 * Pin functions like AMC address strobes my
912 * be requested and used by several drivers
913 */
914
915 if (!((per & P_MAYSHARE) && (funct == P_FUNCT2MUX(per)))) {
916
917 /*
918 * Allow that the identical pin function can
919 * be requested from the same driver twice
920 */
921
922 if (cmp_label(ident, label) == 0)
923 goto anyway;
924
925 dump_stack();
926 printk(KERN_ERR
927 "%s: Peripheral %d function %d is already reserved by %s !\n",
928 __func__, ident, P_FUNCT2MUX(per), get_label(ident));
929 local_irq_restore(flags);
930 return -EBUSY;
931 }
932 }
933
934 anyway:
935 reserved_peri_map[gpio_bank(ident)] |= gpio_bit(ident);
936
937 portmux_setup(ident, P_FUNCT2MUX(per));
938 port_setup(ident, PERIPHERAL_USAGE);
939
940 local_irq_restore(flags);
941 set_label(ident, label);
942
943 return 0;
944 }
945 EXPORT_SYMBOL(peripheral_request);
946 #else
947
948 int peripheral_request(unsigned short per, const char *label)
949 {
950 unsigned long flags;
951 unsigned short ident = P_IDENT(per);
952
953 /*
954 * Don't cares are pins with only one dedicated function
955 */
956
957 if (per & P_DONTCARE)
958 return 0;
959
960 if (!(per & P_DEFINED))
961 return -ENODEV;
962
963 local_irq_save(flags);
964
965 if (!check_gpio(ident)) {
966
967 if (unlikely(reserved_gpio_map[gpio_bank(ident)] & gpio_bit(ident))) {
968 dump_stack();
969 printk(KERN_ERR
970 "%s: Peripheral %d is already reserved as GPIO by %s !\n",
971 __func__, ident, get_label(ident));
972 local_irq_restore(flags);
973 return -EBUSY;
974 }
975
976 }
977
978 if (unlikely(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident))) {
979
980 /*
981 * Pin functions like AMC address strobes my
982 * be requested and used by several drivers
983 */
984
985 if (!(per & P_MAYSHARE)) {
986
987 /*
988 * Allow that the identical pin function can
989 * be requested from the same driver twice
990 */
991
992 if (cmp_label(ident, label) == 0)
993 goto anyway;
994
995 dump_stack();
996 printk(KERN_ERR
997 "%s: Peripheral %d function %d is already"
998 " reserved by %s !\n",
999 __func__, ident, P_FUNCT2MUX(per),
1000 get_label(ident));
1001 local_irq_restore(flags);
1002 return -EBUSY;
1003 }
1004
1005 }
1006
1007 anyway:
1008 portmux_setup(per, P_FUNCT2MUX(per));
1009
1010 port_setup(ident, PERIPHERAL_USAGE);
1011
1012 reserved_peri_map[gpio_bank(ident)] |= gpio_bit(ident);
1013 local_irq_restore(flags);
1014 set_label(ident, label);
1015
1016 return 0;
1017 }
1018 EXPORT_SYMBOL(peripheral_request);
1019 #endif
1020
1021 int peripheral_request_list(const unsigned short per[], const char *label)
1022 {
1023 u16 cnt;
1024 int ret;
1025
1026 for (cnt = 0; per[cnt] != 0; cnt++) {
1027
1028 ret = peripheral_request(per[cnt], label);
1029
1030 if (ret < 0) {
1031 for ( ; cnt > 0; cnt--)
1032 peripheral_free(per[cnt - 1]);
1033
1034 return ret;
1035 }
1036 }
1037
1038 return 0;
1039 }
1040 EXPORT_SYMBOL(peripheral_request_list);
1041
1042 void peripheral_free(unsigned short per)
1043 {
1044 unsigned long flags;
1045 unsigned short ident = P_IDENT(per);
1046
1047 if (per & P_DONTCARE)
1048 return;
1049
1050 if (!(per & P_DEFINED))
1051 return;
1052
1053 if (check_gpio(ident) < 0)
1054 return;
1055
1056 local_irq_save(flags);
1057
1058 if (unlikely(!(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident)))) {
1059 local_irq_restore(flags);
1060 return;
1061 }
1062
1063 if (!(per & P_MAYSHARE))
1064 port_setup(ident, GPIO_USAGE);
1065
1066 reserved_peri_map[gpio_bank(ident)] &= ~gpio_bit(ident);
1067
1068 set_label(ident, "free");
1069
1070 local_irq_restore(flags);
1071 }
1072 EXPORT_SYMBOL(peripheral_free);
1073
1074 void peripheral_free_list(const unsigned short per[])
1075 {
1076 u16 cnt;
1077 for (cnt = 0; per[cnt] != 0; cnt++)
1078 peripheral_free(per[cnt]);
1079 }
1080 EXPORT_SYMBOL(peripheral_free_list);
1081
1082 /***********************************************************
1083 *
1084 * FUNCTIONS: Blackfin GPIO Driver
1085 *
1086 * INPUTS/OUTPUTS:
1087 * gpio PIO Number between 0 and MAX_BLACKFIN_GPIOS
1088 * label String
1089 *
1090 * DESCRIPTION: Blackfin GPIO Driver API
1091 *
1092 * CAUTION:
1093 *************************************************************
1094 * MODIFICATION HISTORY :
1095 **************************************************************/
1096
1097 int gpio_request(unsigned gpio, const char *label)
1098 {
1099 unsigned long flags;
1100
1101 if (check_gpio(gpio) < 0)
1102 return -EINVAL;
1103
1104 local_irq_save(flags);
1105
1106 /*
1107 * Allow that the identical GPIO can
1108 * be requested from the same driver twice
1109 * Do nothing and return -
1110 */
1111
1112 if (cmp_label(gpio, label) == 0) {
1113 local_irq_restore(flags);
1114 return 0;
1115 }
1116
1117 if (unlikely(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
1118 dump_stack();
1119 printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved by %s !\n",
1120 gpio, get_label(gpio));
1121 local_irq_restore(flags);
1122 return -EBUSY;
1123 }
1124 if (unlikely(reserved_peri_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
1125 dump_stack();
1126 printk(KERN_ERR
1127 "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
1128 gpio, get_label(gpio));
1129 local_irq_restore(flags);
1130 return -EBUSY;
1131 }
1132
1133 reserved_gpio_map[gpio_bank(gpio)] |= gpio_bit(gpio);
1134
1135 local_irq_restore(flags);
1136
1137 port_setup(gpio, GPIO_USAGE);
1138 set_label(gpio, label);
1139
1140 return 0;
1141 }
1142 EXPORT_SYMBOL(gpio_request);
1143
1144 void gpio_free(unsigned gpio)
1145 {
1146 unsigned long flags;
1147
1148 if (check_gpio(gpio) < 0)
1149 return;
1150
1151 local_irq_save(flags);
1152
1153 if (unlikely(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))) {
1154 dump_stack();
1155 gpio_error(gpio);
1156 local_irq_restore(flags);
1157 return;
1158 }
1159
1160 reserved_gpio_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
1161
1162 set_label(gpio, "free");
1163
1164 local_irq_restore(flags);
1165 }
1166 EXPORT_SYMBOL(gpio_free);
1167
1168
1169 #ifdef BF548_FAMILY
1170 int gpio_direction_input(unsigned gpio)
1171 {
1172 unsigned long flags;
1173
1174 if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
1175 gpio_error(gpio);
1176 return -EINVAL;
1177 }
1178
1179 local_irq_save(flags);
1180 gpio_array[gpio_bank(gpio)]->port_dir_clear = gpio_bit(gpio);
1181 gpio_array[gpio_bank(gpio)]->port_inen |= gpio_bit(gpio);
1182 local_irq_restore(flags);
1183
1184 return 0;
1185 }
1186 EXPORT_SYMBOL(gpio_direction_input);
1187
1188 int gpio_direction_output(unsigned gpio, int value)
1189 {
1190 unsigned long flags;
1191
1192 if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
1193 gpio_error(gpio);
1194 return -EINVAL;
1195 }
1196
1197 local_irq_save(flags);
1198 gpio_array[gpio_bank(gpio)]->port_inen &= ~gpio_bit(gpio);
1199 gpio_set_value(gpio, value);
1200 gpio_array[gpio_bank(gpio)]->port_dir_set = gpio_bit(gpio);
1201 local_irq_restore(flags);
1202
1203 return 0;
1204 }
1205 EXPORT_SYMBOL(gpio_direction_output);
1206
1207 void gpio_set_value(unsigned gpio, int arg)
1208 {
1209 if (arg)
1210 gpio_array[gpio_bank(gpio)]->port_set = gpio_bit(gpio);
1211 else
1212 gpio_array[gpio_bank(gpio)]->port_clear = gpio_bit(gpio);
1213 }
1214 EXPORT_SYMBOL(gpio_set_value);
1215
1216 int gpio_get_value(unsigned gpio)
1217 {
1218 return (1 & (gpio_array[gpio_bank(gpio)]->port_data >> gpio_sub_n(gpio)));
1219 }
1220 EXPORT_SYMBOL(gpio_get_value);
1221
1222 void bfin_gpio_irq_prepare(unsigned gpio)
1223 {
1224 unsigned long flags;
1225
1226 port_setup(gpio, GPIO_USAGE);
1227
1228 local_irq_save(flags);
1229 gpio_array[gpio_bank(gpio)]->port_dir_clear = gpio_bit(gpio);
1230 gpio_array[gpio_bank(gpio)]->port_inen |= gpio_bit(gpio);
1231 local_irq_restore(flags);
1232 }
1233
1234 #else
1235
1236 int gpio_get_value(unsigned gpio)
1237 {
1238 unsigned long flags;
1239 int ret;
1240
1241 if (unlikely(get_gpio_edge(gpio))) {
1242 local_irq_save(flags);
1243 set_gpio_edge(gpio, 0);
1244 ret = get_gpio_data(gpio);
1245 set_gpio_edge(gpio, 1);
1246 local_irq_restore(flags);
1247
1248 return ret;
1249 } else
1250 return get_gpio_data(gpio);
1251 }
1252 EXPORT_SYMBOL(gpio_get_value);
1253
1254
1255 int gpio_direction_input(unsigned gpio)
1256 {
1257 unsigned long flags;
1258
1259 if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
1260 gpio_error(gpio);
1261 return -EINVAL;
1262 }
1263
1264 local_irq_save(flags);
1265 gpio_bankb[gpio_bank(gpio)]->dir &= ~gpio_bit(gpio);
1266 gpio_bankb[gpio_bank(gpio)]->inen |= gpio_bit(gpio);
1267 AWA_DUMMY_READ(inen);
1268 local_irq_restore(flags);
1269
1270 return 0;
1271 }
1272 EXPORT_SYMBOL(gpio_direction_input);
1273
1274 int gpio_direction_output(unsigned gpio, int value)
1275 {
1276 unsigned long flags;
1277
1278 if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
1279 gpio_error(gpio);
1280 return -EINVAL;
1281 }
1282
1283 local_irq_save(flags);
1284 gpio_bankb[gpio_bank(gpio)]->inen &= ~gpio_bit(gpio);
1285
1286 if (value)
1287 gpio_bankb[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
1288 else
1289 gpio_bankb[gpio_bank(gpio)]->data_clear = gpio_bit(gpio);
1290
1291 gpio_bankb[gpio_bank(gpio)]->dir |= gpio_bit(gpio);
1292 AWA_DUMMY_READ(dir);
1293 local_irq_restore(flags);
1294
1295 return 0;
1296 }
1297 EXPORT_SYMBOL(gpio_direction_output);
1298
1299 /* If we are booting from SPI and our board lacks a strong enough pull up,
1300 * the core can reset and execute the bootrom faster than the resistor can
1301 * pull the signal logically high. To work around this (common) error in
1302 * board design, we explicitly set the pin back to GPIO mode, force /CS
1303 * high, and wait for the electrons to do their thing.
1304 *
1305 * This function only makes sense to be called from reset code, but it
1306 * lives here as we need to force all the GPIO states w/out going through
1307 * BUG() checks and such.
1308 */
1309 void bfin_gpio_reset_spi0_ssel1(void)
1310 {
1311 u16 gpio = P_IDENT(P_SPI0_SSEL1);
1312
1313 port_setup(gpio, GPIO_USAGE);
1314 gpio_bankb[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
1315 AWA_DUMMY_READ(data_set);
1316 udelay(1);
1317 }
1318
1319 void bfin_gpio_irq_prepare(unsigned gpio)
1320 {
1321 port_setup(gpio, GPIO_USAGE);
1322 }
1323
1324 #endif /*BF548_FAMILY */
1325
1326 #if defined(CONFIG_PROC_FS)
1327 static int gpio_proc_read(char *buf, char **start, off_t offset,
1328 int len, int *unused_i, void *unused_v)
1329 {
1330 int c, outlen = 0;
1331
1332 for (c = 0; c < MAX_RESOURCES; c++) {
1333 if (!check_gpio(c) && (reserved_gpio_map[gpio_bank(c)] & gpio_bit(c)))
1334 len = sprintf(buf, "GPIO_%d: %s \t\tGPIO %s\n", c,
1335 get_label(c), get_gpio_dir(c) ? "OUTPUT" : "INPUT");
1336 else if (reserved_peri_map[gpio_bank(c)] & gpio_bit(c))
1337 len = sprintf(buf, "GPIO_%d: %s \t\tPeripheral\n", c, get_label(c));
1338 else
1339 continue;
1340 buf += len;
1341 outlen += len;
1342 }
1343 return outlen;
1344 }
1345
1346 static __init int gpio_register_proc(void)
1347 {
1348 struct proc_dir_entry *proc_gpio;
1349
1350 proc_gpio = create_proc_entry("gpio", S_IRUGO, NULL);
1351 if (proc_gpio)
1352 proc_gpio->read_proc = gpio_proc_read;
1353 return proc_gpio != NULL;
1354 }
1355 __initcall(gpio_register_proc);
1356 #endif
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree