3 * Alchemy Au1x00 ethernet driver
5 * Copyright 2001-2003, 2006 MontaVista Software Inc.
6 * Copyright 2002 TimeSys Corp.
7 * Added ethtool/mii-tool support,
8 * Copyright 2004 Matt Porter <mporter@kernel.crashing.org>
9 * Update: 2004 Bjoern Riemer, riemer@fokus.fraunhofer.de
10 * or riemer@riemer-nt.de: fixed the link beat detection with
11 * ioctls (SIOCGMIIPHY)
12 * Copyright 2006 Herbert Valerio Riedel <hvr@gnu.org>
13 * converted to use linux-2.6.x's PHY framework
15 * Author: MontaVista Software, Inc.
16 * ppopov@mvista.com or source@mvista.com
18 * ########################################################################
20 * This program is free software; you can distribute it and/or modify it
21 * under the terms of the GNU General Public License (Version 2) as
22 * published by the Free Software Foundation.
24 * This program is distributed in the hope it will be useful, but WITHOUT
25 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
26 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
29 * You should have received a copy of the GNU General Public License along
30 * with this program; if not, write to the Free Software Foundation, Inc.,
31 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
33 * ########################################################################
37 #include <linux/dma-mapping.h>
38 #include <linux/module.h>
39 #include <linux/kernel.h>
40 #include <linux/string.h>
41 #include <linux/timer.h>
42 #include <linux/errno.h>
44 #include <linux/ioport.h>
45 #include <linux/bitops.h>
46 #include <linux/slab.h>
47 #include <linux/interrupt.h>
48 #include <linux/init.h>
49 #include <linux/netdevice.h>
50 #include <linux/etherdevice.h>
51 #include <linux/ethtool.h>
52 #include <linux/mii.h>
53 #include <linux/skbuff.h>
54 #include <linux/delay.h>
55 #include <linux/crc32.h>
56 #include <linux/phy.h>
59 #include <asm/mipsregs.h>
62 #include <asm/processor.h>
67 #include "au1000_eth.h"
69 #ifdef AU1000_ETH_DEBUG
70 static int au1000_debug
= 5;
72 static int au1000_debug
= 3;
75 #define DRV_NAME "au1000_eth"
76 #define DRV_VERSION "1.6"
77 #define DRV_AUTHOR "Pete Popov <ppopov@embeddedalley.com>"
78 #define DRV_DESC "Au1xxx on-chip Ethernet driver"
80 MODULE_AUTHOR(DRV_AUTHOR
);
81 MODULE_DESCRIPTION(DRV_DESC
);
82 MODULE_LICENSE("GPL");
85 static void hard_stop(struct net_device
*);
86 static void enable_rx_tx(struct net_device
*dev
);
87 static struct net_device
* au1000_probe(int port_num
);
88 static int au1000_init(struct net_device
*);
89 static int au1000_open(struct net_device
*);
90 static int au1000_close(struct net_device
*);
91 static int au1000_tx(struct sk_buff
*, struct net_device
*);
92 static int au1000_rx(struct net_device
*);
93 static irqreturn_t
au1000_interrupt(int, void *);
94 static void au1000_tx_timeout(struct net_device
*);
95 static void set_rx_mode(struct net_device
*);
96 static int au1000_ioctl(struct net_device
*, struct ifreq
*, int);
97 static int au1000_mdio_read(struct net_device
*, int, int);
98 static void au1000_mdio_write(struct net_device
*, int, int, u16
);
99 static void au1000_adjust_link(struct net_device
*);
100 static void enable_mac(struct net_device
*, int);
103 * Theory of operation
105 * The Au1000 MACs use a simple rx and tx descriptor ring scheme.
106 * There are four receive and four transmit descriptors. These
107 * descriptors are not in memory; rather, they are just a set of
108 * hardware registers.
110 * Since the Au1000 has a coherent data cache, the receive and
111 * transmit buffers are allocated from the KSEG0 segment. The
112 * hardware registers, however, are still mapped at KSEG1 to
113 * make sure there's no out-of-order writes, and that all writes
114 * complete immediately.
117 /* These addresses are only used if yamon doesn't tell us what
118 * the mac address is, and the mac address is not passed on the
121 static unsigned char au1000_mac_addr
[6] __devinitdata
= {
122 0x00, 0x50, 0xc2, 0x0c, 0x30, 0x00
125 struct au1000_private
*au_macs
[NUM_ETH_INTERFACES
];
128 * board-specific configurations
130 * PHY detection algorithm
132 * If AU1XXX_PHY_STATIC_CONFIG is undefined, the PHY setup is
135 * mii_probe() first searches the current MAC's MII bus for a PHY,
136 * selecting the first (or last, if AU1XXX_PHY_SEARCH_HIGHEST_ADDR is
137 * defined) PHY address not already claimed by another netdev.
139 * If nothing was found that way when searching for the 2nd ethernet
140 * controller's PHY and AU1XXX_PHY1_SEARCH_ON_MAC0 is defined, then
141 * the first MII bus is searched as well for an unclaimed PHY; this is
142 * needed in case of a dual-PHY accessible only through the MAC0's MII
145 * Finally, if no PHY is found, then the corresponding ethernet
146 * controller is not registered to the network subsystem.
149 /* autodetection defaults */
150 #undef AU1XXX_PHY_SEARCH_HIGHEST_ADDR
151 #define AU1XXX_PHY1_SEARCH_ON_MAC0
155 * most boards PHY setup should be detectable properly with the
156 * autodetection algorithm in mii_probe(), but in some cases (e.g. if
157 * you have a switch attached, or want to use the PHY's interrupt
158 * notification capabilities) you can provide a static PHY
161 * IRQs may only be set, if a PHY address was configured
162 * If a PHY address is given, also a bus id is required to be set
164 * ps: make sure the used irqs are configured properly in the board
168 #if defined(CONFIG_MIPS_BOSPORUS)
170 * Micrel/Kendin 5 port switch attached to MAC0,
171 * MAC0 is associated with PHY address 5 (== WAN port)
172 * MAC1 is not associated with any PHY, since it's connected directly
174 * no interrupts are used
176 # define AU1XXX_PHY_STATIC_CONFIG
178 # define AU1XXX_PHY0_ADDR 5
179 # define AU1XXX_PHY0_BUSID 0
180 # undef AU1XXX_PHY0_IRQ
182 # undef AU1XXX_PHY1_ADDR
183 # undef AU1XXX_PHY1_BUSID
184 # undef AU1XXX_PHY1_IRQ
187 #if defined(AU1XXX_PHY0_BUSID) && (AU1XXX_PHY0_BUSID > 0)
188 # error MAC0-associated PHY attached 2nd MACs MII bus not supported yet
194 static int au1000_mdio_read(struct net_device
*dev
, int phy_addr
, int reg
)
196 struct au1000_private
*aup
= (struct au1000_private
*) dev
->priv
;
197 volatile u32
*const mii_control_reg
= &aup
->mac
->mii_control
;
198 volatile u32
*const mii_data_reg
= &aup
->mac
->mii_data
;
202 while (*mii_control_reg
& MAC_MII_BUSY
) {
204 if (--timedout
== 0) {
205 printk(KERN_ERR
"%s: read_MII busy timeout!!\n",
211 mii_control
= MAC_SET_MII_SELECT_REG(reg
) |
212 MAC_SET_MII_SELECT_PHY(phy_addr
) | MAC_MII_READ
;
214 *mii_control_reg
= mii_control
;
217 while (*mii_control_reg
& MAC_MII_BUSY
) {
219 if (--timedout
== 0) {
220 printk(KERN_ERR
"%s: mdio_read busy timeout!!\n",
225 return (int)*mii_data_reg
;
228 static void au1000_mdio_write(struct net_device
*dev
, int phy_addr
,
231 struct au1000_private
*aup
= (struct au1000_private
*) dev
->priv
;
232 volatile u32
*const mii_control_reg
= &aup
->mac
->mii_control
;
233 volatile u32
*const mii_data_reg
= &aup
->mac
->mii_data
;
237 while (*mii_control_reg
& MAC_MII_BUSY
) {
239 if (--timedout
== 0) {
240 printk(KERN_ERR
"%s: mdio_write busy timeout!!\n",
246 mii_control
= MAC_SET_MII_SELECT_REG(reg
) |
247 MAC_SET_MII_SELECT_PHY(phy_addr
) | MAC_MII_WRITE
;
249 *mii_data_reg
= value
;
250 *mii_control_reg
= mii_control
;
253 static int au1000_mdiobus_read(struct mii_bus
*bus
, int phy_addr
, int regnum
)
255 /* WARNING: bus->phy_map[phy_addr].attached_dev == dev does
256 * _NOT_ hold (e.g. when PHY is accessed through other MAC's MII bus) */
257 struct net_device
*const dev
= bus
->priv
;
259 enable_mac(dev
, 0); /* make sure the MAC associated with this
260 * mii_bus is enabled */
261 return au1000_mdio_read(dev
, phy_addr
, regnum
);
264 static int au1000_mdiobus_write(struct mii_bus
*bus
, int phy_addr
, int regnum
,
267 struct net_device
*const dev
= bus
->priv
;
269 enable_mac(dev
, 0); /* make sure the MAC associated with this
270 * mii_bus is enabled */
271 au1000_mdio_write(dev
, phy_addr
, regnum
, value
);
275 static int au1000_mdiobus_reset(struct mii_bus
*bus
)
277 struct net_device
*const dev
= bus
->priv
;
279 enable_mac(dev
, 0); /* make sure the MAC associated with this
280 * mii_bus is enabled */
284 static int mii_probe (struct net_device
*dev
)
286 struct au1000_private
*const aup
= (struct au1000_private
*) dev
->priv
;
287 struct phy_device
*phydev
= NULL
;
289 #if defined(AU1XXX_PHY_STATIC_CONFIG)
290 BUG_ON(aup
->mac_id
< 0 || aup
->mac_id
> 1);
292 if(aup
->mac_id
== 0) { /* get PHY0 */
293 # if defined(AU1XXX_PHY0_ADDR)
294 phydev
= au_macs
[AU1XXX_PHY0_BUSID
]->mii_bus
->phy_map
[AU1XXX_PHY0_ADDR
];
296 printk (KERN_INFO DRV_NAME
":%s: using PHY-less setup\n",
299 # endif /* defined(AU1XXX_PHY0_ADDR) */
300 } else if (aup
->mac_id
== 1) { /* get PHY1 */
301 # if defined(AU1XXX_PHY1_ADDR)
302 phydev
= au_macs
[AU1XXX_PHY1_BUSID
]->mii_bus
->phy_map
[AU1XXX_PHY1_ADDR
];
304 printk (KERN_INFO DRV_NAME
":%s: using PHY-less setup\n",
307 # endif /* defined(AU1XXX_PHY1_ADDR) */
310 #else /* defined(AU1XXX_PHY_STATIC_CONFIG) */
313 /* find the first (lowest address) PHY on the current MAC's MII bus */
314 for (phy_addr
= 0; phy_addr
< PHY_MAX_ADDR
; phy_addr
++)
315 if (aup
->mii_bus
->phy_map
[phy_addr
]) {
316 phydev
= aup
->mii_bus
->phy_map
[phy_addr
];
317 # if !defined(AU1XXX_PHY_SEARCH_HIGHEST_ADDR)
318 break; /* break out with first one found */
322 # if defined(AU1XXX_PHY1_SEARCH_ON_MAC0)
323 /* try harder to find a PHY */
324 if (!phydev
&& (aup
->mac_id
== 1)) {
325 /* no PHY found, maybe we have a dual PHY? */
326 printk (KERN_INFO DRV_NAME
": no PHY found on MAC1, "
327 "let's see if it's attached to MAC0...\n");
331 /* find the first (lowest address) non-attached PHY on
332 * the MAC0 MII bus */
333 for (phy_addr
= 0; phy_addr
< PHY_MAX_ADDR
; phy_addr
++) {
334 struct phy_device
*const tmp_phydev
=
335 au_macs
[0]->mii_bus
->phy_map
[phy_addr
];
338 continue; /* no PHY here... */
340 if (tmp_phydev
->attached_dev
)
341 continue; /* already claimed by MAC0 */
344 break; /* found it */
347 # endif /* defined(AU1XXX_PHY1_SEARCH_OTHER_BUS) */
349 #endif /* defined(AU1XXX_PHY_STATIC_CONFIG) */
351 printk (KERN_ERR DRV_NAME
":%s: no PHY found\n", dev
->name
);
355 /* now we are supposed to have a proper phydev, to attach to... */
357 BUG_ON(phydev
->attached_dev
);
359 phydev
= phy_connect(dev
, phydev
->dev
.bus_id
, &au1000_adjust_link
, 0,
360 PHY_INTERFACE_MODE_MII
);
362 if (IS_ERR(phydev
)) {
363 printk(KERN_ERR
"%s: Could not attach to PHY\n", dev
->name
);
364 return PTR_ERR(phydev
);
367 /* mask with MAC supported features */
368 phydev
->supported
&= (SUPPORTED_10baseT_Half
369 | SUPPORTED_10baseT_Full
370 | SUPPORTED_100baseT_Half
371 | SUPPORTED_100baseT_Full
373 /* | SUPPORTED_Pause | SUPPORTED_Asym_Pause */
377 phydev
->advertising
= phydev
->supported
;
381 aup
->old_duplex
= -1;
382 aup
->phy_dev
= phydev
;
384 printk(KERN_INFO
"%s: attached PHY driver [%s] "
385 "(mii_bus:phy_addr=%s, irq=%d)\n",
386 dev
->name
, phydev
->drv
->name
, phydev
->dev
.bus_id
, phydev
->irq
);
393 * Buffer allocation/deallocation routines. The buffer descriptor returned
394 * has the virtual and dma address of a buffer suitable for
395 * both, receive and transmit operations.
397 static db_dest_t
*GetFreeDB(struct au1000_private
*aup
)
403 aup
->pDBfree
= pDB
->pnext
;
408 void ReleaseDB(struct au1000_private
*aup
, db_dest_t
*pDB
)
410 db_dest_t
*pDBfree
= aup
->pDBfree
;
412 pDBfree
->pnext
= pDB
;
416 static void enable_rx_tx(struct net_device
*dev
)
418 struct au1000_private
*aup
= (struct au1000_private
*) dev
->priv
;
420 if (au1000_debug
> 4)
421 printk(KERN_INFO
"%s: enable_rx_tx\n", dev
->name
);
423 aup
->mac
->control
|= (MAC_RX_ENABLE
| MAC_TX_ENABLE
);
427 static void hard_stop(struct net_device
*dev
)
429 struct au1000_private
*aup
= (struct au1000_private
*) dev
->priv
;
431 if (au1000_debug
> 4)
432 printk(KERN_INFO
"%s: hard stop\n", dev
->name
);
434 aup
->mac
->control
&= ~(MAC_RX_ENABLE
| MAC_TX_ENABLE
);
438 static void enable_mac(struct net_device
*dev
, int force_reset
)
441 struct au1000_private
*aup
= (struct au1000_private
*) dev
->priv
;
443 spin_lock_irqsave(&aup
->lock
, flags
);
445 if(force_reset
|| (!aup
->mac_enabled
)) {
446 *aup
->enable
= MAC_EN_CLOCK_ENABLE
;
448 *aup
->enable
= (MAC_EN_RESET0
| MAC_EN_RESET1
| MAC_EN_RESET2
449 | MAC_EN_CLOCK_ENABLE
);
452 aup
->mac_enabled
= 1;
455 spin_unlock_irqrestore(&aup
->lock
, flags
);
458 static void reset_mac_unlocked(struct net_device
*dev
)
460 struct au1000_private
*const aup
= (struct au1000_private
*) dev
->priv
;
465 *aup
->enable
= MAC_EN_CLOCK_ENABLE
;
471 for (i
= 0; i
< NUM_RX_DMA
; i
++) {
472 /* reset control bits */
473 aup
->rx_dma_ring
[i
]->buff_stat
&= ~0xf;
475 for (i
= 0; i
< NUM_TX_DMA
; i
++) {
476 /* reset control bits */
477 aup
->tx_dma_ring
[i
]->buff_stat
&= ~0xf;
480 aup
->mac_enabled
= 0;
484 static void reset_mac(struct net_device
*dev
)
486 struct au1000_private
*const aup
= (struct au1000_private
*) dev
->priv
;
489 if (au1000_debug
> 4)
490 printk(KERN_INFO
"%s: reset mac, aup %x\n",
491 dev
->name
, (unsigned)aup
);
493 spin_lock_irqsave(&aup
->lock
, flags
);
495 reset_mac_unlocked (dev
);
497 spin_unlock_irqrestore(&aup
->lock
, flags
);
501 * Setup the receive and transmit "rings". These pointers are the addresses
502 * of the rx and tx MAC DMA registers so they are fixed by the hardware --
503 * these are not descriptors sitting in memory.
506 setup_hw_rings(struct au1000_private
*aup
, u32 rx_base
, u32 tx_base
)
510 for (i
= 0; i
< NUM_RX_DMA
; i
++) {
511 aup
->rx_dma_ring
[i
] =
512 (volatile rx_dma_t
*) (rx_base
+ sizeof(rx_dma_t
)*i
);
514 for (i
= 0; i
< NUM_TX_DMA
; i
++) {
515 aup
->tx_dma_ring
[i
] =
516 (volatile tx_dma_t
*) (tx_base
+ sizeof(tx_dma_t
)*i
);
524 struct net_device
*dev
;
526 #ifdef CONFIG_SOC_AU1000
527 {AU1000_ETH0_BASE
, AU1000_MAC0_ENABLE
, AU1000_MAC0_DMA_INT
},
528 {AU1000_ETH1_BASE
, AU1000_MAC1_ENABLE
, AU1000_MAC1_DMA_INT
}
530 #ifdef CONFIG_SOC_AU1100
531 {AU1100_ETH0_BASE
, AU1100_MAC0_ENABLE
, AU1100_MAC0_DMA_INT
}
533 #ifdef CONFIG_SOC_AU1500
534 {AU1500_ETH0_BASE
, AU1500_MAC0_ENABLE
, AU1500_MAC0_DMA_INT
},
535 {AU1500_ETH1_BASE
, AU1500_MAC1_ENABLE
, AU1500_MAC1_DMA_INT
}
537 #ifdef CONFIG_SOC_AU1550
538 {AU1550_ETH0_BASE
, AU1550_MAC0_ENABLE
, AU1550_MAC0_DMA_INT
},
539 {AU1550_ETH1_BASE
, AU1550_MAC1_ENABLE
, AU1550_MAC1_DMA_INT
}
546 * Setup the base address and interrupt of the Au1xxx ethernet macs
547 * based on cpu type and whether the interface is enabled in sys_pinfunc
548 * register. The last interface is enabled if SYS_PF_NI2 (bit 4) is 0.
550 static int __init
au1000_init_module(void)
552 int ni
= (int)((au_readl(SYS_PINFUNC
) & (u32
)(SYS_PF_NI2
)) >> 4);
553 struct net_device
*dev
;
554 int i
, found_one
= 0;
556 num_ifs
= NUM_ETH_INTERFACES
- ni
;
558 for(i
= 0; i
< num_ifs
; i
++) {
559 dev
= au1000_probe(i
);
573 static int au1000_get_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
575 struct au1000_private
*aup
= (struct au1000_private
*)dev
->priv
;
578 return phy_ethtool_gset(aup
->phy_dev
, cmd
);
583 static int au1000_set_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
585 struct au1000_private
*aup
= (struct au1000_private
*)dev
->priv
;
587 if (!capable(CAP_NET_ADMIN
))
591 return phy_ethtool_sset(aup
->phy_dev
, cmd
);
597 au1000_get_drvinfo(struct net_device
*dev
, struct ethtool_drvinfo
*info
)
599 struct au1000_private
*aup
= (struct au1000_private
*)dev
->priv
;
601 strcpy(info
->driver
, DRV_NAME
);
602 strcpy(info
->version
, DRV_VERSION
);
603 info
->fw_version
[0] = '\0';
604 sprintf(info
->bus_info
, "%s %d", DRV_NAME
, aup
->mac_id
);
605 info
->regdump_len
= 0;
608 static const struct ethtool_ops au1000_ethtool_ops
= {
609 .get_settings
= au1000_get_settings
,
610 .set_settings
= au1000_set_settings
,
611 .get_drvinfo
= au1000_get_drvinfo
,
612 .get_link
= ethtool_op_get_link
,
615 static struct net_device
* au1000_probe(int port_num
)
617 static unsigned version_printed
= 0;
618 struct au1000_private
*aup
= NULL
;
619 struct net_device
*dev
= NULL
;
620 db_dest_t
*pDB
, *pDBfree
;
625 if (port_num
>= NUM_ETH_INTERFACES
)
628 base
= CPHYSADDR(iflist
[port_num
].base_addr
);
629 macen
= CPHYSADDR(iflist
[port_num
].macen_addr
);
630 irq
= iflist
[port_num
].irq
;
632 if (!request_mem_region( base
, MAC_IOSIZE
, "Au1x00 ENET") ||
633 !request_mem_region(macen
, 4, "Au1x00 ENET"))
636 if (version_printed
++ == 0)
637 printk("%s version %s %s\n", DRV_NAME
, DRV_VERSION
, DRV_AUTHOR
);
639 dev
= alloc_etherdev(sizeof(struct au1000_private
));
641 printk(KERN_ERR
"%s: alloc_etherdev failed\n", DRV_NAME
);
645 if ((err
= register_netdev(dev
)) != 0) {
646 printk(KERN_ERR
"%s: Cannot register net device, error %d\n",
652 printk("%s: Au1xx0 Ethernet found at 0x%x, irq %d\n",
653 dev
->name
, base
, irq
);
657 spin_lock_init(&aup
->lock
);
659 /* Allocate the data buffers */
660 /* Snooping works fine with eth on all au1xxx */
661 aup
->vaddr
= (u32
)dma_alloc_noncoherent(NULL
, MAX_BUF_SIZE
*
662 (NUM_TX_BUFFS
+ NUM_RX_BUFFS
),
666 release_mem_region( base
, MAC_IOSIZE
);
667 release_mem_region(macen
, 4);
671 /* aup->mac is the base address of the MAC's registers */
672 aup
->mac
= (volatile mac_reg_t
*)iflist
[port_num
].base_addr
;
674 /* Setup some variables for quick register address access */
675 aup
->enable
= (volatile u32
*)iflist
[port_num
].macen_addr
;
676 aup
->mac_id
= port_num
;
677 au_macs
[port_num
] = aup
;
680 if (prom_get_ethernet_addr(ethaddr
) == 0)
681 memcpy(au1000_mac_addr
, ethaddr
, sizeof(au1000_mac_addr
));
683 printk(KERN_INFO
"%s: No MAC address found\n",
685 /* Use the hard coded MAC addresses */
688 setup_hw_rings(aup
, MAC0_RX_DMA_ADDR
, MAC0_TX_DMA_ADDR
);
689 } else if (port_num
== 1)
690 setup_hw_rings(aup
, MAC1_RX_DMA_ADDR
, MAC1_TX_DMA_ADDR
);
693 * Assign to the Ethernet ports two consecutive MAC addresses
694 * to match those that are printed on their stickers
696 memcpy(dev
->dev_addr
, au1000_mac_addr
, sizeof(au1000_mac_addr
));
697 dev
->dev_addr
[5] += port_num
;
700 aup
->mac_enabled
= 0;
702 aup
->mii_bus
= mdiobus_alloc();
703 if (aup
->mii_bus
== NULL
)
706 aup
->mii_bus
->priv
= dev
;
707 aup
->mii_bus
->read
= au1000_mdiobus_read
;
708 aup
->mii_bus
->write
= au1000_mdiobus_write
;
709 aup
->mii_bus
->reset
= au1000_mdiobus_reset
;
710 aup
->mii_bus
->name
= "au1000_eth_mii";
711 snprintf(aup
->mii_bus
->id
, MII_BUS_ID_SIZE
, "%x", aup
->mac_id
);
712 aup
->mii_bus
->irq
= kmalloc(sizeof(int)*PHY_MAX_ADDR
, GFP_KERNEL
);
713 for(i
= 0; i
< PHY_MAX_ADDR
; ++i
)
714 aup
->mii_bus
->irq
[i
] = PHY_POLL
;
716 /* if known, set corresponding PHY IRQs */
717 #if defined(AU1XXX_PHY_STATIC_CONFIG)
718 # if defined(AU1XXX_PHY0_IRQ)
719 if (AU1XXX_PHY0_BUSID
== aup
->mac_id
)
720 aup
->mii_bus
->irq
[AU1XXX_PHY0_ADDR
] = AU1XXX_PHY0_IRQ
;
722 # if defined(AU1XXX_PHY1_IRQ)
723 if (AU1XXX_PHY1_BUSID
== aup
->mac_id
)
724 aup
->mii_bus
->irq
[AU1XXX_PHY1_ADDR
] = AU1XXX_PHY1_IRQ
;
727 mdiobus_register(aup
->mii_bus
);
729 if (mii_probe(dev
) != 0) {
734 /* setup the data buffer descriptors and attach a buffer to each one */
736 for (i
= 0; i
< (NUM_TX_BUFFS
+NUM_RX_BUFFS
); i
++) {
737 pDB
->pnext
= pDBfree
;
739 pDB
->vaddr
= (u32
*)((unsigned)aup
->vaddr
+ MAX_BUF_SIZE
*i
);
740 pDB
->dma_addr
= (dma_addr_t
)virt_to_bus(pDB
->vaddr
);
743 aup
->pDBfree
= pDBfree
;
745 for (i
= 0; i
< NUM_RX_DMA
; i
++) {
746 pDB
= GetFreeDB(aup
);
750 aup
->rx_dma_ring
[i
]->buff_stat
= (unsigned)pDB
->dma_addr
;
751 aup
->rx_db_inuse
[i
] = pDB
;
753 for (i
= 0; i
< NUM_TX_DMA
; i
++) {
754 pDB
= GetFreeDB(aup
);
758 aup
->tx_dma_ring
[i
]->buff_stat
= (unsigned)pDB
->dma_addr
;
759 aup
->tx_dma_ring
[i
]->len
= 0;
760 aup
->tx_db_inuse
[i
] = pDB
;
763 dev
->base_addr
= base
;
765 dev
->open
= au1000_open
;
766 dev
->hard_start_xmit
= au1000_tx
;
767 dev
->stop
= au1000_close
;
768 dev
->set_multicast_list
= &set_rx_mode
;
769 dev
->do_ioctl
= &au1000_ioctl
;
770 SET_ETHTOOL_OPS(dev
, &au1000_ethtool_ops
);
771 dev
->tx_timeout
= au1000_tx_timeout
;
772 dev
->watchdog_timeo
= ETH_TX_TIMEOUT
;
775 * The boot code uses the ethernet controller, so reset it to start
776 * fresh. au1000_init() expects that the device is in reset state.
783 if (aup
->mii_bus
!= NULL
) {
784 mdiobus_unregister(aup
->mii_bus
);
785 mdiobus_free(aup
->mii_bus
);
788 /* here we should have a valid dev plus aup-> register addresses
789 * so we can reset the mac properly.*/
792 for (i
= 0; i
< NUM_RX_DMA
; i
++) {
793 if (aup
->rx_db_inuse
[i
])
794 ReleaseDB(aup
, aup
->rx_db_inuse
[i
]);
796 for (i
= 0; i
< NUM_TX_DMA
; i
++) {
797 if (aup
->tx_db_inuse
[i
])
798 ReleaseDB(aup
, aup
->tx_db_inuse
[i
]);
800 dma_free_noncoherent(NULL
, MAX_BUF_SIZE
* (NUM_TX_BUFFS
+ NUM_RX_BUFFS
),
801 (void *)aup
->vaddr
, aup
->dma_addr
);
802 unregister_netdev(dev
);
804 release_mem_region( base
, MAC_IOSIZE
);
805 release_mem_region(macen
, 4);
810 * Initialize the interface.
812 * When the device powers up, the clocks are disabled and the
813 * mac is in reset state. When the interface is closed, we
814 * do the same -- reset the device and disable the clocks to
815 * conserve power. Thus, whenever au1000_init() is called,
816 * the device should already be in reset state.
818 static int au1000_init(struct net_device
*dev
)
820 struct au1000_private
*aup
= (struct au1000_private
*) dev
->priv
;
825 if (au1000_debug
> 4)
826 printk("%s: au1000_init\n", dev
->name
);
828 /* bring the device out of reset */
831 spin_lock_irqsave(&aup
->lock
, flags
);
833 aup
->mac
->control
= 0;
834 aup
->tx_head
= (aup
->tx_dma_ring
[0]->buff_stat
& 0xC) >> 2;
835 aup
->tx_tail
= aup
->tx_head
;
836 aup
->rx_head
= (aup
->rx_dma_ring
[0]->buff_stat
& 0xC) >> 2;
838 aup
->mac
->mac_addr_high
= dev
->dev_addr
[5]<<8 | dev
->dev_addr
[4];
839 aup
->mac
->mac_addr_low
= dev
->dev_addr
[3]<<24 | dev
->dev_addr
[2]<<16 |
840 dev
->dev_addr
[1]<<8 | dev
->dev_addr
[0];
842 for (i
= 0; i
< NUM_RX_DMA
; i
++) {
843 aup
->rx_dma_ring
[i
]->buff_stat
|= RX_DMA_ENABLE
;
847 control
= MAC_RX_ENABLE
| MAC_TX_ENABLE
;
848 #ifndef CONFIG_CPU_LITTLE_ENDIAN
849 control
|= MAC_BIG_ENDIAN
;
852 if (aup
->phy_dev
->link
&& (DUPLEX_FULL
== aup
->phy_dev
->duplex
))
853 control
|= MAC_FULL_DUPLEX
;
855 control
|= MAC_DISABLE_RX_OWN
;
856 } else { /* PHY-less op, assume full-duplex */
857 control
|= MAC_FULL_DUPLEX
;
860 aup
->mac
->control
= control
;
861 aup
->mac
->vlan1_tag
= 0x8100; /* activate vlan support */
864 spin_unlock_irqrestore(&aup
->lock
, flags
);
869 au1000_adjust_link(struct net_device
*dev
)
871 struct au1000_private
*aup
= (struct au1000_private
*) dev
->priv
;
872 struct phy_device
*phydev
= aup
->phy_dev
;
875 int status_change
= 0;
877 BUG_ON(!aup
->phy_dev
);
879 spin_lock_irqsave(&aup
->lock
, flags
);
881 if (phydev
->link
&& (aup
->old_speed
!= phydev
->speed
)) {
884 switch(phydev
->speed
) {
890 "%s: Speed (%d) is not 10/100 ???\n",
891 dev
->name
, phydev
->speed
);
895 aup
->old_speed
= phydev
->speed
;
900 if (phydev
->link
&& (aup
->old_duplex
!= phydev
->duplex
)) {
901 // duplex mode changed
903 /* switching duplex mode requires to disable rx and tx! */
906 if (DUPLEX_FULL
== phydev
->duplex
)
907 aup
->mac
->control
= ((aup
->mac
->control
909 & ~MAC_DISABLE_RX_OWN
);
911 aup
->mac
->control
= ((aup
->mac
->control
913 | MAC_DISABLE_RX_OWN
);
917 aup
->old_duplex
= phydev
->duplex
;
922 if(phydev
->link
!= aup
->old_link
) {
923 // link state changed
928 aup
->old_duplex
= -1;
931 aup
->old_link
= phydev
->link
;
935 spin_unlock_irqrestore(&aup
->lock
, flags
);
939 printk(KERN_INFO
"%s: link up (%d/%s)\n",
940 dev
->name
, phydev
->speed
,
941 DUPLEX_FULL
== phydev
->duplex
? "Full" : "Half");
943 printk(KERN_INFO
"%s: link down\n", dev
->name
);
947 static int au1000_open(struct net_device
*dev
)
950 struct au1000_private
*aup
= (struct au1000_private
*) dev
->priv
;
952 if (au1000_debug
> 4)
953 printk("%s: open: dev=%p\n", dev
->name
, dev
);
955 if ((retval
= request_irq(dev
->irq
, &au1000_interrupt
, 0,
957 printk(KERN_ERR
"%s: unable to get IRQ %d\n",
958 dev
->name
, dev
->irq
);
962 if ((retval
= au1000_init(dev
))) {
963 printk(KERN_ERR
"%s: error in au1000_init\n", dev
->name
);
964 free_irq(dev
->irq
, dev
);
969 /* cause the PHY state machine to schedule a link state check */
970 aup
->phy_dev
->state
= PHY_CHANGELINK
;
971 phy_start(aup
->phy_dev
);
974 netif_start_queue(dev
);
976 if (au1000_debug
> 4)
977 printk("%s: open: Initialization done.\n", dev
->name
);
982 static int au1000_close(struct net_device
*dev
)
985 struct au1000_private
*const aup
= (struct au1000_private
*) dev
->priv
;
987 if (au1000_debug
> 4)
988 printk("%s: close: dev=%p\n", dev
->name
, dev
);
991 phy_stop(aup
->phy_dev
);
993 spin_lock_irqsave(&aup
->lock
, flags
);
995 reset_mac_unlocked (dev
);
997 /* stop the device */
998 netif_stop_queue(dev
);
1000 /* disable the interrupt */
1001 free_irq(dev
->irq
, dev
);
1002 spin_unlock_irqrestore(&aup
->lock
, flags
);
1007 static void __exit
au1000_cleanup_module(void)
1010 struct net_device
*dev
;
1011 struct au1000_private
*aup
;
1013 for (i
= 0; i
< num_ifs
; i
++) {
1014 dev
= iflist
[i
].dev
;
1016 aup
= (struct au1000_private
*) dev
->priv
;
1017 unregister_netdev(dev
);
1018 mdiobus_unregister(aup
->mii_bus
);
1019 mdiobus_free(aup
->mii_bus
);
1020 for (j
= 0; j
< NUM_RX_DMA
; j
++)
1021 if (aup
->rx_db_inuse
[j
])
1022 ReleaseDB(aup
, aup
->rx_db_inuse
[j
]);
1023 for (j
= 0; j
< NUM_TX_DMA
; j
++)
1024 if (aup
->tx_db_inuse
[j
])
1025 ReleaseDB(aup
, aup
->tx_db_inuse
[j
]);
1026 dma_free_noncoherent(NULL
, MAX_BUF_SIZE
*
1027 (NUM_TX_BUFFS
+ NUM_RX_BUFFS
),
1028 (void *)aup
->vaddr
, aup
->dma_addr
);
1029 release_mem_region(dev
->base_addr
, MAC_IOSIZE
);
1030 release_mem_region(CPHYSADDR(iflist
[i
].macen_addr
), 4);
1036 static void update_tx_stats(struct net_device
*dev
, u32 status
)
1038 struct au1000_private
*aup
= (struct au1000_private
*) dev
->priv
;
1039 struct net_device_stats
*ps
= &dev
->stats
;
1041 if (status
& TX_FRAME_ABORTED
) {
1042 if (!aup
->phy_dev
|| (DUPLEX_FULL
== aup
->phy_dev
->duplex
)) {
1043 if (status
& (TX_JAB_TIMEOUT
| TX_UNDERRUN
)) {
1044 /* any other tx errors are only valid
1045 * in half duplex mode */
1047 ps
->tx_aborted_errors
++;
1052 ps
->tx_aborted_errors
++;
1053 if (status
& (TX_NO_CARRIER
| TX_LOSS_CARRIER
))
1054 ps
->tx_carrier_errors
++;
1061 * Called from the interrupt service routine to acknowledge
1062 * the TX DONE bits. This is a must if the irq is setup as
1065 static void au1000_tx_ack(struct net_device
*dev
)
1067 struct au1000_private
*aup
= (struct au1000_private
*) dev
->priv
;
1068 volatile tx_dma_t
*ptxd
;
1070 ptxd
= aup
->tx_dma_ring
[aup
->tx_tail
];
1072 while (ptxd
->buff_stat
& TX_T_DONE
) {
1073 update_tx_stats(dev
, ptxd
->status
);
1074 ptxd
->buff_stat
&= ~TX_T_DONE
;
1078 aup
->tx_tail
= (aup
->tx_tail
+ 1) & (NUM_TX_DMA
- 1);
1079 ptxd
= aup
->tx_dma_ring
[aup
->tx_tail
];
1083 netif_wake_queue(dev
);
1090 * Au1000 transmit routine.
1092 static int au1000_tx(struct sk_buff
*skb
, struct net_device
*dev
)
1094 struct au1000_private
*aup
= (struct au1000_private
*) dev
->priv
;
1095 struct net_device_stats
*ps
= &dev
->stats
;
1096 volatile tx_dma_t
*ptxd
;
1101 if (au1000_debug
> 5)
1102 printk("%s: tx: aup %x len=%d, data=%p, head %d\n",
1103 dev
->name
, (unsigned)aup
, skb
->len
,
1104 skb
->data
, aup
->tx_head
);
1106 ptxd
= aup
->tx_dma_ring
[aup
->tx_head
];
1107 buff_stat
= ptxd
->buff_stat
;
1108 if (buff_stat
& TX_DMA_ENABLE
) {
1109 /* We've wrapped around and the transmitter is still busy */
1110 netif_stop_queue(dev
);
1114 else if (buff_stat
& TX_T_DONE
) {
1115 update_tx_stats(dev
, ptxd
->status
);
1121 netif_wake_queue(dev
);
1124 pDB
= aup
->tx_db_inuse
[aup
->tx_head
];
1125 skb_copy_from_linear_data(skb
, pDB
->vaddr
, skb
->len
);
1126 if (skb
->len
< ETH_ZLEN
) {
1127 for (i
=skb
->len
; i
<ETH_ZLEN
; i
++) {
1128 ((char *)pDB
->vaddr
)[i
] = 0;
1130 ptxd
->len
= ETH_ZLEN
;
1133 ptxd
->len
= skb
->len
;
1136 ps
->tx_bytes
+= ptxd
->len
;
1138 ptxd
->buff_stat
= pDB
->dma_addr
| TX_DMA_ENABLE
;
1141 aup
->tx_head
= (aup
->tx_head
+ 1) & (NUM_TX_DMA
- 1);
1142 dev
->trans_start
= jiffies
;
1146 static inline void update_rx_stats(struct net_device
*dev
, u32 status
)
1148 struct au1000_private
*aup
= (struct au1000_private
*) dev
->priv
;
1149 struct net_device_stats
*ps
= &dev
->stats
;
1152 if (status
& RX_MCAST_FRAME
)
1155 if (status
& RX_ERROR
) {
1157 if (status
& RX_MISSED_FRAME
)
1158 ps
->rx_missed_errors
++;
1159 if (status
& (RX_OVERLEN
| RX_OVERLEN
| RX_LEN_ERROR
))
1160 ps
->rx_length_errors
++;
1161 if (status
& RX_CRC_ERROR
)
1162 ps
->rx_crc_errors
++;
1163 if (status
& RX_COLL
)
1167 ps
->rx_bytes
+= status
& RX_FRAME_LEN_MASK
;
1172 * Au1000 receive routine.
1174 static int au1000_rx(struct net_device
*dev
)
1176 struct au1000_private
*aup
= (struct au1000_private
*) dev
->priv
;
1177 struct sk_buff
*skb
;
1178 volatile rx_dma_t
*prxd
;
1179 u32 buff_stat
, status
;
1183 if (au1000_debug
> 5)
1184 printk("%s: au1000_rx head %d\n", dev
->name
, aup
->rx_head
);
1186 prxd
= aup
->rx_dma_ring
[aup
->rx_head
];
1187 buff_stat
= prxd
->buff_stat
;
1188 while (buff_stat
& RX_T_DONE
) {
1189 status
= prxd
->status
;
1190 pDB
= aup
->rx_db_inuse
[aup
->rx_head
];
1191 update_rx_stats(dev
, status
);
1192 if (!(status
& RX_ERROR
)) {
1195 frmlen
= (status
& RX_FRAME_LEN_MASK
);
1196 frmlen
-= 4; /* Remove FCS */
1197 skb
= dev_alloc_skb(frmlen
+ 2);
1200 "%s: Memory squeeze, dropping packet.\n",
1202 dev
->stats
.rx_dropped
++;
1205 skb_reserve(skb
, 2); /* 16 byte IP header align */
1206 skb_copy_to_linear_data(skb
,
1207 (unsigned char *)pDB
->vaddr
, frmlen
);
1208 skb_put(skb
, frmlen
);
1209 skb
->protocol
= eth_type_trans(skb
, dev
);
1210 netif_rx(skb
); /* pass the packet to upper layers */
1213 if (au1000_debug
> 4) {
1214 if (status
& RX_MISSED_FRAME
)
1215 printk("rx miss\n");
1216 if (status
& RX_WDOG_TIMER
)
1217 printk("rx wdog\n");
1218 if (status
& RX_RUNT
)
1219 printk("rx runt\n");
1220 if (status
& RX_OVERLEN
)
1221 printk("rx overlen\n");
1222 if (status
& RX_COLL
)
1223 printk("rx coll\n");
1224 if (status
& RX_MII_ERROR
)
1225 printk("rx mii error\n");
1226 if (status
& RX_CRC_ERROR
)
1227 printk("rx crc error\n");
1228 if (status
& RX_LEN_ERROR
)
1229 printk("rx len error\n");
1230 if (status
& RX_U_CNTRL_FRAME
)
1231 printk("rx u control frame\n");
1232 if (status
& RX_MISSED_FRAME
)
1233 printk("rx miss\n");
1236 prxd
->buff_stat
= (u32
)(pDB
->dma_addr
| RX_DMA_ENABLE
);
1237 aup
->rx_head
= (aup
->rx_head
+ 1) & (NUM_RX_DMA
- 1);
1240 /* next descriptor */
1241 prxd
= aup
->rx_dma_ring
[aup
->rx_head
];
1242 buff_stat
= prxd
->buff_stat
;
1249 * Au1000 interrupt service routine.
1251 static irqreturn_t
au1000_interrupt(int irq
, void *dev_id
)
1253 struct net_device
*dev
= dev_id
;
1255 /* Handle RX interrupts first to minimize chance of overrun */
1259 return IRQ_RETVAL(1);
1264 * The Tx ring has been full longer than the watchdog timeout
1265 * value. The transmitter must be hung?
1267 static void au1000_tx_timeout(struct net_device
*dev
)
1269 printk(KERN_ERR
"%s: au1000_tx_timeout: dev=%p\n", dev
->name
, dev
);
1272 dev
->trans_start
= jiffies
;
1273 netif_wake_queue(dev
);
1276 static void set_rx_mode(struct net_device
*dev
)
1278 struct au1000_private
*aup
= (struct au1000_private
*) dev
->priv
;
1280 if (au1000_debug
> 4)
1281 printk("%s: set_rx_mode: flags=%x\n", dev
->name
, dev
->flags
);
1283 if (dev
->flags
& IFF_PROMISC
) { /* Set promiscuous. */
1284 aup
->mac
->control
|= MAC_PROMISCUOUS
;
1285 } else if ((dev
->flags
& IFF_ALLMULTI
) ||
1286 dev
->mc_count
> MULTICAST_FILTER_LIMIT
) {
1287 aup
->mac
->control
|= MAC_PASS_ALL_MULTI
;
1288 aup
->mac
->control
&= ~MAC_PROMISCUOUS
;
1289 printk(KERN_INFO
"%s: Pass all multicast\n", dev
->name
);
1292 struct dev_mc_list
*mclist
;
1293 u32 mc_filter
[2]; /* Multicast hash filter */
1295 mc_filter
[1] = mc_filter
[0] = 0;
1296 for (i
= 0, mclist
= dev
->mc_list
; mclist
&& i
< dev
->mc_count
;
1297 i
++, mclist
= mclist
->next
) {
1298 set_bit(ether_crc(ETH_ALEN
, mclist
->dmi_addr
)>>26,
1301 aup
->mac
->multi_hash_high
= mc_filter
[1];
1302 aup
->mac
->multi_hash_low
= mc_filter
[0];
1303 aup
->mac
->control
&= ~MAC_PROMISCUOUS
;
1304 aup
->mac
->control
|= MAC_HASH_MODE
;
1308 static int au1000_ioctl(struct net_device
*dev
, struct ifreq
*rq
, int cmd
)
1310 struct au1000_private
*aup
= (struct au1000_private
*)dev
->priv
;
1312 if (!netif_running(dev
)) return -EINVAL
;
1314 if (!aup
->phy_dev
) return -EINVAL
; // PHY not controllable
1316 return phy_mii_ioctl(aup
->phy_dev
, if_mii(rq
), cmd
);
1319 module_init(au1000_init_module
);
1320 module_exit(au1000_cleanup_module
);