Merge branch 'fixes' of git://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-arm
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / arm / mach-sa1100 / assabet.c
blobebafe8aa8956e1d9f7e24987e777ce7d87f27369
1 /*
2 * linux/arch/arm/mach-sa1100/assabet.c
4 * Author: Nicolas Pitre
6 * This file contains all Assabet-specific tweaks.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 #include <linux/init.h>
13 #include <linux/kernel.h>
14 #include <linux/module.h>
15 #include <linux/errno.h>
16 #include <linux/ioport.h>
17 #include <linux/serial_core.h>
18 #include <linux/mtd/mtd.h>
19 #include <linux/mtd/partitions.h>
20 #include <linux/delay.h>
21 #include <linux/mm.h>
23 #include <mach/hardware.h>
24 #include <asm/mach-types.h>
25 #include <asm/irq.h>
26 #include <asm/setup.h>
27 #include <asm/page.h>
28 #include <asm/pgtable-hwdef.h>
29 #include <asm/pgtable.h>
30 #include <asm/tlbflush.h>
32 #include <asm/mach/arch.h>
33 #include <asm/mach/flash.h>
34 #include <asm/mach/irda.h>
35 #include <asm/mach/map.h>
36 #include <asm/mach/serial_sa1100.h>
37 #include <mach/assabet.h>
38 #include <mach/mcp.h>
40 #include "generic.h"
42 #define ASSABET_BCR_DB1110 \
43 (ASSABET_BCR_SPK_OFF | ASSABET_BCR_QMUTE | \
44 ASSABET_BCR_LED_GREEN | ASSABET_BCR_LED_RED | \
45 ASSABET_BCR_RS232EN | ASSABET_BCR_LCD_12RGB | \
46 ASSABET_BCR_IRDA_MD0)
48 #define ASSABET_BCR_DB1111 \
49 (ASSABET_BCR_SPK_OFF | ASSABET_BCR_QMUTE | \
50 ASSABET_BCR_LED_GREEN | ASSABET_BCR_LED_RED | \
51 ASSABET_BCR_RS232EN | ASSABET_BCR_LCD_12RGB | \
52 ASSABET_BCR_CF_BUS_OFF | ASSABET_BCR_STEREO_LB | \
53 ASSABET_BCR_IRDA_MD0 | ASSABET_BCR_CF_RST)
55 unsigned long SCR_value = ASSABET_SCR_INIT;
56 EXPORT_SYMBOL(SCR_value);
58 static unsigned long BCR_value = ASSABET_BCR_DB1110;
60 void ASSABET_BCR_frob(unsigned int mask, unsigned int val)
62 unsigned long flags;
64 local_irq_save(flags);
65 BCR_value = (BCR_value & ~mask) | val;
66 ASSABET_BCR = BCR_value;
67 local_irq_restore(flags);
70 EXPORT_SYMBOL(ASSABET_BCR_frob);
72 static void assabet_backlight_power(int on)
74 #ifndef ASSABET_PAL_VIDEO
75 if (on)
76 ASSABET_BCR_set(ASSABET_BCR_LIGHT_ON);
77 else
78 #endif
79 ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
83 * Turn on/off the backlight. When turning the backlight on,
84 * we wait 500us after turning it on so we don't cause the
85 * supplies to droop when we enable the LCD controller (and
86 * cause a hard reset.)
88 static void assabet_lcd_power(int on)
90 #ifndef ASSABET_PAL_VIDEO
91 if (on) {
92 ASSABET_BCR_set(ASSABET_BCR_LCD_ON);
93 udelay(500);
94 } else
95 #endif
96 ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
101 * Assabet flash support code.
104 #ifdef ASSABET_REV_4
106 * Phase 4 Assabet has two 28F160B3 flash parts in bank 0:
108 static struct mtd_partition assabet_partitions[] = {
110 .name = "bootloader",
111 .size = 0x00020000,
112 .offset = 0,
113 .mask_flags = MTD_WRITEABLE,
114 }, {
115 .name = "bootloader params",
116 .size = 0x00020000,
117 .offset = MTDPART_OFS_APPEND,
118 .mask_flags = MTD_WRITEABLE,
119 }, {
120 .name = "jffs",
121 .size = MTDPART_SIZ_FULL,
122 .offset = MTDPART_OFS_APPEND,
125 #else
127 * Phase 5 Assabet has two 28F128J3A flash parts in bank 0:
129 static struct mtd_partition assabet_partitions[] = {
131 .name = "bootloader",
132 .size = 0x00040000,
133 .offset = 0,
134 .mask_flags = MTD_WRITEABLE,
135 }, {
136 .name = "bootloader params",
137 .size = 0x00040000,
138 .offset = MTDPART_OFS_APPEND,
139 .mask_flags = MTD_WRITEABLE,
140 }, {
141 .name = "jffs",
142 .size = MTDPART_SIZ_FULL,
143 .offset = MTDPART_OFS_APPEND,
146 #endif
148 static struct flash_platform_data assabet_flash_data = {
149 .map_name = "cfi_probe",
150 .parts = assabet_partitions,
151 .nr_parts = ARRAY_SIZE(assabet_partitions),
154 static struct resource assabet_flash_resources[] = {
156 .start = SA1100_CS0_PHYS,
157 .end = SA1100_CS0_PHYS + SZ_32M - 1,
158 .flags = IORESOURCE_MEM,
159 }, {
160 .start = SA1100_CS1_PHYS,
161 .end = SA1100_CS1_PHYS + SZ_32M - 1,
162 .flags = IORESOURCE_MEM,
168 * Assabet IrDA support code.
171 static int assabet_irda_set_power(struct device *dev, unsigned int state)
173 static unsigned int bcr_state[4] = {
174 ASSABET_BCR_IRDA_MD0,
175 ASSABET_BCR_IRDA_MD1|ASSABET_BCR_IRDA_MD0,
176 ASSABET_BCR_IRDA_MD1,
180 if (state < 4) {
181 state = bcr_state[state];
182 ASSABET_BCR_clear(state ^ (ASSABET_BCR_IRDA_MD1|
183 ASSABET_BCR_IRDA_MD0));
184 ASSABET_BCR_set(state);
186 return 0;
189 static void assabet_irda_set_speed(struct device *dev, unsigned int speed)
191 if (speed < 4000000)
192 ASSABET_BCR_clear(ASSABET_BCR_IRDA_FSEL);
193 else
194 ASSABET_BCR_set(ASSABET_BCR_IRDA_FSEL);
197 static struct irda_platform_data assabet_irda_data = {
198 .set_power = assabet_irda_set_power,
199 .set_speed = assabet_irda_set_speed,
202 static struct mcp_plat_data assabet_mcp_data = {
203 .mccr0 = MCCR0_ADM,
204 .sclk_rate = 11981000,
205 .codec = "ucb1x00",
208 static void __init assabet_init(void)
211 * Ensure that the power supply is in "high power" mode.
213 GPDR |= GPIO_GPIO16;
214 GPSR = GPIO_GPIO16;
217 * Ensure that these pins are set as outputs and are driving
218 * logic 0. This ensures that we won't inadvertently toggle
219 * the WS latch in the CPLD, and we don't float causing
220 * excessive power drain. --rmk
222 GPDR |= GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
223 GPCR = GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
226 * Set up registers for sleep mode.
228 PWER = PWER_GPIO0;
229 PGSR = 0;
230 PCFR = 0;
231 PSDR = 0;
232 PPDR |= PPC_TXD3 | PPC_TXD1;
233 PPSR |= PPC_TXD3 | PPC_TXD1;
235 sa1100fb_lcd_power = assabet_lcd_power;
236 sa1100fb_backlight_power = assabet_backlight_power;
238 if (machine_has_neponset()) {
240 * Angel sets this, but other bootloaders may not.
242 * This must precede any driver calls to BCR_set()
243 * or BCR_clear().
245 ASSABET_BCR = BCR_value = ASSABET_BCR_DB1111;
247 #ifndef CONFIG_ASSABET_NEPONSET
248 printk( "Warning: Neponset detected but full support "
249 "hasn't been configured in the kernel\n" );
250 #endif
253 sa11x0_register_mtd(&assabet_flash_data, assabet_flash_resources,
254 ARRAY_SIZE(assabet_flash_resources));
255 sa11x0_register_irda(&assabet_irda_data);
258 * Setup the PPC unit correctly.
260 PPDR &= ~PPC_RXD4;
261 PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM;
262 PSDR |= PPC_RXD4;
263 PSDR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
264 PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
266 ASSABET_BCR_set(ASSABET_BCR_CODEC_RST);
267 sa11x0_register_mcp(&assabet_mcp_data);
271 * On Assabet, we must probe for the Neponset board _before_
272 * paging_init() has occurred to actually determine the amount
273 * of RAM available. To do so, we map the appropriate IO section
274 * in the page table here in order to access GPIO registers.
276 static void __init map_sa1100_gpio_regs( void )
278 unsigned long phys = __PREG(GPLR) & PMD_MASK;
279 unsigned long virt = io_p2v(phys);
280 int prot = PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_DOMAIN(DOMAIN_IO);
281 pmd_t *pmd;
283 pmd = pmd_offset(pud_offset(pgd_offset_k(virt), virt), virt);
284 *pmd = __pmd(phys | prot);
285 flush_pmd_entry(pmd);
289 * Read System Configuration "Register"
290 * (taken from "Intel StrongARM SA-1110 Microprocessor Development Board
291 * User's Guide", section 4.4.1)
293 * This same scan is performed in arch/arm/boot/compressed/head-sa1100.S
294 * to set up the serial port for decompression status messages. We
295 * repeat it here because the kernel may not be loaded as a zImage, and
296 * also because it's a hassle to communicate the SCR value to the kernel
297 * from the decompressor.
299 * Note that IRQs are guaranteed to be disabled.
301 static void __init get_assabet_scr(void)
303 unsigned long scr, i;
305 GPDR |= 0x3fc; /* Configure GPIO 9:2 as outputs */
306 GPSR = 0x3fc; /* Write 0xFF to GPIO 9:2 */
307 GPDR &= ~(0x3fc); /* Configure GPIO 9:2 as inputs */
308 for(i = 100; i--; ) /* Read GPIO 9:2 */
309 scr = GPLR;
310 GPDR |= 0x3fc; /* restore correct pin direction */
311 scr &= 0x3fc; /* save as system configuration byte. */
312 SCR_value = scr;
315 static void __init
316 fixup_assabet(struct tag *tags, char **cmdline, struct meminfo *mi)
318 /* This must be done before any call to machine_has_neponset() */
319 map_sa1100_gpio_regs();
320 get_assabet_scr();
322 if (machine_has_neponset())
323 printk("Neponset expansion board detected\n");
327 static void assabet_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
329 if (port->mapbase == _Ser1UTCR0) {
330 if (state)
331 ASSABET_BCR_clear(ASSABET_BCR_RS232EN |
332 ASSABET_BCR_COM_RTS |
333 ASSABET_BCR_COM_DTR);
334 else
335 ASSABET_BCR_set(ASSABET_BCR_RS232EN |
336 ASSABET_BCR_COM_RTS |
337 ASSABET_BCR_COM_DTR);
342 * Assabet uses COM_RTS and COM_DTR for both UART1 (com port)
343 * and UART3 (radio module). We only handle them for UART1 here.
345 static void assabet_set_mctrl(struct uart_port *port, u_int mctrl)
347 if (port->mapbase == _Ser1UTCR0) {
348 u_int set = 0, clear = 0;
350 if (mctrl & TIOCM_RTS)
351 clear |= ASSABET_BCR_COM_RTS;
352 else
353 set |= ASSABET_BCR_COM_RTS;
355 if (mctrl & TIOCM_DTR)
356 clear |= ASSABET_BCR_COM_DTR;
357 else
358 set |= ASSABET_BCR_COM_DTR;
360 ASSABET_BCR_clear(clear);
361 ASSABET_BCR_set(set);
365 static u_int assabet_get_mctrl(struct uart_port *port)
367 u_int ret = 0;
368 u_int bsr = ASSABET_BSR;
370 /* need 2 reads to read current value */
371 bsr = ASSABET_BSR;
373 if (port->mapbase == _Ser1UTCR0) {
374 if (bsr & ASSABET_BSR_COM_DCD)
375 ret |= TIOCM_CD;
376 if (bsr & ASSABET_BSR_COM_CTS)
377 ret |= TIOCM_CTS;
378 if (bsr & ASSABET_BSR_COM_DSR)
379 ret |= TIOCM_DSR;
380 } else if (port->mapbase == _Ser3UTCR0) {
381 if (bsr & ASSABET_BSR_RAD_DCD)
382 ret |= TIOCM_CD;
383 if (bsr & ASSABET_BSR_RAD_CTS)
384 ret |= TIOCM_CTS;
385 if (bsr & ASSABET_BSR_RAD_DSR)
386 ret |= TIOCM_DSR;
387 if (bsr & ASSABET_BSR_RAD_RI)
388 ret |= TIOCM_RI;
389 } else {
390 ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR;
393 return ret;
396 static struct sa1100_port_fns assabet_port_fns __initdata = {
397 .set_mctrl = assabet_set_mctrl,
398 .get_mctrl = assabet_get_mctrl,
399 .pm = assabet_uart_pm,
402 static struct map_desc assabet_io_desc[] __initdata = {
403 { /* Board Control Register */
404 .virtual = 0xf1000000,
405 .pfn = __phys_to_pfn(0x12000000),
406 .length = 0x00100000,
407 .type = MT_DEVICE
408 }, { /* MQ200 */
409 .virtual = 0xf2800000,
410 .pfn = __phys_to_pfn(0x4b800000),
411 .length = 0x00800000,
412 .type = MT_DEVICE
416 static void __init assabet_map_io(void)
418 sa1100_map_io();
419 iotable_init(assabet_io_desc, ARRAY_SIZE(assabet_io_desc));
422 * Set SUS bit in SDCR0 so serial port 1 functions.
423 * Its called GPCLKR0 in my SA1110 manual.
425 Ser1SDCR0 |= SDCR0_SUS;
427 if (machine_has_neponset()) {
428 #ifdef CONFIG_ASSABET_NEPONSET
429 extern void neponset_map_io(void);
432 * We map Neponset registers even if it isn't present since
433 * many drivers will try to probe their stuff (and fail).
434 * This is still more friendly than a kernel paging request
435 * crash.
437 neponset_map_io();
438 #endif
439 } else {
440 sa1100_register_uart_fns(&assabet_port_fns);
444 * When Neponset is attached, the first UART should be
445 * UART3. That's what Angel is doing and many documents
446 * are stating this.
448 * We do the Neponset mapping even if Neponset support
449 * isn't compiled in so the user will still get something on
450 * the expected physical serial port.
452 * We no longer do this; not all boot loaders support it,
453 * and UART3 appears to be somewhat unreliable with blob.
455 sa1100_register_uart(0, 1);
456 sa1100_register_uart(2, 3);
460 MACHINE_START(ASSABET, "Intel-Assabet")
461 .atag_offset = 0x100,
462 .fixup = fixup_assabet,
463 .map_io = assabet_map_io,
464 .init_irq = sa1100_init_irq,
465 .timer = &sa1100_timer,
466 .init_machine = assabet_init,
467 #ifdef CONFIG_SA1111
468 .dma_zone_size = SZ_1M,
469 #endif
470 .restart = sa11x0_restart,
471 MACHINE_END