2 * pata-cs5535.c - CS5535 PATA for new ATA layer
3 * (C) 2005-2006 Red Hat Inc
4 * Alan Cox <alan@redhat.com>
6 * based upon cs5535.c from AMD <Jens.Altmann@amd.com> as cleaned up and
7 * made readable and Linux style by Wolfgang Zuleger <wolfgang.zuleger@gmx.de
8 * and Alexander Kiausch <alex.kiausch@t-online.de>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 * Loosely based on the piix & svwks drivers.
26 * Available from AMD web site.
28 * Review errata to see if serializing is neccessary
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/pci.h>
34 #include <linux/init.h>
35 #include <linux/blkdev.h>
36 #include <linux/delay.h>
37 #include <scsi/scsi_host.h>
38 #include <linux/libata.h>
41 #define DRV_NAME "cs5535"
42 #define DRV_VERSION "0.2.11"
45 * The Geode (Aka Athlon GX now) uses an internal MSR based
46 * bus system for control. Demented but there you go.
49 #define MSR_ATAC_BASE 0x51300000
50 #define ATAC_GLD_MSR_CAP (MSR_ATAC_BASE+0)
51 #define ATAC_GLD_MSR_CONFIG (MSR_ATAC_BASE+0x01)
52 #define ATAC_GLD_MSR_SMI (MSR_ATAC_BASE+0x02)
53 #define ATAC_GLD_MSR_ERROR (MSR_ATAC_BASE+0x03)
54 #define ATAC_GLD_MSR_PM (MSR_ATAC_BASE+0x04)
55 #define ATAC_GLD_MSR_DIAG (MSR_ATAC_BASE+0x05)
56 #define ATAC_IO_BAR (MSR_ATAC_BASE+0x08)
57 #define ATAC_RESET (MSR_ATAC_BASE+0x10)
58 #define ATAC_CH0D0_PIO (MSR_ATAC_BASE+0x20)
59 #define ATAC_CH0D0_DMA (MSR_ATAC_BASE+0x21)
60 #define ATAC_CH0D1_PIO (MSR_ATAC_BASE+0x22)
61 #define ATAC_CH0D1_DMA (MSR_ATAC_BASE+0x23)
62 #define ATAC_PCI_ABRTERR (MSR_ATAC_BASE+0x24)
64 #define ATAC_BM0_CMD_PRIM 0x00
65 #define ATAC_BM0_STS_PRIM 0x02
66 #define ATAC_BM0_PRD 0x04
68 #define CS5535_CABLE_DETECT 0x48
70 #define CS5535_BAD_PIO(timings) ( (timings&~0x80000000UL)==0x00009172 )
73 * cs5535_cable_detect - detect cable type
74 * @ap: Port to detect on
76 * Perform cable detection for ATA66 capable cable. Return a libata
80 static int cs5535_cable_detect(struct ata_port
*ap
)
83 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
85 pci_read_config_byte(pdev
, CS5535_CABLE_DETECT
, &cable
);
87 return ATA_CBL_PATA80
;
89 return ATA_CBL_PATA40
;
93 * cs5535_set_piomode - PIO setup
95 * @adev: device on the interface
97 * Set our PIO requirements. The CS5535 is pretty clean about all this
100 static void cs5535_set_piomode(struct ata_port
*ap
, struct ata_device
*adev
)
102 static const u16 pio_timings
[5] = {
103 0xF7F4, 0x53F3, 0x13F1, 0x5131, 0x1131
105 static const u16 pio_cmd_timings
[5] = {
106 0xF7F4, 0x53F3, 0x13F1, 0x5131, 0x1131
109 struct ata_device
*pair
= ata_dev_pair(adev
);
111 int mode
= adev
->pio_mode
- XFER_PIO_0
;
114 /* Command timing has to be for the lowest of the pair of devices */
116 int pairmode
= pair
->pio_mode
- XFER_PIO_0
;
117 cmdmode
= min(mode
, pairmode
);
118 /* Write the other drive timing register if it changed */
119 if (cmdmode
< pairmode
)
120 wrmsr(ATAC_CH0D0_PIO
+ 2 * pair
->devno
,
121 pio_cmd_timings
[cmdmode
] << 16 | pio_timings
[pairmode
], 0);
123 /* Write the drive timing register */
124 wrmsr(ATAC_CH0D0_PIO
+ 2 * adev
->devno
,
125 pio_cmd_timings
[cmdmode
] << 16 | pio_timings
[mode
], 0);
127 /* Set the PIO "format 1" bit in the DMA timing register */
128 rdmsr(ATAC_CH0D0_DMA
+ 2 * adev
->devno
, reg
, dummy
);
129 wrmsr(ATAC_CH0D0_DMA
+ 2 * adev
->devno
, reg
| 0x80000000UL
, 0);
133 * cs5535_set_dmamode - DMA timing setup
135 * @adev: Device being configured
139 static void cs5535_set_dmamode(struct ata_port
*ap
, struct ata_device
*adev
)
141 static const u32 udma_timings
[5] = {
142 0x7F7436A1, 0x7F733481, 0x7F723261, 0x7F713161, 0x7F703061
144 static const u32 mwdma_timings
[3] = {
145 0x7F0FFFF3, 0x7F035352, 0x7F024241
148 int mode
= adev
->dma_mode
;
150 rdmsr(ATAC_CH0D0_DMA
+ 2 * adev
->devno
, reg
, dummy
);
152 if (mode
>= XFER_UDMA_0
)
153 reg
|= udma_timings
[mode
- XFER_UDMA_0
];
155 reg
|= mwdma_timings
[mode
- XFER_MW_DMA_0
];
156 wrmsr(ATAC_CH0D0_DMA
+ 2 * adev
->devno
, reg
, 0);
159 static struct scsi_host_template cs5535_sht
= {
160 .module
= THIS_MODULE
,
162 .ioctl
= ata_scsi_ioctl
,
163 .queuecommand
= ata_scsi_queuecmd
,
164 .can_queue
= ATA_DEF_QUEUE
,
165 .this_id
= ATA_SHT_THIS_ID
,
166 .sg_tablesize
= LIBATA_MAX_PRD
,
167 .cmd_per_lun
= ATA_SHT_CMD_PER_LUN
,
168 .emulated
= ATA_SHT_EMULATED
,
169 .use_clustering
= ATA_SHT_USE_CLUSTERING
,
170 .proc_name
= DRV_NAME
,
171 .dma_boundary
= ATA_DMA_BOUNDARY
,
172 .slave_configure
= ata_scsi_slave_config
,
173 .slave_destroy
= ata_scsi_slave_destroy
,
174 .bios_param
= ata_std_bios_param
,
176 .resume
= ata_scsi_device_resume
,
177 .suspend
= ata_scsi_device_suspend
,
181 static struct ata_port_operations cs5535_port_ops
= {
182 .port_disable
= ata_port_disable
,
183 .set_piomode
= cs5535_set_piomode
,
184 .set_dmamode
= cs5535_set_dmamode
,
185 .mode_filter
= ata_pci_default_filter
,
187 .tf_load
= ata_tf_load
,
188 .tf_read
= ata_tf_read
,
189 .check_status
= ata_check_status
,
190 .exec_command
= ata_exec_command
,
191 .dev_select
= ata_std_dev_select
,
193 .freeze
= ata_bmdma_freeze
,
194 .thaw
= ata_bmdma_thaw
,
195 .error_handler
= ata_bmdma_error_handler
,
196 .post_internal_cmd
= ata_bmdma_post_internal_cmd
,
197 .cable_detect
= cs5535_cable_detect
,
199 .bmdma_setup
= ata_bmdma_setup
,
200 .bmdma_start
= ata_bmdma_start
,
201 .bmdma_stop
= ata_bmdma_stop
,
202 .bmdma_status
= ata_bmdma_status
,
204 .qc_prep
= ata_qc_prep
,
205 .qc_issue
= ata_qc_issue_prot
,
207 .data_xfer
= ata_data_xfer
,
209 .irq_handler
= ata_interrupt
,
210 .irq_clear
= ata_bmdma_irq_clear
,
211 .irq_on
= ata_irq_on
,
212 .irq_ack
= ata_irq_ack
,
214 .port_start
= ata_port_start
,
218 * cs5535_init_one - Initialise a CS5530
220 * @id: Entry in match table
222 * Install a driver for the newly found CS5530 companion chip. Most of
223 * this is just housekeeping. We have to set the chip up correctly and
224 * turn off various bits of emulation magic.
227 static int cs5535_init_one(struct pci_dev
*dev
, const struct pci_device_id
*id
)
229 static struct ata_port_info info
= {
231 .flags
= ATA_FLAG_SLAVE_POSS
|ATA_FLAG_SRST
,
235 .port_ops
= &cs5535_port_ops
237 struct ata_port_info
*ports
[1] = { &info
};
241 /* Check the BIOS set the initial timing clock. If not set the
243 rdmsr(ATAC_CH0D0_PIO
, timings
, dummy
);
244 if (CS5535_BAD_PIO(timings
))
245 wrmsr(ATAC_CH0D0_PIO
, 0xF7F4F7F4UL
, 0);
246 rdmsr(ATAC_CH0D1_PIO
, timings
, dummy
);
247 if (CS5535_BAD_PIO(timings
))
248 wrmsr(ATAC_CH0D1_PIO
, 0xF7F4F7F4UL
, 0);
249 return ata_pci_init_one(dev
, ports
, 1);
252 static const struct pci_device_id cs5535
[] = {
253 { PCI_VDEVICE(NS
, 0x002D), },
258 static struct pci_driver cs5535_pci_driver
= {
261 .probe
= cs5535_init_one
,
262 .remove
= ata_pci_remove_one
,
264 .suspend
= ata_pci_device_suspend
,
265 .resume
= ata_pci_device_resume
,
269 static int __init
cs5535_init(void)
271 return pci_register_driver(&cs5535_pci_driver
);
274 static void __exit
cs5535_exit(void)
276 pci_unregister_driver(&cs5535_pci_driver
);
279 MODULE_AUTHOR("Alan Cox, Jens Altmann, Wolfgan Zuleger, Alexander Kiausch");
280 MODULE_DESCRIPTION("low-level driver for the NS/AMD 5530");
281 MODULE_LICENSE("GPL");
282 MODULE_DEVICE_TABLE(pci
, cs5535
);
283 MODULE_VERSION(DRV_VERSION
);
285 module_init(cs5535_init
);
286 module_exit(cs5535_exit
);