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tty/serial: atmel_serial: whitespace and braces modifications
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / tty / serial / atmel_serial.c
blobbb723542ad24b2cf453552ff0bc43604de3cf575
1 /*
2 * Driver for Atmel AT91 / AT32 Serial ports
3 * Copyright (C) 2003 Rick Bronson
4 *
5 * Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd.
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
7 *
8 * DMA support added by Chip Coldwell.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 *
24 */
25 #include <linux/module.h>
26 #include <linux/tty.h>
27 #include <linux/ioport.h>
28 #include <linux/slab.h>
29 #include <linux/init.h>
30 #include <linux/serial.h>
31 #include <linux/clk.h>
32 #include <linux/console.h>
33 #include <linux/sysrq.h>
34 #include <linux/tty_flip.h>
35 #include <linux/platform_device.h>
36 #include <linux/dma-mapping.h>
37 #include <linux/atmel_pdc.h>
38 #include <linux/atmel_serial.h>
39 #include <linux/uaccess.h>
40
41 #include <asm/io.h>
42 #include <asm/ioctls.h>
43
44 #include <asm/mach/serial_at91.h>
45 #include <mach/board.h>
46
47 #ifdef CONFIG_ARM
48 #include <mach/cpu.h>
49 #include <mach/gpio.h>
50 #endif
51
52 #define PDC_BUFFER_SIZE 512
53 /* Revisit: We should calculate this based on the actual port settings */
54 #define PDC_RX_TIMEOUT (3 * 10) /* 3 bytes */
55
56 #if defined(CONFIG_SERIAL_ATMEL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
57 #define SUPPORT_SYSRQ
58 #endif
59
60 #include <linux/serial_core.h>
61
62 static void atmel_start_rx(struct uart_port *port);
63 static void atmel_stop_rx(struct uart_port *port);
64
65 #ifdef CONFIG_SERIAL_ATMEL_TTYAT
66
67 /* Use device name ttyAT, major 204 and minor 154-169. This is necessary if we
68 * should coexist with the 8250 driver, such as if we have an external 16C550
69 * UART. */
70 #define SERIAL_ATMEL_MAJOR 204
71 #define MINOR_START 154
72 #define ATMEL_DEVICENAME "ttyAT"
73
74 #else
75
76 /* Use device name ttyS, major 4, minor 64-68. This is the usual serial port
77 * name, but it is legally reserved for the 8250 driver. */
78 #define SERIAL_ATMEL_MAJOR TTY_MAJOR
79 #define MINOR_START 64
80 #define ATMEL_DEVICENAME "ttyS"
81
82 #endif
83
84 #define ATMEL_ISR_PASS_LIMIT 256
85
86 /* UART registers. CR is write-only, hence no GET macro */
87 #define UART_PUT_CR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_CR)
88 #define UART_GET_MR(port) __raw_readl((port)->membase + ATMEL_US_MR)
89 #define UART_PUT_MR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_MR)
90 #define UART_PUT_IER(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IER)
91 #define UART_PUT_IDR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IDR)
92 #define UART_GET_IMR(port) __raw_readl((port)->membase + ATMEL_US_IMR)
93 #define UART_GET_CSR(port) __raw_readl((port)->membase + ATMEL_US_CSR)
94 #define UART_GET_CHAR(port) __raw_readl((port)->membase + ATMEL_US_RHR)
95 #define UART_PUT_CHAR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_THR)
96 #define UART_GET_BRGR(port) __raw_readl((port)->membase + ATMEL_US_BRGR)
97 #define UART_PUT_BRGR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_BRGR)
98 #define UART_PUT_RTOR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_RTOR)
99 #define UART_PUT_TTGR(port, v) __raw_writel(v, (port)->membase + ATMEL_US_TTGR)
100
101 /* PDC registers */
102 #define UART_PUT_PTCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR)
103 #define UART_GET_PTSR(port) __raw_readl((port)->membase + ATMEL_PDC_PTSR)
104
105 #define UART_PUT_RPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RPR)
106 #define UART_GET_RPR(port) __raw_readl((port)->membase + ATMEL_PDC_RPR)
107 #define UART_PUT_RCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RCR)
108 #define UART_PUT_RNPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNPR)
109 #define UART_PUT_RNCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNCR)
110
111 #define UART_PUT_TPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TPR)
112 #define UART_PUT_TCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TCR)
113 #define UART_GET_TCR(port) __raw_readl((port)->membase + ATMEL_PDC_TCR)
114
115 static int (*atmel_open_hook)(struct uart_port *);
116 static void (*atmel_close_hook)(struct uart_port *);
117
118 struct atmel_dma_buffer {
119 unsigned char *buf;
120 dma_addr_t dma_addr;
121 unsigned int dma_size;
122 unsigned int ofs;
123 };
124
125 struct atmel_uart_char {
126 u16 status;
127 u16 ch;
128 };
129
130 #define ATMEL_SERIAL_RINGSIZE 1024
131
132 /*
133 * We wrap our port structure around the generic uart_port.
134 */
135 struct atmel_uart_port {
136 struct uart_port uart; /* uart */
137 struct clk *clk; /* uart clock */
138 int may_wakeup; /* cached value of device_may_wakeup for times we need to disable it */
139 u32 backup_imr; /* IMR saved during suspend */
140 int break_active; /* break being received */
141
142 short use_dma_rx; /* enable PDC receiver */
143 short pdc_rx_idx; /* current PDC RX buffer */
144 struct atmel_dma_buffer pdc_rx[2]; /* PDC receier */
145
146 short use_dma_tx; /* enable PDC transmitter */
147 struct atmel_dma_buffer pdc_tx; /* PDC transmitter */
148
149 struct tasklet_struct tasklet;
150 unsigned int irq_status;
151 unsigned int irq_status_prev;
152
153 struct circ_buf rx_ring;
154
155 struct serial_rs485 rs485; /* rs485 settings */
156 unsigned int tx_done_mask;
157 };
158
159 static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART];
160
161 #ifdef SUPPORT_SYSRQ
162 static struct console atmel_console;
163 #endif
164
165 static inline struct atmel_uart_port *
166 to_atmel_uart_port(struct uart_port *uart)
167 {
168 return container_of(uart, struct atmel_uart_port, uart);
169 }
170
171 #ifdef CONFIG_SERIAL_ATMEL_PDC
172 static bool atmel_use_dma_rx(struct uart_port *port)
173 {
174 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
175
176 return atmel_port->use_dma_rx;
177 }
178
179 static bool atmel_use_dma_tx(struct uart_port *port)
180 {
181 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
182
183 return atmel_port->use_dma_tx;
184 }
185 #else
186 static bool atmel_use_dma_rx(struct uart_port *port)
187 {
188 return false;
189 }
190
191 static bool atmel_use_dma_tx(struct uart_port *port)
192 {
193 return false;
194 }
195 #endif
196
197 /* Enable or disable the rs485 support */
198 void atmel_config_rs485(struct uart_port *port, struct serial_rs485 *rs485conf)
199 {
200 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
201 unsigned int mode;
202
203 spin_lock(&port->lock);
204
205 /* Disable interrupts */
206 UART_PUT_IDR(port, atmel_port->tx_done_mask);
207
208 mode = UART_GET_MR(port);
209
210 /* Resetting serial mode to RS232 (0x0) */
211 mode &= ~ATMEL_US_USMODE;
212
213 atmel_port->rs485 = *rs485conf;
214
215 if (rs485conf->flags & SER_RS485_ENABLED) {
216 dev_dbg(port->dev, "Setting UART to RS485\n");
217 atmel_port->tx_done_mask = ATMEL_US_TXEMPTY;
218 if (rs485conf->flags & SER_RS485_RTS_AFTER_SEND)
219 UART_PUT_TTGR(port, rs485conf->delay_rts_after_send);
220 mode |= ATMEL_US_USMODE_RS485;
221 } else {
222 dev_dbg(port->dev, "Setting UART to RS232\n");
223 if (atmel_use_dma_tx(port))
224 atmel_port->tx_done_mask = ATMEL_US_ENDTX |
225 ATMEL_US_TXBUFE;
226 else
227 atmel_port->tx_done_mask = ATMEL_US_TXRDY;
228 }
229 UART_PUT_MR(port, mode);
230
231 /* Enable interrupts */
232 UART_PUT_IER(port, atmel_port->tx_done_mask);
233
234 spin_unlock(&port->lock);
235
236 }
237
238 /*
239 * Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty.
240 */
241 static u_int atmel_tx_empty(struct uart_port *port)
242 {
243 return (UART_GET_CSR(port) & ATMEL_US_TXEMPTY) ? TIOCSER_TEMT : 0;
244 }
245
246 /*
247 * Set state of the modem control output lines
248 */
249 static void atmel_set_mctrl(struct uart_port *port, u_int mctrl)
250 {
251 unsigned int control = 0;
252 unsigned int mode;
253 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
254
255 #ifdef CONFIG_ARCH_AT91RM9200
256 if (cpu_is_at91rm9200()) {
257 /*
258 * AT91RM9200 Errata #39: RTS0 is not internally connected
259 * to PA21. We need to drive the pin manually.
260 */
261 if (port->mapbase == AT91RM9200_BASE_US0) {
262 if (mctrl & TIOCM_RTS)
263 at91_set_gpio_value(AT91_PIN_PA21, 0);
264 else
265 at91_set_gpio_value(AT91_PIN_PA21, 1);
266 }
267 }
268 #endif
269
270 if (mctrl & TIOCM_RTS)
271 control |= ATMEL_US_RTSEN;
272 else
273 control |= ATMEL_US_RTSDIS;
274
275 if (mctrl & TIOCM_DTR)
276 control |= ATMEL_US_DTREN;
277 else
278 control |= ATMEL_US_DTRDIS;
279
280 UART_PUT_CR(port, control);
281
282 /* Local loopback mode? */
283 mode = UART_GET_MR(port) & ~ATMEL_US_CHMODE;
284 if (mctrl & TIOCM_LOOP)
285 mode |= ATMEL_US_CHMODE_LOC_LOOP;
286 else
287 mode |= ATMEL_US_CHMODE_NORMAL;
288
289 /* Resetting serial mode to RS232 (0x0) */
290 mode &= ~ATMEL_US_USMODE;
291
292 if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
293 dev_dbg(port->dev, "Setting UART to RS485\n");
294 if (atmel_port->rs485.flags & SER_RS485_RTS_AFTER_SEND)
295 UART_PUT_TTGR(port,
296 atmel_port->rs485.delay_rts_after_send);
297 mode |= ATMEL_US_USMODE_RS485;
298 } else {
299 dev_dbg(port->dev, "Setting UART to RS232\n");
300 }
301 UART_PUT_MR(port, mode);
302 }
303
304 /*
305 * Get state of the modem control input lines
306 */
307 static u_int atmel_get_mctrl(struct uart_port *port)
308 {
309 unsigned int status, ret = 0;
310
311 status = UART_GET_CSR(port);
312
313 /*
314 * The control signals are active low.
315 */
316 if (!(status & ATMEL_US_DCD))
317 ret |= TIOCM_CD;
318 if (!(status & ATMEL_US_CTS))
319 ret |= TIOCM_CTS;
320 if (!(status & ATMEL_US_DSR))
321 ret |= TIOCM_DSR;
322 if (!(status & ATMEL_US_RI))
323 ret |= TIOCM_RI;
324
325 return ret;
326 }
327
328 /*
329 * Stop transmitting.
330 */
331 static void atmel_stop_tx(struct uart_port *port)
332 {
333 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
334
335 if (atmel_use_dma_tx(port)) {
336 /* disable PDC transmit */
337 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
338 }
339 /* Disable interrupts */
340 UART_PUT_IDR(port, atmel_port->tx_done_mask);
341
342 if ((atmel_port->rs485.flags & SER_RS485_ENABLED) &&
343 !(atmel_port->rs485.flags & SER_RS485_RX_DURING_TX))
344 atmel_start_rx(port);
345 }
346
347 /*
348 * Start transmitting.
349 */
350 static void atmel_start_tx(struct uart_port *port)
351 {
352 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
353
354 if (atmel_use_dma_tx(port)) {
355 if (UART_GET_PTSR(port) & ATMEL_PDC_TXTEN)
356 /* The transmitter is already running. Yes, we
357 really need this.*/
358 return;
359
360 if ((atmel_port->rs485.flags & SER_RS485_ENABLED) &&
361 !(atmel_port->rs485.flags & SER_RS485_RX_DURING_TX))
362 atmel_stop_rx(port);
363
364 /* re-enable PDC transmit */
365 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
366 }
367 /* Enable interrupts */
368 UART_PUT_IER(port, atmel_port->tx_done_mask);
369 }
370
371 /*
372 * start receiving - port is in process of being opened.
373 */
374 static void atmel_start_rx(struct uart_port *port)
375 {
376 UART_PUT_CR(port, ATMEL_US_RSTSTA); /* reset status and receiver */
377
378 if (atmel_use_dma_rx(port)) {
379 /* enable PDC controller */
380 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT |
381 port->read_status_mask);
382 UART_PUT_PTCR(port, ATMEL_PDC_RXTEN);
383 } else {
384 UART_PUT_IER(port, ATMEL_US_RXRDY);
385 }
386 }
387
388 /*
389 * Stop receiving - port is in process of being closed.
390 */
391 static void atmel_stop_rx(struct uart_port *port)
392 {
393 if (atmel_use_dma_rx(port)) {
394 /* disable PDC receive */
395 UART_PUT_PTCR(port, ATMEL_PDC_RXTDIS);
396 UART_PUT_IDR(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT |
397 port->read_status_mask);
398 } else {
399 UART_PUT_IDR(port, ATMEL_US_RXRDY);
400 }
401 }
402
403 /*
404 * Enable modem status interrupts
405 */
406 static void atmel_enable_ms(struct uart_port *port)
407 {
408 UART_PUT_IER(port, ATMEL_US_RIIC | ATMEL_US_DSRIC
409 | ATMEL_US_DCDIC | ATMEL_US_CTSIC);
410 }
411
412 /*
413 * Control the transmission of a break signal
414 */
415 static void atmel_break_ctl(struct uart_port *port, int break_state)
416 {
417 if (break_state != 0)
418 UART_PUT_CR(port, ATMEL_US_STTBRK); /* start break */
419 else
420 UART_PUT_CR(port, ATMEL_US_STPBRK); /* stop break */
421 }
422
423 /*
424 * Stores the incoming character in the ring buffer
425 */
426 static void
427 atmel_buffer_rx_char(struct uart_port *port, unsigned int status,
428 unsigned int ch)
429 {
430 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
431 struct circ_buf *ring = &atmel_port->rx_ring;
432 struct atmel_uart_char *c;
433
434 if (!CIRC_SPACE(ring->head, ring->tail, ATMEL_SERIAL_RINGSIZE))
435 /* Buffer overflow, ignore char */
436 return;
437
438 c = &((struct atmel_uart_char *)ring->buf)[ring->head];
439 c->status = status;
440 c->ch = ch;
441
442 /* Make sure the character is stored before we update head. */
443 smp_wmb();
444
445 ring->head = (ring->head + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
446 }
447
448 /*
449 * Deal with parity, framing and overrun errors.
450 */
451 static void atmel_pdc_rxerr(struct uart_port *port, unsigned int status)
452 {
453 /* clear error */
454 UART_PUT_CR(port, ATMEL_US_RSTSTA);
455
456 if (status & ATMEL_US_RXBRK) {
457 /* ignore side-effect */
458 status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
459 port->icount.brk++;
460 }
461 if (status & ATMEL_US_PARE)
462 port->icount.parity++;
463 if (status & ATMEL_US_FRAME)
464 port->icount.frame++;
465 if (status & ATMEL_US_OVRE)
466 port->icount.overrun++;
467 }
468
469 /*
470 * Characters received (called from interrupt handler)
471 */
472 static void atmel_rx_chars(struct uart_port *port)
473 {
474 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
475 unsigned int status, ch;
476
477 status = UART_GET_CSR(port);
478 while (status & ATMEL_US_RXRDY) {
479 ch = UART_GET_CHAR(port);
480
481 /*
482 * note that the error handling code is
483 * out of the main execution path
484 */
485 if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
486 | ATMEL_US_OVRE | ATMEL_US_RXBRK)
487 || atmel_port->break_active)) {
488
489 /* clear error */
490 UART_PUT_CR(port, ATMEL_US_RSTSTA);
491
492 if (status & ATMEL_US_RXBRK
493 && !atmel_port->break_active) {
494 atmel_port->break_active = 1;
495 UART_PUT_IER(port, ATMEL_US_RXBRK);
496 } else {
497 /*
498 * This is either the end-of-break
499 * condition or we've received at
500 * least one character without RXBRK
501 * being set. In both cases, the next
502 * RXBRK will indicate start-of-break.
503 */
504 UART_PUT_IDR(port, ATMEL_US_RXBRK);
505 status &= ~ATMEL_US_RXBRK;
506 atmel_port->break_active = 0;
507 }
508 }
509
510 atmel_buffer_rx_char(port, status, ch);
511 status = UART_GET_CSR(port);
512 }
513
514 tasklet_schedule(&atmel_port->tasklet);
515 }
516
517 /*
518 * Transmit characters (called from tasklet with TXRDY interrupt
519 * disabled)
520 */
521 static void atmel_tx_chars(struct uart_port *port)
522 {
523 struct circ_buf *xmit = &port->state->xmit;
524 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
525
526 if (port->x_char && UART_GET_CSR(port) & atmel_port->tx_done_mask) {
527 UART_PUT_CHAR(port, port->x_char);
528 port->icount.tx++;
529 port->x_char = 0;
530 }
531 if (uart_circ_empty(xmit) || uart_tx_stopped(port))
532 return;
533
534 while (UART_GET_CSR(port) & atmel_port->tx_done_mask) {
535 UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
536 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
537 port->icount.tx++;
538 if (uart_circ_empty(xmit))
539 break;
540 }
541
542 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
543 uart_write_wakeup(port);
544
545 if (!uart_circ_empty(xmit))
546 /* Enable interrupts */
547 UART_PUT_IER(port, atmel_port->tx_done_mask);
548 }
549
550 /*
551 * receive interrupt handler.
552 */
553 static void
554 atmel_handle_receive(struct uart_port *port, unsigned int pending)
555 {
556 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
557
558 if (atmel_use_dma_rx(port)) {
559 /*
560 * PDC receive. Just schedule the tasklet and let it
561 * figure out the details.
562 *
563 * TODO: We're not handling error flags correctly at
564 * the moment.
565 */
566 if (pending & (ATMEL_US_ENDRX | ATMEL_US_TIMEOUT)) {
567 UART_PUT_IDR(port, (ATMEL_US_ENDRX
568 | ATMEL_US_TIMEOUT));
569 tasklet_schedule(&atmel_port->tasklet);
570 }
571
572 if (pending & (ATMEL_US_RXBRK | ATMEL_US_OVRE |
573 ATMEL_US_FRAME | ATMEL_US_PARE))
574 atmel_pdc_rxerr(port, pending);
575 }
576
577 /* Interrupt receive */
578 if (pending & ATMEL_US_RXRDY)
579 atmel_rx_chars(port);
580 else if (pending & ATMEL_US_RXBRK) {
581 /*
582 * End of break detected. If it came along with a
583 * character, atmel_rx_chars will handle it.
584 */
585 UART_PUT_CR(port, ATMEL_US_RSTSTA);
586 UART_PUT_IDR(port, ATMEL_US_RXBRK);
587 atmel_port->break_active = 0;
588 }
589 }
590
591 /*
592 * transmit interrupt handler. (Transmit is IRQF_NODELAY safe)
593 */
594 static void
595 atmel_handle_transmit(struct uart_port *port, unsigned int pending)
596 {
597 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
598
599 if (pending & atmel_port->tx_done_mask) {
600 /* Either PDC or interrupt transmission */
601 UART_PUT_IDR(port, atmel_port->tx_done_mask);
602 tasklet_schedule(&atmel_port->tasklet);
603 }
604 }
605
606 /*
607 * status flags interrupt handler.
608 */
609 static void
610 atmel_handle_status(struct uart_port *port, unsigned int pending,
611 unsigned int status)
612 {
613 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
614
615 if (pending & (ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC
616 | ATMEL_US_CTSIC)) {
617 atmel_port->irq_status = status;
618 tasklet_schedule(&atmel_port->tasklet);
619 }
620 }
621
622 /*
623 * Interrupt handler
624 */
625 static irqreturn_t atmel_interrupt(int irq, void *dev_id)
626 {
627 struct uart_port *port = dev_id;
628 unsigned int status, pending, pass_counter = 0;
629
630 do {
631 status = UART_GET_CSR(port);
632 pending = status & UART_GET_IMR(port);
633 if (!pending)
634 break;
635
636 atmel_handle_receive(port, pending);
637 atmel_handle_status(port, pending, status);
638 atmel_handle_transmit(port, pending);
639 } while (pass_counter++ < ATMEL_ISR_PASS_LIMIT);
640
641 return pass_counter ? IRQ_HANDLED : IRQ_NONE;
642 }
643
644 /*
645 * Called from tasklet with ENDTX and TXBUFE interrupts disabled.
646 */
647 static void atmel_tx_dma(struct uart_port *port)
648 {
649 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
650 struct circ_buf *xmit = &port->state->xmit;
651 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
652 int count;
653
654 /* nothing left to transmit? */
655 if (UART_GET_TCR(port))
656 return;
657
658 xmit->tail += pdc->ofs;
659 xmit->tail &= UART_XMIT_SIZE - 1;
660
661 port->icount.tx += pdc->ofs;
662 pdc->ofs = 0;
663
664 /* more to transmit - setup next transfer */
665
666 /* disable PDC transmit */
667 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
668
669 if (!uart_circ_empty(xmit) && !uart_tx_stopped(port)) {
670 dma_sync_single_for_device(port->dev,
671 pdc->dma_addr,
672 pdc->dma_size,
673 DMA_TO_DEVICE);
674
675 count = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);
676 pdc->ofs = count;
677
678 UART_PUT_TPR(port, pdc->dma_addr + xmit->tail);
679 UART_PUT_TCR(port, count);
680 /* re-enable PDC transmit */
681 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
682 /* Enable interrupts */
683 UART_PUT_IER(port, atmel_port->tx_done_mask);
684 } else {
685 if ((atmel_port->rs485.flags & SER_RS485_ENABLED) &&
686 !(atmel_port->rs485.flags & SER_RS485_RX_DURING_TX)) {
687 /* DMA done, stop TX, start RX for RS485 */
688 atmel_start_rx(port);
689 }
690 }
691
692 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
693 uart_write_wakeup(port);
694 }
695
696 static void atmel_rx_from_ring(struct uart_port *port)
697 {
698 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
699 struct circ_buf *ring = &atmel_port->rx_ring;
700 unsigned int flg;
701 unsigned int status;
702
703 while (ring->head != ring->tail) {
704 struct atmel_uart_char c;
705
706 /* Make sure c is loaded after head. */
707 smp_rmb();
708
709 c = ((struct atmel_uart_char *)ring->buf)[ring->tail];
710
711 ring->tail = (ring->tail + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
712
713 port->icount.rx++;
714 status = c.status;
715 flg = TTY_NORMAL;
716
717 /*
718 * note that the error handling code is
719 * out of the main execution path
720 */
721 if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
722 | ATMEL_US_OVRE | ATMEL_US_RXBRK))) {
723 if (status & ATMEL_US_RXBRK) {
724 /* ignore side-effect */
725 status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
726
727 port->icount.brk++;
728 if (uart_handle_break(port))
729 continue;
730 }
731 if (status & ATMEL_US_PARE)
732 port->icount.parity++;
733 if (status & ATMEL_US_FRAME)
734 port->icount.frame++;
735 if (status & ATMEL_US_OVRE)
736 port->icount.overrun++;
737
738 status &= port->read_status_mask;
739
740 if (status & ATMEL_US_RXBRK)
741 flg = TTY_BREAK;
742 else if (status & ATMEL_US_PARE)
743 flg = TTY_PARITY;
744 else if (status & ATMEL_US_FRAME)
745 flg = TTY_FRAME;
746 }
747
748
749 if (uart_handle_sysrq_char(port, c.ch))
750 continue;
751
752 uart_insert_char(port, status, ATMEL_US_OVRE, c.ch, flg);
753 }
754
755 /*
756 * Drop the lock here since it might end up calling
757 * uart_start(), which takes the lock.
758 */
759 spin_unlock(&port->lock);
760 tty_flip_buffer_push(port->state->port.tty);
761 spin_lock(&port->lock);
762 }
763
764 static void atmel_rx_from_dma(struct uart_port *port)
765 {
766 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
767 struct tty_struct *tty = port->state->port.tty;
768 struct atmel_dma_buffer *pdc;
769 int rx_idx = atmel_port->pdc_rx_idx;
770 unsigned int head;
771 unsigned int tail;
772 unsigned int count;
773
774 do {
775 /* Reset the UART timeout early so that we don't miss one */
776 UART_PUT_CR(port, ATMEL_US_STTTO);
777
778 pdc = &atmel_port->pdc_rx[rx_idx];
779 head = UART_GET_RPR(port) - pdc->dma_addr;
780 tail = pdc->ofs;
781
782 /* If the PDC has switched buffers, RPR won't contain
783 * any address within the current buffer. Since head
784 * is unsigned, we just need a one-way comparison to
785 * find out.
786 *
787 * In this case, we just need to consume the entire
788 * buffer and resubmit it for DMA. This will clear the
789 * ENDRX bit as well, so that we can safely re-enable
790 * all interrupts below.
791 */
792 head = min(head, pdc->dma_size);
793
794 if (likely(head != tail)) {
795 dma_sync_single_for_cpu(port->dev, pdc->dma_addr,
796 pdc->dma_size, DMA_FROM_DEVICE);
797
798 /*
799 * head will only wrap around when we recycle
800 * the DMA buffer, and when that happens, we
801 * explicitly set tail to 0. So head will
802 * always be greater than tail.
803 */
804 count = head - tail;
805
806 tty_insert_flip_string(tty, pdc->buf + pdc->ofs, count);
807
808 dma_sync_single_for_device(port->dev, pdc->dma_addr,
809 pdc->dma_size, DMA_FROM_DEVICE);
810
811 port->icount.rx += count;
812 pdc->ofs = head;
813 }
814
815 /*
816 * If the current buffer is full, we need to check if
817 * the next one contains any additional data.
818 */
819 if (head >= pdc->dma_size) {
820 pdc->ofs = 0;
821 UART_PUT_RNPR(port, pdc->dma_addr);
822 UART_PUT_RNCR(port, pdc->dma_size);
823
824 rx_idx = !rx_idx;
825 atmel_port->pdc_rx_idx = rx_idx;
826 }
827 } while (head >= pdc->dma_size);
828
829 /*
830 * Drop the lock here since it might end up calling
831 * uart_start(), which takes the lock.
832 */
833 spin_unlock(&port->lock);
834 tty_flip_buffer_push(tty);
835 spin_lock(&port->lock);
836
837 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
838 }
839
840 /*
841 * tasklet handling tty stuff outside the interrupt handler.
842 */
843 static void atmel_tasklet_func(unsigned long data)
844 {
845 struct uart_port *port = (struct uart_port *)data;
846 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
847 unsigned int status;
848 unsigned int status_change;
849
850 /* The interrupt handler does not take the lock */
851 spin_lock(&port->lock);
852
853 if (atmel_use_dma_tx(port))
854 atmel_tx_dma(port);
855 else
856 atmel_tx_chars(port);
857
858 status = atmel_port->irq_status;
859 status_change = status ^ atmel_port->irq_status_prev;
860
861 if (status_change & (ATMEL_US_RI | ATMEL_US_DSR
862 | ATMEL_US_DCD | ATMEL_US_CTS)) {
863 /* TODO: All reads to CSR will clear these interrupts! */
864 if (status_change & ATMEL_US_RI)
865 port->icount.rng++;
866 if (status_change & ATMEL_US_DSR)
867 port->icount.dsr++;
868 if (status_change & ATMEL_US_DCD)
869 uart_handle_dcd_change(port, !(status & ATMEL_US_DCD));
870 if (status_change & ATMEL_US_CTS)
871 uart_handle_cts_change(port, !(status & ATMEL_US_CTS));
872
873 wake_up_interruptible(&port->state->port.delta_msr_wait);
874
875 atmel_port->irq_status_prev = status;
876 }
877
878 if (atmel_use_dma_rx(port))
879 atmel_rx_from_dma(port);
880 else
881 atmel_rx_from_ring(port);
882
883 spin_unlock(&port->lock);
884 }
885
886 /*
887 * Perform initialization and enable port for reception
888 */
889 static int atmel_startup(struct uart_port *port)
890 {
891 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
892 struct tty_struct *tty = port->state->port.tty;
893 int retval;
894
895 /*
896 * Ensure that no interrupts are enabled otherwise when
897 * request_irq() is called we could get stuck trying to
898 * handle an unexpected interrupt
899 */
900 UART_PUT_IDR(port, -1);
901
902 /*
903 * Allocate the IRQ
904 */
905 retval = request_irq(port->irq, atmel_interrupt, IRQF_SHARED,
906 tty ? tty->name : "atmel_serial", port);
907 if (retval) {
908 printk("atmel_serial: atmel_startup - Can't get irq\n");
909 return retval;
910 }
911
912 /*
913 * Initialize DMA (if necessary)
914 */
915 if (atmel_use_dma_rx(port)) {
916 int i;
917
918 for (i = 0; i < 2; i++) {
919 struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
920
921 pdc->buf = kmalloc(PDC_BUFFER_SIZE, GFP_KERNEL);
922 if (pdc->buf == NULL) {
923 if (i != 0) {
924 dma_unmap_single(port->dev,
925 atmel_port->pdc_rx[0].dma_addr,
926 PDC_BUFFER_SIZE,
927 DMA_FROM_DEVICE);
928 kfree(atmel_port->pdc_rx[0].buf);
929 }
930 free_irq(port->irq, port);
931 return -ENOMEM;
932 }
933 pdc->dma_addr = dma_map_single(port->dev,
934 pdc->buf,
935 PDC_BUFFER_SIZE,
936 DMA_FROM_DEVICE);
937 pdc->dma_size = PDC_BUFFER_SIZE;
938 pdc->ofs = 0;
939 }
940
941 atmel_port->pdc_rx_idx = 0;
942
943 UART_PUT_RPR(port, atmel_port->pdc_rx[0].dma_addr);
944 UART_PUT_RCR(port, PDC_BUFFER_SIZE);
945
946 UART_PUT_RNPR(port, atmel_port->pdc_rx[1].dma_addr);
947 UART_PUT_RNCR(port, PDC_BUFFER_SIZE);
948 }
949 if (atmel_use_dma_tx(port)) {
950 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
951 struct circ_buf *xmit = &port->state->xmit;
952
953 pdc->buf = xmit->buf;
954 pdc->dma_addr = dma_map_single(port->dev,
955 pdc->buf,
956 UART_XMIT_SIZE,
957 DMA_TO_DEVICE);
958 pdc->dma_size = UART_XMIT_SIZE;
959 pdc->ofs = 0;
960 }
961
962 /*
963 * If there is a specific "open" function (to register
964 * control line interrupts)
965 */
966 if (atmel_open_hook) {
967 retval = atmel_open_hook(port);
968 if (retval) {
969 free_irq(port->irq, port);
970 return retval;
971 }
972 }
973
974 /* Save current CSR for comparison in atmel_tasklet_func() */
975 atmel_port->irq_status_prev = UART_GET_CSR(port);
976 atmel_port->irq_status = atmel_port->irq_status_prev;
977
978 /*
979 * Finally, enable the serial port
980 */
981 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
982 /* enable xmit & rcvr */
983 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
984
985 if (atmel_use_dma_rx(port)) {
986 /* set UART timeout */
987 UART_PUT_RTOR(port, PDC_RX_TIMEOUT);
988 UART_PUT_CR(port, ATMEL_US_STTTO);
989
990 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
991 /* enable PDC controller */
992 UART_PUT_PTCR(port, ATMEL_PDC_RXTEN);
993 } else {
994 /* enable receive only */
995 UART_PUT_IER(port, ATMEL_US_RXRDY);
996 }
997
998 return 0;
999 }
1000
1001 /*
1002 * Disable the port
1003 */
1004 static void atmel_shutdown(struct uart_port *port)
1005 {
1006 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1007 /*
1008 * Ensure everything is stopped.
1009 */
1010 atmel_stop_rx(port);
1011 atmel_stop_tx(port);
1012
1013 /*
1014 * Shut-down the DMA.
1015 */
1016 if (atmel_use_dma_rx(port)) {
1017 int i;
1018
1019 for (i = 0; i < 2; i++) {
1020 struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
1021
1022 dma_unmap_single(port->dev,
1023 pdc->dma_addr,
1024 pdc->dma_size,
1025 DMA_FROM_DEVICE);
1026 kfree(pdc->buf);
1027 }
1028 }
1029 if (atmel_use_dma_tx(port)) {
1030 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
1031
1032 dma_unmap_single(port->dev,
1033 pdc->dma_addr,
1034 pdc->dma_size,
1035 DMA_TO_DEVICE);
1036 }
1037
1038 /*
1039 * Disable all interrupts, port and break condition.
1040 */
1041 UART_PUT_CR(port, ATMEL_US_RSTSTA);
1042 UART_PUT_IDR(port, -1);
1043
1044 /*
1045 * Free the interrupt
1046 */
1047 free_irq(port->irq, port);
1048
1049 /*
1050 * If there is a specific "close" function (to unregister
1051 * control line interrupts)
1052 */
1053 if (atmel_close_hook)
1054 atmel_close_hook(port);
1055 }
1056
1057 /*
1058 * Flush any TX data submitted for DMA. Called when the TX circular
1059 * buffer is reset.
1060 */
1061 static void atmel_flush_buffer(struct uart_port *port)
1062 {
1063 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1064
1065 if (atmel_use_dma_tx(port)) {
1066 UART_PUT_TCR(port, 0);
1067 atmel_port->pdc_tx.ofs = 0;
1068 }
1069 }
1070
1071 /*
1072 * Power / Clock management.
1073 */
1074 static void atmel_serial_pm(struct uart_port *port, unsigned int state,
1075 unsigned int oldstate)
1076 {
1077 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1078
1079 switch (state) {
1080 case 0:
1081 /*
1082 * Enable the peripheral clock for this serial port.
1083 * This is called on uart_open() or a resume event.
1084 */
1085 clk_enable(atmel_port->clk);
1086
1087 /* re-enable interrupts if we disabled some on suspend */
1088 UART_PUT_IER(port, atmel_port->backup_imr);
1089 break;
1090 case 3:
1091 /* Back up the interrupt mask and disable all interrupts */
1092 atmel_port->backup_imr = UART_GET_IMR(port);
1093 UART_PUT_IDR(port, -1);
1094
1095 /*
1096 * Disable the peripheral clock for this serial port.
1097 * This is called on uart_close() or a suspend event.
1098 */
1099 clk_disable(atmel_port->clk);
1100 break;
1101 default:
1102 printk(KERN_ERR "atmel_serial: unknown pm %d\n", state);
1103 }
1104 }
1105
1106 /*
1107 * Change the port parameters
1108 */
1109 static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
1110 struct ktermios *old)
1111 {
1112 unsigned long flags;
1113 unsigned int mode, imr, quot, baud;
1114 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1115
1116 /* Get current mode register */
1117 mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL
1118 | ATMEL_US_NBSTOP | ATMEL_US_PAR
1119 | ATMEL_US_USMODE);
1120
1121 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
1122 quot = uart_get_divisor(port, baud);
1123
1124 if (quot > 65535) { /* BRGR is 16-bit, so switch to slower clock */
1125 quot /= 8;
1126 mode |= ATMEL_US_USCLKS_MCK_DIV8;
1127 }
1128
1129 /* byte size */
1130 switch (termios->c_cflag & CSIZE) {
1131 case CS5:
1132 mode |= ATMEL_US_CHRL_5;
1133 break;
1134 case CS6:
1135 mode |= ATMEL_US_CHRL_6;
1136 break;
1137 case CS7:
1138 mode |= ATMEL_US_CHRL_7;
1139 break;
1140 default:
1141 mode |= ATMEL_US_CHRL_8;
1142 break;
1143 }
1144
1145 /* stop bits */
1146 if (termios->c_cflag & CSTOPB)
1147 mode |= ATMEL_US_NBSTOP_2;
1148
1149 /* parity */
1150 if (termios->c_cflag & PARENB) {
1151 /* Mark or Space parity */
1152 if (termios->c_cflag & CMSPAR) {
1153 if (termios->c_cflag & PARODD)
1154 mode |= ATMEL_US_PAR_MARK;
1155 else
1156 mode |= ATMEL_US_PAR_SPACE;
1157 } else if (termios->c_cflag & PARODD)
1158 mode |= ATMEL_US_PAR_ODD;
1159 else
1160 mode |= ATMEL_US_PAR_EVEN;
1161 } else
1162 mode |= ATMEL_US_PAR_NONE;
1163
1164 /* hardware handshake (RTS/CTS) */
1165 if (termios->c_cflag & CRTSCTS)
1166 mode |= ATMEL_US_USMODE_HWHS;
1167 else
1168 mode |= ATMEL_US_USMODE_NORMAL;
1169
1170 spin_lock_irqsave(&port->lock, flags);
1171
1172 port->read_status_mask = ATMEL_US_OVRE;
1173 if (termios->c_iflag & INPCK)
1174 port->read_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
1175 if (termios->c_iflag & (BRKINT | PARMRK))
1176 port->read_status_mask |= ATMEL_US_RXBRK;
1177
1178 if (atmel_use_dma_rx(port))
1179 /* need to enable error interrupts */
1180 UART_PUT_IER(port, port->read_status_mask);
1181
1182 /*
1183 * Characters to ignore
1184 */
1185 port->ignore_status_mask = 0;
1186 if (termios->c_iflag & IGNPAR)
1187 port->ignore_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
1188 if (termios->c_iflag & IGNBRK) {
1189 port->ignore_status_mask |= ATMEL_US_RXBRK;
1190 /*
1191 * If we're ignoring parity and break indicators,
1192 * ignore overruns too (for real raw support).
1193 */
1194 if (termios->c_iflag & IGNPAR)
1195 port->ignore_status_mask |= ATMEL_US_OVRE;
1196 }
1197 /* TODO: Ignore all characters if CREAD is set.*/
1198
1199 /* update the per-port timeout */
1200 uart_update_timeout(port, termios->c_cflag, baud);
1201
1202 /*
1203 * save/disable interrupts. The tty layer will ensure that the
1204 * transmitter is empty if requested by the caller, so there's
1205 * no need to wait for it here.
1206 */
1207 imr = UART_GET_IMR(port);
1208 UART_PUT_IDR(port, -1);
1209
1210 /* disable receiver and transmitter */
1211 UART_PUT_CR(port, ATMEL_US_TXDIS | ATMEL_US_RXDIS);
1212
1213 /* Resetting serial mode to RS232 (0x0) */
1214 mode &= ~ATMEL_US_USMODE;
1215
1216 if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
1217 dev_dbg(port->dev, "Setting UART to RS485\n");
1218 if (atmel_port->rs485.flags & SER_RS485_RTS_AFTER_SEND)
1219 UART_PUT_TTGR(port,
1220 atmel_port->rs485.delay_rts_after_send);
1221 mode |= ATMEL_US_USMODE_RS485;
1222 } else {
1223 dev_dbg(port->dev, "Setting UART to RS232\n");
1224 }
1225
1226 /* set the parity, stop bits and data size */
1227 UART_PUT_MR(port, mode);
1228
1229 /* set the baud rate */
1230 UART_PUT_BRGR(port, quot);
1231 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
1232 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
1233
1234 /* restore interrupts */
1235 UART_PUT_IER(port, imr);
1236
1237 /* CTS flow-control and modem-status interrupts */
1238 if (UART_ENABLE_MS(port, termios->c_cflag))
1239 port->ops->enable_ms(port);
1240
1241 spin_unlock_irqrestore(&port->lock, flags);
1242 }
1243
1244 static void atmel_set_ldisc(struct uart_port *port, int new)
1245 {
1246 int line = port->line;
1247
1248 if (line >= port->state->port.tty->driver->num)
1249 return;
1250
1251 if (port->state->port.tty->ldisc->ops->num == N_PPS) {
1252 port->flags |= UPF_HARDPPS_CD;
1253 atmel_enable_ms(port);
1254 } else {
1255 port->flags &= ~UPF_HARDPPS_CD;
1256 }
1257 }
1258
1259 /*
1260 * Return string describing the specified port
1261 */
1262 static const char *atmel_type(struct uart_port *port)
1263 {
1264 return (port->type == PORT_ATMEL) ? "ATMEL_SERIAL" : NULL;
1265 }
1266
1267 /*
1268 * Release the memory region(s) being used by 'port'.
1269 */
1270 static void atmel_release_port(struct uart_port *port)
1271 {
1272 struct platform_device *pdev = to_platform_device(port->dev);
1273 int size = pdev->resource[0].end - pdev->resource[0].start + 1;
1274
1275 release_mem_region(port->mapbase, size);
1276
1277 if (port->flags & UPF_IOREMAP) {
1278 iounmap(port->membase);
1279 port->membase = NULL;
1280 }
1281 }
1282
1283 /*
1284 * Request the memory region(s) being used by 'port'.
1285 */
1286 static int atmel_request_port(struct uart_port *port)
1287 {
1288 struct platform_device *pdev = to_platform_device(port->dev);
1289 int size = pdev->resource[0].end - pdev->resource[0].start + 1;
1290
1291 if (!request_mem_region(port->mapbase, size, "atmel_serial"))
1292 return -EBUSY;
1293
1294 if (port->flags & UPF_IOREMAP) {
1295 port->membase = ioremap(port->mapbase, size);
1296 if (port->membase == NULL) {
1297 release_mem_region(port->mapbase, size);
1298 return -ENOMEM;
1299 }
1300 }
1301
1302 return 0;
1303 }
1304
1305 /*
1306 * Configure/autoconfigure the port.
1307 */
1308 static void atmel_config_port(struct uart_port *port, int flags)
1309 {
1310 if (flags & UART_CONFIG_TYPE) {
1311 port->type = PORT_ATMEL;
1312 atmel_request_port(port);
1313 }
1314 }
1315
1316 /*
1317 * Verify the new serial_struct (for TIOCSSERIAL).
1318 */
1319 static int atmel_verify_port(struct uart_port *port, struct serial_struct *ser)
1320 {
1321 int ret = 0;
1322 if (ser->type != PORT_UNKNOWN && ser->type != PORT_ATMEL)
1323 ret = -EINVAL;
1324 if (port->irq != ser->irq)
1325 ret = -EINVAL;
1326 if (ser->io_type != SERIAL_IO_MEM)
1327 ret = -EINVAL;
1328 if (port->uartclk / 16 != ser->baud_base)
1329 ret = -EINVAL;
1330 if ((void *)port->mapbase != ser->iomem_base)
1331 ret = -EINVAL;
1332 if (port->iobase != ser->port)
1333 ret = -EINVAL;
1334 if (ser->hub6 != 0)
1335 ret = -EINVAL;
1336 return ret;
1337 }
1338
1339 #ifdef CONFIG_CONSOLE_POLL
1340 static int atmel_poll_get_char(struct uart_port *port)
1341 {
1342 while (!(UART_GET_CSR(port) & ATMEL_US_RXRDY))
1343 cpu_relax();
1344
1345 return UART_GET_CHAR(port);
1346 }
1347
1348 static void atmel_poll_put_char(struct uart_port *port, unsigned char ch)
1349 {
1350 while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY))
1351 cpu_relax();
1352
1353 UART_PUT_CHAR(port, ch);
1354 }
1355 #endif
1356
1357 static int
1358 atmel_ioctl(struct uart_port *port, unsigned int cmd, unsigned long arg)
1359 {
1360 struct serial_rs485 rs485conf;
1361
1362 switch (cmd) {
1363 case TIOCSRS485:
1364 if (copy_from_user(&rs485conf, (struct serial_rs485 *) arg,
1365 sizeof(rs485conf)))
1366 return -EFAULT;
1367
1368 atmel_config_rs485(port, &rs485conf);
1369 break;
1370
1371 case TIOCGRS485:
1372 if (copy_to_user((struct serial_rs485 *) arg,
1373 &(to_atmel_uart_port(port)->rs485),
1374 sizeof(rs485conf)))
1375 return -EFAULT;
1376 break;
1377
1378 default:
1379 return -ENOIOCTLCMD;
1380 }
1381 return 0;
1382 }
1383
1384
1385
1386 static struct uart_ops atmel_pops = {
1387 .tx_empty = atmel_tx_empty,
1388 .set_mctrl = atmel_set_mctrl,
1389 .get_mctrl = atmel_get_mctrl,
1390 .stop_tx = atmel_stop_tx,
1391 .start_tx = atmel_start_tx,
1392 .stop_rx = atmel_stop_rx,
1393 .enable_ms = atmel_enable_ms,
1394 .break_ctl = atmel_break_ctl,
1395 .startup = atmel_startup,
1396 .shutdown = atmel_shutdown,
1397 .flush_buffer = atmel_flush_buffer,
1398 .set_termios = atmel_set_termios,
1399 .set_ldisc = atmel_set_ldisc,
1400 .type = atmel_type,
1401 .release_port = atmel_release_port,
1402 .request_port = atmel_request_port,
1403 .config_port = atmel_config_port,
1404 .verify_port = atmel_verify_port,
1405 .pm = atmel_serial_pm,
1406 .ioctl = atmel_ioctl,
1407 #ifdef CONFIG_CONSOLE_POLL
1408 .poll_get_char = atmel_poll_get_char,
1409 .poll_put_char = atmel_poll_put_char,
1410 #endif
1411 };
1412
1413 /*
1414 * Configure the port from the platform device resource info.
1415 */
1416 static void __devinit atmel_init_port(struct atmel_uart_port *atmel_port,
1417 struct platform_device *pdev)
1418 {
1419 struct uart_port *port = &atmel_port->uart;
1420 struct atmel_uart_data *pdata = pdev->dev.platform_data;
1421
1422 port->iotype = UPIO_MEM;
1423 port->flags = UPF_BOOT_AUTOCONF;
1424 port->ops = &atmel_pops;
1425 port->fifosize = 1;
1426 port->line = pdata->num;
1427 port->dev = &pdev->dev;
1428 port->mapbase = pdev->resource[0].start;
1429 port->irq = pdev->resource[1].start;
1430
1431 tasklet_init(&atmel_port->tasklet, atmel_tasklet_func,
1432 (unsigned long)port);
1433
1434 memset(&atmel_port->rx_ring, 0, sizeof(atmel_port->rx_ring));
1435
1436 if (pdata->regs) {
1437 /* Already mapped by setup code */
1438 port->membase = pdata->regs;
1439 } else {
1440 port->flags |= UPF_IOREMAP;
1441 port->membase = NULL;
1442 }
1443
1444 /* for console, the clock could already be configured */
1445 if (!atmel_port->clk) {
1446 atmel_port->clk = clk_get(&pdev->dev, "usart");
1447 clk_enable(atmel_port->clk);
1448 port->uartclk = clk_get_rate(atmel_port->clk);
1449 clk_disable(atmel_port->clk);
1450 /* only enable clock when USART is in use */
1451 }
1452
1453 atmel_port->use_dma_rx = pdata->use_dma_rx;
1454 atmel_port->use_dma_tx = pdata->use_dma_tx;
1455 atmel_port->rs485 = pdata->rs485;
1456
1457 /* Use TXEMPTY for interrupt when rs485 else TXRDY or ENDTX|TXBUFE */
1458 if (atmel_port->rs485.flags & SER_RS485_ENABLED)
1459 atmel_port->tx_done_mask = ATMEL_US_TXEMPTY;
1460 else if (atmel_use_dma_tx(port)) {
1461 port->fifosize = PDC_BUFFER_SIZE;
1462 atmel_port->tx_done_mask = ATMEL_US_ENDTX | ATMEL_US_TXBUFE;
1463 } else {
1464 atmel_port->tx_done_mask = ATMEL_US_TXRDY;
1465 }
1466 }
1467
1468 /*
1469 * Register board-specific modem-control line handlers.
1470 */
1471 void __init atmel_register_uart_fns(struct atmel_port_fns *fns)
1472 {
1473 if (fns->enable_ms)
1474 atmel_pops.enable_ms = fns->enable_ms;
1475 if (fns->get_mctrl)
1476 atmel_pops.get_mctrl = fns->get_mctrl;
1477 if (fns->set_mctrl)
1478 atmel_pops.set_mctrl = fns->set_mctrl;
1479 atmel_open_hook = fns->open;
1480 atmel_close_hook = fns->close;
1481 atmel_pops.pm = fns->pm;
1482 atmel_pops.set_wake = fns->set_wake;
1483 }
1484
1485 #ifdef CONFIG_SERIAL_ATMEL_CONSOLE
1486 static void atmel_console_putchar(struct uart_port *port, int ch)
1487 {
1488 while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY))
1489 cpu_relax();
1490 UART_PUT_CHAR(port, ch);
1491 }
1492
1493 /*
1494 * Interrupts are disabled on entering
1495 */
1496 static void atmel_console_write(struct console *co, const char *s, u_int count)
1497 {
1498 struct uart_port *port = &atmel_ports[co->index].uart;
1499 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1500 unsigned int status, imr;
1501 unsigned int pdc_tx;
1502
1503 /*
1504 * First, save IMR and then disable interrupts
1505 */
1506 imr = UART_GET_IMR(port);
1507 UART_PUT_IDR(port, ATMEL_US_RXRDY | atmel_port->tx_done_mask);
1508
1509 /* Store PDC transmit status and disable it */
1510 pdc_tx = UART_GET_PTSR(port) & ATMEL_PDC_TXTEN;
1511 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
1512
1513 uart_console_write(port, s, count, atmel_console_putchar);
1514
1515 /*
1516 * Finally, wait for transmitter to become empty
1517 * and restore IMR
1518 */
1519 do {
1520 status = UART_GET_CSR(port);
1521 } while (!(status & ATMEL_US_TXRDY));
1522
1523 /* Restore PDC transmit status */
1524 if (pdc_tx)
1525 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
1526
1527 /* set interrupts back the way they were */
1528 UART_PUT_IER(port, imr);
1529 }
1530
1531 /*
1532 * If the port was already initialised (eg, by a boot loader),
1533 * try to determine the current setup.
1534 */
1535 static void __init atmel_console_get_options(struct uart_port *port, int *baud,
1536 int *parity, int *bits)
1537 {
1538 unsigned int mr, quot;
1539
1540 /*
1541 * If the baud rate generator isn't running, the port wasn't
1542 * initialized by the boot loader.
1543 */
1544 quot = UART_GET_BRGR(port) & ATMEL_US_CD;
1545 if (!quot)
1546 return;
1547
1548 mr = UART_GET_MR(port) & ATMEL_US_CHRL;
1549 if (mr == ATMEL_US_CHRL_8)
1550 *bits = 8;
1551 else
1552 *bits = 7;
1553
1554 mr = UART_GET_MR(port) & ATMEL_US_PAR;
1555 if (mr == ATMEL_US_PAR_EVEN)
1556 *parity = 'e';
1557 else if (mr == ATMEL_US_PAR_ODD)
1558 *parity = 'o';
1559
1560 /*
1561 * The serial core only rounds down when matching this to a
1562 * supported baud rate. Make sure we don't end up slightly
1563 * lower than one of those, as it would make us fall through
1564 * to a much lower baud rate than we really want.
1565 */
1566 *baud = port->uartclk / (16 * (quot - 1));
1567 }
1568
1569 static int __init atmel_console_setup(struct console *co, char *options)
1570 {
1571 struct uart_port *port = &atmel_ports[co->index].uart;
1572 int baud = 115200;
1573 int bits = 8;
1574 int parity = 'n';
1575 int flow = 'n';
1576
1577 if (port->membase == NULL) {
1578 /* Port not initialized yet - delay setup */
1579 return -ENODEV;
1580 }
1581
1582 clk_enable(atmel_ports[co->index].clk);
1583
1584 UART_PUT_IDR(port, -1);
1585 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
1586 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
1587
1588 if (options)
1589 uart_parse_options(options, &baud, &parity, &bits, &flow);
1590 else
1591 atmel_console_get_options(port, &baud, &parity, &bits);
1592
1593 return uart_set_options(port, co, baud, parity, bits, flow);
1594 }
1595
1596 static struct uart_driver atmel_uart;
1597
1598 static struct console atmel_console = {
1599 .name = ATMEL_DEVICENAME,
1600 .write = atmel_console_write,
1601 .device = uart_console_device,
1602 .setup = atmel_console_setup,
1603 .flags = CON_PRINTBUFFER,
1604 .index = -1,
1605 .data = &atmel_uart,
1606 };
1607
1608 #define ATMEL_CONSOLE_DEVICE (&atmel_console)
1609
1610 /*
1611 * Early console initialization (before VM subsystem initialized).
1612 */
1613 static int __init atmel_console_init(void)
1614 {
1615 if (atmel_default_console_device) {
1616 add_preferred_console(ATMEL_DEVICENAME,
1617 atmel_default_console_device->id, NULL);
1618 atmel_init_port(&atmel_ports[atmel_default_console_device->id],
1619 atmel_default_console_device);
1620 register_console(&atmel_console);
1621 }
1622
1623 return 0;
1624 }
1625
1626 console_initcall(atmel_console_init);
1627
1628 /*
1629 * Late console initialization.
1630 */
1631 static int __init atmel_late_console_init(void)
1632 {
1633 if (atmel_default_console_device
1634 && !(atmel_console.flags & CON_ENABLED))
1635 register_console(&atmel_console);
1636
1637 return 0;
1638 }
1639
1640 core_initcall(atmel_late_console_init);
1641
1642 static inline bool atmel_is_console_port(struct uart_port *port)
1643 {
1644 return port->cons && port->cons->index == port->line;
1645 }
1646
1647 #else
1648 #define ATMEL_CONSOLE_DEVICE NULL
1649
1650 static inline bool atmel_is_console_port(struct uart_port *port)
1651 {
1652 return false;
1653 }
1654 #endif
1655
1656 static struct uart_driver atmel_uart = {
1657 .owner = THIS_MODULE,
1658 .driver_name = "atmel_serial",
1659 .dev_name = ATMEL_DEVICENAME,
1660 .major = SERIAL_ATMEL_MAJOR,
1661 .minor = MINOR_START,
1662 .nr = ATMEL_MAX_UART,
1663 .cons = ATMEL_CONSOLE_DEVICE,
1664 };
1665
1666 #ifdef CONFIG_PM
1667 static bool atmel_serial_clk_will_stop(void)
1668 {
1669 #ifdef CONFIG_ARCH_AT91
1670 return at91_suspend_entering_slow_clock();
1671 #else
1672 return false;
1673 #endif
1674 }
1675
1676 static int atmel_serial_suspend(struct platform_device *pdev,
1677 pm_message_t state)
1678 {
1679 struct uart_port *port = platform_get_drvdata(pdev);
1680 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1681
1682 if (atmel_is_console_port(port) && console_suspend_enabled) {
1683 /* Drain the TX shifter */
1684 while (!(UART_GET_CSR(port) & ATMEL_US_TXEMPTY))
1685 cpu_relax();
1686 }
1687
1688 /* we can not wake up if we're running on slow clock */
1689 atmel_port->may_wakeup = device_may_wakeup(&pdev->dev);
1690 if (atmel_serial_clk_will_stop())
1691 device_set_wakeup_enable(&pdev->dev, 0);
1692
1693 uart_suspend_port(&atmel_uart, port);
1694
1695 return 0;
1696 }
1697
1698 static int atmel_serial_resume(struct platform_device *pdev)
1699 {
1700 struct uart_port *port = platform_get_drvdata(pdev);
1701 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1702
1703 uart_resume_port(&atmel_uart, port);
1704 device_set_wakeup_enable(&pdev->dev, atmel_port->may_wakeup);
1705
1706 return 0;
1707 }
1708 #else
1709 #define atmel_serial_suspend NULL
1710 #define atmel_serial_resume NULL
1711 #endif
1712
1713 static int __devinit atmel_serial_probe(struct platform_device *pdev)
1714 {
1715 struct atmel_uart_port *port;
1716 struct atmel_uart_data *pdata = pdev->dev.platform_data;
1717 void *data;
1718 int ret;
1719
1720 BUILD_BUG_ON(ATMEL_SERIAL_RINGSIZE & (ATMEL_SERIAL_RINGSIZE - 1));
1721
1722 port = &atmel_ports[pdata->num];
1723 port->backup_imr = 0;
1724
1725 atmel_init_port(port, pdev);
1726
1727 if (!atmel_use_dma_rx(&port->uart)) {
1728 ret = -ENOMEM;
1729 data = kmalloc(sizeof(struct atmel_uart_char)
1730 * ATMEL_SERIAL_RINGSIZE, GFP_KERNEL);
1731 if (!data)
1732 goto err_alloc_ring;
1733 port->rx_ring.buf = data;
1734 }
1735
1736 ret = uart_add_one_port(&atmel_uart, &port->uart);
1737 if (ret)
1738 goto err_add_port;
1739
1740 #ifdef CONFIG_SERIAL_ATMEL_CONSOLE
1741 if (atmel_is_console_port(&port->uart)
1742 && ATMEL_CONSOLE_DEVICE->flags & CON_ENABLED) {
1743 /*
1744 * The serial core enabled the clock for us, so undo
1745 * the clk_enable() in atmel_console_setup()
1746 */
1747 clk_disable(port->clk);
1748 }
1749 #endif
1750
1751 device_init_wakeup(&pdev->dev, 1);
1752 platform_set_drvdata(pdev, port);
1753
1754 if (port->rs485.flags & SER_RS485_ENABLED) {
1755 UART_PUT_MR(&port->uart, ATMEL_US_USMODE_NORMAL);
1756 UART_PUT_CR(&port->uart, ATMEL_US_RTSEN);
1757 }
1758
1759 return 0;
1760
1761 err_add_port:
1762 kfree(port->rx_ring.buf);
1763 port->rx_ring.buf = NULL;
1764 err_alloc_ring:
1765 if (!atmel_is_console_port(&port->uart)) {
1766 clk_put(port->clk);
1767 port->clk = NULL;
1768 }
1769
1770 return ret;
1771 }
1772
1773 static int __devexit atmel_serial_remove(struct platform_device *pdev)
1774 {
1775 struct uart_port *port = platform_get_drvdata(pdev);
1776 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1777 int ret = 0;
1778
1779 device_init_wakeup(&pdev->dev, 0);
1780 platform_set_drvdata(pdev, NULL);
1781
1782 ret = uart_remove_one_port(&atmel_uart, port);
1783
1784 tasklet_kill(&atmel_port->tasklet);
1785 kfree(atmel_port->rx_ring.buf);
1786
1787 /* "port" is allocated statically, so we shouldn't free it */
1788
1789 clk_put(atmel_port->clk);
1790
1791 return ret;
1792 }
1793
1794 static struct platform_driver atmel_serial_driver = {
1795 .probe = atmel_serial_probe,
1796 .remove = __devexit_p(atmel_serial_remove),
1797 .suspend = atmel_serial_suspend,
1798 .resume = atmel_serial_resume,
1799 .driver = {
1800 .name = "atmel_usart",
1801 .owner = THIS_MODULE,
1802 },
1803 };
1804
1805 static int __init atmel_serial_init(void)
1806 {
1807 int ret;
1808
1809 ret = uart_register_driver(&atmel_uart);
1810 if (ret)
1811 return ret;
1812
1813 ret = platform_driver_register(&atmel_serial_driver);
1814 if (ret)
1815 uart_unregister_driver(&atmel_uart);
1816
1817 return ret;
1818 }
1819
1820 static void __exit atmel_serial_exit(void)
1821 {
1822 platform_driver_unregister(&atmel_serial_driver);
1823 uart_unregister_driver(&atmel_uart);
1824 }
1825
1826 module_init(atmel_serial_init);
1827 module_exit(atmel_serial_exit);
1828
1829 MODULE_AUTHOR("Rick Bronson");
1830 MODULE_DESCRIPTION("Atmel AT91 / AT32 serial port driver");
1831 MODULE_LICENSE("GPL");
1832 MODULE_ALIAS("platform:atmel_usart");
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