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mac80211: clean up beacon interval settings
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / net / wireless / iwlwifi / iwl3945-base.c
blobf9d9b65ef30063b42b5b83aab2dfc5c5c4671e90
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/delay.h>
36 #include <linux/skbuff.h>
37 #include <linux/netdevice.h>
38 #include <linux/wireless.h>
39 #include <linux/firmware.h>
40 #include <linux/etherdevice.h>
41 #include <linux/if_arp.h>
42
43 #include <net/ieee80211_radiotap.h>
44 #include <net/lib80211.h>
45 #include <net/mac80211.h>
46
47 #include <asm/div64.h>
48
49 #define DRV_NAME "iwl3945"
50
51 #include "iwl-fh.h"
52 #include "iwl-3945-fh.h"
53 #include "iwl-commands.h"
54 #include "iwl-sta.h"
55 #include "iwl-3945.h"
56 #include "iwl-helpers.h"
57 #include "iwl-core.h"
58 #include "iwl-dev.h"
59
60 /*
61 * module name, copyright, version, etc.
62 */
63
64 #define DRV_DESCRIPTION \
65 "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
66
67 #ifdef CONFIG_IWLWIFI_DEBUG
68 #define VD "d"
69 #else
70 #define VD
71 #endif
72
73 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
74 #define VS "s"
75 #else
76 #define VS
77 #endif
78
79 #define IWL39_VERSION "1.2.26k" VD VS
80 #define DRV_COPYRIGHT "Copyright(c) 2003-2009 Intel Corporation"
81 #define DRV_AUTHOR "<ilw@linux.intel.com>"
82 #define DRV_VERSION IWL39_VERSION
83
84
85 MODULE_DESCRIPTION(DRV_DESCRIPTION);
86 MODULE_VERSION(DRV_VERSION);
87 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
88 MODULE_LICENSE("GPL");
89
90 /* module parameters */
91 struct iwl_mod_params iwl3945_mod_params = {
92 .num_of_queues = IWL39_MAX_NUM_QUEUES,
93 .sw_crypto = 1,
94 .restart_fw = 1,
95 /* the rest are 0 by default */
96 };
97
98 /*************** STATION TABLE MANAGEMENT ****
99 * mac80211 should be examined to determine if sta_info is duplicating
100 * the functionality provided here
101 */
102
103 /**************************************************************/
104 #if 0 /* temporary disable till we add real remove station */
105 /**
106 * iwl3945_remove_station - Remove driver's knowledge of station.
107 *
108 * NOTE: This does not remove station from device's station table.
109 */
110 static u8 iwl3945_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
111 {
112 int index = IWL_INVALID_STATION;
113 int i;
114 unsigned long flags;
115
116 spin_lock_irqsave(&priv->sta_lock, flags);
117
118 if (is_ap)
119 index = IWL_AP_ID;
120 else if (is_broadcast_ether_addr(addr))
121 index = priv->hw_params.bcast_sta_id;
122 else
123 for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++)
124 if (priv->stations_39[i].used &&
125 !compare_ether_addr(priv->stations_39[i].sta.sta.addr,
126 addr)) {
127 index = i;
128 break;
129 }
130
131 if (unlikely(index == IWL_INVALID_STATION))
132 goto out;
133
134 if (priv->stations_39[index].used) {
135 priv->stations_39[index].used = 0;
136 priv->num_stations--;
137 }
138
139 BUG_ON(priv->num_stations < 0);
140
141 out:
142 spin_unlock_irqrestore(&priv->sta_lock, flags);
143 return 0;
144 }
145 #endif
146
147 /**
148 * iwl3945_clear_stations_table - Clear the driver's station table
149 *
150 * NOTE: This does not clear or otherwise alter the device's station table.
151 */
152 void iwl3945_clear_stations_table(struct iwl_priv *priv)
153 {
154 unsigned long flags;
155
156 spin_lock_irqsave(&priv->sta_lock, flags);
157
158 priv->num_stations = 0;
159 memset(priv->stations_39, 0, sizeof(priv->stations_39));
160
161 spin_unlock_irqrestore(&priv->sta_lock, flags);
162 }
163
164 /**
165 * iwl3945_add_station - Add station to station tables in driver and device
166 */
167 u8 iwl3945_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap, u8 flags, struct ieee80211_sta_ht_cap *ht_info)
168 {
169 int i;
170 int index = IWL_INVALID_STATION;
171 struct iwl3945_station_entry *station;
172 unsigned long flags_spin;
173 u8 rate;
174
175 spin_lock_irqsave(&priv->sta_lock, flags_spin);
176 if (is_ap)
177 index = IWL_AP_ID;
178 else if (is_broadcast_ether_addr(addr))
179 index = priv->hw_params.bcast_sta_id;
180 else
181 for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++) {
182 if (!compare_ether_addr(priv->stations_39[i].sta.sta.addr,
183 addr)) {
184 index = i;
185 break;
186 }
187
188 if (!priv->stations_39[i].used &&
189 index == IWL_INVALID_STATION)
190 index = i;
191 }
192
193 /* These two conditions has the same outcome but keep them separate
194 since they have different meaning */
195 if (unlikely(index == IWL_INVALID_STATION)) {
196 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
197 return index;
198 }
199
200 if (priv->stations_39[index].used &&
201 !compare_ether_addr(priv->stations_39[index].sta.sta.addr, addr)) {
202 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
203 return index;
204 }
205
206 IWL_DEBUG_ASSOC(priv, "Add STA ID %d: %pM\n", index, addr);
207 station = &priv->stations_39[index];
208 station->used = 1;
209 priv->num_stations++;
210
211 /* Set up the REPLY_ADD_STA command to send to device */
212 memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
213 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
214 station->sta.mode = 0;
215 station->sta.sta.sta_id = index;
216 station->sta.station_flags = 0;
217
218 if (priv->band == IEEE80211_BAND_5GHZ)
219 rate = IWL_RATE_6M_PLCP;
220 else
221 rate = IWL_RATE_1M_PLCP;
222
223 /* Turn on both antennas for the station... */
224 station->sta.rate_n_flags =
225 iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
226
227 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
228
229 /* Add station to device's station table */
230 iwl_send_add_sta(priv,
231 (struct iwl_addsta_cmd *)&station->sta, flags);
232 return index;
233
234 }
235
236 /**
237 * iwl3945_get_antenna_flags - Get antenna flags for RXON command
238 * @priv: eeprom and antenna fields are used to determine antenna flags
239 *
240 * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed
241 * iwl3945_mod_params.antenna specifies the antenna diversity mode:
242 *
243 * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
244 * IWL_ANTENNA_MAIN - Force MAIN antenna
245 * IWL_ANTENNA_AUX - Force AUX antenna
246 */
247 __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
248 {
249 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
250
251 switch (iwl3945_mod_params.antenna) {
252 case IWL_ANTENNA_DIVERSITY:
253 return 0;
254
255 case IWL_ANTENNA_MAIN:
256 if (eeprom->antenna_switch_type)
257 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
258 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
259
260 case IWL_ANTENNA_AUX:
261 if (eeprom->antenna_switch_type)
262 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
263 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
264 }
265
266 /* bad antenna selector value */
267 IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
268 iwl3945_mod_params.antenna);
269
270 return 0; /* "diversity" is default if error */
271 }
272
273 static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
274 struct ieee80211_key_conf *keyconf,
275 u8 sta_id)
276 {
277 unsigned long flags;
278 __le16 key_flags = 0;
279 int ret;
280
281 key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
282 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
283
284 if (sta_id == priv->hw_params.bcast_sta_id)
285 key_flags |= STA_KEY_MULTICAST_MSK;
286
287 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
288 keyconf->hw_key_idx = keyconf->keyidx;
289 key_flags &= ~STA_KEY_FLG_INVALID;
290
291 spin_lock_irqsave(&priv->sta_lock, flags);
292 priv->stations_39[sta_id].keyinfo.alg = keyconf->alg;
293 priv->stations_39[sta_id].keyinfo.keylen = keyconf->keylen;
294 memcpy(priv->stations_39[sta_id].keyinfo.key, keyconf->key,
295 keyconf->keylen);
296
297 memcpy(priv->stations_39[sta_id].sta.key.key, keyconf->key,
298 keyconf->keylen);
299
300 if ((priv->stations_39[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
301 == STA_KEY_FLG_NO_ENC)
302 priv->stations_39[sta_id].sta.key.key_offset =
303 iwl_get_free_ucode_key_index(priv);
304 /* else, we are overriding an existing key => no need to allocated room
305 * in uCode. */
306
307 WARN(priv->stations_39[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
308 "no space for a new key");
309
310 priv->stations_39[sta_id].sta.key.key_flags = key_flags;
311 priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
312 priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
313
314 IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
315
316 ret = iwl_send_add_sta(priv,
317 (struct iwl_addsta_cmd *)&priv->stations_39[sta_id].sta, CMD_ASYNC);
318
319 spin_unlock_irqrestore(&priv->sta_lock, flags);
320
321 return ret;
322 }
323
324 static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv,
325 struct ieee80211_key_conf *keyconf,
326 u8 sta_id)
327 {
328 return -EOPNOTSUPP;
329 }
330
331 static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv,
332 struct ieee80211_key_conf *keyconf,
333 u8 sta_id)
334 {
335 return -EOPNOTSUPP;
336 }
337
338 static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
339 {
340 unsigned long flags;
341
342 spin_lock_irqsave(&priv->sta_lock, flags);
343 memset(&priv->stations_39[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
344 memset(&priv->stations_39[sta_id].sta.key, 0,
345 sizeof(struct iwl4965_keyinfo));
346 priv->stations_39[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
347 priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
348 priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
349 spin_unlock_irqrestore(&priv->sta_lock, flags);
350
351 IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
352 iwl_send_add_sta(priv,
353 (struct iwl_addsta_cmd *)&priv->stations_39[sta_id].sta, 0);
354 return 0;
355 }
356
357 static int iwl3945_set_dynamic_key(struct iwl_priv *priv,
358 struct ieee80211_key_conf *keyconf, u8 sta_id)
359 {
360 int ret = 0;
361
362 keyconf->hw_key_idx = HW_KEY_DYNAMIC;
363
364 switch (keyconf->alg) {
365 case ALG_CCMP:
366 ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id);
367 break;
368 case ALG_TKIP:
369 ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id);
370 break;
371 case ALG_WEP:
372 ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id);
373 break;
374 default:
375 IWL_ERR(priv, "Unknown alg: %s alg = %d\n", __func__, keyconf->alg);
376 ret = -EINVAL;
377 }
378
379 IWL_DEBUG_WEP(priv, "Set dynamic key: alg= %d len=%d idx=%d sta=%d ret=%d\n",
380 keyconf->alg, keyconf->keylen, keyconf->keyidx,
381 sta_id, ret);
382
383 return ret;
384 }
385
386 static int iwl3945_remove_static_key(struct iwl_priv *priv)
387 {
388 int ret = -EOPNOTSUPP;
389
390 return ret;
391 }
392
393 static int iwl3945_set_static_key(struct iwl_priv *priv,
394 struct ieee80211_key_conf *key)
395 {
396 if (key->alg == ALG_WEP)
397 return -EOPNOTSUPP;
398
399 IWL_ERR(priv, "Static key invalid: alg %d\n", key->alg);
400 return -EINVAL;
401 }
402
403 static void iwl3945_clear_free_frames(struct iwl_priv *priv)
404 {
405 struct list_head *element;
406
407 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
408 priv->frames_count);
409
410 while (!list_empty(&priv->free_frames)) {
411 element = priv->free_frames.next;
412 list_del(element);
413 kfree(list_entry(element, struct iwl3945_frame, list));
414 priv->frames_count--;
415 }
416
417 if (priv->frames_count) {
418 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
419 priv->frames_count);
420 priv->frames_count = 0;
421 }
422 }
423
424 static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
425 {
426 struct iwl3945_frame *frame;
427 struct list_head *element;
428 if (list_empty(&priv->free_frames)) {
429 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
430 if (!frame) {
431 IWL_ERR(priv, "Could not allocate frame!\n");
432 return NULL;
433 }
434
435 priv->frames_count++;
436 return frame;
437 }
438
439 element = priv->free_frames.next;
440 list_del(element);
441 return list_entry(element, struct iwl3945_frame, list);
442 }
443
444 static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
445 {
446 memset(frame, 0, sizeof(*frame));
447 list_add(&frame->list, &priv->free_frames);
448 }
449
450 unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
451 struct ieee80211_hdr *hdr,
452 int left)
453 {
454
455 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
456 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
457 (priv->iw_mode != NL80211_IFTYPE_AP)))
458 return 0;
459
460 if (priv->ibss_beacon->len > left)
461 return 0;
462
463 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
464
465 return priv->ibss_beacon->len;
466 }
467
468 static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
469 {
470 struct iwl3945_frame *frame;
471 unsigned int frame_size;
472 int rc;
473 u8 rate;
474
475 frame = iwl3945_get_free_frame(priv);
476
477 if (!frame) {
478 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
479 "command.\n");
480 return -ENOMEM;
481 }
482
483 rate = iwl_rate_get_lowest_plcp(priv);
484
485 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
486
487 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
488 &frame->u.cmd[0]);
489
490 iwl3945_free_frame(priv, frame);
491
492 return rc;
493 }
494
495 static void iwl3945_unset_hw_params(struct iwl_priv *priv)
496 {
497 if (priv->shared_virt)
498 pci_free_consistent(priv->pci_dev,
499 sizeof(struct iwl3945_shared),
500 priv->shared_virt,
501 priv->shared_phys);
502 }
503
504 #define MAX_UCODE_BEACON_INTERVAL 1024
505 #define INTEL_CONN_LISTEN_INTERVAL cpu_to_le16(0xA)
506
507 static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
508 {
509 u16 new_val = 0;
510 u16 beacon_factor = 0;
511
512 beacon_factor =
513 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
514 / MAX_UCODE_BEACON_INTERVAL;
515 new_val = beacon_val / beacon_factor;
516
517 return cpu_to_le16(new_val);
518 }
519
520 static void iwl3945_setup_rxon_timing(struct iwl_priv *priv)
521 {
522 u64 interval_tm_unit;
523 u64 tsf, result;
524 unsigned long flags;
525 struct ieee80211_conf *conf = NULL;
526 u16 beacon_int = 0;
527
528 conf = ieee80211_get_hw_conf(priv->hw);
529
530 spin_lock_irqsave(&priv->lock, flags);
531 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
532 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
533
534 tsf = priv->timestamp;
535
536 beacon_int = priv->beacon_int;
537 spin_unlock_irqrestore(&priv->lock, flags);
538
539 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
540 if (beacon_int == 0) {
541 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
542 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
543 } else {
544 priv->rxon_timing.beacon_interval =
545 cpu_to_le16(beacon_int);
546 priv->rxon_timing.beacon_interval =
547 iwl3945_adjust_beacon_interval(
548 le16_to_cpu(priv->rxon_timing.beacon_interval));
549 }
550
551 priv->rxon_timing.atim_window = 0;
552 } else {
553 priv->rxon_timing.beacon_interval =
554 iwl3945_adjust_beacon_interval(
555 priv->vif->bss_conf.beacon_int);
556 /* TODO: we need to get atim_window from upper stack
557 * for now we set to 0 */
558 priv->rxon_timing.atim_window = 0;
559 }
560
561 interval_tm_unit =
562 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
563 result = do_div(tsf, interval_tm_unit);
564 priv->rxon_timing.beacon_init_val =
565 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
566
567 IWL_DEBUG_ASSOC(priv,
568 "beacon interval %d beacon timer %d beacon tim %d\n",
569 le16_to_cpu(priv->rxon_timing.beacon_interval),
570 le32_to_cpu(priv->rxon_timing.beacon_init_val),
571 le16_to_cpu(priv->rxon_timing.atim_window));
572 }
573
574 static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
575 struct ieee80211_tx_info *info,
576 struct iwl_cmd *cmd,
577 struct sk_buff *skb_frag,
578 int sta_id)
579 {
580 struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
581 struct iwl3945_hw_key *keyinfo =
582 &priv->stations_39[sta_id].keyinfo;
583
584 switch (keyinfo->alg) {
585 case ALG_CCMP:
586 tx->sec_ctl = TX_CMD_SEC_CCM;
587 memcpy(tx->key, keyinfo->key, keyinfo->keylen);
588 IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
589 break;
590
591 case ALG_TKIP:
592 break;
593
594 case ALG_WEP:
595 tx->sec_ctl = TX_CMD_SEC_WEP |
596 (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
597
598 if (keyinfo->keylen == 13)
599 tx->sec_ctl |= TX_CMD_SEC_KEY128;
600
601 memcpy(&tx->key[3], keyinfo->key, keyinfo->keylen);
602
603 IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
604 "with key %d\n", info->control.hw_key->hw_key_idx);
605 break;
606
607 default:
608 IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
609 break;
610 }
611 }
612
613 /*
614 * handle build REPLY_TX command notification.
615 */
616 static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
617 struct iwl_cmd *cmd,
618 struct ieee80211_tx_info *info,
619 struct ieee80211_hdr *hdr, u8 std_id)
620 {
621 struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
622 __le32 tx_flags = tx->tx_flags;
623 __le16 fc = hdr->frame_control;
624 u8 rc_flags = info->control.rates[0].flags;
625
626 tx->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
627 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
628 tx_flags |= TX_CMD_FLG_ACK_MSK;
629 if (ieee80211_is_mgmt(fc))
630 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
631 if (ieee80211_is_probe_resp(fc) &&
632 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
633 tx_flags |= TX_CMD_FLG_TSF_MSK;
634 } else {
635 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
636 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
637 }
638
639 tx->sta_id = std_id;
640 if (ieee80211_has_morefrags(fc))
641 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
642
643 if (ieee80211_is_data_qos(fc)) {
644 u8 *qc = ieee80211_get_qos_ctl(hdr);
645 tx->tid_tspec = qc[0] & 0xf;
646 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
647 } else {
648 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
649 }
650
651 if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
652 tx_flags |= TX_CMD_FLG_RTS_MSK;
653 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
654 } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
655 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
656 tx_flags |= TX_CMD_FLG_CTS_MSK;
657 }
658
659 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
660 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
661
662 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
663 if (ieee80211_is_mgmt(fc)) {
664 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
665 tx->timeout.pm_frame_timeout = cpu_to_le16(3);
666 else
667 tx->timeout.pm_frame_timeout = cpu_to_le16(2);
668 } else {
669 tx->timeout.pm_frame_timeout = 0;
670 #ifdef CONFIG_IWLWIFI_LEDS
671 priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
672 #endif
673 }
674
675 tx->driver_txop = 0;
676 tx->tx_flags = tx_flags;
677 tx->next_frame_len = 0;
678 }
679
680 /*
681 * start REPLY_TX command process
682 */
683 static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
684 {
685 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
686 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
687 struct iwl3945_tx_cmd *tx;
688 struct iwl_tx_queue *txq = NULL;
689 struct iwl_queue *q = NULL;
690 struct iwl_cmd *out_cmd = NULL;
691 dma_addr_t phys_addr;
692 dma_addr_t txcmd_phys;
693 int txq_id = skb_get_queue_mapping(skb);
694 u16 len, idx, len_org, hdr_len; /* TODO: len_org is not used */
695 u8 id;
696 u8 unicast;
697 u8 sta_id;
698 u8 tid = 0;
699 u16 seq_number = 0;
700 __le16 fc;
701 u8 wait_write_ptr = 0;
702 u8 *qc = NULL;
703 unsigned long flags;
704 int rc;
705
706 spin_lock_irqsave(&priv->lock, flags);
707 if (iwl_is_rfkill(priv)) {
708 IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
709 goto drop_unlock;
710 }
711
712 if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
713 IWL_ERR(priv, "ERROR: No TX rate available.\n");
714 goto drop_unlock;
715 }
716
717 unicast = !is_multicast_ether_addr(hdr->addr1);
718 id = 0;
719
720 fc = hdr->frame_control;
721
722 #ifdef CONFIG_IWLWIFI_DEBUG
723 if (ieee80211_is_auth(fc))
724 IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
725 else if (ieee80211_is_assoc_req(fc))
726 IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
727 else if (ieee80211_is_reassoc_req(fc))
728 IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
729 #endif
730
731 /* drop all data frame if we are not associated */
732 if (ieee80211_is_data(fc) &&
733 (!iwl_is_monitor_mode(priv)) && /* packet injection */
734 (!iwl_is_associated(priv) ||
735 ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
736 IWL_DEBUG_DROP(priv, "Dropping - !iwl_is_associated\n");
737 goto drop_unlock;
738 }
739
740 spin_unlock_irqrestore(&priv->lock, flags);
741
742 hdr_len = ieee80211_hdrlen(fc);
743
744 /* Find (or create) index into station table for destination station */
745 sta_id = iwl_get_sta_id(priv, hdr);
746 if (sta_id == IWL_INVALID_STATION) {
747 IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
748 hdr->addr1);
749 goto drop;
750 }
751
752 IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
753
754 if (ieee80211_is_data_qos(fc)) {
755 qc = ieee80211_get_qos_ctl(hdr);
756 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
757 seq_number = priv->stations_39[sta_id].tid[tid].seq_number &
758 IEEE80211_SCTL_SEQ;
759 hdr->seq_ctrl = cpu_to_le16(seq_number) |
760 (hdr->seq_ctrl &
761 cpu_to_le16(IEEE80211_SCTL_FRAG));
762 seq_number += 0x10;
763 }
764
765 /* Descriptor for chosen Tx queue */
766 txq = &priv->txq[txq_id];
767 q = &txq->q;
768
769 spin_lock_irqsave(&priv->lock, flags);
770
771 idx = get_cmd_index(q, q->write_ptr, 0);
772
773 /* Set up driver data for this TFD */
774 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
775 txq->txb[q->write_ptr].skb[0] = skb;
776
777 /* Init first empty entry in queue's array of Tx/cmd buffers */
778 out_cmd = txq->cmd[idx];
779 tx = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
780 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
781 memset(tx, 0, sizeof(*tx));
782
783 /*
784 * Set up the Tx-command (not MAC!) header.
785 * Store the chosen Tx queue and TFD index within the sequence field;
786 * after Tx, uCode's Tx response will return this value so driver can
787 * locate the frame within the tx queue and do post-tx processing.
788 */
789 out_cmd->hdr.cmd = REPLY_TX;
790 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
791 INDEX_TO_SEQ(q->write_ptr)));
792
793 /* Copy MAC header from skb into command buffer */
794 memcpy(tx->hdr, hdr, hdr_len);
795
796
797 if (info->control.hw_key)
798 iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id);
799
800 /* TODO need this for burst mode later on */
801 iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
802
803 /* set is_hcca to 0; it probably will never be implemented */
804 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
805
806 /* Total # bytes to be transmitted */
807 len = (u16)skb->len;
808 tx->len = cpu_to_le16(len);
809
810
811 tx->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
812 tx->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
813
814 if (!ieee80211_has_morefrags(hdr->frame_control)) {
815 txq->need_update = 1;
816 if (qc)
817 priv->stations_39[sta_id].tid[tid].seq_number = seq_number;
818 } else {
819 wait_write_ptr = 1;
820 txq->need_update = 0;
821 }
822
823 IWL_DEBUG_TX(priv, "sequence nr = 0X%x \n",
824 le16_to_cpu(out_cmd->hdr.sequence));
825 IWL_DEBUG_TX(priv, "tx_flags = 0X%x \n", le32_to_cpu(tx->tx_flags));
826 iwl_print_hex_dump(priv, IWL_DL_TX, tx, sizeof(*tx));
827 iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx->hdr,
828 ieee80211_hdrlen(fc));
829
830 /*
831 * Use the first empty entry in this queue's command buffer array
832 * to contain the Tx command and MAC header concatenated together
833 * (payload data will be in another buffer).
834 * Size of this varies, due to varying MAC header length.
835 * If end is not dword aligned, we'll have 2 extra bytes at the end
836 * of the MAC header (device reads on dword boundaries).
837 * We'll tell device about this padding later.
838 */
839 len = sizeof(struct iwl3945_tx_cmd) +
840 sizeof(struct iwl_cmd_header) + hdr_len;
841
842 len_org = len;
843 len = (len + 3) & ~3;
844
845 if (len_org != len)
846 len_org = 1;
847 else
848 len_org = 0;
849
850 /* Physical address of this Tx command's header (not MAC header!),
851 * within command buffer array. */
852 txcmd_phys = pci_map_single(priv->pci_dev, &out_cmd->hdr,
853 len, PCI_DMA_TODEVICE);
854 /* we do not map meta data ... so we can safely access address to
855 * provide to unmap command*/
856 pci_unmap_addr_set(&out_cmd->meta, mapping, txcmd_phys);
857 pci_unmap_len_set(&out_cmd->meta, len, len);
858
859 /* Add buffer containing Tx command and MAC(!) header to TFD's
860 * first entry */
861 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
862 txcmd_phys, len, 1, 0);
863
864
865 /* Set up TFD's 2nd entry to point directly to remainder of skb,
866 * if any (802.11 null frames have no payload). */
867 len = skb->len - hdr_len;
868 if (len) {
869 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
870 len, PCI_DMA_TODEVICE);
871 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
872 phys_addr, len,
873 0, U32_PAD(len));
874 }
875
876
877 /* Tell device the write index *just past* this latest filled TFD */
878 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
879 rc = iwl_txq_update_write_ptr(priv, txq);
880 spin_unlock_irqrestore(&priv->lock, flags);
881
882 if (rc)
883 return rc;
884
885 if ((iwl_queue_space(q) < q->high_mark)
886 && priv->mac80211_registered) {
887 if (wait_write_ptr) {
888 spin_lock_irqsave(&priv->lock, flags);
889 txq->need_update = 1;
890 iwl_txq_update_write_ptr(priv, txq);
891 spin_unlock_irqrestore(&priv->lock, flags);
892 }
893
894 iwl_stop_queue(priv, skb_get_queue_mapping(skb));
895 }
896
897 return 0;
898
899 drop_unlock:
900 spin_unlock_irqrestore(&priv->lock, flags);
901 drop:
902 return -1;
903 }
904
905 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
906
907 #include "iwl-spectrum.h"
908
909 #define BEACON_TIME_MASK_LOW 0x00FFFFFF
910 #define BEACON_TIME_MASK_HIGH 0xFF000000
911 #define TIME_UNIT 1024
912
913 /*
914 * extended beacon time format
915 * time in usec will be changed into a 32-bit value in 8:24 format
916 * the high 1 byte is the beacon counts
917 * the lower 3 bytes is the time in usec within one beacon interval
918 */
919
920 static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
921 {
922 u32 quot;
923 u32 rem;
924 u32 interval = beacon_interval * 1024;
925
926 if (!interval || !usec)
927 return 0;
928
929 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
930 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
931
932 return (quot << 24) + rem;
933 }
934
935 /* base is usually what we get from ucode with each received frame,
936 * the same as HW timer counter counting down
937 */
938
939 static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
940 {
941 u32 base_low = base & BEACON_TIME_MASK_LOW;
942 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
943 u32 interval = beacon_interval * TIME_UNIT;
944 u32 res = (base & BEACON_TIME_MASK_HIGH) +
945 (addon & BEACON_TIME_MASK_HIGH);
946
947 if (base_low > addon_low)
948 res += base_low - addon_low;
949 else if (base_low < addon_low) {
950 res += interval + base_low - addon_low;
951 res += (1 << 24);
952 } else
953 res += (1 << 24);
954
955 return cpu_to_le32(res);
956 }
957
958 static int iwl3945_get_measurement(struct iwl_priv *priv,
959 struct ieee80211_measurement_params *params,
960 u8 type)
961 {
962 struct iwl_spectrum_cmd spectrum;
963 struct iwl_rx_packet *res;
964 struct iwl_host_cmd cmd = {
965 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
966 .data = (void *)&spectrum,
967 .meta.flags = CMD_WANT_SKB,
968 };
969 u32 add_time = le64_to_cpu(params->start_time);
970 int rc;
971 int spectrum_resp_status;
972 int duration = le16_to_cpu(params->duration);
973
974 if (iwl_is_associated(priv))
975 add_time =
976 iwl3945_usecs_to_beacons(
977 le64_to_cpu(params->start_time) - priv->last_tsf,
978 le16_to_cpu(priv->rxon_timing.beacon_interval));
979
980 memset(&spectrum, 0, sizeof(spectrum));
981
982 spectrum.channel_count = cpu_to_le16(1);
983 spectrum.flags =
984 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
985 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
986 cmd.len = sizeof(spectrum);
987 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
988
989 if (iwl_is_associated(priv))
990 spectrum.start_time =
991 iwl3945_add_beacon_time(priv->last_beacon_time,
992 add_time,
993 le16_to_cpu(priv->rxon_timing.beacon_interval));
994 else
995 spectrum.start_time = 0;
996
997 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
998 spectrum.channels[0].channel = params->channel;
999 spectrum.channels[0].type = type;
1000 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
1001 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
1002 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
1003
1004 rc = iwl_send_cmd_sync(priv, &cmd);
1005 if (rc)
1006 return rc;
1007
1008 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
1009 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1010 IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
1011 rc = -EIO;
1012 }
1013
1014 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
1015 switch (spectrum_resp_status) {
1016 case 0: /* Command will be handled */
1017 if (res->u.spectrum.id != 0xff) {
1018 IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
1019 res->u.spectrum.id);
1020 priv->measurement_status &= ~MEASUREMENT_READY;
1021 }
1022 priv->measurement_status |= MEASUREMENT_ACTIVE;
1023 rc = 0;
1024 break;
1025
1026 case 1: /* Command will not be handled */
1027 rc = -EAGAIN;
1028 break;
1029 }
1030
1031 dev_kfree_skb_any(cmd.meta.u.skb);
1032
1033 return rc;
1034 }
1035 #endif
1036
1037 static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
1038 struct iwl_rx_mem_buffer *rxb)
1039 {
1040 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
1041 struct iwl_alive_resp *palive;
1042 struct delayed_work *pwork;
1043
1044 palive = &pkt->u.alive_frame;
1045
1046 IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
1047 "0x%01X 0x%01X\n",
1048 palive->is_valid, palive->ver_type,
1049 palive->ver_subtype);
1050
1051 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
1052 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
1053 memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
1054 sizeof(struct iwl_alive_resp));
1055 pwork = &priv->init_alive_start;
1056 } else {
1057 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
1058 memcpy(&priv->card_alive, &pkt->u.alive_frame,
1059 sizeof(struct iwl_alive_resp));
1060 pwork = &priv->alive_start;
1061 iwl3945_disable_events(priv);
1062 }
1063
1064 /* We delay the ALIVE response by 5ms to
1065 * give the HW RF Kill time to activate... */
1066 if (palive->is_valid == UCODE_VALID_OK)
1067 queue_delayed_work(priv->workqueue, pwork,
1068 msecs_to_jiffies(5));
1069 else
1070 IWL_WARN(priv, "uCode did not respond OK.\n");
1071 }
1072
1073 static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
1074 struct iwl_rx_mem_buffer *rxb)
1075 {
1076 #ifdef CONFIG_IWLWIFI_DEBUG
1077 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
1078 #endif
1079
1080 IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
1081 return;
1082 }
1083
1084 static void iwl3945_bg_beacon_update(struct work_struct *work)
1085 {
1086 struct iwl_priv *priv =
1087 container_of(work, struct iwl_priv, beacon_update);
1088 struct sk_buff *beacon;
1089
1090 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
1091 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
1092
1093 if (!beacon) {
1094 IWL_ERR(priv, "update beacon failed\n");
1095 return;
1096 }
1097
1098 mutex_lock(&priv->mutex);
1099 /* new beacon skb is allocated every time; dispose previous.*/
1100 if (priv->ibss_beacon)
1101 dev_kfree_skb(priv->ibss_beacon);
1102
1103 priv->ibss_beacon = beacon;
1104 mutex_unlock(&priv->mutex);
1105
1106 iwl3945_send_beacon_cmd(priv);
1107 }
1108
1109 static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
1110 struct iwl_rx_mem_buffer *rxb)
1111 {
1112 #ifdef CONFIG_IWLWIFI_DEBUG
1113 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
1114 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
1115 u8 rate = beacon->beacon_notify_hdr.rate;
1116
1117 IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
1118 "tsf %d %d rate %d\n",
1119 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
1120 beacon->beacon_notify_hdr.failure_frame,
1121 le32_to_cpu(beacon->ibss_mgr_status),
1122 le32_to_cpu(beacon->high_tsf),
1123 le32_to_cpu(beacon->low_tsf), rate);
1124 #endif
1125
1126 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
1127 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
1128 queue_work(priv->workqueue, &priv->beacon_update);
1129 }
1130
1131 /* Handle notification from uCode that card's power state is changing
1132 * due to software, hardware, or critical temperature RFKILL */
1133 static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
1134 struct iwl_rx_mem_buffer *rxb)
1135 {
1136 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
1137 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
1138 unsigned long status = priv->status;
1139
1140 IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s\n",
1141 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
1142 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
1143
1144 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
1145 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
1146
1147 if (flags & HW_CARD_DISABLED)
1148 set_bit(STATUS_RF_KILL_HW, &priv->status);
1149 else
1150 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1151
1152
1153 if (flags & SW_CARD_DISABLED)
1154 set_bit(STATUS_RF_KILL_SW, &priv->status);
1155 else
1156 clear_bit(STATUS_RF_KILL_SW, &priv->status);
1157
1158 iwl_scan_cancel(priv);
1159
1160 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
1161 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
1162 (test_bit(STATUS_RF_KILL_SW, &status) !=
1163 test_bit(STATUS_RF_KILL_SW, &priv->status)))
1164 queue_work(priv->workqueue, &priv->rf_kill);
1165 else
1166 wake_up_interruptible(&priv->wait_command_queue);
1167 }
1168
1169 /**
1170 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
1171 *
1172 * Setup the RX handlers for each of the reply types sent from the uCode
1173 * to the host.
1174 *
1175 * This function chains into the hardware specific files for them to setup
1176 * any hardware specific handlers as well.
1177 */
1178 static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
1179 {
1180 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
1181 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
1182 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
1183 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
1184 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
1185 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
1186 iwl_rx_pm_debug_statistics_notif;
1187 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
1188
1189 /*
1190 * The same handler is used for both the REPLY to a discrete
1191 * statistics request from the host as well as for the periodic
1192 * statistics notifications (after received beacons) from the uCode.
1193 */
1194 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
1195 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
1196
1197 iwl_setup_spectrum_handlers(priv);
1198 iwl_setup_rx_scan_handlers(priv);
1199 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
1200
1201 /* Set up hardware specific Rx handlers */
1202 iwl3945_hw_rx_handler_setup(priv);
1203 }
1204
1205 /************************** RX-FUNCTIONS ****************************/
1206 /*
1207 * Rx theory of operation
1208 *
1209 * The host allocates 32 DMA target addresses and passes the host address
1210 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
1211 * 0 to 31
1212 *
1213 * Rx Queue Indexes
1214 * The host/firmware share two index registers for managing the Rx buffers.
1215 *
1216 * The READ index maps to the first position that the firmware may be writing
1217 * to -- the driver can read up to (but not including) this position and get
1218 * good data.
1219 * The READ index is managed by the firmware once the card is enabled.
1220 *
1221 * The WRITE index maps to the last position the driver has read from -- the
1222 * position preceding WRITE is the last slot the firmware can place a packet.
1223 *
1224 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
1225 * WRITE = READ.
1226 *
1227 * During initialization, the host sets up the READ queue position to the first
1228 * INDEX position, and WRITE to the last (READ - 1 wrapped)
1229 *
1230 * When the firmware places a packet in a buffer, it will advance the READ index
1231 * and fire the RX interrupt. The driver can then query the READ index and
1232 * process as many packets as possible, moving the WRITE index forward as it
1233 * resets the Rx queue buffers with new memory.
1234 *
1235 * The management in the driver is as follows:
1236 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
1237 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
1238 * to replenish the iwl->rxq->rx_free.
1239 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
1240 * iwl->rxq is replenished and the READ INDEX is updated (updating the
1241 * 'processed' and 'read' driver indexes as well)
1242 * + A received packet is processed and handed to the kernel network stack,
1243 * detached from the iwl->rxq. The driver 'processed' index is updated.
1244 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
1245 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
1246 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
1247 * were enough free buffers and RX_STALLED is set it is cleared.
1248 *
1249 *
1250 * Driver sequence:
1251 *
1252 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
1253 * iwl3945_rx_queue_restock
1254 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
1255 * queue, updates firmware pointers, and updates
1256 * the WRITE index. If insufficient rx_free buffers
1257 * are available, schedules iwl3945_rx_replenish
1258 *
1259 * -- enable interrupts --
1260 * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
1261 * READ INDEX, detaching the SKB from the pool.
1262 * Moves the packet buffer from queue to rx_used.
1263 * Calls iwl3945_rx_queue_restock to refill any empty
1264 * slots.
1265 * ...
1266 *
1267 */
1268
1269 /**
1270 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
1271 */
1272 static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
1273 dma_addr_t dma_addr)
1274 {
1275 return cpu_to_le32((u32)dma_addr);
1276 }
1277
1278 /**
1279 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
1280 *
1281 * If there are slots in the RX queue that need to be restocked,
1282 * and we have free pre-allocated buffers, fill the ranks as much
1283 * as we can, pulling from rx_free.
1284 *
1285 * This moves the 'write' index forward to catch up with 'processed', and
1286 * also updates the memory address in the firmware to reference the new
1287 * target buffer.
1288 */
1289 static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
1290 {
1291 struct iwl_rx_queue *rxq = &priv->rxq;
1292 struct list_head *element;
1293 struct iwl_rx_mem_buffer *rxb;
1294 unsigned long flags;
1295 int write, rc;
1296
1297 spin_lock_irqsave(&rxq->lock, flags);
1298 write = rxq->write & ~0x7;
1299 while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
1300 /* Get next free Rx buffer, remove from free list */
1301 element = rxq->rx_free.next;
1302 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
1303 list_del(element);
1304
1305 /* Point to Rx buffer via next RBD in circular buffer */
1306 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->real_dma_addr);
1307 rxq->queue[rxq->write] = rxb;
1308 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
1309 rxq->free_count--;
1310 }
1311 spin_unlock_irqrestore(&rxq->lock, flags);
1312 /* If the pre-allocated buffer pool is dropping low, schedule to
1313 * refill it */
1314 if (rxq->free_count <= RX_LOW_WATERMARK)
1315 queue_work(priv->workqueue, &priv->rx_replenish);
1316
1317
1318 /* If we've added more space for the firmware to place data, tell it.
1319 * Increment device's write pointer in multiples of 8. */
1320 if ((write != (rxq->write & ~0x7))
1321 || (abs(rxq->write - rxq->read) > 7)) {
1322 spin_lock_irqsave(&rxq->lock, flags);
1323 rxq->need_update = 1;
1324 spin_unlock_irqrestore(&rxq->lock, flags);
1325 rc = iwl_rx_queue_update_write_ptr(priv, rxq);
1326 if (rc)
1327 return rc;
1328 }
1329
1330 return 0;
1331 }
1332
1333 /**
1334 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
1335 *
1336 * When moving to rx_free an SKB is allocated for the slot.
1337 *
1338 * Also restock the Rx queue via iwl3945_rx_queue_restock.
1339 * This is called as a scheduled work item (except for during initialization)
1340 */
1341 static void iwl3945_rx_allocate(struct iwl_priv *priv)
1342 {
1343 struct iwl_rx_queue *rxq = &priv->rxq;
1344 struct list_head *element;
1345 struct iwl_rx_mem_buffer *rxb;
1346 unsigned long flags;
1347 spin_lock_irqsave(&rxq->lock, flags);
1348 while (!list_empty(&rxq->rx_used)) {
1349 element = rxq->rx_used.next;
1350 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
1351
1352 /* Alloc a new receive buffer */
1353 rxb->skb =
1354 alloc_skb(priv->hw_params.rx_buf_size,
1355 __GFP_NOWARN | GFP_ATOMIC);
1356 if (!rxb->skb) {
1357 if (net_ratelimit())
1358 IWL_CRIT(priv, ": Can not allocate SKB buffers\n");
1359 /* We don't reschedule replenish work here -- we will
1360 * call the restock method and if it still needs
1361 * more buffers it will schedule replenish */
1362 break;
1363 }
1364
1365 /* If radiotap head is required, reserve some headroom here.
1366 * The physical head count is a variable rx_stats->phy_count.
1367 * We reserve 4 bytes here. Plus these extra bytes, the
1368 * headroom of the physical head should be enough for the
1369 * radiotap head that iwl3945 supported. See iwl3945_rt.
1370 */
1371 skb_reserve(rxb->skb, 4);
1372
1373 priv->alloc_rxb_skb++;
1374 list_del(element);
1375
1376 /* Get physical address of RB/SKB */
1377 rxb->real_dma_addr = pci_map_single(priv->pci_dev,
1378 rxb->skb->data,
1379 priv->hw_params.rx_buf_size,
1380 PCI_DMA_FROMDEVICE);
1381 list_add_tail(&rxb->list, &rxq->rx_free);
1382 rxq->free_count++;
1383 }
1384 spin_unlock_irqrestore(&rxq->lock, flags);
1385 }
1386
1387 void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
1388 {
1389 unsigned long flags;
1390 int i;
1391 spin_lock_irqsave(&rxq->lock, flags);
1392 INIT_LIST_HEAD(&rxq->rx_free);
1393 INIT_LIST_HEAD(&rxq->rx_used);
1394 /* Fill the rx_used queue with _all_ of the Rx buffers */
1395 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
1396 /* In the reset function, these buffers may have been allocated
1397 * to an SKB, so we need to unmap and free potential storage */
1398 if (rxq->pool[i].skb != NULL) {
1399 pci_unmap_single(priv->pci_dev,
1400 rxq->pool[i].real_dma_addr,
1401 priv->hw_params.rx_buf_size,
1402 PCI_DMA_FROMDEVICE);
1403 priv->alloc_rxb_skb--;
1404 dev_kfree_skb(rxq->pool[i].skb);
1405 rxq->pool[i].skb = NULL;
1406 }
1407 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
1408 }
1409
1410 /* Set us so that we have processed and used all buffers, but have
1411 * not restocked the Rx queue with fresh buffers */
1412 rxq->read = rxq->write = 0;
1413 rxq->free_count = 0;
1414 spin_unlock_irqrestore(&rxq->lock, flags);
1415 }
1416
1417 /*
1418 * this should be called while priv->lock is locked
1419 */
1420 static void __iwl3945_rx_replenish(void *data)
1421 {
1422 struct iwl_priv *priv = data;
1423
1424 iwl3945_rx_allocate(priv);
1425 iwl3945_rx_queue_restock(priv);
1426 }
1427
1428
1429 void iwl3945_rx_replenish(void *data)
1430 {
1431 struct iwl_priv *priv = data;
1432 unsigned long flags;
1433
1434 iwl3945_rx_allocate(priv);
1435
1436 spin_lock_irqsave(&priv->lock, flags);
1437 iwl3945_rx_queue_restock(priv);
1438 spin_unlock_irqrestore(&priv->lock, flags);
1439 }
1440
1441 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
1442 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
1443 * This free routine walks the list of POOL entries and if SKB is set to
1444 * non NULL it is unmapped and freed
1445 */
1446 static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
1447 {
1448 int i;
1449 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
1450 if (rxq->pool[i].skb != NULL) {
1451 pci_unmap_single(priv->pci_dev,
1452 rxq->pool[i].real_dma_addr,
1453 priv->hw_params.rx_buf_size,
1454 PCI_DMA_FROMDEVICE);
1455 dev_kfree_skb(rxq->pool[i].skb);
1456 }
1457 }
1458
1459 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
1460 rxq->dma_addr);
1461 pci_free_consistent(priv->pci_dev, sizeof(struct iwl_rb_status),
1462 rxq->rb_stts, rxq->rb_stts_dma);
1463 rxq->bd = NULL;
1464 rxq->rb_stts = NULL;
1465 }
1466 EXPORT_SYMBOL(iwl3945_rx_queue_free);
1467
1468
1469 /* Convert linear signal-to-noise ratio into dB */
1470 static u8 ratio2dB[100] = {
1471 /* 0 1 2 3 4 5 6 7 8 9 */
1472 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
1473 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
1474 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
1475 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
1476 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
1477 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
1478 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
1479 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
1480 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
1481 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
1482 };
1483
1484 /* Calculates a relative dB value from a ratio of linear
1485 * (i.e. not dB) signal levels.
1486 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
1487 int iwl3945_calc_db_from_ratio(int sig_ratio)
1488 {
1489 /* 1000:1 or higher just report as 60 dB */
1490 if (sig_ratio >= 1000)
1491 return 60;
1492
1493 /* 100:1 or higher, divide by 10 and use table,
1494 * add 20 dB to make up for divide by 10 */
1495 if (sig_ratio >= 100)
1496 return 20 + (int)ratio2dB[sig_ratio/10];
1497
1498 /* We shouldn't see this */
1499 if (sig_ratio < 1)
1500 return 0;
1501
1502 /* Use table for ratios 1:1 - 99:1 */
1503 return (int)ratio2dB[sig_ratio];
1504 }
1505
1506 #define PERFECT_RSSI (-20) /* dBm */
1507 #define WORST_RSSI (-95) /* dBm */
1508 #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
1509
1510 /* Calculate an indication of rx signal quality (a percentage, not dBm!).
1511 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
1512 * about formulas used below. */
1513 int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
1514 {
1515 int sig_qual;
1516 int degradation = PERFECT_RSSI - rssi_dbm;
1517
1518 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
1519 * as indicator; formula is (signal dbm - noise dbm).
1520 * SNR at or above 40 is a great signal (100%).
1521 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
1522 * Weakest usable signal is usually 10 - 15 dB SNR. */
1523 if (noise_dbm) {
1524 if (rssi_dbm - noise_dbm >= 40)
1525 return 100;
1526 else if (rssi_dbm < noise_dbm)
1527 return 0;
1528 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
1529
1530 /* Else use just the signal level.
1531 * This formula is a least squares fit of data points collected and
1532 * compared with a reference system that had a percentage (%) display
1533 * for signal quality. */
1534 } else
1535 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
1536 (15 * RSSI_RANGE + 62 * degradation)) /
1537 (RSSI_RANGE * RSSI_RANGE);
1538
1539 if (sig_qual > 100)
1540 sig_qual = 100;
1541 else if (sig_qual < 1)
1542 sig_qual = 0;
1543
1544 return sig_qual;
1545 }
1546
1547 /**
1548 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
1549 *
1550 * Uses the priv->rx_handlers callback function array to invoke
1551 * the appropriate handlers, including command responses,
1552 * frame-received notifications, and other notifications.
1553 */
1554 static void iwl3945_rx_handle(struct iwl_priv *priv)
1555 {
1556 struct iwl_rx_mem_buffer *rxb;
1557 struct iwl_rx_packet *pkt;
1558 struct iwl_rx_queue *rxq = &priv->rxq;
1559 u32 r, i;
1560 int reclaim;
1561 unsigned long flags;
1562 u8 fill_rx = 0;
1563 u32 count = 8;
1564
1565 /* uCode's read index (stored in shared DRAM) indicates the last Rx
1566 * buffer that the driver may process (last buffer filled by ucode). */
1567 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
1568 i = rxq->read;
1569
1570 if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
1571 fill_rx = 1;
1572 /* Rx interrupt, but nothing sent from uCode */
1573 if (i == r)
1574 IWL_DEBUG(priv, IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
1575
1576 while (i != r) {
1577 rxb = rxq->queue[i];
1578
1579 /* If an RXB doesn't have a Rx queue slot associated with it,
1580 * then a bug has been introduced in the queue refilling
1581 * routines -- catch it here */
1582 BUG_ON(rxb == NULL);
1583
1584 rxq->queue[i] = NULL;
1585
1586 pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
1587 priv->hw_params.rx_buf_size,
1588 PCI_DMA_FROMDEVICE);
1589 pkt = (struct iwl_rx_packet *)rxb->skb->data;
1590
1591 /* Reclaim a command buffer only if this packet is a response
1592 * to a (driver-originated) command.
1593 * If the packet (e.g. Rx frame) originated from uCode,
1594 * there is no command buffer to reclaim.
1595 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1596 * but apparently a few don't get set; catch them here. */
1597 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1598 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
1599 (pkt->hdr.cmd != REPLY_TX);
1600
1601 /* Based on type of command response or notification,
1602 * handle those that need handling via function in
1603 * rx_handlers table. See iwl3945_setup_rx_handlers() */
1604 if (priv->rx_handlers[pkt->hdr.cmd]) {
1605 IWL_DEBUG(priv, IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
1606 "r = %d, i = %d, %s, 0x%02x\n", r, i,
1607 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1608 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1609 priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
1610 } else {
1611 /* No handling needed */
1612 IWL_DEBUG(priv, IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
1613 "r %d i %d No handler needed for %s, 0x%02x\n",
1614 r, i, get_cmd_string(pkt->hdr.cmd),
1615 pkt->hdr.cmd);
1616 }
1617
1618 if (reclaim) {
1619 /* Invoke any callbacks, transfer the skb to caller, and
1620 * fire off the (possibly) blocking iwl_send_cmd()
1621 * as we reclaim the driver command queue */
1622 if (rxb && rxb->skb)
1623 iwl_tx_cmd_complete(priv, rxb);
1624 else
1625 IWL_WARN(priv, "Claim null rxb?\n");
1626 }
1627
1628 /* For now we just don't re-use anything. We can tweak this
1629 * later to try and re-use notification packets and SKBs that
1630 * fail to Rx correctly */
1631 if (rxb->skb != NULL) {
1632 priv->alloc_rxb_skb--;
1633 dev_kfree_skb_any(rxb->skb);
1634 rxb->skb = NULL;
1635 }
1636
1637 spin_lock_irqsave(&rxq->lock, flags);
1638 list_add_tail(&rxb->list, &priv->rxq.rx_used);
1639 spin_unlock_irqrestore(&rxq->lock, flags);
1640 i = (i + 1) & RX_QUEUE_MASK;
1641 /* If there are a lot of unused frames,
1642 * restock the Rx queue so ucode won't assert. */
1643 if (fill_rx) {
1644 count++;
1645 if (count >= 8) {
1646 priv->rxq.read = i;
1647 __iwl3945_rx_replenish(priv);
1648 count = 0;
1649 }
1650 }
1651 }
1652
1653 /* Backtrack one entry */
1654 priv->rxq.read = i;
1655 iwl3945_rx_queue_restock(priv);
1656 }
1657
1658 /* call this function to flush any scheduled tasklet */
1659 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1660 {
1661 /* wait to make sure we flush pending tasklet*/
1662 synchronize_irq(priv->pci_dev->irq);
1663 tasklet_kill(&priv->irq_tasklet);
1664 }
1665
1666 static const char *desc_lookup(int i)
1667 {
1668 switch (i) {
1669 case 1:
1670 return "FAIL";
1671 case 2:
1672 return "BAD_PARAM";
1673 case 3:
1674 return "BAD_CHECKSUM";
1675 case 4:
1676 return "NMI_INTERRUPT";
1677 case 5:
1678 return "SYSASSERT";
1679 case 6:
1680 return "FATAL_ERROR";
1681 }
1682
1683 return "UNKNOWN";
1684 }
1685
1686 #define ERROR_START_OFFSET (1 * sizeof(u32))
1687 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
1688
1689 static void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
1690 {
1691 u32 i;
1692 u32 desc, time, count, base, data1;
1693 u32 blink1, blink2, ilink1, ilink2;
1694 int rc;
1695
1696 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1697
1698 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
1699 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
1700 return;
1701 }
1702
1703 rc = iwl_grab_nic_access(priv);
1704 if (rc) {
1705 IWL_WARN(priv, "Can not read from adapter at this time.\n");
1706 return;
1707 }
1708
1709 count = iwl_read_targ_mem(priv, base);
1710
1711 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1712 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1713 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1714 priv->status, count);
1715 }
1716
1717 IWL_ERR(priv, "Desc Time asrtPC blink2 "
1718 "ilink1 nmiPC Line\n");
1719 for (i = ERROR_START_OFFSET;
1720 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
1721 i += ERROR_ELEM_SIZE) {
1722 desc = iwl_read_targ_mem(priv, base + i);
1723 time =
1724 iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
1725 blink1 =
1726 iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
1727 blink2 =
1728 iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
1729 ilink1 =
1730 iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
1731 ilink2 =
1732 iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
1733 data1 =
1734 iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
1735
1736 IWL_ERR(priv,
1737 "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
1738 desc_lookup(desc), desc, time, blink1, blink2,
1739 ilink1, ilink2, data1);
1740 }
1741
1742 iwl_release_nic_access(priv);
1743
1744 }
1745
1746 #define EVENT_START_OFFSET (6 * sizeof(u32))
1747
1748 /**
1749 * iwl3945_print_event_log - Dump error event log to syslog
1750 *
1751 * NOTE: Must be called with iwl_grab_nic_access() already obtained!
1752 */
1753 static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
1754 u32 num_events, u32 mode)
1755 {
1756 u32 i;
1757 u32 base; /* SRAM byte address of event log header */
1758 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1759 u32 ptr; /* SRAM byte address of log data */
1760 u32 ev, time, data; /* event log data */
1761
1762 if (num_events == 0)
1763 return;
1764
1765 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1766
1767 if (mode == 0)
1768 event_size = 2 * sizeof(u32);
1769 else
1770 event_size = 3 * sizeof(u32);
1771
1772 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1773
1774 /* "time" is actually "data" for mode 0 (no timestamp).
1775 * place event id # at far right for easier visual parsing. */
1776 for (i = 0; i < num_events; i++) {
1777 ev = iwl_read_targ_mem(priv, ptr);
1778 ptr += sizeof(u32);
1779 time = iwl_read_targ_mem(priv, ptr);
1780 ptr += sizeof(u32);
1781 if (mode == 0) {
1782 /* data, ev */
1783 IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
1784 } else {
1785 data = iwl_read_targ_mem(priv, ptr);
1786 ptr += sizeof(u32);
1787 IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev);
1788 }
1789 }
1790 }
1791
1792 static void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
1793 {
1794 int rc;
1795 u32 base; /* SRAM byte address of event log header */
1796 u32 capacity; /* event log capacity in # entries */
1797 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
1798 u32 num_wraps; /* # times uCode wrapped to top of log */
1799 u32 next_entry; /* index of next entry to be written by uCode */
1800 u32 size; /* # entries that we'll print */
1801
1802 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1803 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
1804 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
1805 return;
1806 }
1807
1808 rc = iwl_grab_nic_access(priv);
1809 if (rc) {
1810 IWL_WARN(priv, "Can not read from adapter at this time.\n");
1811 return;
1812 }
1813
1814 /* event log header */
1815 capacity = iwl_read_targ_mem(priv, base);
1816 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1817 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1818 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1819
1820 size = num_wraps ? capacity : next_entry;
1821
1822 /* bail out if nothing in log */
1823 if (size == 0) {
1824 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1825 iwl_release_nic_access(priv);
1826 return;
1827 }
1828
1829 IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
1830 size, num_wraps);
1831
1832 /* if uCode has wrapped back to top of log, start at the oldest entry,
1833 * i.e the next one that uCode would fill. */
1834 if (num_wraps)
1835 iwl3945_print_event_log(priv, next_entry,
1836 capacity - next_entry, mode);
1837
1838 /* (then/else) start at top of log */
1839 iwl3945_print_event_log(priv, 0, next_entry, mode);
1840
1841 iwl_release_nic_access(priv);
1842 }
1843
1844 static void iwl3945_error_recovery(struct iwl_priv *priv)
1845 {
1846 unsigned long flags;
1847
1848 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
1849 sizeof(priv->staging_rxon));
1850 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1851 iwlcore_commit_rxon(priv);
1852
1853 priv->cfg->ops->smgmt->add_station(priv, priv->bssid, 1, 0, NULL);
1854
1855 spin_lock_irqsave(&priv->lock, flags);
1856 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
1857 priv->error_recovering = 0;
1858 spin_unlock_irqrestore(&priv->lock, flags);
1859 }
1860
1861 static void iwl3945_irq_tasklet(struct iwl_priv *priv)
1862 {
1863 u32 inta, handled = 0;
1864 u32 inta_fh;
1865 unsigned long flags;
1866 #ifdef CONFIG_IWLWIFI_DEBUG
1867 u32 inta_mask;
1868 #endif
1869
1870 spin_lock_irqsave(&priv->lock, flags);
1871
1872 /* Ack/clear/reset pending uCode interrupts.
1873 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1874 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
1875 inta = iwl_read32(priv, CSR_INT);
1876 iwl_write32(priv, CSR_INT, inta);
1877
1878 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1879 * Any new interrupts that happen after this, either while we're
1880 * in this tasklet, or later, will show up in next ISR/tasklet. */
1881 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1882 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1883
1884 #ifdef CONFIG_IWLWIFI_DEBUG
1885 if (priv->debug_level & IWL_DL_ISR) {
1886 /* just for debug */
1887 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1888 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1889 inta, inta_mask, inta_fh);
1890 }
1891 #endif
1892
1893 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1894 * atomic, make sure that inta covers all the interrupts that
1895 * we've discovered, even if FH interrupt came in just after
1896 * reading CSR_INT. */
1897 if (inta_fh & CSR39_FH_INT_RX_MASK)
1898 inta |= CSR_INT_BIT_FH_RX;
1899 if (inta_fh & CSR39_FH_INT_TX_MASK)
1900 inta |= CSR_INT_BIT_FH_TX;
1901
1902 /* Now service all interrupt bits discovered above. */
1903 if (inta & CSR_INT_BIT_HW_ERR) {
1904 IWL_ERR(priv, "Microcode HW error detected. Restarting.\n");
1905
1906 /* Tell the device to stop sending interrupts */
1907 iwl_disable_interrupts(priv);
1908
1909 priv->isr_stats.hw++;
1910 iwl_irq_handle_error(priv);
1911
1912 handled |= CSR_INT_BIT_HW_ERR;
1913
1914 spin_unlock_irqrestore(&priv->lock, flags);
1915
1916 return;
1917 }
1918
1919 #ifdef CONFIG_IWLWIFI_DEBUG
1920 if (priv->debug_level & (IWL_DL_ISR)) {
1921 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1922 if (inta & CSR_INT_BIT_SCD) {
1923 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1924 "the frame/frames.\n");
1925 priv->isr_stats.sch++;
1926 }
1927
1928 /* Alive notification via Rx interrupt will do the real work */
1929 if (inta & CSR_INT_BIT_ALIVE) {
1930 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1931 priv->isr_stats.alive++;
1932 }
1933 }
1934 #endif
1935 /* Safely ignore these bits for debug checks below */
1936 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1937
1938 /* Error detected by uCode */
1939 if (inta & CSR_INT_BIT_SW_ERR) {
1940 IWL_ERR(priv, "Microcode SW error detected. "
1941 "Restarting 0x%X.\n", inta);
1942 priv->isr_stats.sw++;
1943 priv->isr_stats.sw_err = inta;
1944 iwl_irq_handle_error(priv);
1945 handled |= CSR_INT_BIT_SW_ERR;
1946 }
1947
1948 /* uCode wakes up after power-down sleep */
1949 if (inta & CSR_INT_BIT_WAKEUP) {
1950 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1951 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1952 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1953 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1954 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1955 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1956 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1957 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1958
1959 priv->isr_stats.wakeup++;
1960 handled |= CSR_INT_BIT_WAKEUP;
1961 }
1962
1963 /* All uCode command responses, including Tx command responses,
1964 * Rx "responses" (frame-received notification), and other
1965 * notifications from uCode come through here*/
1966 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1967 iwl3945_rx_handle(priv);
1968 priv->isr_stats.rx++;
1969 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1970 }
1971
1972 if (inta & CSR_INT_BIT_FH_TX) {
1973 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1974 priv->isr_stats.tx++;
1975
1976 iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
1977 if (!iwl_grab_nic_access(priv)) {
1978 iwl_write_direct32(priv, FH39_TCSR_CREDIT
1979 (FH39_SRVC_CHNL), 0x0);
1980 iwl_release_nic_access(priv);
1981 }
1982 handled |= CSR_INT_BIT_FH_TX;
1983 }
1984
1985 if (inta & ~handled) {
1986 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1987 priv->isr_stats.unhandled++;
1988 }
1989
1990 if (inta & ~CSR_INI_SET_MASK) {
1991 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1992 inta & ~CSR_INI_SET_MASK);
1993 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
1994 }
1995
1996 /* Re-enable all interrupts */
1997 /* only Re-enable if disabled by irq */
1998 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1999 iwl_enable_interrupts(priv);
2000
2001 #ifdef CONFIG_IWLWIFI_DEBUG
2002 if (priv->debug_level & (IWL_DL_ISR)) {
2003 inta = iwl_read32(priv, CSR_INT);
2004 inta_mask = iwl_read32(priv, CSR_INT_MASK);
2005 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
2006 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
2007 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
2008 }
2009 #endif
2010 spin_unlock_irqrestore(&priv->lock, flags);
2011 }
2012
2013 static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
2014 enum ieee80211_band band,
2015 u8 is_active, u8 n_probes,
2016 struct iwl3945_scan_channel *scan_ch)
2017 {
2018 const struct ieee80211_channel *channels = NULL;
2019 const struct ieee80211_supported_band *sband;
2020 const struct iwl_channel_info *ch_info;
2021 u16 passive_dwell = 0;
2022 u16 active_dwell = 0;
2023 int added, i;
2024
2025 sband = iwl_get_hw_mode(priv, band);
2026 if (!sband)
2027 return 0;
2028
2029 channels = sband->channels;
2030
2031 active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
2032 passive_dwell = iwl_get_passive_dwell_time(priv, band);
2033
2034 if (passive_dwell <= active_dwell)
2035 passive_dwell = active_dwell + 1;
2036
2037 for (i = 0, added = 0; i < sband->n_channels; i++) {
2038 if (channels[i].flags & IEEE80211_CHAN_DISABLED)
2039 continue;
2040
2041 scan_ch->channel = channels[i].hw_value;
2042
2043 ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
2044 if (!is_channel_valid(ch_info)) {
2045 IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
2046 scan_ch->channel);
2047 continue;
2048 }
2049
2050 scan_ch->active_dwell = cpu_to_le16(active_dwell);
2051 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
2052 /* If passive , set up for auto-switch
2053 * and use long active_dwell time.
2054 */
2055 if (!is_active || is_channel_passive(ch_info) ||
2056 (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
2057 scan_ch->type = 0; /* passive */
2058 if (IWL_UCODE_API(priv->ucode_ver) == 1)
2059 scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
2060 } else {
2061 scan_ch->type = 1; /* active */
2062 }
2063
2064 /* Set direct probe bits. These may be used both for active
2065 * scan channels (probes gets sent right away),
2066 * or for passive channels (probes get se sent only after
2067 * hearing clear Rx packet).*/
2068 if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
2069 if (n_probes)
2070 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
2071 } else {
2072 /* uCode v1 does not allow setting direct probe bits on
2073 * passive channel. */
2074 if ((scan_ch->type & 1) && n_probes)
2075 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
2076 }
2077
2078 /* Set txpower levels to defaults */
2079 scan_ch->tpc.dsp_atten = 110;
2080 /* scan_pwr_info->tpc.dsp_atten; */
2081
2082 /*scan_pwr_info->tpc.tx_gain; */
2083 if (band == IEEE80211_BAND_5GHZ)
2084 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
2085 else {
2086 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
2087 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
2088 * power level:
2089 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
2090 */
2091 }
2092
2093 IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
2094 scan_ch->channel,
2095 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
2096 (scan_ch->type & 1) ?
2097 active_dwell : passive_dwell);
2098
2099 scan_ch++;
2100 added++;
2101 }
2102
2103 IWL_DEBUG_SCAN(priv, "total channels to scan %d \n", added);
2104 return added;
2105 }
2106
2107 static void iwl3945_init_hw_rates(struct iwl_priv *priv,
2108 struct ieee80211_rate *rates)
2109 {
2110 int i;
2111
2112 for (i = 0; i < IWL_RATE_COUNT; i++) {
2113 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
2114 rates[i].hw_value = i; /* Rate scaling will work on indexes */
2115 rates[i].hw_value_short = i;
2116 rates[i].flags = 0;
2117 if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
2118 /*
2119 * If CCK != 1M then set short preamble rate flag.
2120 */
2121 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
2122 0 : IEEE80211_RATE_SHORT_PREAMBLE;
2123 }
2124 }
2125 }
2126
2127 /******************************************************************************
2128 *
2129 * uCode download functions
2130 *
2131 ******************************************************************************/
2132
2133 static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
2134 {
2135 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
2136 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
2137 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
2138 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
2139 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
2140 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
2141 }
2142
2143 /**
2144 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
2145 * looking at all data.
2146 */
2147 static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
2148 {
2149 u32 val;
2150 u32 save_len = len;
2151 int rc = 0;
2152 u32 errcnt;
2153
2154 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
2155
2156 rc = iwl_grab_nic_access(priv);
2157 if (rc)
2158 return rc;
2159
2160 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
2161 IWL39_RTC_INST_LOWER_BOUND);
2162
2163 errcnt = 0;
2164 for (; len > 0; len -= sizeof(u32), image++) {
2165 /* read data comes through single port, auto-incr addr */
2166 /* NOTE: Use the debugless read so we don't flood kernel log
2167 * if IWL_DL_IO is set */
2168 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2169 if (val != le32_to_cpu(*image)) {
2170 IWL_ERR(priv, "uCode INST section is invalid at "
2171 "offset 0x%x, is 0x%x, s/b 0x%x\n",
2172 save_len - len, val, le32_to_cpu(*image));
2173 rc = -EIO;
2174 errcnt++;
2175 if (errcnt >= 20)
2176 break;
2177 }
2178 }
2179
2180 iwl_release_nic_access(priv);
2181
2182 if (!errcnt)
2183 IWL_DEBUG_INFO(priv,
2184 "ucode image in INSTRUCTION memory is good\n");
2185
2186 return rc;
2187 }
2188
2189
2190 /**
2191 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
2192 * using sample data 100 bytes apart. If these sample points are good,
2193 * it's a pretty good bet that everything between them is good, too.
2194 */
2195 static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
2196 {
2197 u32 val;
2198 int rc = 0;
2199 u32 errcnt = 0;
2200 u32 i;
2201
2202 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
2203
2204 rc = iwl_grab_nic_access(priv);
2205 if (rc)
2206 return rc;
2207
2208 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
2209 /* read data comes through single port, auto-incr addr */
2210 /* NOTE: Use the debugless read so we don't flood kernel log
2211 * if IWL_DL_IO is set */
2212 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
2213 i + IWL39_RTC_INST_LOWER_BOUND);
2214 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2215 if (val != le32_to_cpu(*image)) {
2216 #if 0 /* Enable this if you want to see details */
2217 IWL_ERR(priv, "uCode INST section is invalid at "
2218 "offset 0x%x, is 0x%x, s/b 0x%x\n",
2219 i, val, *image);
2220 #endif
2221 rc = -EIO;
2222 errcnt++;
2223 if (errcnt >= 3)
2224 break;
2225 }
2226 }
2227
2228 iwl_release_nic_access(priv);
2229
2230 return rc;
2231 }
2232
2233
2234 /**
2235 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
2236 * and verify its contents
2237 */
2238 static int iwl3945_verify_ucode(struct iwl_priv *priv)
2239 {
2240 __le32 *image;
2241 u32 len;
2242 int rc = 0;
2243
2244 /* Try bootstrap */
2245 image = (__le32 *)priv->ucode_boot.v_addr;
2246 len = priv->ucode_boot.len;
2247 rc = iwl3945_verify_inst_sparse(priv, image, len);
2248 if (rc == 0) {
2249 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
2250 return 0;
2251 }
2252
2253 /* Try initialize */
2254 image = (__le32 *)priv->ucode_init.v_addr;
2255 len = priv->ucode_init.len;
2256 rc = iwl3945_verify_inst_sparse(priv, image, len);
2257 if (rc == 0) {
2258 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
2259 return 0;
2260 }
2261
2262 /* Try runtime/protocol */
2263 image = (__le32 *)priv->ucode_code.v_addr;
2264 len = priv->ucode_code.len;
2265 rc = iwl3945_verify_inst_sparse(priv, image, len);
2266 if (rc == 0) {
2267 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
2268 return 0;
2269 }
2270
2271 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
2272
2273 /* Since nothing seems to match, show first several data entries in
2274 * instruction SRAM, so maybe visual inspection will give a clue.
2275 * Selection of bootstrap image (vs. other images) is arbitrary. */
2276 image = (__le32 *)priv->ucode_boot.v_addr;
2277 len = priv->ucode_boot.len;
2278 rc = iwl3945_verify_inst_full(priv, image, len);
2279
2280 return rc;
2281 }
2282
2283 static void iwl3945_nic_start(struct iwl_priv *priv)
2284 {
2285 /* Remove all resets to allow NIC to operate */
2286 iwl_write32(priv, CSR_RESET, 0);
2287 }
2288
2289 /**
2290 * iwl3945_read_ucode - Read uCode images from disk file.
2291 *
2292 * Copy into buffers for card to fetch via bus-mastering
2293 */
2294 static int iwl3945_read_ucode(struct iwl_priv *priv)
2295 {
2296 struct iwl_ucode *ucode;
2297 int ret = -EINVAL, index;
2298 const struct firmware *ucode_raw;
2299 /* firmware file name contains uCode/driver compatibility version */
2300 const char *name_pre = priv->cfg->fw_name_pre;
2301 const unsigned int api_max = priv->cfg->ucode_api_max;
2302 const unsigned int api_min = priv->cfg->ucode_api_min;
2303 char buf[25];
2304 u8 *src;
2305 size_t len;
2306 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
2307
2308 /* Ask kernel firmware_class module to get the boot firmware off disk.
2309 * request_firmware() is synchronous, file is in memory on return. */
2310 for (index = api_max; index >= api_min; index--) {
2311 sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
2312 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
2313 if (ret < 0) {
2314 IWL_ERR(priv, "%s firmware file req failed: %d\n",
2315 buf, ret);
2316 if (ret == -ENOENT)
2317 continue;
2318 else
2319 goto error;
2320 } else {
2321 if (index < api_max)
2322 IWL_ERR(priv, "Loaded firmware %s, "
2323 "which is deprecated. "
2324 " Please use API v%u instead.\n",
2325 buf, api_max);
2326 IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
2327 "(%zd bytes) from disk\n",
2328 buf, ucode_raw->size);
2329 break;
2330 }
2331 }
2332
2333 if (ret < 0)
2334 goto error;
2335
2336 /* Make sure that we got at least our header! */
2337 if (ucode_raw->size < sizeof(*ucode)) {
2338 IWL_ERR(priv, "File size way too small!\n");
2339 ret = -EINVAL;
2340 goto err_release;
2341 }
2342
2343 /* Data from ucode file: header followed by uCode images */
2344 ucode = (void *)ucode_raw->data;
2345
2346 priv->ucode_ver = le32_to_cpu(ucode->ver);
2347 api_ver = IWL_UCODE_API(priv->ucode_ver);
2348 inst_size = le32_to_cpu(ucode->inst_size);
2349 data_size = le32_to_cpu(ucode->data_size);
2350 init_size = le32_to_cpu(ucode->init_size);
2351 init_data_size = le32_to_cpu(ucode->init_data_size);
2352 boot_size = le32_to_cpu(ucode->boot_size);
2353
2354 /* api_ver should match the api version forming part of the
2355 * firmware filename ... but we don't check for that and only rely
2356 * on the API version read from firmware header from here on forward */
2357
2358 if (api_ver < api_min || api_ver > api_max) {
2359 IWL_ERR(priv, "Driver unable to support your firmware API. "
2360 "Driver supports v%u, firmware is v%u.\n",
2361 api_max, api_ver);
2362 priv->ucode_ver = 0;
2363 ret = -EINVAL;
2364 goto err_release;
2365 }
2366 if (api_ver != api_max)
2367 IWL_ERR(priv, "Firmware has old API version. Expected %u, "
2368 "got %u. New firmware can be obtained "
2369 "from http://www.intellinuxwireless.org.\n",
2370 api_max, api_ver);
2371
2372 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
2373 IWL_UCODE_MAJOR(priv->ucode_ver),
2374 IWL_UCODE_MINOR(priv->ucode_ver),
2375 IWL_UCODE_API(priv->ucode_ver),
2376 IWL_UCODE_SERIAL(priv->ucode_ver));
2377
2378 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
2379 priv->ucode_ver);
2380 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
2381 inst_size);
2382 IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
2383 data_size);
2384 IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
2385 init_size);
2386 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
2387 init_data_size);
2388 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
2389 boot_size);
2390
2391
2392 /* Verify size of file vs. image size info in file's header */
2393 if (ucode_raw->size < sizeof(*ucode) +
2394 inst_size + data_size + init_size +
2395 init_data_size + boot_size) {
2396
2397 IWL_DEBUG_INFO(priv, "uCode file size %zd too small\n",
2398 ucode_raw->size);
2399 ret = -EINVAL;
2400 goto err_release;
2401 }
2402
2403 /* Verify that uCode images will fit in card's SRAM */
2404 if (inst_size > IWL39_MAX_INST_SIZE) {
2405 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
2406 inst_size);
2407 ret = -EINVAL;
2408 goto err_release;
2409 }
2410
2411 if (data_size > IWL39_MAX_DATA_SIZE) {
2412 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
2413 data_size);
2414 ret = -EINVAL;
2415 goto err_release;
2416 }
2417 if (init_size > IWL39_MAX_INST_SIZE) {
2418 IWL_DEBUG_INFO(priv,
2419 "uCode init instr len %d too large to fit in\n",
2420 init_size);
2421 ret = -EINVAL;
2422 goto err_release;
2423 }
2424 if (init_data_size > IWL39_MAX_DATA_SIZE) {
2425 IWL_DEBUG_INFO(priv,
2426 "uCode init data len %d too large to fit in\n",
2427 init_data_size);
2428 ret = -EINVAL;
2429 goto err_release;
2430 }
2431 if (boot_size > IWL39_MAX_BSM_SIZE) {
2432 IWL_DEBUG_INFO(priv,
2433 "uCode boot instr len %d too large to fit in\n",
2434 boot_size);
2435 ret = -EINVAL;
2436 goto err_release;
2437 }
2438
2439 /* Allocate ucode buffers for card's bus-master loading ... */
2440
2441 /* Runtime instructions and 2 copies of data:
2442 * 1) unmodified from disk
2443 * 2) backup cache for save/restore during power-downs */
2444 priv->ucode_code.len = inst_size;
2445 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
2446
2447 priv->ucode_data.len = data_size;
2448 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
2449
2450 priv->ucode_data_backup.len = data_size;
2451 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
2452
2453 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
2454 !priv->ucode_data_backup.v_addr)
2455 goto err_pci_alloc;
2456
2457 /* Initialization instructions and data */
2458 if (init_size && init_data_size) {
2459 priv->ucode_init.len = init_size;
2460 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
2461
2462 priv->ucode_init_data.len = init_data_size;
2463 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
2464
2465 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
2466 goto err_pci_alloc;
2467 }
2468
2469 /* Bootstrap (instructions only, no data) */
2470 if (boot_size) {
2471 priv->ucode_boot.len = boot_size;
2472 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
2473
2474 if (!priv->ucode_boot.v_addr)
2475 goto err_pci_alloc;
2476 }
2477
2478 /* Copy images into buffers for card's bus-master reads ... */
2479
2480 /* Runtime instructions (first block of data in file) */
2481 src = &ucode->data[0];
2482 len = priv->ucode_code.len;
2483 IWL_DEBUG_INFO(priv,
2484 "Copying (but not loading) uCode instr len %zd\n", len);
2485 memcpy(priv->ucode_code.v_addr, src, len);
2486 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
2487 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
2488
2489 /* Runtime data (2nd block)
2490 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
2491 src = &ucode->data[inst_size];
2492 len = priv->ucode_data.len;
2493 IWL_DEBUG_INFO(priv,
2494 "Copying (but not loading) uCode data len %zd\n", len);
2495 memcpy(priv->ucode_data.v_addr, src, len);
2496 memcpy(priv->ucode_data_backup.v_addr, src, len);
2497
2498 /* Initialization instructions (3rd block) */
2499 if (init_size) {
2500 src = &ucode->data[inst_size + data_size];
2501 len = priv->ucode_init.len;
2502 IWL_DEBUG_INFO(priv,
2503 "Copying (but not loading) init instr len %zd\n", len);
2504 memcpy(priv->ucode_init.v_addr, src, len);
2505 }
2506
2507 /* Initialization data (4th block) */
2508 if (init_data_size) {
2509 src = &ucode->data[inst_size + data_size + init_size];
2510 len = priv->ucode_init_data.len;
2511 IWL_DEBUG_INFO(priv,
2512 "Copying (but not loading) init data len %zd\n", len);
2513 memcpy(priv->ucode_init_data.v_addr, src, len);
2514 }
2515
2516 /* Bootstrap instructions (5th block) */
2517 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
2518 len = priv->ucode_boot.len;
2519 IWL_DEBUG_INFO(priv,
2520 "Copying (but not loading) boot instr len %zd\n", len);
2521 memcpy(priv->ucode_boot.v_addr, src, len);
2522
2523 /* We have our copies now, allow OS release its copies */
2524 release_firmware(ucode_raw);
2525 return 0;
2526
2527 err_pci_alloc:
2528 IWL_ERR(priv, "failed to allocate pci memory\n");
2529 ret = -ENOMEM;
2530 iwl3945_dealloc_ucode_pci(priv);
2531
2532 err_release:
2533 release_firmware(ucode_raw);
2534
2535 error:
2536 return ret;
2537 }
2538
2539
2540 /**
2541 * iwl3945_set_ucode_ptrs - Set uCode address location
2542 *
2543 * Tell initialization uCode where to find runtime uCode.
2544 *
2545 * BSM registers initially contain pointers to initialization uCode.
2546 * We need to replace them to load runtime uCode inst and data,
2547 * and to save runtime data when powering down.
2548 */
2549 static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
2550 {
2551 dma_addr_t pinst;
2552 dma_addr_t pdata;
2553 int rc = 0;
2554 unsigned long flags;
2555
2556 /* bits 31:0 for 3945 */
2557 pinst = priv->ucode_code.p_addr;
2558 pdata = priv->ucode_data_backup.p_addr;
2559
2560 spin_lock_irqsave(&priv->lock, flags);
2561 rc = iwl_grab_nic_access(priv);
2562 if (rc) {
2563 spin_unlock_irqrestore(&priv->lock, flags);
2564 return rc;
2565 }
2566
2567 /* Tell bootstrap uCode where to find image to load */
2568 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
2569 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
2570 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
2571 priv->ucode_data.len);
2572
2573 /* Inst byte count must be last to set up, bit 31 signals uCode
2574 * that all new ptr/size info is in place */
2575 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
2576 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
2577
2578 iwl_release_nic_access(priv);
2579
2580 spin_unlock_irqrestore(&priv->lock, flags);
2581
2582 IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
2583
2584 return rc;
2585 }
2586
2587 /**
2588 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
2589 *
2590 * Called after REPLY_ALIVE notification received from "initialize" uCode.
2591 *
2592 * Tell "initialize" uCode to go ahead and load the runtime uCode.
2593 */
2594 static void iwl3945_init_alive_start(struct iwl_priv *priv)
2595 {
2596 /* Check alive response for "valid" sign from uCode */
2597 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
2598 /* We had an error bringing up the hardware, so take it
2599 * all the way back down so we can try again */
2600 IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
2601 goto restart;
2602 }
2603
2604 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
2605 * This is a paranoid check, because we would not have gotten the
2606 * "initialize" alive if code weren't properly loaded. */
2607 if (iwl3945_verify_ucode(priv)) {
2608 /* Runtime instruction load was bad;
2609 * take it all the way back down so we can try again */
2610 IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
2611 goto restart;
2612 }
2613
2614 /* Send pointers to protocol/runtime uCode image ... init code will
2615 * load and launch runtime uCode, which will send us another "Alive"
2616 * notification. */
2617 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
2618 if (iwl3945_set_ucode_ptrs(priv)) {
2619 /* Runtime instruction load won't happen;
2620 * take it all the way back down so we can try again */
2621 IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
2622 goto restart;
2623 }
2624 return;
2625
2626 restart:
2627 queue_work(priv->workqueue, &priv->restart);
2628 }
2629
2630 /**
2631 * iwl3945_alive_start - called after REPLY_ALIVE notification received
2632 * from protocol/runtime uCode (initialization uCode's
2633 * Alive gets handled by iwl3945_init_alive_start()).
2634 */
2635 static void iwl3945_alive_start(struct iwl_priv *priv)
2636 {
2637 int rc = 0;
2638 int thermal_spin = 0;
2639 u32 rfkill;
2640
2641 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2642
2643 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2644 /* We had an error bringing up the hardware, so take it
2645 * all the way back down so we can try again */
2646 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2647 goto restart;
2648 }
2649
2650 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2651 * This is a paranoid check, because we would not have gotten the
2652 * "runtime" alive if code weren't properly loaded. */
2653 if (iwl3945_verify_ucode(priv)) {
2654 /* Runtime instruction load was bad;
2655 * take it all the way back down so we can try again */
2656 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2657 goto restart;
2658 }
2659
2660 priv->cfg->ops->smgmt->clear_station_table(priv);
2661
2662 rc = iwl_grab_nic_access(priv);
2663 if (rc) {
2664 IWL_WARN(priv, "Can not read RFKILL status from adapter\n");
2665 return;
2666 }
2667
2668 rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
2669 IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
2670 iwl_release_nic_access(priv);
2671
2672 if (rfkill & 0x1) {
2673 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2674 /* if RFKILL is not on, then wait for thermal
2675 * sensor in adapter to kick in */
2676 while (iwl3945_hw_get_temperature(priv) == 0) {
2677 thermal_spin++;
2678 udelay(10);
2679 }
2680
2681 if (thermal_spin)
2682 IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
2683 thermal_spin * 10);
2684 } else
2685 set_bit(STATUS_RF_KILL_HW, &priv->status);
2686
2687 /* After the ALIVE response, we can send commands to 3945 uCode */
2688 set_bit(STATUS_ALIVE, &priv->status);
2689
2690 /* Clear out the uCode error bit if it is set */
2691 clear_bit(STATUS_FW_ERROR, &priv->status);
2692
2693 if (iwl_is_rfkill(priv))
2694 return;
2695
2696 ieee80211_wake_queues(priv->hw);
2697
2698 priv->active_rate = priv->rates_mask;
2699 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
2700
2701 iwl_power_update_mode(priv, false);
2702
2703 if (iwl_is_associated(priv)) {
2704 struct iwl3945_rxon_cmd *active_rxon =
2705 (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
2706
2707 memcpy(&priv->staging_rxon, &priv->active_rxon,
2708 sizeof(priv->staging_rxon));
2709 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2710 } else {
2711 /* Initialize our rx_config data */
2712 iwl_connection_init_rx_config(priv, priv->iw_mode);
2713 }
2714
2715 /* Configure Bluetooth device coexistence support */
2716 iwl_send_bt_config(priv);
2717
2718 /* Configure the adapter for unassociated operation */
2719 iwlcore_commit_rxon(priv);
2720
2721 iwl3945_reg_txpower_periodic(priv);
2722
2723 iwl3945_led_register(priv);
2724
2725 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2726 set_bit(STATUS_READY, &priv->status);
2727 wake_up_interruptible(&priv->wait_command_queue);
2728
2729 if (priv->error_recovering)
2730 iwl3945_error_recovery(priv);
2731
2732 /* reassociate for ADHOC mode */
2733 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
2734 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
2735 priv->vif);
2736 if (beacon)
2737 iwl_mac_beacon_update(priv->hw, beacon);
2738 }
2739
2740 if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
2741 iwl_set_mode(priv, priv->iw_mode);
2742
2743 return;
2744
2745 restart:
2746 queue_work(priv->workqueue, &priv->restart);
2747 }
2748
2749 static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
2750
2751 static void __iwl3945_down(struct iwl_priv *priv)
2752 {
2753 unsigned long flags;
2754 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2755 struct ieee80211_conf *conf = NULL;
2756
2757 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2758
2759 conf = ieee80211_get_hw_conf(priv->hw);
2760
2761 if (!exit_pending)
2762 set_bit(STATUS_EXIT_PENDING, &priv->status);
2763
2764 iwl3945_led_unregister(priv);
2765 priv->cfg->ops->smgmt->clear_station_table(priv);
2766
2767 /* Unblock any waiting calls */
2768 wake_up_interruptible_all(&priv->wait_command_queue);
2769
2770 /* Wipe out the EXIT_PENDING status bit if we are not actually
2771 * exiting the module */
2772 if (!exit_pending)
2773 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2774
2775 /* stop and reset the on-board processor */
2776 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2777
2778 /* tell the device to stop sending interrupts */
2779 spin_lock_irqsave(&priv->lock, flags);
2780 iwl_disable_interrupts(priv);
2781 spin_unlock_irqrestore(&priv->lock, flags);
2782 iwl_synchronize_irq(priv);
2783
2784 if (priv->mac80211_registered)
2785 ieee80211_stop_queues(priv->hw);
2786
2787 /* If we have not previously called iwl3945_init() then
2788 * clear all bits but the RF Kill bits and return */
2789 if (!iwl_is_init(priv)) {
2790 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2791 STATUS_RF_KILL_HW |
2792 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
2793 STATUS_RF_KILL_SW |
2794 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2795 STATUS_GEO_CONFIGURED |
2796 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2797 STATUS_EXIT_PENDING;
2798 goto exit;
2799 }
2800
2801 /* ...otherwise clear out all the status bits but the RF Kill
2802 * bits and continue taking the NIC down. */
2803 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2804 STATUS_RF_KILL_HW |
2805 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
2806 STATUS_RF_KILL_SW |
2807 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2808 STATUS_GEO_CONFIGURED |
2809 test_bit(STATUS_FW_ERROR, &priv->status) <<
2810 STATUS_FW_ERROR |
2811 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2812 STATUS_EXIT_PENDING;
2813
2814 priv->cfg->ops->lib->apm_ops.reset(priv);
2815 spin_lock_irqsave(&priv->lock, flags);
2816 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2817 spin_unlock_irqrestore(&priv->lock, flags);
2818
2819 iwl3945_hw_txq_ctx_stop(priv);
2820 iwl3945_hw_rxq_stop(priv);
2821
2822 spin_lock_irqsave(&priv->lock, flags);
2823 if (!iwl_grab_nic_access(priv)) {
2824 iwl_write_prph(priv, APMG_CLK_DIS_REG,
2825 APMG_CLK_VAL_DMA_CLK_RQT);
2826 iwl_release_nic_access(priv);
2827 }
2828 spin_unlock_irqrestore(&priv->lock, flags);
2829
2830 udelay(5);
2831
2832 if (exit_pending)
2833 priv->cfg->ops->lib->apm_ops.stop(priv);
2834 else
2835 priv->cfg->ops->lib->apm_ops.reset(priv);
2836
2837 exit:
2838 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2839
2840 if (priv->ibss_beacon)
2841 dev_kfree_skb(priv->ibss_beacon);
2842 priv->ibss_beacon = NULL;
2843
2844 /* clear out any free frames */
2845 iwl3945_clear_free_frames(priv);
2846 }
2847
2848 static void iwl3945_down(struct iwl_priv *priv)
2849 {
2850 mutex_lock(&priv->mutex);
2851 __iwl3945_down(priv);
2852 mutex_unlock(&priv->mutex);
2853
2854 iwl3945_cancel_deferred_work(priv);
2855 }
2856
2857 #define MAX_HW_RESTARTS 5
2858
2859 static int __iwl3945_up(struct iwl_priv *priv)
2860 {
2861 int rc, i;
2862
2863 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2864 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2865 return -EIO;
2866 }
2867
2868 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
2869 IWL_WARN(priv, "Radio disabled by SW RF kill (module "
2870 "parameter)\n");
2871 return -ENODEV;
2872 }
2873
2874 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2875 IWL_ERR(priv, "ucode not available for device bring up\n");
2876 return -EIO;
2877 }
2878
2879 /* If platform's RF_KILL switch is NOT set to KILL */
2880 if (iwl_read32(priv, CSR_GP_CNTRL) &
2881 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2882 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2883 else {
2884 set_bit(STATUS_RF_KILL_HW, &priv->status);
2885 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2886 return -ENODEV;
2887 }
2888
2889 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2890
2891 rc = iwl3945_hw_nic_init(priv);
2892 if (rc) {
2893 IWL_ERR(priv, "Unable to int nic\n");
2894 return rc;
2895 }
2896
2897 /* make sure rfkill handshake bits are cleared */
2898 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2899 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2900 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2901
2902 /* clear (again), then enable host interrupts */
2903 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2904 iwl_enable_interrupts(priv);
2905
2906 /* really make sure rfkill handshake bits are cleared */
2907 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2908 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2909
2910 /* Copy original ucode data image from disk into backup cache.
2911 * This will be used to initialize the on-board processor's
2912 * data SRAM for a clean start when the runtime program first loads. */
2913 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2914 priv->ucode_data.len);
2915
2916 /* We return success when we resume from suspend and rf_kill is on. */
2917 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
2918 return 0;
2919
2920 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2921
2922 priv->cfg->ops->smgmt->clear_station_table(priv);
2923
2924 /* load bootstrap state machine,
2925 * load bootstrap program into processor's memory,
2926 * prepare to load the "initialize" uCode */
2927 priv->cfg->ops->lib->load_ucode(priv);
2928
2929 if (rc) {
2930 IWL_ERR(priv,
2931 "Unable to set up bootstrap uCode: %d\n", rc);
2932 continue;
2933 }
2934
2935 /* start card; "initialize" will load runtime ucode */
2936 iwl3945_nic_start(priv);
2937
2938 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2939
2940 return 0;
2941 }
2942
2943 set_bit(STATUS_EXIT_PENDING, &priv->status);
2944 __iwl3945_down(priv);
2945 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2946
2947 /* tried to restart and config the device for as long as our
2948 * patience could withstand */
2949 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2950 return -EIO;
2951 }
2952
2953
2954 /*****************************************************************************
2955 *
2956 * Workqueue callbacks
2957 *
2958 *****************************************************************************/
2959
2960 static void iwl3945_bg_init_alive_start(struct work_struct *data)
2961 {
2962 struct iwl_priv *priv =
2963 container_of(data, struct iwl_priv, init_alive_start.work);
2964
2965 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2966 return;
2967
2968 mutex_lock(&priv->mutex);
2969 iwl3945_init_alive_start(priv);
2970 mutex_unlock(&priv->mutex);
2971 }
2972
2973 static void iwl3945_bg_alive_start(struct work_struct *data)
2974 {
2975 struct iwl_priv *priv =
2976 container_of(data, struct iwl_priv, alive_start.work);
2977
2978 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2979 return;
2980
2981 mutex_lock(&priv->mutex);
2982 iwl3945_alive_start(priv);
2983 mutex_unlock(&priv->mutex);
2984 }
2985
2986 static void iwl3945_rfkill_poll(struct work_struct *data)
2987 {
2988 struct iwl_priv *priv =
2989 container_of(data, struct iwl_priv, rfkill_poll.work);
2990 unsigned long status = priv->status;
2991
2992 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2993 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2994 else
2995 set_bit(STATUS_RF_KILL_HW, &priv->status);
2996
2997 if (test_bit(STATUS_RF_KILL_HW, &status) != test_bit(STATUS_RF_KILL_HW, &priv->status))
2998 queue_work(priv->workqueue, &priv->rf_kill);
2999
3000 queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
3001 round_jiffies_relative(2 * HZ));
3002
3003 }
3004
3005 #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
3006 static void iwl3945_bg_request_scan(struct work_struct *data)
3007 {
3008 struct iwl_priv *priv =
3009 container_of(data, struct iwl_priv, request_scan);
3010 struct iwl_host_cmd cmd = {
3011 .id = REPLY_SCAN_CMD,
3012 .len = sizeof(struct iwl3945_scan_cmd),
3013 .meta.flags = CMD_SIZE_HUGE,
3014 };
3015 int rc = 0;
3016 struct iwl3945_scan_cmd *scan;
3017 struct ieee80211_conf *conf = NULL;
3018 u8 n_probes = 0;
3019 enum ieee80211_band band;
3020 bool is_active = false;
3021
3022 conf = ieee80211_get_hw_conf(priv->hw);
3023
3024 mutex_lock(&priv->mutex);
3025
3026 if (!iwl_is_ready(priv)) {
3027 IWL_WARN(priv, "request scan called when driver not ready.\n");
3028 goto done;
3029 }
3030
3031 /* Make sure the scan wasn't canceled before this queued work
3032 * was given the chance to run... */
3033 if (!test_bit(STATUS_SCANNING, &priv->status))
3034 goto done;
3035
3036 /* This should never be called or scheduled if there is currently
3037 * a scan active in the hardware. */
3038 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
3039 IWL_DEBUG_INFO(priv, "Multiple concurrent scan requests "
3040 "Ignoring second request.\n");
3041 rc = -EIO;
3042 goto done;
3043 }
3044
3045 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
3046 IWL_DEBUG_SCAN(priv, "Aborting scan due to device shutdown\n");
3047 goto done;
3048 }
3049
3050 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
3051 IWL_DEBUG_HC(priv,
3052 "Scan request while abort pending. Queuing.\n");
3053 goto done;
3054 }
3055
3056 if (iwl_is_rfkill(priv)) {
3057 IWL_DEBUG_HC(priv, "Aborting scan due to RF Kill activation\n");
3058 goto done;
3059 }
3060
3061 if (!test_bit(STATUS_READY, &priv->status)) {
3062 IWL_DEBUG_HC(priv,
3063 "Scan request while uninitialized. Queuing.\n");
3064 goto done;
3065 }
3066
3067 if (!priv->scan_bands) {
3068 IWL_DEBUG_HC(priv, "Aborting scan due to no requested bands\n");
3069 goto done;
3070 }
3071
3072 if (!priv->scan) {
3073 priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
3074 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
3075 if (!priv->scan) {
3076 rc = -ENOMEM;
3077 goto done;
3078 }
3079 }
3080 scan = priv->scan;
3081 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
3082
3083 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
3084 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
3085
3086 if (iwl_is_associated(priv)) {
3087 u16 interval = 0;
3088 u32 extra;
3089 u32 suspend_time = 100;
3090 u32 scan_suspend_time = 100;
3091 unsigned long flags;
3092
3093 IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
3094
3095 spin_lock_irqsave(&priv->lock, flags);
3096 interval = priv->beacon_int;
3097 spin_unlock_irqrestore(&priv->lock, flags);
3098
3099 scan->suspend_time = 0;
3100 scan->max_out_time = cpu_to_le32(200 * 1024);
3101 if (!interval)
3102 interval = suspend_time;
3103 /*
3104 * suspend time format:
3105 * 0-19: beacon interval in usec (time before exec.)
3106 * 20-23: 0
3107 * 24-31: number of beacons (suspend between channels)
3108 */
3109
3110 extra = (suspend_time / interval) << 24;
3111 scan_suspend_time = 0xFF0FFFFF &
3112 (extra | ((suspend_time % interval) * 1024));
3113
3114 scan->suspend_time = cpu_to_le32(scan_suspend_time);
3115 IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
3116 scan_suspend_time, interval);
3117 }
3118
3119 if (priv->scan_request->n_ssids) {
3120 int i, p = 0;
3121 IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
3122 for (i = 0; i < priv->scan_request->n_ssids; i++) {
3123 /* always does wildcard anyway */
3124 if (!priv->scan_request->ssids[i].ssid_len)
3125 continue;
3126 scan->direct_scan[p].id = WLAN_EID_SSID;
3127 scan->direct_scan[p].len =
3128 priv->scan_request->ssids[i].ssid_len;
3129 memcpy(scan->direct_scan[p].ssid,
3130 priv->scan_request->ssids[i].ssid,
3131 priv->scan_request->ssids[i].ssid_len);
3132 n_probes++;
3133 p++;
3134 }
3135 is_active = true;
3136 } else
3137 IWL_DEBUG_SCAN(priv, "Kicking off passive scan.\n");
3138
3139 /* We don't build a direct scan probe request; the uCode will do
3140 * that based on the direct_mask added to each channel entry */
3141 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
3142 scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
3143 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
3144
3145 /* flags + rate selection */
3146
3147 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
3148 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
3149 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
3150 scan->good_CRC_th = 0;
3151 band = IEEE80211_BAND_2GHZ;
3152 } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
3153 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
3154 /*
3155 * If active scaning is requested but a certain channel
3156 * is marked passive, we can do active scanning if we
3157 * detect transmissions.
3158 */
3159 scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH : 0;
3160 band = IEEE80211_BAND_5GHZ;
3161 } else {
3162 IWL_WARN(priv, "Invalid scan band count\n");
3163 goto done;
3164 }
3165
3166 scan->tx_cmd.len = cpu_to_le16(
3167 iwl_fill_probe_req(priv,
3168 (struct ieee80211_mgmt *)scan->data,
3169 priv->scan_request->ie,
3170 priv->scan_request->ie_len,
3171 IWL_MAX_SCAN_SIZE - sizeof(*scan)));
3172
3173 /* select Rx antennas */
3174 scan->flags |= iwl3945_get_antenna_flags(priv);
3175
3176 if (iwl_is_monitor_mode(priv))
3177 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
3178
3179 scan->channel_count =
3180 iwl3945_get_channels_for_scan(priv, band, is_active, n_probes,
3181 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
3182
3183 if (scan->channel_count == 0) {
3184 IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
3185 goto done;
3186 }
3187
3188 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
3189 scan->channel_count * sizeof(struct iwl3945_scan_channel);
3190 cmd.data = scan;
3191 scan->len = cpu_to_le16(cmd.len);
3192
3193 set_bit(STATUS_SCAN_HW, &priv->status);
3194 rc = iwl_send_cmd_sync(priv, &cmd);
3195 if (rc)
3196 goto done;
3197
3198 queue_delayed_work(priv->workqueue, &priv->scan_check,
3199 IWL_SCAN_CHECK_WATCHDOG);
3200
3201 mutex_unlock(&priv->mutex);
3202 return;
3203
3204 done:
3205 /* can not perform scan make sure we clear scanning
3206 * bits from status so next scan request can be performed.
3207 * if we dont clear scanning status bit here all next scan
3208 * will fail
3209 */
3210 clear_bit(STATUS_SCAN_HW, &priv->status);
3211 clear_bit(STATUS_SCANNING, &priv->status);
3212
3213 /* inform mac80211 scan aborted */
3214 queue_work(priv->workqueue, &priv->scan_completed);
3215 mutex_unlock(&priv->mutex);
3216 }
3217
3218 static void iwl3945_bg_up(struct work_struct *data)
3219 {
3220 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
3221
3222 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3223 return;
3224
3225 mutex_lock(&priv->mutex);
3226 __iwl3945_up(priv);
3227 mutex_unlock(&priv->mutex);
3228 iwl_rfkill_set_hw_state(priv);
3229 }
3230
3231 static void iwl3945_bg_restart(struct work_struct *data)
3232 {
3233 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
3234
3235 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3236 return;
3237
3238 iwl3945_down(priv);
3239 queue_work(priv->workqueue, &priv->up);
3240 }
3241
3242 static void iwl3945_bg_rx_replenish(struct work_struct *data)
3243 {
3244 struct iwl_priv *priv =
3245 container_of(data, struct iwl_priv, rx_replenish);
3246
3247 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3248 return;
3249
3250 mutex_lock(&priv->mutex);
3251 iwl3945_rx_replenish(priv);
3252 mutex_unlock(&priv->mutex);
3253 }
3254
3255 #define IWL_DELAY_NEXT_SCAN (HZ*2)
3256
3257 void iwl3945_post_associate(struct iwl_priv *priv)
3258 {
3259 int rc = 0;
3260 struct ieee80211_conf *conf = NULL;
3261
3262 if (priv->iw_mode == NL80211_IFTYPE_AP) {
3263 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
3264 return;
3265 }
3266
3267
3268 IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
3269 priv->assoc_id, priv->active_rxon.bssid_addr);
3270
3271 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3272 return;
3273
3274 if (!priv->vif || !priv->is_open)
3275 return;
3276
3277 iwl_scan_cancel_timeout(priv, 200);
3278
3279 conf = ieee80211_get_hw_conf(priv->hw);
3280
3281 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3282 iwlcore_commit_rxon(priv);
3283
3284 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
3285 iwl3945_setup_rxon_timing(priv);
3286 rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
3287 sizeof(priv->rxon_timing), &priv->rxon_timing);
3288 if (rc)
3289 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3290 "Attempting to continue.\n");
3291
3292 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
3293
3294 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
3295
3296 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
3297 priv->assoc_id, priv->beacon_int);
3298
3299 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
3300 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
3301 else
3302 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
3303
3304 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
3305 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
3306 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
3307 else
3308 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
3309
3310 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
3311 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
3312
3313 }
3314
3315 iwlcore_commit_rxon(priv);
3316
3317 switch (priv->iw_mode) {
3318 case NL80211_IFTYPE_STATION:
3319 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
3320 break;
3321
3322 case NL80211_IFTYPE_ADHOC:
3323
3324 priv->assoc_id = 1;
3325 priv->cfg->ops->smgmt->add_station(priv, priv->bssid, 0, 0, NULL);
3326 iwl3945_sync_sta(priv, IWL_STA_ID,
3327 (priv->band == IEEE80211_BAND_5GHZ) ?
3328 IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
3329 CMD_ASYNC);
3330 iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
3331 iwl3945_send_beacon_cmd(priv);
3332
3333 break;
3334
3335 default:
3336 IWL_ERR(priv, "%s Should not be called in %d mode\n",
3337 __func__, priv->iw_mode);
3338 break;
3339 }
3340
3341 iwl_activate_qos(priv, 0);
3342
3343 /* we have just associated, don't start scan too early */
3344 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
3345 }
3346
3347 /*****************************************************************************
3348 *
3349 * mac80211 entry point functions
3350 *
3351 *****************************************************************************/
3352
3353 #define UCODE_READY_TIMEOUT (2 * HZ)
3354
3355 static int iwl3945_mac_start(struct ieee80211_hw *hw)
3356 {
3357 struct iwl_priv *priv = hw->priv;
3358 int ret;
3359
3360 IWL_DEBUG_MAC80211(priv, "enter\n");
3361
3362 /* we should be verifying the device is ready to be opened */
3363 mutex_lock(&priv->mutex);
3364
3365 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
3366 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
3367 * ucode filename and max sizes are card-specific. */
3368
3369 if (!priv->ucode_code.len) {
3370 ret = iwl3945_read_ucode(priv);
3371 if (ret) {
3372 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
3373 mutex_unlock(&priv->mutex);
3374 goto out_release_irq;
3375 }
3376 }
3377
3378 ret = __iwl3945_up(priv);
3379
3380 mutex_unlock(&priv->mutex);
3381
3382 iwl_rfkill_set_hw_state(priv);
3383
3384 if (ret)
3385 goto out_release_irq;
3386
3387 IWL_DEBUG_INFO(priv, "Start UP work.\n");
3388
3389 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
3390 * mac80211 will not be run successfully. */
3391 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
3392 test_bit(STATUS_READY, &priv->status),
3393 UCODE_READY_TIMEOUT);
3394 if (!ret) {
3395 if (!test_bit(STATUS_READY, &priv->status)) {
3396 IWL_ERR(priv,
3397 "Wait for START_ALIVE timeout after %dms.\n",
3398 jiffies_to_msecs(UCODE_READY_TIMEOUT));
3399 ret = -ETIMEDOUT;
3400 goto out_release_irq;
3401 }
3402 }
3403
3404 /* ucode is running and will send rfkill notifications,
3405 * no need to poll the killswitch state anymore */
3406 cancel_delayed_work(&priv->rfkill_poll);
3407
3408 priv->is_open = 1;
3409 IWL_DEBUG_MAC80211(priv, "leave\n");
3410 return 0;
3411
3412 out_release_irq:
3413 priv->is_open = 0;
3414 IWL_DEBUG_MAC80211(priv, "leave - failed\n");
3415 return ret;
3416 }
3417
3418 static void iwl3945_mac_stop(struct ieee80211_hw *hw)
3419 {
3420 struct iwl_priv *priv = hw->priv;
3421
3422 IWL_DEBUG_MAC80211(priv, "enter\n");
3423
3424 if (!priv->is_open) {
3425 IWL_DEBUG_MAC80211(priv, "leave - skip\n");
3426 return;
3427 }
3428
3429 priv->is_open = 0;
3430
3431 if (iwl_is_ready_rf(priv)) {
3432 /* stop mac, cancel any scan request and clear
3433 * RXON_FILTER_ASSOC_MSK BIT
3434 */
3435 mutex_lock(&priv->mutex);
3436 iwl_scan_cancel_timeout(priv, 100);
3437 mutex_unlock(&priv->mutex);
3438 }
3439
3440 iwl3945_down(priv);
3441
3442 flush_workqueue(priv->workqueue);
3443
3444 /* start polling the killswitch state again */
3445 queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
3446 round_jiffies_relative(2 * HZ));
3447
3448 IWL_DEBUG_MAC80211(priv, "leave\n");
3449 }
3450
3451 static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3452 {
3453 struct iwl_priv *priv = hw->priv;
3454
3455 IWL_DEBUG_MAC80211(priv, "enter\n");
3456
3457 IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
3458 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
3459
3460 if (iwl3945_tx_skb(priv, skb))
3461 dev_kfree_skb_any(skb);
3462
3463 IWL_DEBUG_MAC80211(priv, "leave\n");
3464 return NETDEV_TX_OK;
3465 }
3466
3467 void iwl3945_config_ap(struct iwl_priv *priv)
3468 {
3469 int rc = 0;
3470
3471 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3472 return;
3473
3474 /* The following should be done only at AP bring up */
3475 if (!(iwl_is_associated(priv))) {
3476
3477 /* RXON - unassoc (to set timing command) */
3478 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3479 iwlcore_commit_rxon(priv);
3480
3481 /* RXON Timing */
3482 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
3483 iwl3945_setup_rxon_timing(priv);
3484 rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
3485 sizeof(priv->rxon_timing),
3486 &priv->rxon_timing);
3487 if (rc)
3488 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3489 "Attempting to continue.\n");
3490
3491 /* FIXME: what should be the assoc_id for AP? */
3492 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
3493 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
3494 priv->staging_rxon.flags |=
3495 RXON_FLG_SHORT_PREAMBLE_MSK;
3496 else
3497 priv->staging_rxon.flags &=
3498 ~RXON_FLG_SHORT_PREAMBLE_MSK;
3499
3500 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
3501 if (priv->assoc_capability &
3502 WLAN_CAPABILITY_SHORT_SLOT_TIME)
3503 priv->staging_rxon.flags |=
3504 RXON_FLG_SHORT_SLOT_MSK;
3505 else
3506 priv->staging_rxon.flags &=
3507 ~RXON_FLG_SHORT_SLOT_MSK;
3508
3509 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
3510 priv->staging_rxon.flags &=
3511 ~RXON_FLG_SHORT_SLOT_MSK;
3512 }
3513 /* restore RXON assoc */
3514 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
3515 iwlcore_commit_rxon(priv);
3516 priv->cfg->ops->smgmt->add_station(priv, iwl_bcast_addr, 0, 0, NULL);
3517 }
3518 iwl3945_send_beacon_cmd(priv);
3519
3520 /* FIXME - we need to add code here to detect a totally new
3521 * configuration, reset the AP, unassoc, rxon timing, assoc,
3522 * clear sta table, add BCAST sta... */
3523 }
3524
3525 static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
3526 struct ieee80211_vif *vif,
3527 struct ieee80211_sta *sta,
3528 struct ieee80211_key_conf *key)
3529 {
3530 struct iwl_priv *priv = hw->priv;
3531 const u8 *addr;
3532 int ret = 0;
3533 u8 sta_id = IWL_INVALID_STATION;
3534 u8 static_key;
3535
3536 IWL_DEBUG_MAC80211(priv, "enter\n");
3537
3538 if (iwl3945_mod_params.sw_crypto) {
3539 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
3540 return -EOPNOTSUPP;
3541 }
3542
3543 addr = sta ? sta->addr : iwl_bcast_addr;
3544 static_key = !iwl_is_associated(priv);
3545
3546 if (!static_key) {
3547 sta_id = priv->cfg->ops->smgmt->find_station(priv, addr);
3548 if (sta_id == IWL_INVALID_STATION) {
3549 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
3550 addr);
3551 return -EINVAL;
3552 }
3553 }
3554
3555 mutex_lock(&priv->mutex);
3556 iwl_scan_cancel_timeout(priv, 100);
3557 mutex_unlock(&priv->mutex);
3558
3559 switch (cmd) {
3560 case SET_KEY:
3561 if (static_key)
3562 ret = iwl3945_set_static_key(priv, key);
3563 else
3564 ret = iwl3945_set_dynamic_key(priv, key, sta_id);
3565 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
3566 break;
3567 case DISABLE_KEY:
3568 if (static_key)
3569 ret = iwl3945_remove_static_key(priv);
3570 else
3571 ret = iwl3945_clear_sta_key_info(priv, sta_id);
3572 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
3573 break;
3574 default:
3575 ret = -EINVAL;
3576 }
3577
3578 IWL_DEBUG_MAC80211(priv, "leave\n");
3579
3580 return ret;
3581 }
3582
3583 /*****************************************************************************
3584 *
3585 * sysfs attributes
3586 *
3587 *****************************************************************************/
3588
3589 #ifdef CONFIG_IWLWIFI_DEBUG
3590
3591 /*
3592 * The following adds a new attribute to the sysfs representation
3593 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
3594 * used for controlling the debug level.
3595 *
3596 * See the level definitions in iwl for details.
3597 */
3598 static ssize_t show_debug_level(struct device *d,
3599 struct device_attribute *attr, char *buf)
3600 {
3601 struct iwl_priv *priv = d->driver_data;
3602
3603 return sprintf(buf, "0x%08X\n", priv->debug_level);
3604 }
3605 static ssize_t store_debug_level(struct device *d,
3606 struct device_attribute *attr,
3607 const char *buf, size_t count)
3608 {
3609 struct iwl_priv *priv = d->driver_data;
3610 unsigned long val;
3611 int ret;
3612
3613 ret = strict_strtoul(buf, 0, &val);
3614 if (ret)
3615 IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
3616 else
3617 priv->debug_level = val;
3618
3619 return strnlen(buf, count);
3620 }
3621
3622 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
3623 show_debug_level, store_debug_level);
3624
3625 #endif /* CONFIG_IWLWIFI_DEBUG */
3626
3627 static ssize_t show_temperature(struct device *d,
3628 struct device_attribute *attr, char *buf)
3629 {
3630 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
3631
3632 if (!iwl_is_alive(priv))
3633 return -EAGAIN;
3634
3635 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
3636 }
3637
3638 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
3639
3640 static ssize_t show_tx_power(struct device *d,
3641 struct device_attribute *attr, char *buf)
3642 {
3643 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
3644 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
3645 }
3646
3647 static ssize_t store_tx_power(struct device *d,
3648 struct device_attribute *attr,
3649 const char *buf, size_t count)
3650 {
3651 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
3652 char *p = (char *)buf;
3653 u32 val;
3654
3655 val = simple_strtoul(p, &p, 10);
3656 if (p == buf)
3657 IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
3658 else
3659 iwl3945_hw_reg_set_txpower(priv, val);
3660
3661 return count;
3662 }
3663
3664 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
3665
3666 static ssize_t show_flags(struct device *d,
3667 struct device_attribute *attr, char *buf)
3668 {
3669 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
3670
3671 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
3672 }
3673
3674 static ssize_t store_flags(struct device *d,
3675 struct device_attribute *attr,
3676 const char *buf, size_t count)
3677 {
3678 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
3679 u32 flags = simple_strtoul(buf, NULL, 0);
3680
3681 mutex_lock(&priv->mutex);
3682 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
3683 /* Cancel any currently running scans... */
3684 if (iwl_scan_cancel_timeout(priv, 100))
3685 IWL_WARN(priv, "Could not cancel scan.\n");
3686 else {
3687 IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n",
3688 flags);
3689 priv->staging_rxon.flags = cpu_to_le32(flags);
3690 iwlcore_commit_rxon(priv);
3691 }
3692 }
3693 mutex_unlock(&priv->mutex);
3694
3695 return count;
3696 }
3697
3698 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
3699
3700 static ssize_t show_filter_flags(struct device *d,
3701 struct device_attribute *attr, char *buf)
3702 {
3703 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
3704
3705 return sprintf(buf, "0x%04X\n",
3706 le32_to_cpu(priv->active_rxon.filter_flags));
3707 }
3708
3709 static ssize_t store_filter_flags(struct device *d,
3710 struct device_attribute *attr,
3711 const char *buf, size_t count)
3712 {
3713 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
3714 u32 filter_flags = simple_strtoul(buf, NULL, 0);
3715
3716 mutex_lock(&priv->mutex);
3717 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
3718 /* Cancel any currently running scans... */
3719 if (iwl_scan_cancel_timeout(priv, 100))
3720 IWL_WARN(priv, "Could not cancel scan.\n");
3721 else {
3722 IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
3723 "0x%04X\n", filter_flags);
3724 priv->staging_rxon.filter_flags =
3725 cpu_to_le32(filter_flags);
3726 iwlcore_commit_rxon(priv);
3727 }
3728 }
3729 mutex_unlock(&priv->mutex);
3730
3731 return count;
3732 }
3733
3734 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
3735 store_filter_flags);
3736
3737 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
3738
3739 static ssize_t show_measurement(struct device *d,
3740 struct device_attribute *attr, char *buf)
3741 {
3742 struct iwl_priv *priv = dev_get_drvdata(d);
3743 struct iwl_spectrum_notification measure_report;
3744 u32 size = sizeof(measure_report), len = 0, ofs = 0;
3745 u8 *data = (u8 *)&measure_report;
3746 unsigned long flags;
3747
3748 spin_lock_irqsave(&priv->lock, flags);
3749 if (!(priv->measurement_status & MEASUREMENT_READY)) {
3750 spin_unlock_irqrestore(&priv->lock, flags);
3751 return 0;
3752 }
3753 memcpy(&measure_report, &priv->measure_report, size);
3754 priv->measurement_status = 0;
3755 spin_unlock_irqrestore(&priv->lock, flags);
3756
3757 while (size && (PAGE_SIZE - len)) {
3758 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3759 PAGE_SIZE - len, 1);
3760 len = strlen(buf);
3761 if (PAGE_SIZE - len)
3762 buf[len++] = '\n';
3763
3764 ofs += 16;
3765 size -= min(size, 16U);
3766 }
3767
3768 return len;
3769 }
3770
3771 static ssize_t store_measurement(struct device *d,
3772 struct device_attribute *attr,
3773 const char *buf, size_t count)
3774 {
3775 struct iwl_priv *priv = dev_get_drvdata(d);
3776 struct ieee80211_measurement_params params = {
3777 .channel = le16_to_cpu(priv->active_rxon.channel),
3778 .start_time = cpu_to_le64(priv->last_tsf),
3779 .duration = cpu_to_le16(1),
3780 };
3781 u8 type = IWL_MEASURE_BASIC;
3782 u8 buffer[32];
3783 u8 channel;
3784
3785 if (count) {
3786 char *p = buffer;
3787 strncpy(buffer, buf, min(sizeof(buffer), count));
3788 channel = simple_strtoul(p, NULL, 0);
3789 if (channel)
3790 params.channel = channel;
3791
3792 p = buffer;
3793 while (*p && *p != ' ')
3794 p++;
3795 if (*p)
3796 type = simple_strtoul(p + 1, NULL, 0);
3797 }
3798
3799 IWL_DEBUG_INFO(priv, "Invoking measurement of type %d on "
3800 "channel %d (for '%s')\n", type, params.channel, buf);
3801 iwl3945_get_measurement(priv, &params, type);
3802
3803 return count;
3804 }
3805
3806 static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
3807 show_measurement, store_measurement);
3808 #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
3809
3810 static ssize_t store_retry_rate(struct device *d,
3811 struct device_attribute *attr,
3812 const char *buf, size_t count)
3813 {
3814 struct iwl_priv *priv = dev_get_drvdata(d);
3815
3816 priv->retry_rate = simple_strtoul(buf, NULL, 0);
3817 if (priv->retry_rate <= 0)
3818 priv->retry_rate = 1;
3819
3820 return count;
3821 }
3822
3823 static ssize_t show_retry_rate(struct device *d,
3824 struct device_attribute *attr, char *buf)
3825 {
3826 struct iwl_priv *priv = dev_get_drvdata(d);
3827 return sprintf(buf, "%d", priv->retry_rate);
3828 }
3829
3830 static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
3831 store_retry_rate);
3832
3833
3834 static ssize_t store_power_level(struct device *d,
3835 struct device_attribute *attr,
3836 const char *buf, size_t count)
3837 {
3838 struct iwl_priv *priv = dev_get_drvdata(d);
3839 int ret;
3840 unsigned long mode;
3841
3842
3843 mutex_lock(&priv->mutex);
3844
3845 ret = strict_strtoul(buf, 10, &mode);
3846 if (ret)
3847 goto out;
3848
3849 ret = iwl_power_set_user_mode(priv, mode);
3850 if (ret) {
3851 IWL_DEBUG_MAC80211(priv, "failed setting power mode.\n");
3852 goto out;
3853 }
3854 ret = count;
3855
3856 out:
3857 mutex_unlock(&priv->mutex);
3858 return ret;
3859 }
3860
3861 static ssize_t show_power_level(struct device *d,
3862 struct device_attribute *attr, char *buf)
3863 {
3864 struct iwl_priv *priv = dev_get_drvdata(d);
3865 int mode = priv->power_data.user_power_setting;
3866 int system = priv->power_data.system_power_setting;
3867 int level = priv->power_data.power_mode;
3868 char *p = buf;
3869
3870 switch (system) {
3871 case IWL_POWER_SYS_AUTO:
3872 p += sprintf(p, "SYSTEM:auto");
3873 break;
3874 case IWL_POWER_SYS_AC:
3875 p += sprintf(p, "SYSTEM:ac");
3876 break;
3877 case IWL_POWER_SYS_BATTERY:
3878 p += sprintf(p, "SYSTEM:battery");
3879 break;
3880 }
3881
3882 p += sprintf(p, "\tMODE:%s", (mode < IWL_POWER_AUTO) ?
3883 "fixed" : "auto");
3884 p += sprintf(p, "\tINDEX:%d", level);
3885 p += sprintf(p, "\n");
3886 return p - buf + 1;
3887 }
3888
3889 static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR,
3890 show_power_level, store_power_level);
3891
3892 #define MAX_WX_STRING 80
3893
3894 /* Values are in microsecond */
3895 static const s32 timeout_duration[] = {
3896 350000,
3897 250000,
3898 75000,
3899 37000,
3900 25000,
3901 };
3902 static const s32 period_duration[] = {
3903 400000,
3904 700000,
3905 1000000,
3906 1000000,
3907 1000000
3908 };
3909
3910 static ssize_t show_channels(struct device *d,
3911 struct device_attribute *attr, char *buf)
3912 {
3913 /* all this shit doesn't belong into sysfs anyway */
3914 return 0;
3915 }
3916
3917 static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
3918
3919 static ssize_t show_statistics(struct device *d,
3920 struct device_attribute *attr, char *buf)
3921 {
3922 struct iwl_priv *priv = dev_get_drvdata(d);
3923 u32 size = sizeof(struct iwl3945_notif_statistics);
3924 u32 len = 0, ofs = 0;
3925 u8 *data = (u8 *)&priv->statistics_39;
3926 int rc = 0;
3927
3928 if (!iwl_is_alive(priv))
3929 return -EAGAIN;
3930
3931 mutex_lock(&priv->mutex);
3932 rc = iwl_send_statistics_request(priv, 0);
3933 mutex_unlock(&priv->mutex);
3934
3935 if (rc) {
3936 len = sprintf(buf,
3937 "Error sending statistics request: 0x%08X\n", rc);
3938 return len;
3939 }
3940
3941 while (size && (PAGE_SIZE - len)) {
3942 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3943 PAGE_SIZE - len, 1);
3944 len = strlen(buf);
3945 if (PAGE_SIZE - len)
3946 buf[len++] = '\n';
3947
3948 ofs += 16;
3949 size -= min(size, 16U);
3950 }
3951
3952 return len;
3953 }
3954
3955 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
3956
3957 static ssize_t show_antenna(struct device *d,
3958 struct device_attribute *attr, char *buf)
3959 {
3960 struct iwl_priv *priv = dev_get_drvdata(d);
3961
3962 if (!iwl_is_alive(priv))
3963 return -EAGAIN;
3964
3965 return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
3966 }
3967
3968 static ssize_t store_antenna(struct device *d,
3969 struct device_attribute *attr,
3970 const char *buf, size_t count)
3971 {
3972 struct iwl_priv *priv __maybe_unused = dev_get_drvdata(d);
3973 int ant;
3974
3975 if (count == 0)
3976 return 0;
3977
3978 if (sscanf(buf, "%1i", &ant) != 1) {
3979 IWL_DEBUG_INFO(priv, "not in hex or decimal form.\n");
3980 return count;
3981 }
3982
3983 if ((ant >= 0) && (ant <= 2)) {
3984 IWL_DEBUG_INFO(priv, "Setting antenna select to %d.\n", ant);
3985 iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
3986 } else
3987 IWL_DEBUG_INFO(priv, "Bad antenna select value %d.\n", ant);
3988
3989
3990 return count;
3991 }
3992
3993 static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
3994
3995 static ssize_t show_status(struct device *d,
3996 struct device_attribute *attr, char *buf)
3997 {
3998 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
3999 if (!iwl_is_alive(priv))
4000 return -EAGAIN;
4001 return sprintf(buf, "0x%08x\n", (int)priv->status);
4002 }
4003
4004 static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
4005
4006 static ssize_t dump_error_log(struct device *d,
4007 struct device_attribute *attr,
4008 const char *buf, size_t count)
4009 {
4010 char *p = (char *)buf;
4011
4012 if (p[0] == '1')
4013 iwl3945_dump_nic_error_log((struct iwl_priv *)d->driver_data);
4014
4015 return strnlen(buf, count);
4016 }
4017
4018 static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
4019
4020 static ssize_t dump_event_log(struct device *d,
4021 struct device_attribute *attr,
4022 const char *buf, size_t count)
4023 {
4024 char *p = (char *)buf;
4025
4026 if (p[0] == '1')
4027 iwl3945_dump_nic_event_log((struct iwl_priv *)d->driver_data);
4028
4029 return strnlen(buf, count);
4030 }
4031
4032 static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
4033
4034 /*****************************************************************************
4035 *
4036 * driver setup and tear down
4037 *
4038 *****************************************************************************/
4039
4040 static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
4041 {
4042 priv->workqueue = create_singlethread_workqueue(DRV_NAME);
4043
4044 init_waitqueue_head(&priv->wait_command_queue);
4045
4046 INIT_WORK(&priv->up, iwl3945_bg_up);
4047 INIT_WORK(&priv->restart, iwl3945_bg_restart);
4048 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
4049 INIT_WORK(&priv->rf_kill, iwl_bg_rf_kill);
4050 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
4051 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
4052 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
4053 INIT_DELAYED_WORK(&priv->rfkill_poll, iwl3945_rfkill_poll);
4054 INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
4055 INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
4056 INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
4057 INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
4058
4059 iwl3945_hw_setup_deferred_work(priv);
4060
4061 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
4062 iwl3945_irq_tasklet, (unsigned long)priv);
4063 }
4064
4065 static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
4066 {
4067 iwl3945_hw_cancel_deferred_work(priv);
4068
4069 cancel_delayed_work_sync(&priv->init_alive_start);
4070 cancel_delayed_work(&priv->scan_check);
4071 cancel_delayed_work(&priv->alive_start);
4072 cancel_work_sync(&priv->beacon_update);
4073 }
4074
4075 static struct attribute *iwl3945_sysfs_entries[] = {
4076 &dev_attr_antenna.attr,
4077 &dev_attr_channels.attr,
4078 &dev_attr_dump_errors.attr,
4079 &dev_attr_dump_events.attr,
4080 &dev_attr_flags.attr,
4081 &dev_attr_filter_flags.attr,
4082 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
4083 &dev_attr_measurement.attr,
4084 #endif
4085 &dev_attr_power_level.attr,
4086 &dev_attr_retry_rate.attr,
4087 &dev_attr_statistics.attr,
4088 &dev_attr_status.attr,
4089 &dev_attr_temperature.attr,
4090 &dev_attr_tx_power.attr,
4091 #ifdef CONFIG_IWLWIFI_DEBUG
4092 &dev_attr_debug_level.attr,
4093 #endif
4094 NULL
4095 };
4096
4097 static struct attribute_group iwl3945_attribute_group = {
4098 .name = NULL, /* put in device directory */
4099 .attrs = iwl3945_sysfs_entries,
4100 };
4101
4102 static struct ieee80211_ops iwl3945_hw_ops = {
4103 .tx = iwl3945_mac_tx,
4104 .start = iwl3945_mac_start,
4105 .stop = iwl3945_mac_stop,
4106 .add_interface = iwl_mac_add_interface,
4107 .remove_interface = iwl_mac_remove_interface,
4108 .config = iwl_mac_config,
4109 .config_interface = iwl_mac_config_interface,
4110 .configure_filter = iwl_configure_filter,
4111 .set_key = iwl3945_mac_set_key,
4112 .get_tx_stats = iwl_mac_get_tx_stats,
4113 .conf_tx = iwl_mac_conf_tx,
4114 .reset_tsf = iwl_mac_reset_tsf,
4115 .bss_info_changed = iwl_bss_info_changed,
4116 .hw_scan = iwl_mac_hw_scan
4117 };
4118
4119 static int iwl3945_init_drv(struct iwl_priv *priv)
4120 {
4121 int ret;
4122 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
4123
4124 priv->retry_rate = 1;
4125 priv->ibss_beacon = NULL;
4126
4127 spin_lock_init(&priv->lock);
4128 spin_lock_init(&priv->power_data.lock);
4129 spin_lock_init(&priv->sta_lock);
4130 spin_lock_init(&priv->hcmd_lock);
4131
4132 INIT_LIST_HEAD(&priv->free_frames);
4133
4134 mutex_init(&priv->mutex);
4135
4136 /* Clear the driver's (not device's) station table */
4137 priv->cfg->ops->smgmt->clear_station_table(priv);
4138
4139 priv->data_retry_limit = -1;
4140 priv->ieee_channels = NULL;
4141 priv->ieee_rates = NULL;
4142 priv->band = IEEE80211_BAND_2GHZ;
4143
4144 priv->iw_mode = NL80211_IFTYPE_STATION;
4145
4146 iwl_reset_qos(priv);
4147
4148 priv->qos_data.qos_active = 0;
4149 priv->qos_data.qos_cap.val = 0;
4150
4151 priv->rates_mask = IWL_RATES_MASK;
4152 /* If power management is turned on, default to CAM mode */
4153 priv->power_mode = IWL_POWER_MODE_CAM;
4154 priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER;
4155
4156 if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
4157 IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
4158 eeprom->version);
4159 ret = -EINVAL;
4160 goto err;
4161 }
4162 ret = iwl_init_channel_map(priv);
4163 if (ret) {
4164 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
4165 goto err;
4166 }
4167
4168 /* Set up txpower settings in driver for all channels */
4169 if (iwl3945_txpower_set_from_eeprom(priv)) {
4170 ret = -EIO;
4171 goto err_free_channel_map;
4172 }
4173
4174 ret = iwlcore_init_geos(priv);
4175 if (ret) {
4176 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
4177 goto err_free_channel_map;
4178 }
4179 iwl3945_init_hw_rates(priv, priv->ieee_rates);
4180
4181 return 0;
4182
4183 err_free_channel_map:
4184 iwl_free_channel_map(priv);
4185 err:
4186 return ret;
4187 }
4188
4189 static int iwl3945_setup_mac(struct iwl_priv *priv)
4190 {
4191 int ret;
4192 struct ieee80211_hw *hw = priv->hw;
4193
4194 hw->rate_control_algorithm = "iwl-3945-rs";
4195 hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
4196
4197 /* Tell mac80211 our characteristics */
4198 hw->flags = IEEE80211_HW_SIGNAL_DBM |
4199 IEEE80211_HW_NOISE_DBM |
4200 IEEE80211_HW_SPECTRUM_MGMT;
4201
4202 hw->wiphy->interface_modes =
4203 BIT(NL80211_IFTYPE_STATION) |
4204 BIT(NL80211_IFTYPE_ADHOC);
4205
4206 hw->wiphy->custom_regulatory = true;
4207
4208 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
4209 /* we create the 802.11 header and a zero-length SSID element */
4210 hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
4211
4212 /* Default value; 4 EDCA QOS priorities */
4213 hw->queues = 4;
4214
4215 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
4216 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
4217 &priv->bands[IEEE80211_BAND_2GHZ];
4218
4219 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
4220 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
4221 &priv->bands[IEEE80211_BAND_5GHZ];
4222
4223 ret = ieee80211_register_hw(priv->hw);
4224 if (ret) {
4225 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
4226 return ret;
4227 }
4228 priv->mac80211_registered = 1;
4229
4230 return 0;
4231 }
4232
4233 static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
4234 {
4235 int err = 0;
4236 struct iwl_priv *priv;
4237 struct ieee80211_hw *hw;
4238 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
4239 struct iwl3945_eeprom *eeprom;
4240 unsigned long flags;
4241
4242 /***********************
4243 * 1. Allocating HW data
4244 * ********************/
4245
4246 /* mac80211 allocates memory for this device instance, including
4247 * space for this driver's private structure */
4248 hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
4249 if (hw == NULL) {
4250 printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
4251 err = -ENOMEM;
4252 goto out;
4253 }
4254 priv = hw->priv;
4255 SET_IEEE80211_DEV(hw, &pdev->dev);
4256
4257 if ((iwl3945_mod_params.num_of_queues > IWL39_MAX_NUM_QUEUES) ||
4258 (iwl3945_mod_params.num_of_queues < IWL_MIN_NUM_QUEUES)) {
4259 IWL_ERR(priv,
4260 "invalid queues_num, should be between %d and %d\n",
4261 IWL_MIN_NUM_QUEUES, IWL39_MAX_NUM_QUEUES);
4262 err = -EINVAL;
4263 goto out_ieee80211_free_hw;
4264 }
4265
4266 /*
4267 * Disabling hardware scan means that mac80211 will perform scans
4268 * "the hard way", rather than using device's scan.
4269 */
4270 if (iwl3945_mod_params.disable_hw_scan) {
4271 IWL_DEBUG_INFO(priv, "Disabling hw_scan\n");
4272 iwl3945_hw_ops.hw_scan = NULL;
4273 }
4274
4275
4276 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
4277 priv->cfg = cfg;
4278 priv->pci_dev = pdev;
4279
4280 #ifdef CONFIG_IWLWIFI_DEBUG
4281 priv->debug_level = iwl3945_mod_params.debug;
4282 atomic_set(&priv->restrict_refcnt, 0);
4283 #endif
4284
4285 /***************************
4286 * 2. Initializing PCI bus
4287 * *************************/
4288 if (pci_enable_device(pdev)) {
4289 err = -ENODEV;
4290 goto out_ieee80211_free_hw;
4291 }
4292
4293 pci_set_master(pdev);
4294
4295 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
4296 if (!err)
4297 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
4298 if (err) {
4299 IWL_WARN(priv, "No suitable DMA available.\n");
4300 goto out_pci_disable_device;
4301 }
4302
4303 pci_set_drvdata(pdev, priv);
4304 err = pci_request_regions(pdev, DRV_NAME);
4305 if (err)
4306 goto out_pci_disable_device;
4307
4308 /***********************
4309 * 3. Read REV Register
4310 * ********************/
4311 priv->hw_base = pci_iomap(pdev, 0, 0);
4312 if (!priv->hw_base) {
4313 err = -ENODEV;
4314 goto out_pci_release_regions;
4315 }
4316
4317 IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
4318 (unsigned long long) pci_resource_len(pdev, 0));
4319 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
4320
4321 /* We disable the RETRY_TIMEOUT register (0x41) to keep
4322 * PCI Tx retries from interfering with C3 CPU state */
4323 pci_write_config_byte(pdev, 0x41, 0x00);
4324
4325 /* amp init */
4326 err = priv->cfg->ops->lib->apm_ops.init(priv);
4327 if (err < 0) {
4328 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
4329 goto out_iounmap;
4330 }
4331
4332 /***********************
4333 * 4. Read EEPROM
4334 * ********************/
4335
4336 /* Read the EEPROM */
4337 err = iwl_eeprom_init(priv);
4338 if (err) {
4339 IWL_ERR(priv, "Unable to init EEPROM\n");
4340 goto out_iounmap;
4341 }
4342 /* MAC Address location in EEPROM same for 3945/4965 */
4343 eeprom = (struct iwl3945_eeprom *)priv->eeprom;
4344 memcpy(priv->mac_addr, eeprom->mac_address, ETH_ALEN);
4345 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
4346 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
4347
4348 /***********************
4349 * 5. Setup HW Constants
4350 * ********************/
4351 /* Device-specific setup */
4352 if (iwl3945_hw_set_hw_params(priv)) {
4353 IWL_ERR(priv, "failed to set hw settings\n");
4354 goto out_eeprom_free;
4355 }
4356
4357 /***********************
4358 * 6. Setup priv
4359 * ********************/
4360
4361 err = iwl3945_init_drv(priv);
4362 if (err) {
4363 IWL_ERR(priv, "initializing driver failed\n");
4364 goto out_unset_hw_params;
4365 }
4366
4367 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
4368 priv->cfg->name);
4369
4370 /***********************
4371 * 7. Setup Services
4372 * ********************/
4373
4374 spin_lock_irqsave(&priv->lock, flags);
4375 iwl_disable_interrupts(priv);
4376 spin_unlock_irqrestore(&priv->lock, flags);
4377
4378 pci_enable_msi(priv->pci_dev);
4379
4380 err = request_irq(priv->pci_dev->irq, iwl_isr, IRQF_SHARED,
4381 DRV_NAME, priv);
4382 if (err) {
4383 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
4384 goto out_disable_msi;
4385 }
4386
4387 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
4388 if (err) {
4389 IWL_ERR(priv, "failed to create sysfs device attributes\n");
4390 goto out_release_irq;
4391 }
4392
4393 iwl_set_rxon_channel(priv,
4394 &priv->bands[IEEE80211_BAND_2GHZ].channels[5]);
4395 iwl3945_setup_deferred_work(priv);
4396 iwl3945_setup_rx_handlers(priv);
4397
4398 /*********************************
4399 * 8. Setup and Register mac80211
4400 * *******************************/
4401
4402 iwl_enable_interrupts(priv);
4403
4404 err = iwl3945_setup_mac(priv);
4405 if (err)
4406 goto out_remove_sysfs;
4407
4408 err = iwl_dbgfs_register(priv, DRV_NAME);
4409 if (err)
4410 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
4411
4412 err = iwl_rfkill_init(priv);
4413 if (err)
4414 IWL_ERR(priv, "Unable to initialize RFKILL system. "
4415 "Ignoring error: %d\n", err);
4416 else
4417 iwl_rfkill_set_hw_state(priv);
4418
4419 /* Start monitoring the killswitch */
4420 queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
4421 2 * HZ);
4422
4423 return 0;
4424
4425 out_remove_sysfs:
4426 destroy_workqueue(priv->workqueue);
4427 priv->workqueue = NULL;
4428 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
4429 out_release_irq:
4430 free_irq(priv->pci_dev->irq, priv);
4431 out_disable_msi:
4432 pci_disable_msi(priv->pci_dev);
4433 iwlcore_free_geos(priv);
4434 iwl_free_channel_map(priv);
4435 out_unset_hw_params:
4436 iwl3945_unset_hw_params(priv);
4437 out_eeprom_free:
4438 iwl_eeprom_free(priv);
4439 out_iounmap:
4440 pci_iounmap(pdev, priv->hw_base);
4441 out_pci_release_regions:
4442 pci_release_regions(pdev);
4443 out_pci_disable_device:
4444 pci_set_drvdata(pdev, NULL);
4445 pci_disable_device(pdev);
4446 out_ieee80211_free_hw:
4447 ieee80211_free_hw(priv->hw);
4448 out:
4449 return err;
4450 }
4451
4452 static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
4453 {
4454 struct iwl_priv *priv = pci_get_drvdata(pdev);
4455 unsigned long flags;
4456
4457 if (!priv)
4458 return;
4459
4460 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
4461
4462 iwl_dbgfs_unregister(priv);
4463
4464 set_bit(STATUS_EXIT_PENDING, &priv->status);
4465
4466 if (priv->mac80211_registered) {
4467 ieee80211_unregister_hw(priv->hw);
4468 priv->mac80211_registered = 0;
4469 } else {
4470 iwl3945_down(priv);
4471 }
4472
4473 /* make sure we flush any pending irq or
4474 * tasklet for the driver
4475 */
4476 spin_lock_irqsave(&priv->lock, flags);
4477 iwl_disable_interrupts(priv);
4478 spin_unlock_irqrestore(&priv->lock, flags);
4479
4480 iwl_synchronize_irq(priv);
4481
4482 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
4483
4484 iwl_rfkill_unregister(priv);
4485 cancel_delayed_work_sync(&priv->rfkill_poll);
4486
4487 iwl3945_dealloc_ucode_pci(priv);
4488
4489 if (priv->rxq.bd)
4490 iwl3945_rx_queue_free(priv, &priv->rxq);
4491 iwl3945_hw_txq_ctx_free(priv);
4492
4493 iwl3945_unset_hw_params(priv);
4494 priv->cfg->ops->smgmt->clear_station_table(priv);
4495
4496 /*netif_stop_queue(dev); */
4497 flush_workqueue(priv->workqueue);
4498
4499 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
4500 * priv->workqueue... so we can't take down the workqueue
4501 * until now... */
4502 destroy_workqueue(priv->workqueue);
4503 priv->workqueue = NULL;
4504
4505 free_irq(pdev->irq, priv);
4506 pci_disable_msi(pdev);
4507
4508 pci_iounmap(pdev, priv->hw_base);
4509 pci_release_regions(pdev);
4510 pci_disable_device(pdev);
4511 pci_set_drvdata(pdev, NULL);
4512
4513 iwl_free_channel_map(priv);
4514 iwlcore_free_geos(priv);
4515 kfree(priv->scan);
4516 if (priv->ibss_beacon)
4517 dev_kfree_skb(priv->ibss_beacon);
4518
4519 ieee80211_free_hw(priv->hw);
4520 }
4521
4522
4523 /*****************************************************************************
4524 *
4525 * driver and module entry point
4526 *
4527 *****************************************************************************/
4528
4529 static struct pci_driver iwl3945_driver = {
4530 .name = DRV_NAME,
4531 .id_table = iwl3945_hw_card_ids,
4532 .probe = iwl3945_pci_probe,
4533 .remove = __devexit_p(iwl3945_pci_remove),
4534 #ifdef CONFIG_PM
4535 .suspend = iwl_pci_suspend,
4536 .resume = iwl_pci_resume,
4537 #endif
4538 };
4539
4540 static int __init iwl3945_init(void)
4541 {
4542
4543 int ret;
4544 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
4545 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
4546
4547 ret = iwl3945_rate_control_register();
4548 if (ret) {
4549 printk(KERN_ERR DRV_NAME
4550 "Unable to register rate control algorithm: %d\n", ret);
4551 return ret;
4552 }
4553
4554 ret = pci_register_driver(&iwl3945_driver);
4555 if (ret) {
4556 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
4557 goto error_register;
4558 }
4559
4560 return ret;
4561
4562 error_register:
4563 iwl3945_rate_control_unregister();
4564 return ret;
4565 }
4566
4567 static void __exit iwl3945_exit(void)
4568 {
4569 pci_unregister_driver(&iwl3945_driver);
4570 iwl3945_rate_control_unregister();
4571 }
4572
4573 MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
4574
4575 module_param_named(antenna, iwl3945_mod_params.antenna, int, 0444);
4576 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
4577 module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, 0444);
4578 MODULE_PARM_DESC(swcrypto,
4579 "using software crypto (default 1 [software])\n");
4580 module_param_named(debug, iwl3945_mod_params.debug, uint, 0444);
4581 MODULE_PARM_DESC(debug, "debug output mask");
4582 module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan, int, 0444);
4583 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
4584
4585 module_param_named(queues_num, iwl3945_mod_params.num_of_queues, int, 0444);
4586 MODULE_PARM_DESC(queues_num, "number of hw queues.");
4587
4588 module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, 0444);
4589 MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error");
4590
4591 module_exit(iwl3945_exit);
4592 module_init(iwl3945_init);
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree