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Merge branch 'topic/misc' into for-linus
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / sound / arm / aaci.c
blob1497dce1b04a7498ac5e28e41774cfc09a28375c
1 /*
2 * linux/sound/arm/aaci.c - ARM PrimeCell AACI PL041 driver
3 *
4 * Copyright (C) 2003 Deep Blue Solutions Ltd, All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Documentation: ARM DDI 0173B
11 */
12 #include <linux/module.h>
13 #include <linux/delay.h>
14 #include <linux/init.h>
15 #include <linux/ioport.h>
16 #include <linux/device.h>
17 #include <linux/spinlock.h>
18 #include <linux/interrupt.h>
19 #include <linux/err.h>
20 #include <linux/amba/bus.h>
21 #include <linux/io.h>
22
23 #include <sound/core.h>
24 #include <sound/initval.h>
25 #include <sound/ac97_codec.h>
26 #include <sound/pcm.h>
27 #include <sound/pcm_params.h>
28
29 #include "aaci.h"
30
31 #define DRIVER_NAME "aaci-pl041"
32
33 /*
34 * PM support is not complete. Turn it off.
35 */
36 #undef CONFIG_PM
37
38 static void aaci_ac97_select_codec(struct aaci *aaci, struct snd_ac97 *ac97)
39 {
40 u32 v, maincr = aaci->maincr | MAINCR_SCRA(ac97->num);
41
42 /*
43 * Ensure that the slot 1/2 RX registers are empty.
44 */
45 v = readl(aaci->base + AACI_SLFR);
46 if (v & SLFR_2RXV)
47 readl(aaci->base + AACI_SL2RX);
48 if (v & SLFR_1RXV)
49 readl(aaci->base + AACI_SL1RX);
50
51 writel(maincr, aaci->base + AACI_MAINCR);
52 }
53
54 /*
55 * P29:
56 * The recommended use of programming the external codec through slot 1
57 * and slot 2 data is to use the channels during setup routines and the
58 * slot register at any other time. The data written into slot 1, slot 2
59 * and slot 12 registers is transmitted only when their corresponding
60 * SI1TxEn, SI2TxEn and SI12TxEn bits are set in the AACI_MAINCR
61 * register.
62 */
63 static void aaci_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
64 unsigned short val)
65 {
66 struct aaci *aaci = ac97->private_data;
67 u32 v;
68 int timeout = 5000;
69
70 if (ac97->num >= 4)
71 return;
72
73 mutex_lock(&aaci->ac97_sem);
74
75 aaci_ac97_select_codec(aaci, ac97);
76
77 /*
78 * P54: You must ensure that AACI_SL2TX is always written
79 * to, if required, before data is written to AACI_SL1TX.
80 */
81 writel(val << 4, aaci->base + AACI_SL2TX);
82 writel(reg << 12, aaci->base + AACI_SL1TX);
83
84 /*
85 * Wait for the transmission of both slots to complete.
86 */
87 do {
88 v = readl(aaci->base + AACI_SLFR);
89 } while ((v & (SLFR_1TXB|SLFR_2TXB)) && --timeout);
90
91 if (!timeout)
92 dev_err(&aaci->dev->dev,
93 "timeout waiting for write to complete\n");
94
95 mutex_unlock(&aaci->ac97_sem);
96 }
97
98 /*
99 * Read an AC'97 register.
100 */
101 static unsigned short aaci_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
102 {
103 struct aaci *aaci = ac97->private_data;
104 u32 v;
105 int timeout = 5000;
106 int retries = 10;
107
108 if (ac97->num >= 4)
109 return ~0;
110
111 mutex_lock(&aaci->ac97_sem);
112
113 aaci_ac97_select_codec(aaci, ac97);
114
115 /*
116 * Write the register address to slot 1.
117 */
118 writel((reg << 12) | (1 << 19), aaci->base + AACI_SL1TX);
119
120 /*
121 * Wait for the transmission to complete.
122 */
123 do {
124 v = readl(aaci->base + AACI_SLFR);
125 } while ((v & SLFR_1TXB) && --timeout);
126
127 if (!timeout) {
128 dev_err(&aaci->dev->dev, "timeout on slot 1 TX busy\n");
129 v = ~0;
130 goto out;
131 }
132
133 /*
134 * Give the AC'97 codec more than enough time
135 * to respond. (42us = ~2 frames at 48kHz.)
136 */
137 udelay(42);
138
139 /*
140 * Wait for slot 2 to indicate data.
141 */
142 timeout = 5000;
143 do {
144 cond_resched();
145 v = readl(aaci->base + AACI_SLFR) & (SLFR_1RXV|SLFR_2RXV);
146 } while ((v != (SLFR_1RXV|SLFR_2RXV)) && --timeout);
147
148 if (!timeout) {
149 dev_err(&aaci->dev->dev, "timeout on RX valid\n");
150 v = ~0;
151 goto out;
152 }
153
154 do {
155 v = readl(aaci->base + AACI_SL1RX) >> 12;
156 if (v == reg) {
157 v = readl(aaci->base + AACI_SL2RX) >> 4;
158 break;
159 } else if (--retries) {
160 dev_warn(&aaci->dev->dev,
161 "ac97 read back fail. retry\n");
162 continue;
163 } else {
164 dev_warn(&aaci->dev->dev,
165 "wrong ac97 register read back (%x != %x)\n",
166 v, reg);
167 v = ~0;
168 }
169 } while (retries);
170 out:
171 mutex_unlock(&aaci->ac97_sem);
172 return v;
173 }
174
175 static inline void aaci_chan_wait_ready(struct aaci_runtime *aacirun)
176 {
177 u32 val;
178 int timeout = 5000;
179
180 do {
181 val = readl(aacirun->base + AACI_SR);
182 } while (val & (SR_TXB|SR_RXB) && timeout--);
183 }
184
185
186
187 /*
188 * Interrupt support.
189 */
190 static void aaci_fifo_irq(struct aaci *aaci, int channel, u32 mask)
191 {
192 if (mask & ISR_ORINTR) {
193 dev_warn(&aaci->dev->dev, "RX overrun on chan %d\n", channel);
194 writel(ICLR_RXOEC1 << channel, aaci->base + AACI_INTCLR);
195 }
196
197 if (mask & ISR_RXTOINTR) {
198 dev_warn(&aaci->dev->dev, "RX timeout on chan %d\n", channel);
199 writel(ICLR_RXTOFEC1 << channel, aaci->base + AACI_INTCLR);
200 }
201
202 if (mask & ISR_RXINTR) {
203 struct aaci_runtime *aacirun = &aaci->capture;
204 void *ptr;
205
206 if (!aacirun->substream || !aacirun->start) {
207 dev_warn(&aaci->dev->dev, "RX interrupt???\n");
208 writel(0, aacirun->base + AACI_IE);
209 return;
210 }
211 ptr = aacirun->ptr;
212
213 do {
214 unsigned int len = aacirun->fifosz;
215 u32 val;
216
217 if (aacirun->bytes <= 0) {
218 aacirun->bytes += aacirun->period;
219 aacirun->ptr = ptr;
220 spin_unlock(&aaci->lock);
221 snd_pcm_period_elapsed(aacirun->substream);
222 spin_lock(&aaci->lock);
223 }
224 if (!(aacirun->cr & CR_EN))
225 break;
226
227 val = readl(aacirun->base + AACI_SR);
228 if (!(val & SR_RXHF))
229 break;
230 if (!(val & SR_RXFF))
231 len >>= 1;
232
233 aacirun->bytes -= len;
234
235 /* reading 16 bytes at a time */
236 for( ; len > 0; len -= 16) {
237 asm(
238 "ldmia %1, {r0, r1, r2, r3}\n\t"
239 "stmia %0!, {r0, r1, r2, r3}"
240 : "+r" (ptr)
241 : "r" (aacirun->fifo)
242 : "r0", "r1", "r2", "r3", "cc");
243
244 if (ptr >= aacirun->end)
245 ptr = aacirun->start;
246 }
247 } while(1);
248 aacirun->ptr = ptr;
249 }
250
251 if (mask & ISR_URINTR) {
252 dev_dbg(&aaci->dev->dev, "TX underrun on chan %d\n", channel);
253 writel(ICLR_TXUEC1 << channel, aaci->base + AACI_INTCLR);
254 }
255
256 if (mask & ISR_TXINTR) {
257 struct aaci_runtime *aacirun = &aaci->playback;
258 void *ptr;
259
260 if (!aacirun->substream || !aacirun->start) {
261 dev_warn(&aaci->dev->dev, "TX interrupt???\n");
262 writel(0, aacirun->base + AACI_IE);
263 return;
264 }
265
266 ptr = aacirun->ptr;
267 do {
268 unsigned int len = aacirun->fifosz;
269 u32 val;
270
271 if (aacirun->bytes <= 0) {
272 aacirun->bytes += aacirun->period;
273 aacirun->ptr = ptr;
274 spin_unlock(&aaci->lock);
275 snd_pcm_period_elapsed(aacirun->substream);
276 spin_lock(&aaci->lock);
277 }
278 if (!(aacirun->cr & CR_EN))
279 break;
280
281 val = readl(aacirun->base + AACI_SR);
282 if (!(val & SR_TXHE))
283 break;
284 if (!(val & SR_TXFE))
285 len >>= 1;
286
287 aacirun->bytes -= len;
288
289 /* writing 16 bytes at a time */
290 for ( ; len > 0; len -= 16) {
291 asm(
292 "ldmia %0!, {r0, r1, r2, r3}\n\t"
293 "stmia %1, {r0, r1, r2, r3}"
294 : "+r" (ptr)
295 : "r" (aacirun->fifo)
296 : "r0", "r1", "r2", "r3", "cc");
297
298 if (ptr >= aacirun->end)
299 ptr = aacirun->start;
300 }
301 } while (1);
302
303 aacirun->ptr = ptr;
304 }
305 }
306
307 static irqreturn_t aaci_irq(int irq, void *devid)
308 {
309 struct aaci *aaci = devid;
310 u32 mask;
311 int i;
312
313 spin_lock(&aaci->lock);
314 mask = readl(aaci->base + AACI_ALLINTS);
315 if (mask) {
316 u32 m = mask;
317 for (i = 0; i < 4; i++, m >>= 7) {
318 if (m & 0x7f) {
319 aaci_fifo_irq(aaci, i, m);
320 }
321 }
322 }
323 spin_unlock(&aaci->lock);
324
325 return mask ? IRQ_HANDLED : IRQ_NONE;
326 }
327
328
329
330 /*
331 * ALSA support.
332 */
333
334 struct aaci_stream {
335 unsigned char codec_idx;
336 unsigned char rate_idx;
337 };
338
339 static struct aaci_stream aaci_streams[] = {
340 [ACSTREAM_FRONT] = {
341 .codec_idx = 0,
342 .rate_idx = AC97_RATES_FRONT_DAC,
343 },
344 [ACSTREAM_SURROUND] = {
345 .codec_idx = 0,
346 .rate_idx = AC97_RATES_SURR_DAC,
347 },
348 [ACSTREAM_LFE] = {
349 .codec_idx = 0,
350 .rate_idx = AC97_RATES_LFE_DAC,
351 },
352 };
353
354 static inline unsigned int aaci_rate_mask(struct aaci *aaci, int streamid)
355 {
356 struct aaci_stream *s = aaci_streams + streamid;
357 return aaci->ac97_bus->codec[s->codec_idx]->rates[s->rate_idx];
358 }
359
360 static unsigned int rate_list[] = {
361 5512, 8000, 11025, 16000, 22050, 32000, 44100,
362 48000, 64000, 88200, 96000, 176400, 192000
363 };
364
365 /*
366 * Double-rate rule: we can support double rate iff channels == 2
367 * (unimplemented)
368 */
369 static int
370 aaci_rule_rate_by_channels(struct snd_pcm_hw_params *p, struct snd_pcm_hw_rule *rule)
371 {
372 struct aaci *aaci = rule->private;
373 unsigned int rate_mask = SNDRV_PCM_RATE_8000_48000|SNDRV_PCM_RATE_5512;
374 struct snd_interval *c = hw_param_interval(p, SNDRV_PCM_HW_PARAM_CHANNELS);
375
376 switch (c->max) {
377 case 6:
378 rate_mask &= aaci_rate_mask(aaci, ACSTREAM_LFE);
379 case 4:
380 rate_mask &= aaci_rate_mask(aaci, ACSTREAM_SURROUND);
381 case 2:
382 rate_mask &= aaci_rate_mask(aaci, ACSTREAM_FRONT);
383 }
384
385 return snd_interval_list(hw_param_interval(p, rule->var),
386 ARRAY_SIZE(rate_list), rate_list,
387 rate_mask);
388 }
389
390 static struct snd_pcm_hardware aaci_hw_info = {
391 .info = SNDRV_PCM_INFO_MMAP |
392 SNDRV_PCM_INFO_MMAP_VALID |
393 SNDRV_PCM_INFO_INTERLEAVED |
394 SNDRV_PCM_INFO_BLOCK_TRANSFER |
395 SNDRV_PCM_INFO_RESUME,
396
397 /*
398 * ALSA doesn't support 18-bit or 20-bit packed into 32-bit
399 * words. It also doesn't support 12-bit at all.
400 */
401 .formats = SNDRV_PCM_FMTBIT_S16_LE,
402
403 /* should this be continuous or knot? */
404 .rates = SNDRV_PCM_RATE_CONTINUOUS,
405 .rate_max = 48000,
406 .rate_min = 4000,
407 .channels_min = 2,
408 .channels_max = 6,
409 .buffer_bytes_max = 64 * 1024,
410 .period_bytes_min = 256,
411 .period_bytes_max = PAGE_SIZE,
412 .periods_min = 4,
413 .periods_max = PAGE_SIZE / 16,
414 };
415
416 static int __aaci_pcm_open(struct aaci *aaci,
417 struct snd_pcm_substream *substream,
418 struct aaci_runtime *aacirun)
419 {
420 struct snd_pcm_runtime *runtime = substream->runtime;
421 int ret;
422
423 aacirun->substream = substream;
424 runtime->private_data = aacirun;
425 runtime->hw = aaci_hw_info;
426
427 /*
428 * FIXME: ALSA specifies fifo_size in bytes. If we're in normal
429 * mode, each 32-bit word contains one sample. If we're in
430 * compact mode, each 32-bit word contains two samples, effectively
431 * halving the FIFO size. However, we don't know for sure which
432 * we'll be using at this point. We set this to the lower limit.
433 */
434 runtime->hw.fifo_size = aaci->fifosize * 2;
435
436 /*
437 * Add rule describing hardware rate dependency
438 * on the number of channels.
439 */
440 ret = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
441 aaci_rule_rate_by_channels, aaci,
442 SNDRV_PCM_HW_PARAM_CHANNELS,
443 SNDRV_PCM_HW_PARAM_RATE, -1);
444 if (ret)
445 goto out;
446
447 ret = request_irq(aaci->dev->irq[0], aaci_irq, IRQF_SHARED|IRQF_DISABLED,
448 DRIVER_NAME, aaci);
449 if (ret)
450 goto out;
451
452 return 0;
453
454 out:
455 return ret;
456 }
457
458
459 /*
460 * Common ALSA stuff
461 */
462 static int aaci_pcm_close(struct snd_pcm_substream *substream)
463 {
464 struct aaci *aaci = substream->private_data;
465 struct aaci_runtime *aacirun = substream->runtime->private_data;
466
467 WARN_ON(aacirun->cr & CR_EN);
468
469 aacirun->substream = NULL;
470 free_irq(aaci->dev->irq[0], aaci);
471
472 return 0;
473 }
474
475 static int aaci_pcm_hw_free(struct snd_pcm_substream *substream)
476 {
477 struct aaci_runtime *aacirun = substream->runtime->private_data;
478
479 /*
480 * This must not be called with the device enabled.
481 */
482 WARN_ON(aacirun->cr & CR_EN);
483
484 if (aacirun->pcm_open)
485 snd_ac97_pcm_close(aacirun->pcm);
486 aacirun->pcm_open = 0;
487
488 /*
489 * Clear out the DMA and any allocated buffers.
490 */
491 snd_pcm_lib_free_pages(substream);
492
493 return 0;
494 }
495
496 static int aaci_pcm_hw_params(struct snd_pcm_substream *substream,
497 struct aaci_runtime *aacirun,
498 struct snd_pcm_hw_params *params)
499 {
500 int err;
501
502 aaci_pcm_hw_free(substream);
503 if (aacirun->pcm_open) {
504 snd_ac97_pcm_close(aacirun->pcm);
505 aacirun->pcm_open = 0;
506 }
507
508 err = snd_pcm_lib_malloc_pages(substream,
509 params_buffer_bytes(params));
510 if (err < 0)
511 goto out;
512
513 err = snd_ac97_pcm_open(aacirun->pcm, params_rate(params),
514 params_channels(params),
515 aacirun->pcm->r[0].slots);
516 if (err)
517 goto out;
518
519 aacirun->pcm_open = 1;
520
521 out:
522 return err;
523 }
524
525 static int aaci_pcm_prepare(struct snd_pcm_substream *substream)
526 {
527 struct snd_pcm_runtime *runtime = substream->runtime;
528 struct aaci_runtime *aacirun = runtime->private_data;
529
530 aacirun->start = (void *)runtime->dma_area;
531 aacirun->end = aacirun->start + snd_pcm_lib_buffer_bytes(substream);
532 aacirun->ptr = aacirun->start;
533 aacirun->period =
534 aacirun->bytes = frames_to_bytes(runtime, runtime->period_size);
535
536 return 0;
537 }
538
539 static snd_pcm_uframes_t aaci_pcm_pointer(struct snd_pcm_substream *substream)
540 {
541 struct snd_pcm_runtime *runtime = substream->runtime;
542 struct aaci_runtime *aacirun = runtime->private_data;
543 ssize_t bytes = aacirun->ptr - aacirun->start;
544
545 return bytes_to_frames(runtime, bytes);
546 }
547
548
549 /*
550 * Playback specific ALSA stuff
551 */
552 static const u32 channels_to_txmask[] = {
553 [2] = CR_SL3 | CR_SL4,
554 [4] = CR_SL3 | CR_SL4 | CR_SL7 | CR_SL8,
555 [6] = CR_SL3 | CR_SL4 | CR_SL7 | CR_SL8 | CR_SL6 | CR_SL9,
556 };
557
558 /*
559 * We can support two and four channel audio. Unfortunately
560 * six channel audio requires a non-standard channel ordering:
561 * 2 -> FL(3), FR(4)
562 * 4 -> FL(3), FR(4), SL(7), SR(8)
563 * 6 -> FL(3), FR(4), SL(7), SR(8), C(6), LFE(9) (required)
564 * FL(3), FR(4), C(6), SL(7), SR(8), LFE(9) (actual)
565 * This requires an ALSA configuration file to correct.
566 */
567 static unsigned int channel_list[] = { 2, 4, 6 };
568
569 static int
570 aaci_rule_channels(struct snd_pcm_hw_params *p, struct snd_pcm_hw_rule *rule)
571 {
572 struct aaci *aaci = rule->private;
573 unsigned int chan_mask = 1 << 0, slots;
574
575 /*
576 * pcms[0] is the our 5.1 PCM instance.
577 */
578 slots = aaci->ac97_bus->pcms[0].r[0].slots;
579 if (slots & (1 << AC97_SLOT_PCM_SLEFT)) {
580 chan_mask |= 1 << 1;
581 if (slots & (1 << AC97_SLOT_LFE))
582 chan_mask |= 1 << 2;
583 }
584
585 return snd_interval_list(hw_param_interval(p, rule->var),
586 ARRAY_SIZE(channel_list), channel_list,
587 chan_mask);
588 }
589
590 static int aaci_pcm_open(struct snd_pcm_substream *substream)
591 {
592 struct aaci *aaci = substream->private_data;
593 int ret;
594
595 /*
596 * Add rule describing channel dependency.
597 */
598 ret = snd_pcm_hw_rule_add(substream->runtime, 0,
599 SNDRV_PCM_HW_PARAM_CHANNELS,
600 aaci_rule_channels, aaci,
601 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
602 if (ret)
603 return ret;
604
605 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
606 ret = __aaci_pcm_open(aaci, substream, &aaci->playback);
607 } else {
608 ret = __aaci_pcm_open(aaci, substream, &aaci->capture);
609 }
610 return ret;
611 }
612
613 static int aaci_pcm_playback_hw_params(struct snd_pcm_substream *substream,
614 struct snd_pcm_hw_params *params)
615 {
616 struct aaci *aaci = substream->private_data;
617 struct aaci_runtime *aacirun = substream->runtime->private_data;
618 unsigned int channels = params_channels(params);
619 int ret;
620
621 WARN_ON(channels >= ARRAY_SIZE(channels_to_txmask) ||
622 !channels_to_txmask[channels]);
623
624 ret = aaci_pcm_hw_params(substream, aacirun, params);
625
626 /*
627 * Enable FIFO, compact mode, 16 bits per sample.
628 * FIXME: double rate slots?
629 */
630 if (ret >= 0) {
631 aacirun->cr = CR_FEN | CR_COMPACT | CR_SZ16;
632 aacirun->cr |= channels_to_txmask[channels];
633
634 aacirun->fifosz = aaci->fifosize * 4;
635 if (aacirun->cr & CR_COMPACT)
636 aacirun->fifosz >>= 1;
637 }
638 return ret;
639 }
640
641 static void aaci_pcm_playback_stop(struct aaci_runtime *aacirun)
642 {
643 u32 ie;
644
645 ie = readl(aacirun->base + AACI_IE);
646 ie &= ~(IE_URIE|IE_TXIE);
647 writel(ie, aacirun->base + AACI_IE);
648 aacirun->cr &= ~CR_EN;
649 aaci_chan_wait_ready(aacirun);
650 writel(aacirun->cr, aacirun->base + AACI_TXCR);
651 }
652
653 static void aaci_pcm_playback_start(struct aaci_runtime *aacirun)
654 {
655 u32 ie;
656
657 aaci_chan_wait_ready(aacirun);
658 aacirun->cr |= CR_EN;
659
660 ie = readl(aacirun->base + AACI_IE);
661 ie |= IE_URIE | IE_TXIE;
662 writel(ie, aacirun->base + AACI_IE);
663 writel(aacirun->cr, aacirun->base + AACI_TXCR);
664 }
665
666 static int aaci_pcm_playback_trigger(struct snd_pcm_substream *substream, int cmd)
667 {
668 struct aaci *aaci = substream->private_data;
669 struct aaci_runtime *aacirun = substream->runtime->private_data;
670 unsigned long flags;
671 int ret = 0;
672
673 spin_lock_irqsave(&aaci->lock, flags);
674 switch (cmd) {
675 case SNDRV_PCM_TRIGGER_START:
676 aaci_pcm_playback_start(aacirun);
677 break;
678
679 case SNDRV_PCM_TRIGGER_RESUME:
680 aaci_pcm_playback_start(aacirun);
681 break;
682
683 case SNDRV_PCM_TRIGGER_STOP:
684 aaci_pcm_playback_stop(aacirun);
685 break;
686
687 case SNDRV_PCM_TRIGGER_SUSPEND:
688 aaci_pcm_playback_stop(aacirun);
689 break;
690
691 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
692 break;
693
694 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
695 break;
696
697 default:
698 ret = -EINVAL;
699 }
700 spin_unlock_irqrestore(&aaci->lock, flags);
701
702 return ret;
703 }
704
705 static struct snd_pcm_ops aaci_playback_ops = {
706 .open = aaci_pcm_open,
707 .close = aaci_pcm_close,
708 .ioctl = snd_pcm_lib_ioctl,
709 .hw_params = aaci_pcm_playback_hw_params,
710 .hw_free = aaci_pcm_hw_free,
711 .prepare = aaci_pcm_prepare,
712 .trigger = aaci_pcm_playback_trigger,
713 .pointer = aaci_pcm_pointer,
714 };
715
716 static int aaci_pcm_capture_hw_params(struct snd_pcm_substream *substream,
717 struct snd_pcm_hw_params *params)
718 {
719 struct aaci *aaci = substream->private_data;
720 struct aaci_runtime *aacirun = substream->runtime->private_data;
721 int ret;
722
723 ret = aaci_pcm_hw_params(substream, aacirun, params);
724
725 if (ret >= 0) {
726 aacirun->cr = CR_FEN | CR_COMPACT | CR_SZ16;
727
728 /* Line in record: slot 3 and 4 */
729 aacirun->cr |= CR_SL3 | CR_SL4;
730
731 aacirun->fifosz = aaci->fifosize * 4;
732
733 if (aacirun->cr & CR_COMPACT)
734 aacirun->fifosz >>= 1;
735 }
736 return ret;
737 }
738
739 static void aaci_pcm_capture_stop(struct aaci_runtime *aacirun)
740 {
741 u32 ie;
742
743 aaci_chan_wait_ready(aacirun);
744
745 ie = readl(aacirun->base + AACI_IE);
746 ie &= ~(IE_ORIE | IE_RXIE);
747 writel(ie, aacirun->base+AACI_IE);
748
749 aacirun->cr &= ~CR_EN;
750
751 writel(aacirun->cr, aacirun->base + AACI_RXCR);
752 }
753
754 static void aaci_pcm_capture_start(struct aaci_runtime *aacirun)
755 {
756 u32 ie;
757
758 aaci_chan_wait_ready(aacirun);
759
760 #ifdef DEBUG
761 /* RX Timeout value: bits 28:17 in RXCR */
762 aacirun->cr |= 0xf << 17;
763 #endif
764
765 aacirun->cr |= CR_EN;
766 writel(aacirun->cr, aacirun->base + AACI_RXCR);
767
768 ie = readl(aacirun->base + AACI_IE);
769 ie |= IE_ORIE |IE_RXIE; // overrun and rx interrupt -- half full
770 writel(ie, aacirun->base + AACI_IE);
771 }
772
773 static int aaci_pcm_capture_trigger(struct snd_pcm_substream *substream, int cmd)
774 {
775 struct aaci *aaci = substream->private_data;
776 struct aaci_runtime *aacirun = substream->runtime->private_data;
777 unsigned long flags;
778 int ret = 0;
779
780 spin_lock_irqsave(&aaci->lock, flags);
781
782 switch (cmd) {
783 case SNDRV_PCM_TRIGGER_START:
784 aaci_pcm_capture_start(aacirun);
785 break;
786
787 case SNDRV_PCM_TRIGGER_RESUME:
788 aaci_pcm_capture_start(aacirun);
789 break;
790
791 case SNDRV_PCM_TRIGGER_STOP:
792 aaci_pcm_capture_stop(aacirun);
793 break;
794
795 case SNDRV_PCM_TRIGGER_SUSPEND:
796 aaci_pcm_capture_stop(aacirun);
797 break;
798
799 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
800 break;
801
802 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
803 break;
804
805 default:
806 ret = -EINVAL;
807 }
808
809 spin_unlock_irqrestore(&aaci->lock, flags);
810
811 return ret;
812 }
813
814 static int aaci_pcm_capture_prepare(struct snd_pcm_substream *substream)
815 {
816 struct snd_pcm_runtime *runtime = substream->runtime;
817 struct aaci *aaci = substream->private_data;
818
819 aaci_pcm_prepare(substream);
820
821 /* allow changing of sample rate */
822 aaci_ac97_write(aaci->ac97, AC97_EXTENDED_STATUS, 0x0001); /* VRA */
823 aaci_ac97_write(aaci->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
824 aaci_ac97_write(aaci->ac97, AC97_PCM_MIC_ADC_RATE, runtime->rate);
825
826 /* Record select: Mic: 0, Aux: 3, Line: 4 */
827 aaci_ac97_write(aaci->ac97, AC97_REC_SEL, 0x0404);
828
829 return 0;
830 }
831
832 static struct snd_pcm_ops aaci_capture_ops = {
833 .open = aaci_pcm_open,
834 .close = aaci_pcm_close,
835 .ioctl = snd_pcm_lib_ioctl,
836 .hw_params = aaci_pcm_capture_hw_params,
837 .hw_free = aaci_pcm_hw_free,
838 .prepare = aaci_pcm_capture_prepare,
839 .trigger = aaci_pcm_capture_trigger,
840 .pointer = aaci_pcm_pointer,
841 };
842
843 /*
844 * Power Management.
845 */
846 #ifdef CONFIG_PM
847 static int aaci_do_suspend(struct snd_card *card, unsigned int state)
848 {
849 struct aaci *aaci = card->private_data;
850 snd_power_change_state(card, SNDRV_CTL_POWER_D3cold);
851 snd_pcm_suspend_all(aaci->pcm);
852 return 0;
853 }
854
855 static int aaci_do_resume(struct snd_card *card, unsigned int state)
856 {
857 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
858 return 0;
859 }
860
861 static int aaci_suspend(struct amba_device *dev, pm_message_t state)
862 {
863 struct snd_card *card = amba_get_drvdata(dev);
864 return card ? aaci_do_suspend(card) : 0;
865 }
866
867 static int aaci_resume(struct amba_device *dev)
868 {
869 struct snd_card *card = amba_get_drvdata(dev);
870 return card ? aaci_do_resume(card) : 0;
871 }
872 #else
873 #define aaci_do_suspend NULL
874 #define aaci_do_resume NULL
875 #define aaci_suspend NULL
876 #define aaci_resume NULL
877 #endif
878
879
880 static struct ac97_pcm ac97_defs[] __devinitdata = {
881 [0] = { /* Front PCM */
882 .exclusive = 1,
883 .r = {
884 [0] = {
885 .slots = (1 << AC97_SLOT_PCM_LEFT) |
886 (1 << AC97_SLOT_PCM_RIGHT) |
887 (1 << AC97_SLOT_PCM_CENTER) |
888 (1 << AC97_SLOT_PCM_SLEFT) |
889 (1 << AC97_SLOT_PCM_SRIGHT) |
890 (1 << AC97_SLOT_LFE),
891 },
892 },
893 },
894 [1] = { /* PCM in */
895 .stream = 1,
896 .exclusive = 1,
897 .r = {
898 [0] = {
899 .slots = (1 << AC97_SLOT_PCM_LEFT) |
900 (1 << AC97_SLOT_PCM_RIGHT),
901 },
902 },
903 },
904 [2] = { /* Mic in */
905 .stream = 1,
906 .exclusive = 1,
907 .r = {
908 [0] = {
909 .slots = (1 << AC97_SLOT_MIC),
910 },
911 },
912 }
913 };
914
915 static struct snd_ac97_bus_ops aaci_bus_ops = {
916 .write = aaci_ac97_write,
917 .read = aaci_ac97_read,
918 };
919
920 static int __devinit aaci_probe_ac97(struct aaci *aaci)
921 {
922 struct snd_ac97_template ac97_template;
923 struct snd_ac97_bus *ac97_bus;
924 struct snd_ac97 *ac97;
925 int ret;
926
927 writel(0, aaci->base + AC97_POWERDOWN);
928 /*
929 * Assert AACIRESET for 2us
930 */
931 writel(0, aaci->base + AACI_RESET);
932 udelay(2);
933 writel(RESET_NRST, aaci->base + AACI_RESET);
934
935 /*
936 * Give the AC'97 codec more than enough time
937 * to wake up. (42us = ~2 frames at 48kHz.)
938 */
939 udelay(42);
940
941 ret = snd_ac97_bus(aaci->card, 0, &aaci_bus_ops, aaci, &ac97_bus);
942 if (ret)
943 goto out;
944
945 ac97_bus->clock = 48000;
946 aaci->ac97_bus = ac97_bus;
947
948 memset(&ac97_template, 0, sizeof(struct snd_ac97_template));
949 ac97_template.private_data = aaci;
950 ac97_template.num = 0;
951 ac97_template.scaps = AC97_SCAP_SKIP_MODEM;
952
953 ret = snd_ac97_mixer(ac97_bus, &ac97_template, &ac97);
954 if (ret)
955 goto out;
956 aaci->ac97 = ac97;
957
958 /*
959 * Disable AC97 PC Beep input on audio codecs.
960 */
961 if (ac97_is_audio(ac97))
962 snd_ac97_write_cache(ac97, AC97_PC_BEEP, 0x801e);
963
964 ret = snd_ac97_pcm_assign(ac97_bus, ARRAY_SIZE(ac97_defs), ac97_defs);
965 if (ret)
966 goto out;
967
968 aaci->playback.pcm = &ac97_bus->pcms[0];
969 aaci->capture.pcm = &ac97_bus->pcms[1];
970
971 out:
972 return ret;
973 }
974
975 static void aaci_free_card(struct snd_card *card)
976 {
977 struct aaci *aaci = card->private_data;
978 if (aaci->base)
979 iounmap(aaci->base);
980 }
981
982 static struct aaci * __devinit aaci_init_card(struct amba_device *dev)
983 {
984 struct aaci *aaci;
985 struct snd_card *card;
986 int err;
987
988 err = snd_card_create(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
989 THIS_MODULE, sizeof(struct aaci), &card);
990 if (err < 0)
991 return NULL;
992
993 card->private_free = aaci_free_card;
994
995 strlcpy(card->driver, DRIVER_NAME, sizeof(card->driver));
996 strlcpy(card->shortname, "ARM AC'97 Interface", sizeof(card->shortname));
997 snprintf(card->longname, sizeof(card->longname),
998 "%s at 0x%016llx, irq %d",
999 card->shortname, (unsigned long long)dev->res.start,
1000 dev->irq[0]);
1001
1002 aaci = card->private_data;
1003 mutex_init(&aaci->ac97_sem);
1004 spin_lock_init(&aaci->lock);
1005 aaci->card = card;
1006 aaci->dev = dev;
1007
1008 /* Set MAINCR to allow slot 1 and 2 data IO */
1009 aaci->maincr = MAINCR_IE | MAINCR_SL1RXEN | MAINCR_SL1TXEN |
1010 MAINCR_SL2RXEN | MAINCR_SL2TXEN;
1011
1012 return aaci;
1013 }
1014
1015 static int __devinit aaci_init_pcm(struct aaci *aaci)
1016 {
1017 struct snd_pcm *pcm;
1018 int ret;
1019
1020 ret = snd_pcm_new(aaci->card, "AACI AC'97", 0, 1, 1, &pcm);
1021 if (ret == 0) {
1022 aaci->pcm = pcm;
1023 pcm->private_data = aaci;
1024 pcm->info_flags = 0;
1025
1026 strlcpy(pcm->name, DRIVER_NAME, sizeof(pcm->name));
1027
1028 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &aaci_playback_ops);
1029 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &aaci_capture_ops);
1030 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1031 NULL, 0, 64 * 104);
1032 }
1033
1034 return ret;
1035 }
1036
1037 static unsigned int __devinit aaci_size_fifo(struct aaci *aaci)
1038 {
1039 struct aaci_runtime *aacirun = &aaci->playback;
1040 int i;
1041
1042 writel(CR_FEN | CR_SZ16 | CR_EN, aacirun->base + AACI_TXCR);
1043
1044 for (i = 0; !(readl(aacirun->base + AACI_SR) & SR_TXFF) && i < 4096; i++)
1045 writel(0, aacirun->fifo);
1046
1047 writel(0, aacirun->base + AACI_TXCR);
1048
1049 /*
1050 * Re-initialise the AACI after the FIFO depth test, to
1051 * ensure that the FIFOs are empty. Unfortunately, merely
1052 * disabling the channel doesn't clear the FIFO.
1053 */
1054 writel(aaci->maincr & ~MAINCR_IE, aaci->base + AACI_MAINCR);
1055 writel(aaci->maincr, aaci->base + AACI_MAINCR);
1056
1057 /*
1058 * If we hit 4096, we failed. Go back to the specified
1059 * fifo depth.
1060 */
1061 if (i == 4096)
1062 i = 8;
1063
1064 return i;
1065 }
1066
1067 static int __devinit aaci_probe(struct amba_device *dev, struct amba_id *id)
1068 {
1069 struct aaci *aaci;
1070 int ret, i;
1071
1072 ret = amba_request_regions(dev, NULL);
1073 if (ret)
1074 return ret;
1075
1076 aaci = aaci_init_card(dev);
1077 if (!aaci) {
1078 ret = -ENOMEM;
1079 goto out;
1080 }
1081
1082 aaci->base = ioremap(dev->res.start, resource_size(&dev->res));
1083 if (!aaci->base) {
1084 ret = -ENOMEM;
1085 goto out;
1086 }
1087
1088 /*
1089 * Playback uses AACI channel 0
1090 */
1091 aaci->playback.base = aaci->base + AACI_CSCH1;
1092 aaci->playback.fifo = aaci->base + AACI_DR1;
1093
1094 /*
1095 * Capture uses AACI channel 0
1096 */
1097 aaci->capture.base = aaci->base + AACI_CSCH1;
1098 aaci->capture.fifo = aaci->base + AACI_DR1;
1099
1100 for (i = 0; i < 4; i++) {
1101 void __iomem *base = aaci->base + i * 0x14;
1102
1103 writel(0, base + AACI_IE);
1104 writel(0, base + AACI_TXCR);
1105 writel(0, base + AACI_RXCR);
1106 }
1107
1108 writel(0x1fff, aaci->base + AACI_INTCLR);
1109 writel(aaci->maincr, aaci->base + AACI_MAINCR);
1110
1111 ret = aaci_probe_ac97(aaci);
1112 if (ret)
1113 goto out;
1114
1115 /*
1116 * Size the FIFOs (must be multiple of 16).
1117 */
1118 aaci->fifosize = aaci_size_fifo(aaci);
1119 if (aaci->fifosize & 15) {
1120 printk(KERN_WARNING "AACI: fifosize = %d not supported\n",
1121 aaci->fifosize);
1122 ret = -ENODEV;
1123 goto out;
1124 }
1125
1126 ret = aaci_init_pcm(aaci);
1127 if (ret)
1128 goto out;
1129
1130 snd_card_set_dev(aaci->card, &dev->dev);
1131
1132 ret = snd_card_register(aaci->card);
1133 if (ret == 0) {
1134 dev_info(&dev->dev, "%s, fifo %d\n", aaci->card->longname,
1135 aaci->fifosize);
1136 amba_set_drvdata(dev, aaci->card);
1137 return ret;
1138 }
1139
1140 out:
1141 if (aaci)
1142 snd_card_free(aaci->card);
1143 amba_release_regions(dev);
1144 return ret;
1145 }
1146
1147 static int __devexit aaci_remove(struct amba_device *dev)
1148 {
1149 struct snd_card *card = amba_get_drvdata(dev);
1150
1151 amba_set_drvdata(dev, NULL);
1152
1153 if (card) {
1154 struct aaci *aaci = card->private_data;
1155 writel(0, aaci->base + AACI_MAINCR);
1156
1157 snd_card_free(card);
1158 amba_release_regions(dev);
1159 }
1160
1161 return 0;
1162 }
1163
1164 static struct amba_id aaci_ids[] = {
1165 {
1166 .id = 0x00041041,
1167 .mask = 0x000fffff,
1168 },
1169 { 0, 0 },
1170 };
1171
1172 static struct amba_driver aaci_driver = {
1173 .drv = {
1174 .name = DRIVER_NAME,
1175 },
1176 .probe = aaci_probe,
1177 .remove = __devexit_p(aaci_remove),
1178 .suspend = aaci_suspend,
1179 .resume = aaci_resume,
1180 .id_table = aaci_ids,
1181 };
1182
1183 static int __init aaci_init(void)
1184 {
1185 return amba_driver_register(&aaci_driver);
1186 }
1187
1188 static void __exit aaci_exit(void)
1189 {
1190 amba_driver_unregister(&aaci_driver);
1191 }
1192
1193 module_init(aaci_init);
1194 module_exit(aaci_exit);
1195
1196 MODULE_LICENSE("GPL");
1197 MODULE_DESCRIPTION("ARM PrimeCell PL041 Advanced Audio CODEC Interface driver");
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree