2 * linux/arch/arm/vfp/vfpdouble.c
4 * This code is derived in part from John R. Housers softfloat library, which
5 * carries the following notice:
7 * ===========================================================================
8 * This C source file is part of the SoftFloat IEC/IEEE Floating-point
9 * Arithmetic Package, Release 2.
11 * Written by John R. Hauser. This work was made possible in part by the
12 * International Computer Science Institute, located at Suite 600, 1947 Center
13 * Street, Berkeley, California 94704. Funding was partially provided by the
14 * National Science Foundation under grant MIP-9311980. The original version
15 * of this code was written as part of a project to build a fixed-point vector
16 * processor in collaboration with the University of California at Berkeley,
17 * overseen by Profs. Nelson Morgan and John Wawrzynek. More information
18 * is available through the web page `http://HTTP.CS.Berkeley.EDU/~jhauser/
19 * arithmetic/softfloat.html'.
21 * THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort
22 * has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT
23 * TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO
24 * PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY
25 * AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
27 * Derivative works are acceptable, even for commercial purposes, so long as
28 * (1) they include prominent notice that the work is derivative, and (2) they
29 * include prominent notice akin to these three paragraphs for those parts of
30 * this code that are retained.
31 * ===========================================================================
33 #include <linux/kernel.h>
34 #include <linux/bitops.h>
36 #include <asm/div64.h>
42 static struct vfp_double vfp_double_default_qnan
= {
45 .significand
= VFP_DOUBLE_SIGNIFICAND_QNAN
,
48 static void vfp_double_dump(const char *str
, struct vfp_double
*d
)
50 pr_debug("VFP: %s: sign=%d exponent=%d significand=%016llx\n",
51 str
, d
->sign
!= 0, d
->exponent
, d
->significand
);
54 static void vfp_double_normalise_denormal(struct vfp_double
*vd
)
56 int bits
= 31 - fls(vd
->significand
>> 32);
58 bits
= 63 - fls(vd
->significand
);
60 vfp_double_dump("normalise_denormal: in", vd
);
63 vd
->exponent
-= bits
- 1;
64 vd
->significand
<<= bits
;
67 vfp_double_dump("normalise_denormal: out", vd
);
70 u32
vfp_double_normaliseround(int dd
, struct vfp_double
*vd
, u32 fpscr
, u32 exceptions
, const char *func
)
72 u64 significand
, incr
;
73 int exponent
, shift
, underflow
;
76 vfp_double_dump("pack: in", vd
);
79 * Infinities and NaNs are a special case.
81 if (vd
->exponent
== 2047 && (vd
->significand
== 0 || exceptions
))
87 if (vd
->significand
== 0) {
92 exponent
= vd
->exponent
;
93 significand
= vd
->significand
;
95 shift
= 32 - fls(significand
>> 32);
97 shift
= 64 - fls(significand
);
100 significand
<<= shift
;
104 vd
->exponent
= exponent
;
105 vd
->significand
= significand
;
106 vfp_double_dump("pack: normalised", vd
);
112 underflow
= exponent
< 0;
114 significand
= vfp_shiftright64jamming(significand
, -exponent
);
117 vd
->exponent
= exponent
;
118 vd
->significand
= significand
;
119 vfp_double_dump("pack: tiny number", vd
);
121 if (!(significand
& ((1ULL << (VFP_DOUBLE_LOW_BITS
+ 1)) - 1)))
126 * Select rounding increment.
129 rmode
= fpscr
& FPSCR_RMODE_MASK
;
131 if (rmode
== FPSCR_ROUND_NEAREST
) {
132 incr
= 1ULL << VFP_DOUBLE_LOW_BITS
;
133 if ((significand
& (1ULL << (VFP_DOUBLE_LOW_BITS
+ 1))) == 0)
135 } else if (rmode
== FPSCR_ROUND_TOZERO
) {
137 } else if ((rmode
== FPSCR_ROUND_PLUSINF
) ^ (vd
->sign
!= 0))
138 incr
= (1ULL << (VFP_DOUBLE_LOW_BITS
+ 1)) - 1;
140 pr_debug("VFP: rounding increment = 0x%08llx\n", incr
);
143 * Is our rounding going to overflow?
145 if ((significand
+ incr
) < significand
) {
147 significand
= (significand
>> 1) | (significand
& 1);
150 vd
->exponent
= exponent
;
151 vd
->significand
= significand
;
152 vfp_double_dump("pack: overflow", vd
);
157 * If any of the low bits (which will be shifted out of the
158 * number) are non-zero, the result is inexact.
160 if (significand
& ((1 << (VFP_DOUBLE_LOW_BITS
+ 1)) - 1))
161 exceptions
|= FPSCR_IXC
;
171 if (exponent
>= 2046) {
172 exceptions
|= FPSCR_OFC
| FPSCR_IXC
;
175 vd
->significand
= 0x7fffffffffffffffULL
;
177 vd
->exponent
= 2047; /* infinity */
181 if (significand
>> (VFP_DOUBLE_LOW_BITS
+ 1) == 0)
183 if (exponent
|| significand
> 0x8000000000000000ULL
)
186 exceptions
|= FPSCR_UFC
;
187 vd
->exponent
= exponent
;
188 vd
->significand
= significand
>> 1;
192 vfp_double_dump("pack: final", vd
);
194 s64 d
= vfp_double_pack(vd
);
195 pr_debug("VFP: %s: d(d%d)=%016llx exceptions=%08x\n", func
,
197 vfp_put_double(d
, dd
);
203 * Propagate the NaN, setting exceptions if it is signalling.
204 * 'n' is always a NaN. 'm' may be a number, NaN or infinity.
207 vfp_propagate_nan(struct vfp_double
*vdd
, struct vfp_double
*vdn
,
208 struct vfp_double
*vdm
, u32 fpscr
)
210 struct vfp_double
*nan
;
213 tn
= vfp_double_type(vdn
);
216 tm
= vfp_double_type(vdm
);
218 if (fpscr
& FPSCR_DEFAULT_NAN
)
220 * Default NaN mode - always returns a quiet NaN
222 nan
= &vfp_double_default_qnan
;
225 * Contemporary mode - select the first signalling
226 * NAN, or if neither are signalling, the first
229 if (tn
== VFP_SNAN
|| (tm
!= VFP_SNAN
&& tn
== VFP_QNAN
))
234 * Make the NaN quiet.
236 nan
->significand
|= VFP_DOUBLE_SIGNIFICAND_QNAN
;
242 * If one was a signalling NAN, raise invalid operation.
244 return tn
== VFP_SNAN
|| tm
== VFP_SNAN
? FPSCR_IOC
: VFP_NAN_FLAG
;
248 * Extended operations
250 static u32
vfp_double_fabs(int dd
, int unused
, int dm
, u32 fpscr
)
252 vfp_put_double(vfp_double_packed_abs(vfp_get_double(dm
)), dd
);
256 static u32
vfp_double_fcpy(int dd
, int unused
, int dm
, u32 fpscr
)
258 vfp_put_double(vfp_get_double(dm
), dd
);
262 static u32
vfp_double_fneg(int dd
, int unused
, int dm
, u32 fpscr
)
264 vfp_put_double(vfp_double_packed_negate(vfp_get_double(dm
)), dd
);
268 static u32
vfp_double_fsqrt(int dd
, int unused
, int dm
, u32 fpscr
)
270 struct vfp_double vdm
, vdd
;
273 vfp_double_unpack(&vdm
, vfp_get_double(dm
));
274 tm
= vfp_double_type(&vdm
);
275 if (tm
& (VFP_NAN
|VFP_INFINITY
)) {
276 struct vfp_double
*vdp
= &vdd
;
279 ret
= vfp_propagate_nan(vdp
, &vdm
, NULL
, fpscr
);
280 else if (vdm
.sign
== 0) {
286 vdp
= &vfp_double_default_qnan
;
289 vfp_put_double(vfp_double_pack(vdp
), dd
);
294 * sqrt(+/- 0) == +/- 0
300 * Normalise a denormalised number
302 if (tm
& VFP_DENORMAL
)
303 vfp_double_normalise_denormal(&vdm
);
311 vfp_double_dump("sqrt", &vdm
);
314 * Estimate the square root.
317 vdd
.exponent
= ((vdm
.exponent
- 1023) >> 1) + 1023;
318 vdd
.significand
= (u64
)vfp_estimate_sqrt_significand(vdm
.exponent
, vdm
.significand
>> 32) << 31;
320 vfp_double_dump("sqrt estimate1", &vdd
);
322 vdm
.significand
>>= 1 + (vdm
.exponent
& 1);
323 vdd
.significand
+= 2 + vfp_estimate_div128to64(vdm
.significand
, 0, vdd
.significand
);
325 vfp_double_dump("sqrt estimate2", &vdd
);
330 if ((vdd
.significand
& VFP_DOUBLE_LOW_BITS_MASK
) <= 5) {
331 if (vdd
.significand
< 2) {
332 vdd
.significand
= ~0ULL;
334 u64 termh
, terml
, remh
, reml
;
335 vdm
.significand
<<= 2;
336 mul64to128(&termh
, &terml
, vdd
.significand
, vdd
.significand
);
337 sub128(&remh
, &reml
, vdm
.significand
, 0, termh
, terml
);
338 while ((s64
)remh
< 0) {
339 vdd
.significand
-= 1;
340 shift64left(&termh
, &terml
, vdd
.significand
);
342 add128(&remh
, &reml
, remh
, reml
, termh
, terml
);
344 vdd
.significand
|= (remh
| reml
) != 0;
347 vdd
.significand
= vfp_shiftright64jamming(vdd
.significand
, 1);
349 return vfp_double_normaliseround(dd
, &vdd
, fpscr
, 0, "fsqrt");
358 static u32
vfp_compare(int dd
, int signal_on_qnan
, int dm
, u32 fpscr
)
363 m
= vfp_get_double(dm
);
364 if (vfp_double_packed_exponent(m
) == 2047 && vfp_double_packed_mantissa(m
)) {
365 ret
|= FPSCR_C
| FPSCR_V
;
366 if (signal_on_qnan
|| !(vfp_double_packed_mantissa(m
) & (1ULL << (VFP_DOUBLE_MANTISSA_BITS
- 1))))
368 * Signalling NaN, or signalling on quiet NaN
373 d
= vfp_get_double(dd
);
374 if (vfp_double_packed_exponent(d
) == 2047 && vfp_double_packed_mantissa(d
)) {
375 ret
|= FPSCR_C
| FPSCR_V
;
376 if (signal_on_qnan
|| !(vfp_double_packed_mantissa(d
) & (1ULL << (VFP_DOUBLE_MANTISSA_BITS
- 1))))
378 * Signalling NaN, or signalling on quiet NaN
384 if (d
== m
|| vfp_double_packed_abs(d
| m
) == 0) {
388 ret
|= FPSCR_Z
| FPSCR_C
;
389 } else if (vfp_double_packed_sign(d
^ m
)) {
393 if (vfp_double_packed_sign(d
))
395 * d is negative, so d < m
400 * d is positive, so d > m
403 } else if ((vfp_double_packed_sign(d
) != 0) ^ (d
< m
)) {
408 } else if ((vfp_double_packed_sign(d
) != 0) ^ (d
> m
)) {
419 static u32
vfp_double_fcmp(int dd
, int unused
, int dm
, u32 fpscr
)
421 return vfp_compare(dd
, 0, dm
, fpscr
);
424 static u32
vfp_double_fcmpe(int dd
, int unused
, int dm
, u32 fpscr
)
426 return vfp_compare(dd
, 1, dm
, fpscr
);
429 static u32
vfp_double_fcmpz(int dd
, int unused
, int dm
, u32 fpscr
)
431 return vfp_compare(dd
, 0, VFP_REG_ZERO
, fpscr
);
434 static u32
vfp_double_fcmpez(int dd
, int unused
, int dm
, u32 fpscr
)
436 return vfp_compare(dd
, 1, VFP_REG_ZERO
, fpscr
);
439 static u32
vfp_double_fcvts(int sd
, int unused
, int dm
, u32 fpscr
)
441 struct vfp_double vdm
;
442 struct vfp_single vsd
;
446 vfp_double_unpack(&vdm
, vfp_get_double(dm
));
448 tm
= vfp_double_type(&vdm
);
451 * If we have a signalling NaN, signal invalid operation.
454 exceptions
= FPSCR_IOC
;
456 if (tm
& VFP_DENORMAL
)
457 vfp_double_normalise_denormal(&vdm
);
460 vsd
.significand
= vfp_hi64to32jamming(vdm
.significand
);
463 * If we have an infinity or a NaN, the exponent must be 255
465 if (tm
& (VFP_INFINITY
|VFP_NAN
)) {
468 vsd
.significand
|= VFP_SINGLE_SIGNIFICAND_QNAN
;
470 } else if (tm
& VFP_ZERO
)
473 vsd
.exponent
= vdm
.exponent
- (1023 - 127);
475 return vfp_single_normaliseround(sd
, &vsd
, fpscr
, exceptions
, "fcvts");
478 vfp_put_float(vfp_single_pack(&vsd
), sd
);
482 static u32
vfp_double_fuito(int dd
, int unused
, int dm
, u32 fpscr
)
484 struct vfp_double vdm
;
485 u32 m
= vfp_get_float(dm
);
488 vdm
.exponent
= 1023 + 63 - 1;
489 vdm
.significand
= (u64
)m
;
491 return vfp_double_normaliseround(dd
, &vdm
, fpscr
, 0, "fuito");
494 static u32
vfp_double_fsito(int dd
, int unused
, int dm
, u32 fpscr
)
496 struct vfp_double vdm
;
497 u32 m
= vfp_get_float(dm
);
499 vdm
.sign
= (m
& 0x80000000) >> 16;
500 vdm
.exponent
= 1023 + 63 - 1;
501 vdm
.significand
= vdm
.sign
? -m
: m
;
503 return vfp_double_normaliseround(dd
, &vdm
, fpscr
, 0, "fsito");
506 static u32
vfp_double_ftoui(int sd
, int unused
, int dm
, u32 fpscr
)
508 struct vfp_double vdm
;
509 u32 d
, exceptions
= 0;
510 int rmode
= fpscr
& FPSCR_RMODE_MASK
;
513 vfp_double_unpack(&vdm
, vfp_get_double(dm
));
516 * Do we have a denormalised number?
518 tm
= vfp_double_type(&vdm
);
519 if (tm
& VFP_DENORMAL
)
520 exceptions
|= FPSCR_IDC
;
525 if (vdm
.exponent
>= 1023 + 32) {
526 d
= vdm
.sign
? 0 : 0xffffffff;
527 exceptions
= FPSCR_IOC
;
528 } else if (vdm
.exponent
>= 1023 - 1) {
529 int shift
= 1023 + 63 - vdm
.exponent
;
533 * 2^0 <= m < 2^32-2^8
535 d
= (vdm
.significand
<< 1) >> shift
;
536 rem
= vdm
.significand
<< (65 - shift
);
538 if (rmode
== FPSCR_ROUND_NEAREST
) {
539 incr
= 0x8000000000000000ULL
;
542 } else if (rmode
== FPSCR_ROUND_TOZERO
) {
544 } else if ((rmode
== FPSCR_ROUND_PLUSINF
) ^ (vdm
.sign
!= 0)) {
548 if ((rem
+ incr
) < rem
) {
552 exceptions
|= FPSCR_IOC
;
557 exceptions
|= FPSCR_IOC
;
559 exceptions
|= FPSCR_IXC
;
562 if (vdm
.exponent
| vdm
.significand
) {
563 exceptions
|= FPSCR_IXC
;
564 if (rmode
== FPSCR_ROUND_PLUSINF
&& vdm
.sign
== 0)
566 else if (rmode
== FPSCR_ROUND_MINUSINF
&& vdm
.sign
) {
568 exceptions
|= FPSCR_IOC
;
573 pr_debug("VFP: ftoui: d(s%d)=%08x exceptions=%08x\n", sd
, d
, exceptions
);
575 vfp_put_float(d
, sd
);
580 static u32
vfp_double_ftouiz(int sd
, int unused
, int dm
, u32 fpscr
)
582 return vfp_double_ftoui(sd
, unused
, dm
, FPSCR_ROUND_TOZERO
);
585 static u32
vfp_double_ftosi(int sd
, int unused
, int dm
, u32 fpscr
)
587 struct vfp_double vdm
;
588 u32 d
, exceptions
= 0;
589 int rmode
= fpscr
& FPSCR_RMODE_MASK
;
592 vfp_double_unpack(&vdm
, vfp_get_double(dm
));
593 vfp_double_dump("VDM", &vdm
);
596 * Do we have denormalised number?
598 tm
= vfp_double_type(&vdm
);
599 if (tm
& VFP_DENORMAL
)
600 exceptions
|= FPSCR_IDC
;
604 exceptions
|= FPSCR_IOC
;
605 } else if (vdm
.exponent
>= 1023 + 32) {
609 exceptions
|= FPSCR_IOC
;
610 } else if (vdm
.exponent
>= 1023 - 1) {
611 int shift
= 1023 + 63 - vdm
.exponent
; /* 58 */
614 d
= (vdm
.significand
<< 1) >> shift
;
615 rem
= vdm
.significand
<< (65 - shift
);
617 if (rmode
== FPSCR_ROUND_NEAREST
) {
618 incr
= 0x8000000000000000ULL
;
621 } else if (rmode
== FPSCR_ROUND_TOZERO
) {
623 } else if ((rmode
== FPSCR_ROUND_PLUSINF
) ^ (vdm
.sign
!= 0)) {
627 if ((rem
+ incr
) < rem
&& d
< 0xffffffff)
629 if (d
> 0x7fffffff + (vdm
.sign
!= 0)) {
630 d
= 0x7fffffff + (vdm
.sign
!= 0);
631 exceptions
|= FPSCR_IOC
;
633 exceptions
|= FPSCR_IXC
;
639 if (vdm
.exponent
| vdm
.significand
) {
640 exceptions
|= FPSCR_IXC
;
641 if (rmode
== FPSCR_ROUND_PLUSINF
&& vdm
.sign
== 0)
643 else if (rmode
== FPSCR_ROUND_MINUSINF
&& vdm
.sign
)
648 pr_debug("VFP: ftosi: d(s%d)=%08x exceptions=%08x\n", sd
, d
, exceptions
);
650 vfp_put_float((s32
)d
, sd
);
655 static u32
vfp_double_ftosiz(int dd
, int unused
, int dm
, u32 fpscr
)
657 return vfp_double_ftosi(dd
, unused
, dm
, FPSCR_ROUND_TOZERO
);
661 static struct op fops_ext
[32] = {
662 [FEXT_TO_IDX(FEXT_FCPY
)] = { vfp_double_fcpy
, 0 },
663 [FEXT_TO_IDX(FEXT_FABS
)] = { vfp_double_fabs
, 0 },
664 [FEXT_TO_IDX(FEXT_FNEG
)] = { vfp_double_fneg
, 0 },
665 [FEXT_TO_IDX(FEXT_FSQRT
)] = { vfp_double_fsqrt
, 0 },
666 [FEXT_TO_IDX(FEXT_FCMP
)] = { vfp_double_fcmp
, OP_SCALAR
},
667 [FEXT_TO_IDX(FEXT_FCMPE
)] = { vfp_double_fcmpe
, OP_SCALAR
},
668 [FEXT_TO_IDX(FEXT_FCMPZ
)] = { vfp_double_fcmpz
, OP_SCALAR
},
669 [FEXT_TO_IDX(FEXT_FCMPEZ
)] = { vfp_double_fcmpez
, OP_SCALAR
},
670 [FEXT_TO_IDX(FEXT_FCVT
)] = { vfp_double_fcvts
, OP_SCALAR
|OP_SD
},
671 [FEXT_TO_IDX(FEXT_FUITO
)] = { vfp_double_fuito
, OP_SCALAR
|OP_SM
},
672 [FEXT_TO_IDX(FEXT_FSITO
)] = { vfp_double_fsito
, OP_SCALAR
|OP_SM
},
673 [FEXT_TO_IDX(FEXT_FTOUI
)] = { vfp_double_ftoui
, OP_SCALAR
|OP_SD
},
674 [FEXT_TO_IDX(FEXT_FTOUIZ
)] = { vfp_double_ftouiz
, OP_SCALAR
|OP_SD
},
675 [FEXT_TO_IDX(FEXT_FTOSI
)] = { vfp_double_ftosi
, OP_SCALAR
|OP_SD
},
676 [FEXT_TO_IDX(FEXT_FTOSIZ
)] = { vfp_double_ftosiz
, OP_SCALAR
|OP_SD
},
683 vfp_double_fadd_nonnumber(struct vfp_double
*vdd
, struct vfp_double
*vdn
,
684 struct vfp_double
*vdm
, u32 fpscr
)
686 struct vfp_double
*vdp
;
690 tn
= vfp_double_type(vdn
);
691 tm
= vfp_double_type(vdm
);
693 if (tn
& tm
& VFP_INFINITY
) {
695 * Two infinities. Are they different signs?
697 if (vdn
->sign
^ vdm
->sign
) {
699 * different signs -> invalid
701 exceptions
= FPSCR_IOC
;
702 vdp
= &vfp_double_default_qnan
;
705 * same signs -> valid
709 } else if (tn
& VFP_INFINITY
&& tm
& VFP_NUMBER
) {
711 * One infinity and one number -> infinity
716 * 'n' is a NaN of some type
718 return vfp_propagate_nan(vdd
, vdn
, vdm
, fpscr
);
725 vfp_double_add(struct vfp_double
*vdd
, struct vfp_double
*vdn
,
726 struct vfp_double
*vdm
, u32 fpscr
)
731 if (vdn
->significand
& (1ULL << 63) ||
732 vdm
->significand
& (1ULL << 63)) {
733 pr_info("VFP: bad FP values in %s\n", __func__
);
734 vfp_double_dump("VDN", vdn
);
735 vfp_double_dump("VDM", vdm
);
739 * Ensure that 'n' is the largest magnitude number. Note that
740 * if 'n' and 'm' have equal exponents, we do not swap them.
741 * This ensures that NaN propagation works correctly.
743 if (vdn
->exponent
< vdm
->exponent
) {
744 struct vfp_double
*t
= vdn
;
750 * Is 'n' an infinity or a NaN? Note that 'm' may be a number,
751 * infinity or a NaN here.
753 if (vdn
->exponent
== 2047)
754 return vfp_double_fadd_nonnumber(vdd
, vdn
, vdm
, fpscr
);
757 * We have two proper numbers, where 'vdn' is the larger magnitude.
759 * Copy 'n' to 'd' before doing the arithmetic.
764 * Align 'm' with the result.
766 exp_diff
= vdn
->exponent
- vdm
->exponent
;
767 m_sig
= vfp_shiftright64jamming(vdm
->significand
, exp_diff
);
770 * If the signs are different, we are really subtracting.
772 if (vdn
->sign
^ vdm
->sign
) {
773 m_sig
= vdn
->significand
- m_sig
;
774 if ((s64
)m_sig
< 0) {
775 vdd
->sign
= vfp_sign_negate(vdd
->sign
);
777 } else if (m_sig
== 0) {
778 vdd
->sign
= (fpscr
& FPSCR_RMODE_MASK
) ==
779 FPSCR_ROUND_MINUSINF
? 0x8000 : 0;
782 m_sig
+= vdn
->significand
;
784 vdd
->significand
= m_sig
;
790 vfp_double_multiply(struct vfp_double
*vdd
, struct vfp_double
*vdn
,
791 struct vfp_double
*vdm
, u32 fpscr
)
793 vfp_double_dump("VDN", vdn
);
794 vfp_double_dump("VDM", vdm
);
797 * Ensure that 'n' is the largest magnitude number. Note that
798 * if 'n' and 'm' have equal exponents, we do not swap them.
799 * This ensures that NaN propagation works correctly.
801 if (vdn
->exponent
< vdm
->exponent
) {
802 struct vfp_double
*t
= vdn
;
805 pr_debug("VFP: swapping M <-> N\n");
808 vdd
->sign
= vdn
->sign
^ vdm
->sign
;
811 * If 'n' is an infinity or NaN, handle it. 'm' may be anything.
813 if (vdn
->exponent
== 2047) {
814 if (vdn
->significand
|| (vdm
->exponent
== 2047 && vdm
->significand
))
815 return vfp_propagate_nan(vdd
, vdn
, vdm
, fpscr
);
816 if ((vdm
->exponent
| vdm
->significand
) == 0) {
817 *vdd
= vfp_double_default_qnan
;
820 vdd
->exponent
= vdn
->exponent
;
821 vdd
->significand
= 0;
826 * If 'm' is zero, the result is always zero. In this case,
827 * 'n' may be zero or a number, but it doesn't matter which.
829 if ((vdm
->exponent
| vdm
->significand
) == 0) {
831 vdd
->significand
= 0;
836 * We add 2 to the destination exponent for the same reason
837 * as the addition case - though this time we have +1 from
838 * each input operand.
840 vdd
->exponent
= vdn
->exponent
+ vdm
->exponent
- 1023 + 2;
841 vdd
->significand
= vfp_hi64multiply64(vdn
->significand
, vdm
->significand
);
843 vfp_double_dump("VDD", vdd
);
847 #define NEG_MULTIPLY (1 << 0)
848 #define NEG_SUBTRACT (1 << 1)
851 vfp_double_multiply_accumulate(int dd
, int dn
, int dm
, u32 fpscr
, u32 negate
, char *func
)
853 struct vfp_double vdd
, vdp
, vdn
, vdm
;
856 vfp_double_unpack(&vdn
, vfp_get_double(dn
));
857 if (vdn
.exponent
== 0 && vdn
.significand
)
858 vfp_double_normalise_denormal(&vdn
);
860 vfp_double_unpack(&vdm
, vfp_get_double(dm
));
861 if (vdm
.exponent
== 0 && vdm
.significand
)
862 vfp_double_normalise_denormal(&vdm
);
864 exceptions
= vfp_double_multiply(&vdp
, &vdn
, &vdm
, fpscr
);
865 if (negate
& NEG_MULTIPLY
)
866 vdp
.sign
= vfp_sign_negate(vdp
.sign
);
868 vfp_double_unpack(&vdn
, vfp_get_double(dd
));
869 if (negate
& NEG_SUBTRACT
)
870 vdn
.sign
= vfp_sign_negate(vdn
.sign
);
872 exceptions
|= vfp_double_add(&vdd
, &vdn
, &vdp
, fpscr
);
874 return vfp_double_normaliseround(dd
, &vdd
, fpscr
, exceptions
, func
);
878 * Standard operations
882 * sd = sd + (sn * sm)
884 static u32
vfp_double_fmac(int dd
, int dn
, int dm
, u32 fpscr
)
886 return vfp_double_multiply_accumulate(dd
, dn
, dm
, fpscr
, 0, "fmac");
890 * sd = sd - (sn * sm)
892 static u32
vfp_double_fnmac(int dd
, int dn
, int dm
, u32 fpscr
)
894 return vfp_double_multiply_accumulate(dd
, dn
, dm
, fpscr
, NEG_MULTIPLY
, "fnmac");
898 * sd = -sd + (sn * sm)
900 static u32
vfp_double_fmsc(int dd
, int dn
, int dm
, u32 fpscr
)
902 return vfp_double_multiply_accumulate(dd
, dn
, dm
, fpscr
, NEG_SUBTRACT
, "fmsc");
906 * sd = -sd - (sn * sm)
908 static u32
vfp_double_fnmsc(int dd
, int dn
, int dm
, u32 fpscr
)
910 return vfp_double_multiply_accumulate(dd
, dn
, dm
, fpscr
, NEG_SUBTRACT
| NEG_MULTIPLY
, "fnmsc");
916 static u32
vfp_double_fmul(int dd
, int dn
, int dm
, u32 fpscr
)
918 struct vfp_double vdd
, vdn
, vdm
;
921 vfp_double_unpack(&vdn
, vfp_get_double(dn
));
922 if (vdn
.exponent
== 0 && vdn
.significand
)
923 vfp_double_normalise_denormal(&vdn
);
925 vfp_double_unpack(&vdm
, vfp_get_double(dm
));
926 if (vdm
.exponent
== 0 && vdm
.significand
)
927 vfp_double_normalise_denormal(&vdm
);
929 exceptions
= vfp_double_multiply(&vdd
, &vdn
, &vdm
, fpscr
);
930 return vfp_double_normaliseround(dd
, &vdd
, fpscr
, exceptions
, "fmul");
936 static u32
vfp_double_fnmul(int dd
, int dn
, int dm
, u32 fpscr
)
938 struct vfp_double vdd
, vdn
, vdm
;
941 vfp_double_unpack(&vdn
, vfp_get_double(dn
));
942 if (vdn
.exponent
== 0 && vdn
.significand
)
943 vfp_double_normalise_denormal(&vdn
);
945 vfp_double_unpack(&vdm
, vfp_get_double(dm
));
946 if (vdm
.exponent
== 0 && vdm
.significand
)
947 vfp_double_normalise_denormal(&vdm
);
949 exceptions
= vfp_double_multiply(&vdd
, &vdn
, &vdm
, fpscr
);
950 vdd
.sign
= vfp_sign_negate(vdd
.sign
);
952 return vfp_double_normaliseround(dd
, &vdd
, fpscr
, exceptions
, "fnmul");
958 static u32
vfp_double_fadd(int dd
, int dn
, int dm
, u32 fpscr
)
960 struct vfp_double vdd
, vdn
, vdm
;
963 vfp_double_unpack(&vdn
, vfp_get_double(dn
));
964 if (vdn
.exponent
== 0 && vdn
.significand
)
965 vfp_double_normalise_denormal(&vdn
);
967 vfp_double_unpack(&vdm
, vfp_get_double(dm
));
968 if (vdm
.exponent
== 0 && vdm
.significand
)
969 vfp_double_normalise_denormal(&vdm
);
971 exceptions
= vfp_double_add(&vdd
, &vdn
, &vdm
, fpscr
);
973 return vfp_double_normaliseround(dd
, &vdd
, fpscr
, exceptions
, "fadd");
979 static u32
vfp_double_fsub(int dd
, int dn
, int dm
, u32 fpscr
)
981 struct vfp_double vdd
, vdn
, vdm
;
984 vfp_double_unpack(&vdn
, vfp_get_double(dn
));
985 if (vdn
.exponent
== 0 && vdn
.significand
)
986 vfp_double_normalise_denormal(&vdn
);
988 vfp_double_unpack(&vdm
, vfp_get_double(dm
));
989 if (vdm
.exponent
== 0 && vdm
.significand
)
990 vfp_double_normalise_denormal(&vdm
);
993 * Subtraction is like addition, but with a negated operand.
995 vdm
.sign
= vfp_sign_negate(vdm
.sign
);
997 exceptions
= vfp_double_add(&vdd
, &vdn
, &vdm
, fpscr
);
999 return vfp_double_normaliseround(dd
, &vdd
, fpscr
, exceptions
, "fsub");
1005 static u32
vfp_double_fdiv(int dd
, int dn
, int dm
, u32 fpscr
)
1007 struct vfp_double vdd
, vdn
, vdm
;
1011 vfp_double_unpack(&vdn
, vfp_get_double(dn
));
1012 vfp_double_unpack(&vdm
, vfp_get_double(dm
));
1014 vdd
.sign
= vdn
.sign
^ vdm
.sign
;
1016 tn
= vfp_double_type(&vdn
);
1017 tm
= vfp_double_type(&vdm
);
1032 * If n and m are infinity, the result is invalid
1033 * If n and m are zero, the result is invalid
1035 if (tm
& tn
& (VFP_INFINITY
|VFP_ZERO
))
1039 * If n is infinity, the result is infinity
1041 if (tn
& VFP_INFINITY
)
1045 * If m is zero, raise div0 exceptions
1051 * If m is infinity, or n is zero, the result is zero
1053 if (tm
& VFP_INFINITY
|| tn
& VFP_ZERO
)
1056 if (tn
& VFP_DENORMAL
)
1057 vfp_double_normalise_denormal(&vdn
);
1058 if (tm
& VFP_DENORMAL
)
1059 vfp_double_normalise_denormal(&vdm
);
1062 * Ok, we have two numbers, we can perform division.
1064 vdd
.exponent
= vdn
.exponent
- vdm
.exponent
+ 1023 - 1;
1065 vdm
.significand
<<= 1;
1066 if (vdm
.significand
<= (2 * vdn
.significand
)) {
1067 vdn
.significand
>>= 1;
1070 vdd
.significand
= vfp_estimate_div128to64(vdn
.significand
, 0, vdm
.significand
);
1071 if ((vdd
.significand
& 0x1ff) <= 2) {
1072 u64 termh
, terml
, remh
, reml
;
1073 mul64to128(&termh
, &terml
, vdm
.significand
, vdd
.significand
);
1074 sub128(&remh
, &reml
, vdn
.significand
, 0, termh
, terml
);
1075 while ((s64
)remh
< 0) {
1076 vdd
.significand
-= 1;
1077 add128(&remh
, &reml
, remh
, reml
, 0, vdm
.significand
);
1079 vdd
.significand
|= (reml
!= 0);
1081 return vfp_double_normaliseround(dd
, &vdd
, fpscr
, 0, "fdiv");
1084 exceptions
= vfp_propagate_nan(&vdd
, &vdn
, &vdm
, fpscr
);
1086 vfp_put_double(vfp_double_pack(&vdd
), dd
);
1090 exceptions
= vfp_propagate_nan(&vdd
, &vdm
, &vdn
, fpscr
);
1095 vdd
.significand
= 0;
1099 exceptions
= FPSCR_DZC
;
1101 vdd
.exponent
= 2047;
1102 vdd
.significand
= 0;
1106 vfp_put_double(vfp_double_pack(&vfp_double_default_qnan
), dd
);
1110 static struct op fops
[16] = {
1111 [FOP_TO_IDX(FOP_FMAC
)] = { vfp_double_fmac
, 0 },
1112 [FOP_TO_IDX(FOP_FNMAC
)] = { vfp_double_fnmac
, 0 },
1113 [FOP_TO_IDX(FOP_FMSC
)] = { vfp_double_fmsc
, 0 },
1114 [FOP_TO_IDX(FOP_FNMSC
)] = { vfp_double_fnmsc
, 0 },
1115 [FOP_TO_IDX(FOP_FMUL
)] = { vfp_double_fmul
, 0 },
1116 [FOP_TO_IDX(FOP_FNMUL
)] = { vfp_double_fnmul
, 0 },
1117 [FOP_TO_IDX(FOP_FADD
)] = { vfp_double_fadd
, 0 },
1118 [FOP_TO_IDX(FOP_FSUB
)] = { vfp_double_fsub
, 0 },
1119 [FOP_TO_IDX(FOP_FDIV
)] = { vfp_double_fdiv
, 0 },
1122 #define FREG_BANK(x) ((x) & 0x0c)
1123 #define FREG_IDX(x) ((x) & 3)
1125 u32
vfp_double_cpdo(u32 inst
, u32 fpscr
)
1127 u32 op
= inst
& FOP_MASK
;
1130 unsigned int dn
= vfp_get_dn(inst
);
1132 unsigned int vecitr
, veclen
, vecstride
;
1135 vecstride
= (1 + ((fpscr
& FPSCR_STRIDE_MASK
) == FPSCR_STRIDE_MASK
));
1137 fop
= (op
== FOP_EXT
) ? &fops_ext
[FEXT_TO_IDX(inst
)] : &fops
[FOP_TO_IDX(op
)];
1140 * fcvtds takes an sN register number as destination, not dN.
1141 * It also always operates on scalars.
1143 if (fop
->flags
& OP_SD
)
1144 dest
= vfp_get_sd(inst
);
1146 dest
= vfp_get_dd(inst
);
1149 * f[us]ito takes a sN operand, not a dN operand.
1151 if (fop
->flags
& OP_SM
)
1152 dm
= vfp_get_sm(inst
);
1154 dm
= vfp_get_dm(inst
);
1157 * If destination bank is zero, vector length is always '1'.
1158 * ARM DDI0100F C5.1.3, C5.3.2.
1160 if ((fop
->flags
& OP_SCALAR
) || (FREG_BANK(dest
) == 0))
1163 veclen
= fpscr
& FPSCR_LENGTH_MASK
;
1165 pr_debug("VFP: vecstride=%u veclen=%u\n", vecstride
,
1166 (veclen
>> FPSCR_LENGTH_BIT
) + 1);
1171 for (vecitr
= 0; vecitr
<= veclen
; vecitr
+= 1 << FPSCR_LENGTH_BIT
) {
1175 type
= fop
->flags
& OP_SD
? 's' : 'd';
1177 pr_debug("VFP: itr%d (%c%u) = op[%u] (d%u)\n",
1178 vecitr
>> FPSCR_LENGTH_BIT
,
1179 type
, dest
, dn
, dm
);
1181 pr_debug("VFP: itr%d (%c%u) = (d%u) op[%u] (d%u)\n",
1182 vecitr
>> FPSCR_LENGTH_BIT
,
1183 type
, dest
, dn
, FOP_TO_IDX(op
), dm
);
1185 except
= fop
->fn(dest
, dn
, dm
, fpscr
);
1186 pr_debug("VFP: itr%d: exceptions=%08x\n",
1187 vecitr
>> FPSCR_LENGTH_BIT
, except
);
1189 exceptions
|= except
;
1192 * CHECK: It appears to be undefined whether we stop when
1193 * we encounter an exception. We continue.
1195 dest
= FREG_BANK(dest
) + ((FREG_IDX(dest
) + vecstride
) & 3);
1196 dn
= FREG_BANK(dn
) + ((FREG_IDX(dn
) + vecstride
) & 3);
1197 if (FREG_BANK(dm
) != 0)
1198 dm
= FREG_BANK(dm
) + ((FREG_IDX(dm
) + vecstride
) & 3);