arch/arm/plat-omap/counter_32k.c

   1 /*
   2  * OMAP 32ksynctimer/counter_32k-related code
   3  *
   4  * Copyright (C) 2009 Texas Instruments
   5  * Copyright (C) 2010 Nokia Corporation
   6  * Tony Lindgren <tony@atomide.com>
   7  * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  *
  13  * NOTE: This timer is not the same timer as the old OMAP1 MPU timer.
  14  */
  15 #include <linux/kernel.h>
  16 #include <linux/init.h>
  17 #include <linux/clk.h>
  18 #include <linux/err.h>
  19 #include <linux/io.h>
  20 #include <linux/sched.h>
  21
  22 #include <asm/sched_clock.h>
  23
  24 #include <plat/common.h>
  25 #include <plat/board.h>
  26
  27 #include <plat/clock.h>
  28
  29
  30 /*
  31  * 32KHz clocksource ... always available, on pretty most chips except
  32  * OMAP 730 and 1510.  Other timers could be used as clocksources, with
  33  * higher resolution in free-running counter modes (e.g. 12 MHz xtal),
  34  * but systems won't necessarily want to spend resources that way.
  35  */
  36
  37 #define OMAP16XX_TIMER_32K_SYNCHRONIZED         0xfffbc410
  38
  39 #if !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX))
  40
  41 #include <linux/clocksource.h>
  42
  43 /*
  44  * offset_32k holds the init time counter value. It is then subtracted
  45  * from every counter read to achieve a counter that counts time from the
  46  * kernel boot (needed for sched_clock()).
  47  */
  48 static u32 offset_32k __read_mostly;
  49
  50 #ifdef CONFIG_ARCH_OMAP16XX
  51 static cycle_t notrace omap16xx_32k_read(struct clocksource *cs)
  52 {
  53         return omap_readl(OMAP16XX_TIMER_32K_SYNCHRONIZED) - offset_32k;
  54 }
  55 #else
  56 #define omap16xx_32k_read       NULL
  57 #endif
  58
  59 #ifdef CONFIG_ARCH_OMAP2420
  60 static cycle_t notrace omap2420_32k_read(struct clocksource *cs)
  61 {
  62         return omap_readl(OMAP2420_32KSYNCT_BASE + 0x10) - offset_32k;
  63 }
  64 #else
  65 #define omap2420_32k_read       NULL
  66 #endif
  67
  68 #ifdef CONFIG_ARCH_OMAP2430
  69 static cycle_t notrace omap2430_32k_read(struct clocksource *cs)
  70 {
  71         return omap_readl(OMAP2430_32KSYNCT_BASE + 0x10) - offset_32k;
  72 }
  73 #else
  74 #define omap2430_32k_read       NULL
  75 #endif
  76
  77 #ifdef CONFIG_ARCH_OMAP3
  78 static cycle_t notrace omap34xx_32k_read(struct clocksource *cs)
  79 {
  80         return omap_readl(OMAP3430_32KSYNCT_BASE + 0x10) - offset_32k;
  81 }
  82 #else
  83 #define omap34xx_32k_read       NULL
  84 #endif
  85
  86 #ifdef CONFIG_ARCH_OMAP4
  87 static cycle_t notrace omap44xx_32k_read(struct clocksource *cs)
  88 {
  89         return omap_readl(OMAP4430_32KSYNCT_BASE + 0x10) - offset_32k;
  90 }
  91 #else
  92 #define omap44xx_32k_read       NULL
  93 #endif
  94
  95 /*
  96  * Kernel assumes that sched_clock can be called early but may not have
  97  * things ready yet.
  98  */
  99 static cycle_t notrace omap_32k_read_dummy(struct clocksource *cs)
 100 {
 101         return 0;
 102 }
 103
 104 static struct clocksource clocksource_32k = {
 105         .name           = "32k_counter",
 106         .rating         = 250,
 107         .read           = omap_32k_read_dummy,
 108         .mask           = CLOCKSOURCE_MASK(32),
 109         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
 110 };
 111
 112 /*
 113  * Returns current time from boot in nsecs. It's OK for this to wrap
 114  * around for now, as it's just a relative time stamp.
 115  */
 116 static DEFINE_CLOCK_DATA(cd);
 117
 118 /*
 119  * Constants generated by clocks_calc_mult_shift(m, s, 32768, NSEC_PER_SEC, 60).
 120  * This gives a resolution of about 30us and a wrap period of about 36hrs.
 121  */
 122 #define SC_MULT         4000000000u
 123 #define SC_SHIFT        17
 124
 125 unsigned long long notrace sched_clock(void)
 126 {
 127         u32 cyc = clocksource_32k.read(&clocksource_32k);
 128         return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT);
 129 }
 130
 131 static void notrace omap_update_sched_clock(void)
 132 {
 133         u32 cyc = clocksource_32k.read(&clocksource_32k);
 134         update_sched_clock(&cd, cyc, (u32)~0);
 135 }
 136
 137 /**
 138  * read_persistent_clock -  Return time from a persistent clock.
 139  *
 140  * Reads the time from a source which isn't disabled during PM, the
 141  * 32k sync timer.  Convert the cycles elapsed since last read into
 142  * nsecs and adds to a monotonically increasing timespec.
 143  */
 144 static struct timespec persistent_ts;
 145 static cycles_t cycles, last_cycles;
 146 void read_persistent_clock(struct timespec *ts)
 147 {
 148         unsigned long long nsecs;
 149         cycles_t delta;
 150         struct timespec *tsp = &persistent_ts;
 151
 152         last_cycles = cycles;
 153         cycles = clocksource_32k.read(&clocksource_32k);
 154         delta = cycles - last_cycles;
 155
 156         nsecs = clocksource_cyc2ns(delta,
 157                                    clocksource_32k.mult, clocksource_32k.shift);
 158
 159         timespec_add_ns(tsp, nsecs);
 160         *ts = *tsp;
 161 }
 162
 163 static int __init omap_init_clocksource_32k(void)
 164 {
 165         static char err[] __initdata = KERN_ERR
 166                         "%s: can't register clocksource!\n";
 167
 168         if (cpu_is_omap16xx() || cpu_class_is_omap2()) {
 169                 struct clk *sync_32k_ick;
 170
 171                 if (cpu_is_omap16xx())
 172                         clocksource_32k.read = omap16xx_32k_read;
 173                 else if (cpu_is_omap2420())
 174                         clocksource_32k.read = omap2420_32k_read;
 175                 else if (cpu_is_omap2430())
 176                         clocksource_32k.read = omap2430_32k_read;
 177                 else if (cpu_is_omap34xx())
 178                         clocksource_32k.read = omap34xx_32k_read;
 179                 else if (cpu_is_omap44xx())
 180                         clocksource_32k.read = omap44xx_32k_read;
 181                 else
 182                         return -ENODEV;
 183
 184                 sync_32k_ick = clk_get(NULL, "omap_32ksync_ick");
 185                 if (!IS_ERR(sync_32k_ick))
 186                         clk_enable(sync_32k_ick);
 187
 188                 offset_32k = clocksource_32k.read(&clocksource_32k);
 189
 190                 if (clocksource_register_hz(&clocksource_32k, 32768))
 191                         printk(err, clocksource_32k.name);
 192
 193                 init_fixed_sched_clock(&cd, omap_update_sched_clock, 32,
 194                                        32768, SC_MULT, SC_SHIFT);
 195         }
 196         return 0;
 197 }
 198 arch_initcall(omap_init_clocksource_32k);
 199
 200 #endif  /* !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX)) */
 201