5 select HAVE_DMA_API_DEBUG
9 select SYS_SUPPORTS_APM_EMULATION
10 select GENERIC_ATOMIC64 if (!CPU_32v6K || !AEABI)
11 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
13 select HAVE_KPROBES if (!XIP_KERNEL && !THUMB2_KERNEL)
14 select HAVE_KRETPROBES if (HAVE_KPROBES)
15 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
16 select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
17 select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
18 select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
19 select HAVE_GENERIC_DMA_COHERENT
20 select HAVE_KERNEL_GZIP
21 select HAVE_KERNEL_LZO
22 select HAVE_KERNEL_LZMA
24 select HAVE_PERF_EVENTS
25 select PERF_USE_VMALLOC
26 select HAVE_REGS_AND_STACK_ACCESS_API
27 select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7))
28 select HAVE_C_RECORDMCOUNT
30 The ARM series is a line of low-power-consumption RISC chip designs
31 licensed by ARM Ltd and targeted at embedded applications and
32 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
33 manufactured, but legacy ARM-based PC hardware remains popular in
34 Europe. There is an ARM Linux project with a web page at
35 <http://www.arm.linux.org.uk/>.
43 config SYS_SUPPORTS_APM_EMULATION
46 config HAVE_SCHED_CLOCK
52 config ARCH_USES_GETTIMEOFFSET
56 config GENERIC_CLOCKEVENTS
59 config GENERIC_CLOCKEVENTS_BROADCAST
61 depends on GENERIC_CLOCKEVENTS
66 select GENERIC_ALLOCATOR
77 The Extended Industry Standard Architecture (EISA) bus was
78 developed as an open alternative to the IBM MicroChannel bus.
80 The EISA bus provided some of the features of the IBM MicroChannel
81 bus while maintaining backward compatibility with cards made for
82 the older ISA bus. The EISA bus saw limited use between 1988 and
83 1995 when it was made obsolete by the PCI bus.
85 Say Y here if you are building a kernel for an EISA-based machine.
95 MicroChannel Architecture is found in some IBM PS/2 machines and
96 laptops. It is a bus system similar to PCI or ISA. See
97 <file:Documentation/mca.txt> (and especially the web page given
98 there) before attempting to build an MCA bus kernel.
100 config GENERIC_HARDIRQS
104 config STACKTRACE_SUPPORT
108 config HAVE_LATENCYTOP_SUPPORT
113 config LOCKDEP_SUPPORT
117 config TRACE_IRQFLAGS_SUPPORT
121 config HARDIRQS_SW_RESEND
125 config GENERIC_IRQ_PROBE
129 config GENERIC_LOCKBREAK
132 depends on SMP && PREEMPT
134 config RWSEM_GENERIC_SPINLOCK
138 config RWSEM_XCHGADD_ALGORITHM
141 config ARCH_HAS_ILOG2_U32
144 config ARCH_HAS_ILOG2_U64
147 config ARCH_HAS_CPUFREQ
150 Internal node to signify that the ARCH has CPUFREQ support
151 and that the relevant menu configurations are displayed for
154 config ARCH_HAS_CPU_IDLE_WAIT
157 config GENERIC_HWEIGHT
161 config GENERIC_CALIBRATE_DELAY
165 config ARCH_MAY_HAVE_PC_FDC
171 config NEED_DMA_MAP_STATE
174 config GENERIC_ISA_DMA
183 config GENERIC_HARDIRQS_NO__DO_IRQ
186 config ARM_L1_CACHE_SHIFT_6
189 Setting ARM L1 cache line size to 64 Bytes.
193 default 0xffff0000 if MMU || CPU_HIGH_VECTOR
194 default DRAM_BASE if REMAP_VECTORS_TO_RAM
197 The base address of exception vectors.
199 source "init/Kconfig"
201 source "kernel/Kconfig.freezer"
206 bool "MMU-based Paged Memory Management Support"
209 Select if you want MMU-based virtualised addressing space
210 support by paged memory management. If unsure, say 'Y'.
213 # The "ARM system type" choice list is ordered alphabetically by option
214 # text. Please add new entries in the option alphabetic order.
217 prompt "ARM system type"
218 default ARCH_VERSATILE
221 bool "Agilent AAEC-2000 based"
225 select ARCH_USES_GETTIMEOFFSET
227 This enables support for systems based on the Agilent AAEC-2000
229 config ARCH_INTEGRATOR
230 bool "ARM Ltd. Integrator family"
232 select ARCH_HAS_CPUFREQ
235 select GENERIC_CLOCKEVENTS
236 select PLAT_VERSATILE
238 Support for ARM's Integrator platform.
241 bool "ARM Ltd. RealView family"
244 select HAVE_SCHED_CLOCK
246 select GENERIC_CLOCKEVENTS
247 select ARCH_WANT_OPTIONAL_GPIOLIB
248 select PLAT_VERSATILE
249 select ARM_TIMER_SP804
250 select GPIO_PL061 if GPIOLIB
252 This enables support for ARM Ltd RealView boards.
254 config ARCH_VERSATILE
255 bool "ARM Ltd. Versatile family"
259 select HAVE_SCHED_CLOCK
261 select GENERIC_CLOCKEVENTS
262 select ARCH_WANT_OPTIONAL_GPIOLIB
263 select PLAT_VERSATILE
264 select ARM_TIMER_SP804
266 This enables support for ARM Ltd Versatile board.
269 bool "ARM Ltd. Versatile Express family"
270 select ARCH_WANT_OPTIONAL_GPIOLIB
272 select ARM_TIMER_SP804
274 select GENERIC_CLOCKEVENTS
276 select HAVE_SCHED_CLOCK
278 select PLAT_VERSATILE
280 This enables support for the ARM Ltd Versatile Express boards.
284 select ARCH_REQUIRE_GPIOLIB
287 This enables support for systems based on the Atmel AT91RM9200,
288 AT91SAM9 and AT91CAP9 processors.
291 bool "Broadcom BCMRING"
296 select GENERIC_CLOCKEVENTS
297 select ARCH_WANT_OPTIONAL_GPIOLIB
299 Support for Broadcom's BCMRing platform.
302 bool "Cirrus Logic CLPS711x/EP721x-based"
304 select ARCH_USES_GETTIMEOFFSET
306 Support for Cirrus Logic 711x/721x based boards.
309 bool "Cavium Networks CNS3XXX family"
311 select GENERIC_CLOCKEVENTS
313 select MIGHT_HAVE_PCI
314 select PCI_DOMAINS if PCI
316 Support for Cavium Networks CNS3XXX platform.
319 bool "Cortina Systems Gemini"
321 select ARCH_REQUIRE_GPIOLIB
322 select ARCH_USES_GETTIMEOFFSET
324 Support for the Cortina Systems Gemini family SoCs
331 select ARCH_USES_GETTIMEOFFSET
333 This is an evaluation board for the StrongARM processor available
334 from Digital. It has limited hardware on-board, including an
335 Ethernet interface, two PCMCIA sockets, two serial ports and a
344 select ARCH_REQUIRE_GPIOLIB
345 select ARCH_HAS_HOLES_MEMORYMODEL
346 select ARCH_USES_GETTIMEOFFSET
348 This enables support for the Cirrus EP93xx series of CPUs.
350 config ARCH_FOOTBRIDGE
354 select ARCH_USES_GETTIMEOFFSET
356 Support for systems based on the DC21285 companion chip
357 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
360 bool "Freescale MXC/iMX-based"
361 select GENERIC_CLOCKEVENTS
362 select ARCH_REQUIRE_GPIOLIB
365 Support for Freescale MXC/iMX-based family of processors
368 bool "Freescale MXS-based"
369 select GENERIC_CLOCKEVENTS
370 select ARCH_REQUIRE_GPIOLIB
373 Support for Freescale MXS-based family of processors
376 bool "Freescale STMP3xxx"
379 select ARCH_REQUIRE_GPIOLIB
380 select GENERIC_CLOCKEVENTS
381 select USB_ARCH_HAS_EHCI
383 Support for systems based on the Freescale 3xxx CPUs.
386 bool "Hilscher NetX based"
389 select GENERIC_CLOCKEVENTS
391 This enables support for systems based on the Hilscher NetX Soc
394 bool "Hynix HMS720x-based"
397 select ARCH_USES_GETTIMEOFFSET
399 This enables support for systems based on the Hynix HMS720x
407 select ARCH_SUPPORTS_MSI
410 Support for Intel's IOP13XX (XScale) family of processors.
418 select ARCH_REQUIRE_GPIOLIB
420 Support for Intel's 80219 and IOP32X (XScale) family of
429 select ARCH_REQUIRE_GPIOLIB
431 Support for Intel's IOP33X (XScale) family of processors.
438 select ARCH_USES_GETTIMEOFFSET
440 Support for Intel's IXP23xx (XScale) family of processors.
443 bool "IXP2400/2800-based"
447 select ARCH_USES_GETTIMEOFFSET
449 Support for Intel's IXP2400/2800 (XScale) family of processors.
456 select GENERIC_CLOCKEVENTS
457 select HAVE_SCHED_CLOCK
458 select MIGHT_HAVE_PCI
459 select DMABOUNCE if PCI
461 Support for Intel's IXP4XX (XScale) family of processors.
466 select ARCH_REQUIRE_GPIOLIB
467 select GENERIC_CLOCKEVENTS
470 Support for the Marvell Dove SoC 88AP510
473 bool "Marvell Kirkwood"
476 select ARCH_REQUIRE_GPIOLIB
477 select GENERIC_CLOCKEVENTS
480 Support for the following Marvell Kirkwood series SoCs:
481 88F6180, 88F6192 and 88F6281.
484 bool "Marvell Loki (88RC8480)"
486 select GENERIC_CLOCKEVENTS
489 Support for the Marvell Loki (88RC8480) SoC.
494 select ARCH_REQUIRE_GPIOLIB
497 select USB_ARCH_HAS_OHCI
500 select GENERIC_CLOCKEVENTS
502 Support for the NXP LPC32XX family of processors
505 bool "Marvell MV78xx0"
508 select ARCH_REQUIRE_GPIOLIB
509 select GENERIC_CLOCKEVENTS
512 Support for the following Marvell MV78xx0 series SoCs:
520 select ARCH_REQUIRE_GPIOLIB
521 select GENERIC_CLOCKEVENTS
524 Support for the following Marvell Orion 5x series SoCs:
525 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
526 Orion-2 (5281), Orion-1-90 (6183).
529 bool "Marvell PXA168/910/MMP2"
531 select ARCH_REQUIRE_GPIOLIB
533 select GENERIC_CLOCKEVENTS
534 select HAVE_SCHED_CLOCK
539 Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
542 bool "Micrel/Kendin KS8695"
544 select ARCH_REQUIRE_GPIOLIB
545 select ARCH_USES_GETTIMEOFFSET
547 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
548 System-on-Chip devices.
551 bool "NetSilicon NS9xxx"
554 select GENERIC_CLOCKEVENTS
557 Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
560 <http://www.digi.com/products/microprocessors/index.jsp>
563 bool "Nuvoton W90X900 CPU"
565 select ARCH_REQUIRE_GPIOLIB
567 select GENERIC_CLOCKEVENTS
569 Support for Nuvoton (Winbond logic dept.) ARM9 processor,
570 At present, the w90x900 has been renamed nuc900, regarding
571 the ARM series product line, you can login the following
572 link address to know more.
574 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
575 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
578 bool "Nuvoton NUC93X CPU"
582 Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
583 low-power and high performance MPEG-4/JPEG multimedia controller chip.
589 select GENERIC_CLOCKEVENTS
592 select HAVE_SCHED_CLOCK
593 select ARCH_HAS_BARRIERS if CACHE_L2X0
594 select ARCH_HAS_CPUFREQ
596 This enables support for NVIDIA Tegra based systems (Tegra APX,
597 Tegra 6xx and Tegra 2 series).
600 bool "Philips Nexperia PNX4008 Mobile"
603 select ARCH_USES_GETTIMEOFFSET
605 This enables support for Philips PNX4008 mobile platform.
608 bool "PXA2xx/PXA3xx-based"
611 select ARCH_HAS_CPUFREQ
613 select ARCH_REQUIRE_GPIOLIB
614 select GENERIC_CLOCKEVENTS
615 select HAVE_SCHED_CLOCK
620 Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
625 select GENERIC_CLOCKEVENTS
626 select ARCH_REQUIRE_GPIOLIB
628 Support for Qualcomm MSM/QSD based systems. This runs on the
629 apps processor of the MSM/QSD and depends on a shared memory
630 interface to the modem processor which runs the baseband
631 stack and controls some vital subsystems
632 (clock and power control, etc).
635 bool "Renesas SH-Mobile"
637 Support for Renesas's SH-Mobile ARM platforms
644 select ARCH_MAY_HAVE_PC_FDC
645 select HAVE_PATA_PLATFORM
648 select ARCH_SPARSEMEM_ENABLE
649 select ARCH_USES_GETTIMEOFFSET
651 On the Acorn Risc-PC, Linux can support the internal IDE disk and
652 CD-ROM interface, serial and parallel port, and the floppy drive.
658 select ARCH_SPARSEMEM_ENABLE
660 select ARCH_HAS_CPUFREQ
662 select GENERIC_CLOCKEVENTS
664 select HAVE_SCHED_CLOCK
666 select ARCH_REQUIRE_GPIOLIB
668 Support for StrongARM 11x0 based boards.
671 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
673 select ARCH_HAS_CPUFREQ
675 select ARCH_USES_GETTIMEOFFSET
676 select HAVE_S3C2410_I2C if I2C
678 Samsung S3C2410X CPU based systems, such as the Simtec Electronics
679 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
680 the Samsung SMDK2410 development board (and derivatives).
682 Note, the S3C2416 and the S3C2450 are so close that they even share
683 the same SoC ID code. This means that there is no seperate machine
684 directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
687 bool "Samsung S3C64XX"
693 select ARCH_USES_GETTIMEOFFSET
694 select ARCH_HAS_CPUFREQ
695 select ARCH_REQUIRE_GPIOLIB
696 select SAMSUNG_CLKSRC
697 select SAMSUNG_IRQ_VIC_TIMER
698 select SAMSUNG_IRQ_UART
699 select S3C_GPIO_TRACK
700 select S3C_GPIO_PULL_UPDOWN
701 select S3C_GPIO_CFG_S3C24XX
702 select S3C_GPIO_CFG_S3C64XX
704 select USB_ARCH_HAS_OHCI
705 select SAMSUNG_GPIOLIB_4BIT
706 select HAVE_S3C2410_I2C if I2C
707 select HAVE_S3C2410_WATCHDOG if WATCHDOG
709 Samsung S3C64XX series based systems
712 bool "Samsung S5P6440 S5P6450"
716 select HAVE_S3C2410_WATCHDOG if WATCHDOG
717 select ARCH_USES_GETTIMEOFFSET
718 select HAVE_S3C2410_I2C if I2C
719 select HAVE_S3C_RTC if RTC_CLASS
721 Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
725 bool "Samsung S5P6442"
729 select ARCH_USES_GETTIMEOFFSET
730 select HAVE_S3C2410_WATCHDOG if WATCHDOG
732 Samsung S5P6442 CPU based systems
735 bool "Samsung S5PC100"
739 select ARM_L1_CACHE_SHIFT_6
740 select ARCH_USES_GETTIMEOFFSET
741 select HAVE_S3C2410_I2C if I2C
742 select HAVE_S3C_RTC if RTC_CLASS
743 select HAVE_S3C2410_WATCHDOG if WATCHDOG
745 Samsung S5PC100 series based systems
748 bool "Samsung S5PV210/S5PC110"
750 select ARCH_SPARSEMEM_ENABLE
753 select ARM_L1_CACHE_SHIFT_6
754 select ARCH_HAS_CPUFREQ
755 select ARCH_USES_GETTIMEOFFSET
756 select HAVE_S3C2410_I2C if I2C
757 select HAVE_S3C_RTC if RTC_CLASS
758 select HAVE_S3C2410_WATCHDOG if WATCHDOG
760 Samsung S5PV210/S5PC110 series based systems
763 bool "Samsung S5PV310/S5PC210"
765 select ARCH_SPARSEMEM_ENABLE
768 select GENERIC_CLOCKEVENTS
769 select HAVE_S3C_RTC if RTC_CLASS
770 select HAVE_S3C2410_I2C if I2C
771 select HAVE_S3C2410_WATCHDOG if WATCHDOG
773 Samsung S5PV310 series based systems
782 select ARCH_USES_GETTIMEOFFSET
784 Support for the StrongARM based Digital DNARD machine, also known
785 as "Shark" (<http://www.shark-linux.de/shark.html>).
788 bool "Telechips TCC ARM926-based systems"
792 select GENERIC_CLOCKEVENTS
794 Support for Telechips TCC ARM926-based systems.
799 select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
800 select ARCH_USES_GETTIMEOFFSET
802 Say Y here for systems based on one of the Sharp LH7A40X
803 System on a Chip processors. These CPUs include an ARM922T
804 core with a wide array of integrated devices for
805 hand-held and low-power applications.
808 bool "ST-Ericsson U300 Series"
811 select HAVE_SCHED_CLOCK
815 select GENERIC_CLOCKEVENTS
819 Support for ST-Ericsson U300 series mobile platforms.
822 bool "ST-Ericsson U8500 Series"
825 select GENERIC_CLOCKEVENTS
827 select ARCH_REQUIRE_GPIOLIB
828 select ARCH_HAS_CPUFREQ
830 Support for ST-Ericsson's Ux500 architecture
833 bool "STMicroelectronics Nomadik"
838 select GENERIC_CLOCKEVENTS
839 select ARCH_REQUIRE_GPIOLIB
841 Support for the Nomadik platform by ST-Ericsson
845 select GENERIC_CLOCKEVENTS
846 select ARCH_REQUIRE_GPIOLIB
850 select GENERIC_ALLOCATOR
851 select ARCH_HAS_HOLES_MEMORYMODEL
853 Support for TI's DaVinci platform.
858 select ARCH_REQUIRE_GPIOLIB
859 select ARCH_HAS_CPUFREQ
860 select GENERIC_CLOCKEVENTS
861 select HAVE_SCHED_CLOCK
862 select ARCH_HAS_HOLES_MEMORYMODEL
864 Support for TI's OMAP platform (OMAP1/2/3/4).
869 select ARCH_REQUIRE_GPIOLIB
871 select GENERIC_CLOCKEVENTS
874 Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
879 # This is sorted alphabetically by mach-* pathname. However, plat-*
880 # Kconfigs may be included either alphabetically (according to the
881 # plat- suffix) or along side the corresponding mach-* source.
883 source "arch/arm/mach-aaec2000/Kconfig"
885 source "arch/arm/mach-at91/Kconfig"
887 source "arch/arm/mach-bcmring/Kconfig"
889 source "arch/arm/mach-clps711x/Kconfig"
891 source "arch/arm/mach-cns3xxx/Kconfig"
893 source "arch/arm/mach-davinci/Kconfig"
895 source "arch/arm/mach-dove/Kconfig"
897 source "arch/arm/mach-ep93xx/Kconfig"
899 source "arch/arm/mach-footbridge/Kconfig"
901 source "arch/arm/mach-gemini/Kconfig"
903 source "arch/arm/mach-h720x/Kconfig"
905 source "arch/arm/mach-integrator/Kconfig"
907 source "arch/arm/mach-iop32x/Kconfig"
909 source "arch/arm/mach-iop33x/Kconfig"
911 source "arch/arm/mach-iop13xx/Kconfig"
913 source "arch/arm/mach-ixp4xx/Kconfig"
915 source "arch/arm/mach-ixp2000/Kconfig"
917 source "arch/arm/mach-ixp23xx/Kconfig"
919 source "arch/arm/mach-kirkwood/Kconfig"
921 source "arch/arm/mach-ks8695/Kconfig"
923 source "arch/arm/mach-lh7a40x/Kconfig"
925 source "arch/arm/mach-loki/Kconfig"
927 source "arch/arm/mach-lpc32xx/Kconfig"
929 source "arch/arm/mach-msm/Kconfig"
931 source "arch/arm/mach-mv78xx0/Kconfig"
933 source "arch/arm/plat-mxc/Kconfig"
935 source "arch/arm/mach-mxs/Kconfig"
937 source "arch/arm/mach-netx/Kconfig"
939 source "arch/arm/mach-nomadik/Kconfig"
940 source "arch/arm/plat-nomadik/Kconfig"
942 source "arch/arm/mach-ns9xxx/Kconfig"
944 source "arch/arm/mach-nuc93x/Kconfig"
946 source "arch/arm/plat-omap/Kconfig"
948 source "arch/arm/mach-omap1/Kconfig"
950 source "arch/arm/mach-omap2/Kconfig"
952 source "arch/arm/mach-orion5x/Kconfig"
954 source "arch/arm/mach-pxa/Kconfig"
955 source "arch/arm/plat-pxa/Kconfig"
957 source "arch/arm/mach-mmp/Kconfig"
959 source "arch/arm/mach-realview/Kconfig"
961 source "arch/arm/mach-sa1100/Kconfig"
963 source "arch/arm/plat-samsung/Kconfig"
964 source "arch/arm/plat-s3c24xx/Kconfig"
965 source "arch/arm/plat-s5p/Kconfig"
967 source "arch/arm/plat-spear/Kconfig"
969 source "arch/arm/plat-tcc/Kconfig"
972 source "arch/arm/mach-s3c2400/Kconfig"
973 source "arch/arm/mach-s3c2410/Kconfig"
974 source "arch/arm/mach-s3c2412/Kconfig"
975 source "arch/arm/mach-s3c2416/Kconfig"
976 source "arch/arm/mach-s3c2440/Kconfig"
977 source "arch/arm/mach-s3c2443/Kconfig"
981 source "arch/arm/mach-s3c64xx/Kconfig"
984 source "arch/arm/mach-s5p64x0/Kconfig"
986 source "arch/arm/mach-s5p6442/Kconfig"
988 source "arch/arm/mach-s5pc100/Kconfig"
990 source "arch/arm/mach-s5pv210/Kconfig"
992 source "arch/arm/mach-s5pv310/Kconfig"
994 source "arch/arm/mach-shmobile/Kconfig"
996 source "arch/arm/plat-stmp3xxx/Kconfig"
998 source "arch/arm/mach-tegra/Kconfig"
1000 source "arch/arm/mach-u300/Kconfig"
1002 source "arch/arm/mach-ux500/Kconfig"
1004 source "arch/arm/mach-versatile/Kconfig"
1006 source "arch/arm/mach-vexpress/Kconfig"
1008 source "arch/arm/mach-w90x900/Kconfig"
1010 # Definitions to make life easier
1016 select GENERIC_CLOCKEVENTS
1017 select HAVE_SCHED_CLOCK
1021 select HAVE_SCHED_CLOCK
1026 config PLAT_VERSATILE
1029 config ARM_TIMER_SP804
1032 source arch/arm/mm/Kconfig
1035 bool "Enable iWMMXt support"
1036 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1037 default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
1039 Enable support for iWMMXt context switching at run time if
1040 running on a CPU that supports it.
1042 # bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1045 depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1049 depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \
1050 (!ARCH_OMAP3 || OMAP3_EMU)
1054 config MULTI_IRQ_HANDLER
1057 Allow each machine to specify it's own IRQ handler at run time.
1060 source "arch/arm/Kconfig-nommu"
1063 config ARM_ERRATA_411920
1064 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1067 Invalidation of the Instruction Cache operation can
1068 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1069 It does not affect the MPCore. This option enables the ARM Ltd.
1070 recommended workaround.
1072 config ARM_ERRATA_430973
1073 bool "ARM errata: Stale prediction on replaced interworking branch"
1076 This option enables the workaround for the 430973 Cortex-A8
1077 (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1078 interworking branch is replaced with another code sequence at the
1079 same virtual address, whether due to self-modifying code or virtual
1080 to physical address re-mapping, Cortex-A8 does not recover from the
1081 stale interworking branch prediction. This results in Cortex-A8
1082 executing the new code sequence in the incorrect ARM or Thumb state.
1083 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1084 and also flushes the branch target cache at every context switch.
1085 Note that setting specific bits in the ACTLR register may not be
1086 available in non-secure mode.
1088 config ARM_ERRATA_458693
1089 bool "ARM errata: Processor deadlock when a false hazard is created"
1092 This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1093 erratum. For very specific sequences of memory operations, it is
1094 possible for a hazard condition intended for a cache line to instead
1095 be incorrectly associated with a different cache line. This false
1096 hazard might then cause a processor deadlock. The workaround enables
1097 the L1 caching of the NEON accesses and disables the PLD instruction
1098 in the ACTLR register. Note that setting specific bits in the ACTLR
1099 register may not be available in non-secure mode.
1101 config ARM_ERRATA_460075
1102 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1105 This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1106 erratum. Any asynchronous access to the L2 cache may encounter a
1107 situation in which recent store transactions to the L2 cache are lost
1108 and overwritten with stale memory contents from external memory. The
1109 workaround disables the write-allocate mode for the L2 cache via the
1110 ACTLR register. Note that setting specific bits in the ACTLR register
1111 may not be available in non-secure mode.
1113 config ARM_ERRATA_742230
1114 bool "ARM errata: DMB operation may be faulty"
1115 depends on CPU_V7 && SMP
1117 This option enables the workaround for the 742230 Cortex-A9
1118 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1119 between two write operations may not ensure the correct visibility
1120 ordering of the two writes. This workaround sets a specific bit in
1121 the diagnostic register of the Cortex-A9 which causes the DMB
1122 instruction to behave as a DSB, ensuring the correct behaviour of
1125 config ARM_ERRATA_742231
1126 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1127 depends on CPU_V7 && SMP
1129 This option enables the workaround for the 742231 Cortex-A9
1130 (r2p0..r2p2) erratum. Under certain conditions, specific to the
1131 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1132 accessing some data located in the same cache line, may get corrupted
1133 data due to bad handling of the address hazard when the line gets
1134 replaced from one of the CPUs at the same time as another CPU is
1135 accessing it. This workaround sets specific bits in the diagnostic
1136 register of the Cortex-A9 which reduces the linefill issuing
1137 capabilities of the processor.
1139 config PL310_ERRATA_588369
1140 bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1141 depends on CACHE_L2X0 && ARCH_OMAP4
1143 The PL310 L2 cache controller implements three types of Clean &
1144 Invalidate maintenance operations: by Physical Address
1145 (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1146 They are architecturally defined to behave as the execution of a
1147 clean operation followed immediately by an invalidate operation,
1148 both performing to the same memory location. This functionality
1149 is not correctly implemented in PL310 as clean lines are not
1150 invalidated as a result of these operations. Note that this errata
1151 uses Texas Instrument's secure monitor api.
1153 config ARM_ERRATA_720789
1154 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1155 depends on CPU_V7 && SMP
1157 This option enables the workaround for the 720789 Cortex-A9 (prior to
1158 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1159 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1160 As a consequence of this erratum, some TLB entries which should be
1161 invalidated are not, resulting in an incoherency in the system page
1162 tables. The workaround changes the TLB flushing routines to invalidate
1163 entries regardless of the ASID.
1165 config ARM_ERRATA_743622
1166 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1169 This option enables the workaround for the 743622 Cortex-A9
1170 (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1171 optimisation in the Cortex-A9 Store Buffer may lead to data
1172 corruption. This workaround sets a specific bit in the diagnostic
1173 register of the Cortex-A9 which disables the Store Buffer
1174 optimisation, preventing the defect from occurring. This has no
1175 visible impact on the overall performance or power consumption of the
1180 source "arch/arm/common/Kconfig"
1190 Find out whether you have ISA slots on your motherboard. ISA is the
1191 name of a bus system, i.e. the way the CPU talks to the other stuff
1192 inside your box. Other bus systems are PCI, EISA, MicroChannel
1193 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
1194 newer boards don't support it. If you have ISA, say Y, otherwise N.
1196 # Select ISA DMA controller support
1201 # Select ISA DMA interface
1206 bool "PCI support" if MIGHT_HAVE_PCI
1208 Find out whether you have a PCI motherboard. PCI is the name of a
1209 bus system, i.e. the way the CPU talks to the other stuff inside
1210 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1211 VESA. If you have PCI, say Y, otherwise N.
1217 config PCI_NANOENGINE
1218 bool "BSE nanoEngine PCI support"
1219 depends on SA1100_NANOENGINE
1221 Enable PCI on the BSE nanoEngine board.
1226 # Select the host bridge type
1227 config PCI_HOST_VIA82C505
1229 depends on PCI && ARCH_SHARK
1232 config PCI_HOST_ITE8152
1234 depends on PCI && MACH_ARMCORE
1238 source "drivers/pci/Kconfig"
1240 source "drivers/pcmcia/Kconfig"
1244 menu "Kernel Features"
1246 source "kernel/time/Kconfig"
1249 bool "Symmetric Multi-Processing (EXPERIMENTAL)"
1250 depends on EXPERIMENTAL
1251 depends on GENERIC_CLOCKEVENTS
1252 depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
1253 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
1254 ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
1256 select USE_GENERIC_SMP_HELPERS
1257 select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1259 This enables support for systems with more than one CPU. If you have
1260 a system with only one CPU, like most personal computers, say N. If
1261 you have a system with more than one CPU, say Y.
1263 If you say N here, the kernel will run on single and multiprocessor
1264 machines, but will use only one CPU of a multiprocessor machine. If
1265 you say Y here, the kernel will run on many, but not all, single
1266 processor machines. On a single processor machine, the kernel will
1267 run faster if you say N here.
1269 See also <file:Documentation/i386/IO-APIC.txt>,
1270 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1271 <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1273 If you don't know what to do here, say N.
1276 bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1277 depends on EXPERIMENTAL
1278 depends on SMP && !XIP
1281 SMP kernels contain instructions which fail on non-SMP processors.
1282 Enabling this option allows the kernel to modify itself to make
1283 these instructions safe. Disabling it allows about 1K of space
1286 If you don't know what to do here, say Y.
1292 This option enables support for the ARM system coherency unit
1299 This options enables support for the ARM timer and watchdog unit
1302 prompt "Memory split"
1305 Select the desired split between kernel and user memory.
1307 If you are not absolutely sure what you are doing, leave this
1311 bool "3G/1G user/kernel split"
1313 bool "2G/2G user/kernel split"
1315 bool "1G/3G user/kernel split"
1320 default 0x40000000 if VMSPLIT_1G
1321 default 0x80000000 if VMSPLIT_2G
1325 int "Maximum number of CPUs (2-32)"
1331 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1332 depends on SMP && HOTPLUG && EXPERIMENTAL
1333 depends on !ARCH_MSM
1335 Say Y here to experiment with turning CPUs off and on. CPUs
1336 can be controlled through /sys/devices/system/cpu.
1339 bool "Use local timer interrupts"
1342 select HAVE_ARM_TWD if !ARCH_MSM_SCORPIONMP
1344 Enable support for local timers on SMP platforms, rather then the
1345 legacy IPI broadcast method. Local timers allows the system
1346 accounting to be spread across the timer interval, preventing a
1347 "thundering herd" at every timer tick.
1349 source kernel/Kconfig.preempt
1353 default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
1354 ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310
1355 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1356 default AT91_TIMER_HZ if ARCH_AT91
1357 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1360 config THUMB2_KERNEL
1361 bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
1362 depends on CPU_V7 && !CPU_V6 && EXPERIMENTAL
1364 select ARM_ASM_UNIFIED
1366 By enabling this option, the kernel will be compiled in
1367 Thumb-2 mode. A compiler/assembler that understand the unified
1368 ARM-Thumb syntax is needed.
1372 config ARM_ASM_UNIFIED
1376 bool "Use the ARM EABI to compile the kernel"
1378 This option allows for the kernel to be compiled using the latest
1379 ARM ABI (aka EABI). This is only useful if you are using a user
1380 space environment that is also compiled with EABI.
1382 Since there are major incompatibilities between the legacy ABI and
1383 EABI, especially with regard to structure member alignment, this
1384 option also changes the kernel syscall calling convention to
1385 disambiguate both ABIs and allow for backward compatibility support
1386 (selected with CONFIG_OABI_COMPAT).
1388 To use this you need GCC version 4.0.0 or later.
1391 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1392 depends on AEABI && EXPERIMENTAL
1395 This option preserves the old syscall interface along with the
1396 new (ARM EABI) one. It also provides a compatibility layer to
1397 intercept syscalls that have structure arguments which layout
1398 in memory differs between the legacy ABI and the new ARM EABI
1399 (only for non "thumb" binaries). This option adds a tiny
1400 overhead to all syscalls and produces a slightly larger kernel.
1401 If you know you'll be using only pure EABI user space then you
1402 can say N here. If this option is not selected and you attempt
1403 to execute a legacy ABI binary then the result will be
1404 UNPREDICTABLE (in fact it can be predicted that it won't work
1405 at all). If in doubt say Y.
1407 config ARCH_HAS_HOLES_MEMORYMODEL
1410 config ARCH_SPARSEMEM_ENABLE
1413 config ARCH_SPARSEMEM_DEFAULT
1414 def_bool ARCH_SPARSEMEM_ENABLE
1416 config ARCH_SELECT_MEMORY_MODEL
1417 def_bool ARCH_SPARSEMEM_ENABLE
1420 bool "High Memory Support (EXPERIMENTAL)"
1421 depends on MMU && EXPERIMENTAL
1423 The address space of ARM processors is only 4 Gigabytes large
1424 and it has to accommodate user address space, kernel address
1425 space as well as some memory mapped IO. That means that, if you
1426 have a large amount of physical memory and/or IO, not all of the
1427 memory can be "permanently mapped" by the kernel. The physical
1428 memory that is not permanently mapped is called "high memory".
1430 Depending on the selected kernel/user memory split, minimum
1431 vmalloc space and actual amount of RAM, you may not need this
1432 option which should result in a slightly faster kernel.
1437 bool "Allocate 2nd-level pagetables from highmem"
1439 depends on !OUTER_CACHE
1441 config HW_PERF_EVENTS
1442 bool "Enable hardware performance counter support for perf events"
1443 depends on PERF_EVENTS && CPU_HAS_PMU
1446 Enable hardware performance counter support for perf events. If
1447 disabled, perf events will use software events only.
1452 This enables support for sparse irqs. This is useful in general
1453 as most CPUs have a fairly sparse array of IRQ vectors, which
1454 the irq_desc then maps directly on to. Systems with a high
1455 number of off-chip IRQs will want to treat this as
1456 experimental until they have been independently verified.
1460 config FORCE_MAX_ZONEORDER
1461 int "Maximum zone order" if ARCH_SHMOBILE
1462 range 11 64 if ARCH_SHMOBILE
1463 default "9" if SA1111
1466 The kernel memory allocator divides physically contiguous memory
1467 blocks into "zones", where each zone is a power of two number of
1468 pages. This option selects the largest power of two that the kernel
1469 keeps in the memory allocator. If you need to allocate very large
1470 blocks of physically contiguous memory, then you may need to
1471 increase this value.
1473 This config option is actually maximum order plus one. For example,
1474 a value of 11 means that the largest free memory block is 2^10 pages.
1477 bool "Timer and CPU usage LEDs"
1478 depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1479 ARCH_EBSA285 || ARCH_INTEGRATOR || \
1480 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1481 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1482 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1483 ARCH_AT91 || ARCH_DAVINCI || \
1484 ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1486 If you say Y here, the LEDs on your machine will be used
1487 to provide useful information about your current system status.
1489 If you are compiling a kernel for a NetWinder or EBSA-285, you will
1490 be able to select which LEDs are active using the options below. If
1491 you are compiling a kernel for the EBSA-110 or the LART however, the
1492 red LED will simply flash regularly to indicate that the system is
1493 still functional. It is safe to say Y here if you have a CATS
1494 system, but the driver will do nothing.
1497 bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1498 OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1499 || MACH_OMAP_PERSEUS2
1501 depends on !GENERIC_CLOCKEVENTS
1502 default y if ARCH_EBSA110
1504 If you say Y here, one of the system LEDs (the green one on the
1505 NetWinder, the amber one on the EBSA285, or the red one on the LART)
1506 will flash regularly to indicate that the system is still
1507 operational. This is mainly useful to kernel hackers who are
1508 debugging unstable kernels.
1510 The LART uses the same LED for both Timer LED and CPU usage LED
1511 functions. You may choose to use both, but the Timer LED function
1512 will overrule the CPU usage LED.
1515 bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1517 || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1518 || MACH_OMAP_PERSEUS2
1521 If you say Y here, the red LED will be used to give a good real
1522 time indication of CPU usage, by lighting whenever the idle task
1523 is not currently executing.
1525 The LART uses the same LED for both Timer LED and CPU usage LED
1526 functions. You may choose to use both, but the Timer LED function
1527 will overrule the CPU usage LED.
1529 config ALIGNMENT_TRAP
1531 depends on CPU_CP15_MMU
1532 default y if !ARCH_EBSA110
1533 select HAVE_PROC_CPU if PROC_FS
1535 ARM processors cannot fetch/store information which is not
1536 naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1537 address divisible by 4. On 32-bit ARM processors, these non-aligned
1538 fetch/store instructions will be emulated in software if you say
1539 here, which has a severe performance impact. This is necessary for
1540 correct operation of some network protocols. With an IP-only
1541 configuration it is safe to say N, otherwise say Y.
1543 config UACCESS_WITH_MEMCPY
1544 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1545 depends on MMU && EXPERIMENTAL
1546 default y if CPU_FEROCEON
1548 Implement faster copy_to_user and clear_user methods for CPU
1549 cores where a 8-word STM instruction give significantly higher
1550 memory write throughput than a sequence of individual 32bit stores.
1552 A possible side effect is a slight increase in scheduling latency
1553 between threads sharing the same address space if they invoke
1554 such copy operations with large buffers.
1556 However, if the CPU data cache is using a write-allocate mode,
1557 this option is unlikely to provide any performance gain.
1561 prompt "Enable seccomp to safely compute untrusted bytecode"
1563 This kernel feature is useful for number crunching applications
1564 that may need to compute untrusted bytecode during their
1565 execution. By using pipes or other transports made available to
1566 the process as file descriptors supporting the read/write
1567 syscalls, it's possible to isolate those applications in
1568 their own address space using seccomp. Once seccomp is
1569 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1570 and the task is only allowed to execute a few safe syscalls
1571 defined by each seccomp mode.
1573 config CC_STACKPROTECTOR
1574 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1575 depends on EXPERIMENTAL
1577 This option turns on the -fstack-protector GCC feature. This
1578 feature puts, at the beginning of functions, a canary value on
1579 the stack just before the return address, and validates
1580 the value just before actually returning. Stack based buffer
1581 overflows (that need to overwrite this return address) now also
1582 overwrite the canary, which gets detected and the attack is then
1583 neutralized via a kernel panic.
1584 This feature requires gcc version 4.2 or above.
1586 config DEPRECATED_PARAM_STRUCT
1587 bool "Provide old way to pass kernel parameters"
1589 This was deprecated in 2001 and announced to live on for 5 years.
1590 Some old boot loaders still use this way.
1596 # Compressed boot loader in ROM. Yes, we really want to ask about
1597 # TEXT and BSS so we preserve their values in the config files.
1598 config ZBOOT_ROM_TEXT
1599 hex "Compressed ROM boot loader base address"
1602 The physical address at which the ROM-able zImage is to be
1603 placed in the target. Platforms which normally make use of
1604 ROM-able zImage formats normally set this to a suitable
1605 value in their defconfig file.
1607 If ZBOOT_ROM is not enabled, this has no effect.
1609 config ZBOOT_ROM_BSS
1610 hex "Compressed ROM boot loader BSS address"
1613 The base address of an area of read/write memory in the target
1614 for the ROM-able zImage which must be available while the
1615 decompressor is running. It must be large enough to hold the
1616 entire decompressed kernel plus an additional 128 KiB.
1617 Platforms which normally make use of ROM-able zImage formats
1618 normally set this to a suitable value in their defconfig file.
1620 If ZBOOT_ROM is not enabled, this has no effect.
1623 bool "Compressed boot loader in ROM/flash"
1624 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1626 Say Y here if you intend to execute your compressed kernel image
1627 (zImage) directly from ROM or flash. If unsure, say N.
1630 string "Default kernel command string"
1633 On some architectures (EBSA110 and CATS), there is currently no way
1634 for the boot loader to pass arguments to the kernel. For these
1635 architectures, you should supply some command-line options at build
1636 time by entering them here. As a minimum, you should specify the
1637 memory size and the root device (e.g., mem=64M root=/dev/nfs).
1639 config CMDLINE_FORCE
1640 bool "Always use the default kernel command string"
1641 depends on CMDLINE != ""
1643 Always use the default kernel command string, even if the boot
1644 loader passes other arguments to the kernel.
1645 This is useful if you cannot or don't want to change the
1646 command-line options your boot loader passes to the kernel.
1651 bool "Kernel Execute-In-Place from ROM"
1652 depends on !ZBOOT_ROM
1654 Execute-In-Place allows the kernel to run from non-volatile storage
1655 directly addressable by the CPU, such as NOR flash. This saves RAM
1656 space since the text section of the kernel is not loaded from flash
1657 to RAM. Read-write sections, such as the data section and stack,
1658 are still copied to RAM. The XIP kernel is not compressed since
1659 it has to run directly from flash, so it will take more space to
1660 store it. The flash address used to link the kernel object files,
1661 and for storing it, is configuration dependent. Therefore, if you
1662 say Y here, you must know the proper physical address where to
1663 store the kernel image depending on your own flash memory usage.
1665 Also note that the make target becomes "make xipImage" rather than
1666 "make zImage" or "make Image". The final kernel binary to put in
1667 ROM memory will be arch/arm/boot/xipImage.
1671 config XIP_PHYS_ADDR
1672 hex "XIP Kernel Physical Location"
1673 depends on XIP_KERNEL
1674 default "0x00080000"
1676 This is the physical address in your flash memory the kernel will
1677 be linked for and stored to. This address is dependent on your
1681 bool "Kexec system call (EXPERIMENTAL)"
1682 depends on EXPERIMENTAL
1684 kexec is a system call that implements the ability to shutdown your
1685 current kernel, and to start another kernel. It is like a reboot
1686 but it is independent of the system firmware. And like a reboot
1687 you can start any kernel with it, not just Linux.
1689 It is an ongoing process to be certain the hardware in a machine
1690 is properly shutdown, so do not be surprised if this code does not
1691 initially work for you. It may help to enable device hotplugging
1695 bool "Export atags in procfs"
1699 Should the atags used to boot the kernel be exported in an "atags"
1700 file in procfs. Useful with kexec.
1703 bool "Build kdump crash kernel (EXPERIMENTAL)"
1704 depends on EXPERIMENTAL
1706 Generate crash dump after being started by kexec. This should
1707 be normally only set in special crash dump kernels which are
1708 loaded in the main kernel with kexec-tools into a specially
1709 reserved region and then later executed after a crash by
1710 kdump/kexec. The crash dump kernel must be compiled to a
1711 memory address not used by the main kernel
1713 For more details see Documentation/kdump/kdump.txt
1715 config AUTO_ZRELADDR
1716 bool "Auto calculation of the decompressed kernel image address"
1717 depends on !ZBOOT_ROM && !ARCH_U300
1719 ZRELADDR is the physical address where the decompressed kernel
1720 image will be placed. If AUTO_ZRELADDR is selected, the address
1721 will be determined at run-time by masking the current IP with
1722 0xf8000000. This assumes the zImage being placed in the first 128MB
1723 from start of memory.
1727 menu "CPU Power Management"
1731 source "drivers/cpufreq/Kconfig"
1734 tristate "CPUfreq driver for i.MX CPUs"
1735 depends on ARCH_MXC && CPU_FREQ
1737 This enables the CPUfreq driver for i.MX CPUs.
1739 config CPU_FREQ_SA1100
1742 config CPU_FREQ_SA1110
1745 config CPU_FREQ_INTEGRATOR
1746 tristate "CPUfreq driver for ARM Integrator CPUs"
1747 depends on ARCH_INTEGRATOR && CPU_FREQ
1750 This enables the CPUfreq driver for ARM Integrator CPUs.
1752 For details, take a look at <file:Documentation/cpu-freq>.
1758 depends on CPU_FREQ && ARCH_PXA && PXA25x
1760 select CPU_FREQ_DEFAULT_GOV_USERSPACE
1762 config CPU_FREQ_S3C64XX
1763 bool "CPUfreq support for Samsung S3C64XX CPUs"
1764 depends on CPU_FREQ && CPU_S3C6410
1769 Internal configuration node for common cpufreq on Samsung SoC
1771 config CPU_FREQ_S3C24XX
1772 bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
1773 depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1776 This enables the CPUfreq driver for the Samsung S3C24XX family
1779 For details, take a look at <file:Documentation/cpu-freq>.
1783 config CPU_FREQ_S3C24XX_PLL
1784 bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
1785 depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1787 Compile in support for changing the PLL frequency from the
1788 S3C24XX series CPUfreq driver. The PLL takes time to settle
1789 after a frequency change, so by default it is not enabled.
1791 This also means that the PLL tables for the selected CPU(s) will
1792 be built which may increase the size of the kernel image.
1794 config CPU_FREQ_S3C24XX_DEBUG
1795 bool "Debug CPUfreq Samsung driver core"
1796 depends on CPU_FREQ_S3C24XX
1798 Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1800 config CPU_FREQ_S3C24XX_IODEBUG
1801 bool "Debug CPUfreq Samsung driver IO timing"
1802 depends on CPU_FREQ_S3C24XX
1804 Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1806 config CPU_FREQ_S3C24XX_DEBUGFS
1807 bool "Export debugfs for CPUFreq"
1808 depends on CPU_FREQ_S3C24XX && DEBUG_FS
1810 Export status information via debugfs.
1814 source "drivers/cpuidle/Kconfig"
1818 menu "Floating point emulation"
1820 comment "At least one emulation must be selected"
1823 bool "NWFPE math emulation"
1824 depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
1826 Say Y to include the NWFPE floating point emulator in the kernel.
1827 This is necessary to run most binaries. Linux does not currently
1828 support floating point hardware so you need to say Y here even if
1829 your machine has an FPA or floating point co-processor podule.
1831 You may say N here if you are going to load the Acorn FPEmulator
1832 early in the bootup.
1835 bool "Support extended precision"
1836 depends on FPE_NWFPE
1838 Say Y to include 80-bit support in the kernel floating-point
1839 emulator. Otherwise, only 32 and 64-bit support is compiled in.
1840 Note that gcc does not generate 80-bit operations by default,
1841 so in most cases this option only enlarges the size of the
1842 floating point emulator without any good reason.
1844 You almost surely want to say N here.
1847 bool "FastFPE math emulation (EXPERIMENTAL)"
1848 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
1850 Say Y here to include the FAST floating point emulator in the kernel.
1851 This is an experimental much faster emulator which now also has full
1852 precision for the mantissa. It does not support any exceptions.
1853 It is very simple, and approximately 3-6 times faster than NWFPE.
1855 It should be sufficient for most programs. It may be not suitable
1856 for scientific calculations, but you have to check this for yourself.
1857 If you do not feel you need a faster FP emulation you should better
1861 bool "VFP-format floating point maths"
1862 depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
1864 Say Y to include VFP support code in the kernel. This is needed
1865 if your hardware includes a VFP unit.
1867 Please see <file:Documentation/arm/VFP/release-notes.txt> for
1868 release notes and additional status information.
1870 Say N if your target does not have VFP hardware.
1878 bool "Advanced SIMD (NEON) Extension support"
1879 depends on VFPv3 && CPU_V7
1881 Say Y to include support code for NEON, the ARMv7 Advanced SIMD
1886 menu "Userspace binary formats"
1888 source "fs/Kconfig.binfmt"
1891 tristate "RISC OS personality"
1894 Say Y here to include the kernel code necessary if you want to run
1895 Acorn RISC OS/Arthur binaries under Linux. This code is still very
1896 experimental; if this sounds frightening, say N and sleep in peace.
1897 You can also say M here to compile this support as a module (which
1898 will be called arthur).
1902 menu "Power management options"
1904 source "kernel/power/Kconfig"
1906 config ARCH_SUSPEND_POSSIBLE
1911 source "net/Kconfig"
1913 source "drivers/Kconfig"
1917 source "arch/arm/Kconfig.debug"
1919 source "security/Kconfig"
1921 source "crypto/Kconfig"
1923 source "lib/Kconfig"