drivers/staging/brcm80211/sys/wlc_bmac.h

   1 /*
   2  * Copyright (c) 2010 Broadcom Corporation
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  11  * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
  13  * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
  14  * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 /* XXXXX this interface is under wlc.c by design
  18  * http://hwnbu-twiki.broadcom.com/bin/view/Mwgroup/WlBmacDesign
  19  *
  20  *        high driver files(e.g. wlc_ampdu.c etc)
  21  *             wlc.h/wlc.c
  22  *         wlc_bmac.h/wlc_bmac.c
  23  *
  24  *  So don't include this in files other than wlc.c, wlc_bmac* wl_rte.c(dongle port) and wl_phy.c
  25  *  create wrappers in wlc.c if needed
  26  */
  27
  28 /* Revision and other info required from BMAC driver for functioning of high ONLY driver */
  29 typedef struct wlc_bmac_revinfo {
  30         uint vendorid;          /* PCI vendor id */
  31         uint deviceid;          /* device id of chip */
  32
  33         uint boardrev;          /* version # of particular board */
  34         uint corerev;           /* core revision */
  35         uint sromrev;           /* srom revision */
  36         uint chiprev;           /* chip revision */
  37         uint chip;              /* chip number */
  38         uint chippkg;           /* chip package */
  39         uint boardtype;         /* board type */
  40         uint boardvendor;       /* board vendor */
  41         uint bustype;           /* SB_BUS, PCI_BUS  */
  42         uint buscoretype;       /* PCI_CORE_ID, PCIE_CORE_ID, PCMCIA_CORE_ID */
  43         uint buscorerev;        /* buscore rev */
  44         uint32 issim;           /* chip is in simulation or emulation */
  45
  46         uint nbands;
  47
  48         struct band_info {
  49                 uint bandunit;  /* To match on both sides */
  50                 uint bandtype;  /* To match on both sides */
  51                 uint radiorev;
  52                 uint phytype;
  53                 uint phyrev;
  54                 uint anarev;
  55                 uint radioid;
  56                 bool abgphy_encore;
  57         } band[MAXBANDS];
  58 } wlc_bmac_revinfo_t;
  59
  60 /* dup state between BMAC(wlc_hw_info_t) and HIGH(wlc_info_t) driver */
  61 typedef struct wlc_bmac_state {
  62         uint32 machwcap;        /* mac hw capibility */
  63         uint32 preamble_ovr;    /* preamble override */
  64 } wlc_bmac_state_t;
  65
  66 enum {
  67         IOV_BMAC_DIAG,
  68         IOV_BMAC_SBGPIOTIMERVAL,
  69         IOV_BMAC_SBGPIOOUT,
  70         IOV_BMAC_CCGPIOCTRL,    /* CC GPIOCTRL REG */
  71         IOV_BMAC_CCGPIOOUT,     /* CC GPIOOUT REG */
  72         IOV_BMAC_CCGPIOOUTEN,   /* CC GPIOOUTEN REG */
  73         IOV_BMAC_CCGPIOIN,      /* CC GPIOIN REG */
  74         IOV_BMAC_WPSGPIO,       /* WPS push button GPIO pin */
  75         IOV_BMAC_OTPDUMP,
  76         IOV_BMAC_OTPSTAT,
  77         IOV_BMAC_PCIEASPM,      /* obfuscation clkreq/aspm control */
  78         IOV_BMAC_PCIEADVCORRMASK,       /* advanced correctable error mask */
  79         IOV_BMAC_PCIECLKREQ,    /* PCIE 1.1 clockreq enab support */
  80         IOV_BMAC_PCIELCREG,     /* PCIE LCREG */
  81         IOV_BMAC_SBGPIOTIMERMASK,
  82         IOV_BMAC_RFDISABLEDLY,
  83         IOV_BMAC_PCIEREG,       /* PCIE REG */
  84         IOV_BMAC_PCICFGREG,     /* PCI Config register */
  85         IOV_BMAC_PCIESERDESREG, /* PCIE SERDES REG (dev, 0}offset) */
  86         IOV_BMAC_PCIEGPIOOUT,   /* PCIEOUT REG */
  87         IOV_BMAC_PCIEGPIOOUTEN, /* PCIEOUTEN REG */
  88         IOV_BMAC_PCIECLKREQENCTRL,      /* clkreqenctrl REG (PCIE REV > 6.0 */
  89         IOV_BMAC_DMALPBK,
  90         IOV_BMAC_CCREG,
  91         IOV_BMAC_COREREG,
  92         IOV_BMAC_SDCIS,
  93         IOV_BMAC_SDIO_DRIVE,
  94         IOV_BMAC_OTPW,
  95         IOV_BMAC_NVOTPW,
  96         IOV_BMAC_SROM,
  97         IOV_BMAC_SRCRC,
  98         IOV_BMAC_CIS_SOURCE,
  99         IOV_BMAC_CISVAR,
 100         IOV_BMAC_OTPLOCK,
 101         IOV_BMAC_OTP_CHIPID,
 102         IOV_BMAC_CUSTOMVAR1,
 103         IOV_BMAC_BOARDFLAGS,
 104         IOV_BMAC_BOARDFLAGS2,
 105         IOV_BMAC_WPSLED,
 106         IOV_BMAC_NVRAM_SOURCE,
 107         IOV_BMAC_OTP_RAW_READ,
 108         IOV_BMAC_LAST
 109 };
 110
 111 typedef enum {
 112         BMAC_DUMP_GPIO_ID,
 113         BMAC_DUMP_SI_ID,
 114         BMAC_DUMP_SIREG_ID,
 115         BMAC_DUMP_SICLK_ID,
 116         BMAC_DUMP_CCREG_ID,
 117         BMAC_DUMP_PCIEREG_ID,
 118         BMAC_DUMP_PHYREG_ID,
 119         BMAC_DUMP_PHYTBL_ID,
 120         BMAC_DUMP_PHYTBL2_ID,
 121         BMAC_DUMP_PHY_RADIOREG_ID,
 122         BMAC_DUMP_LAST
 123 } wlc_bmac_dump_id_t;
 124
 125 typedef enum {
 126         WLCHW_STATE_ATTACH,
 127         WLCHW_STATE_CLK,
 128         WLCHW_STATE_UP,
 129         WLCHW_STATE_ASSOC,
 130         WLCHW_STATE_LAST
 131 } wlc_bmac_state_id_t;
 132
 133 extern int wlc_bmac_attach(wlc_info_t *wlc, uint16 vendor, uint16 device,
 134                            uint unit, bool piomode, osl_t *osh, void *regsva,
 135                            uint bustype, void *btparam);
 136 extern int wlc_bmac_detach(wlc_info_t *wlc);
 137 extern void wlc_bmac_watchdog(void *arg);
 138 extern void wlc_bmac_info_init(wlc_hw_info_t *wlc_hw);
 139
 140 /* up/down, reset, clk */
 141 #ifdef WLC_LOW
 142 extern void wlc_bmac_xtal(wlc_hw_info_t *wlc_hw, bool want);
 143 #endif
 144
 145 extern void wlc_bmac_copyto_objmem(wlc_hw_info_t *wlc_hw,
 146                                    uint offset, const void *buf, int len,
 147                                    uint32 sel);
 148 extern void wlc_bmac_copyfrom_objmem(wlc_hw_info_t *wlc_hw, uint offset,
 149                                      void *buf, int len, uint32 sel);
 150 #define wlc_bmac_copyfrom_shm(wlc_hw, offset, buf, len)                 \
 151         wlc_bmac_copyfrom_objmem(wlc_hw, offset, buf, len, OBJADDR_SHM_SEL)
 152 #define wlc_bmac_copyto_shm(wlc_hw, offset, buf, len)                   \
 153         wlc_bmac_copyto_objmem(wlc_hw, offset, buf, len, OBJADDR_SHM_SEL)
 154
 155 extern void wlc_bmac_core_phy_clk(wlc_hw_info_t *wlc_hw, bool clk);
 156 extern void wlc_bmac_core_phypll_reset(wlc_hw_info_t *wlc_hw);
 157 extern void wlc_bmac_core_phypll_ctl(wlc_hw_info_t *wlc_hw, bool on);
 158 extern void wlc_bmac_phyclk_fgc(wlc_hw_info_t *wlc_hw, bool clk);
 159 extern void wlc_bmac_macphyclk_set(wlc_hw_info_t *wlc_hw, bool clk);
 160 extern void wlc_bmac_phy_reset(wlc_hw_info_t *wlc_hw);
 161 extern void wlc_bmac_corereset(wlc_hw_info_t *wlc_hw, uint32 flags);
 162 extern void wlc_bmac_reset(wlc_hw_info_t *wlc_hw);
 163 extern void wlc_bmac_init(wlc_hw_info_t *wlc_hw, chanspec_t chanspec,
 164                           bool mute);
 165 extern int wlc_bmac_up_prep(wlc_hw_info_t *wlc_hw);
 166 extern int wlc_bmac_up_finish(wlc_hw_info_t *wlc_hw);
 167 extern int wlc_bmac_down_prep(wlc_hw_info_t *wlc_hw);
 168 extern int wlc_bmac_down_finish(wlc_hw_info_t *wlc_hw);
 169 extern void wlc_bmac_corereset(wlc_hw_info_t *wlc_hw, uint32 flags);
 170 extern void wlc_bmac_switch_macfreq(wlc_hw_info_t *wlc_hw, u8 spurmode);
 171
 172 /* chanspec, ucode interface */
 173 extern int wlc_bmac_bandtype(wlc_hw_info_t *wlc_hw);
 174 extern void wlc_bmac_set_chanspec(wlc_hw_info_t *wlc_hw, chanspec_t chanspec,
 175                                   bool mute, struct txpwr_limits *txpwr);
 176
 177 extern void wlc_bmac_txfifo(wlc_hw_info_t *wlc_hw, uint fifo, void *p,
 178                             bool commit, uint16 frameid, u8 txpktpend);
 179 extern int wlc_bmac_xmtfifo_sz_get(wlc_hw_info_t *wlc_hw, uint fifo,
 180                                    uint *blocks);
 181 extern void wlc_bmac_mhf(wlc_hw_info_t *wlc_hw, u8 idx, uint16 mask,
 182                          uint16 val, int bands);
 183 extern void wlc_bmac_mctrl(wlc_hw_info_t *wlc_hw, uint32 mask, uint32 val);
 184 extern uint16 wlc_bmac_mhf_get(wlc_hw_info_t *wlc_hw, u8 idx, int bands);
 185 extern int wlc_bmac_xmtfifo_sz_set(wlc_hw_info_t *wlc_hw, uint fifo,
 186                                    uint blocks);
 187 extern void wlc_bmac_txant_set(wlc_hw_info_t *wlc_hw, uint16 phytxant);
 188 extern uint16 wlc_bmac_get_txant(wlc_hw_info_t *wlc_hw);
 189 extern void wlc_bmac_antsel_type_set(wlc_hw_info_t *wlc_hw, u8 antsel_type);
 190 extern int wlc_bmac_revinfo_get(wlc_hw_info_t *wlc_hw,
 191                                 wlc_bmac_revinfo_t *revinfo);
 192 extern int wlc_bmac_state_get(wlc_hw_info_t *wlc_hw, wlc_bmac_state_t *state);
 193 extern void wlc_bmac_write_shm(wlc_hw_info_t *wlc_hw, uint offset, uint16 v);
 194 extern uint16 wlc_bmac_read_shm(wlc_hw_info_t *wlc_hw, uint offset);
 195 extern void wlc_bmac_set_shm(wlc_hw_info_t *wlc_hw, uint offset, uint16 v,
 196                              int len);
 197 extern void wlc_bmac_write_template_ram(wlc_hw_info_t *wlc_hw, int offset,
 198                                         int len, void *buf);
 199 extern void wlc_bmac_copyfrom_vars(wlc_hw_info_t *wlc_hw, char **buf,
 200                                    uint *len);
 201
 202 extern void wlc_bmac_process_ps_switch(wlc_hw_info_t *wlc,
 203                                        struct ether_addr *ea, s8 ps_on);
 204 extern void wlc_bmac_hw_etheraddr(wlc_hw_info_t *wlc_hw,
 205                                   struct ether_addr *ea);
 206 extern void wlc_bmac_set_hw_etheraddr(wlc_hw_info_t *wlc_hw,
 207                                       struct ether_addr *ea);
 208 extern bool wlc_bmac_validate_chip_access(wlc_hw_info_t *wlc_hw);
 209
 210 extern bool wlc_bmac_radio_read_hwdisabled(wlc_hw_info_t *wlc_hw);
 211 extern void wlc_bmac_set_shortslot(wlc_hw_info_t *wlc_hw, bool shortslot);
 212 extern void wlc_bmac_mute(wlc_hw_info_t *wlc_hw, bool want, mbool flags);
 213 extern void wlc_bmac_set_deaf(wlc_hw_info_t *wlc_hw, bool user_flag);
 214 extern void wlc_bmac_band_stf_ss_set(wlc_hw_info_t *wlc_hw, u8 stf_mode);
 215
 216 extern void wlc_bmac_wait_for_wake(wlc_hw_info_t *wlc_hw);
 217 extern bool wlc_bmac_tx_fifo_suspended(wlc_hw_info_t *wlc_hw, uint tx_fifo);
 218 extern void wlc_bmac_tx_fifo_suspend(wlc_hw_info_t *wlc_hw, uint tx_fifo);
 219 extern void wlc_bmac_tx_fifo_resume(wlc_hw_info_t *wlc_hw, uint tx_fifo);
 220
 221 extern void wlc_ucode_wake_override_set(wlc_hw_info_t *wlc_hw,
 222                                         uint32 override_bit);
 223 extern void wlc_ucode_wake_override_clear(wlc_hw_info_t *wlc_hw,
 224                                           uint32 override_bit);
 225
 226 extern void wlc_bmac_set_rcmta(wlc_hw_info_t *wlc_hw, int idx,
 227                                const struct ether_addr *addr);
 228 extern void wlc_bmac_set_addrmatch(wlc_hw_info_t *wlc_hw, int match_reg_offset,
 229                                    const struct ether_addr *addr);
 230 extern void wlc_bmac_write_hw_bcntemplates(wlc_hw_info_t *wlc_hw, void *bcn,
 231                                            int len, bool both);
 232
 233 extern void wlc_bmac_read_tsf(wlc_hw_info_t *wlc_hw, uint32 *tsf_l_ptr,
 234                               uint32 *tsf_h_ptr);
 235 extern void wlc_bmac_set_cwmin(wlc_hw_info_t *wlc_hw, uint16 newmin);
 236 extern void wlc_bmac_set_cwmax(wlc_hw_info_t *wlc_hw, uint16 newmax);
 237 extern void wlc_bmac_set_noreset(wlc_hw_info_t *wlc, bool noreset_flag);
 238 extern void wlc_bmac_set_ucode_loaded(wlc_hw_info_t *wlc, bool ucode_loaded);
 239
 240 extern void wlc_bmac_retrylimit_upd(wlc_hw_info_t *wlc_hw, uint16 SRL,
 241                                     uint16 LRL);
 242
 243 extern void wlc_bmac_fifoerrors(wlc_hw_info_t *wlc_hw);
 244
 245 #ifdef WLC_HIGH_ONLY
 246 extern void wlc_bmac_dngl_reboot(rpc_info_t *);
 247 extern void wlc_bmac_dngl_rpc_agg(rpc_info_t *, uint16 agg);
 248 extern void wlc_bmac_dngl_rpc_msglevel(rpc_info_t *, uint16 level);
 249 extern void wlc_bmac_dngl_rpc_txq_wm_set(rpc_info_t *rpc, uint32 wm);
 250 extern void wlc_bmac_dngl_rpc_txq_wm_get(rpc_info_t *rpc, uint32 *wm);
 251 extern void wlc_bmac_dngl_rpc_agg_limit_set(rpc_info_t *rpc, uint32 val);
 252 extern void wlc_bmac_dngl_rpc_agg_limit_get(rpc_info_t *rpc, uint32 *pval);
 253 extern int wlc_bmac_debug_template(wlc_hw_info_t *wlc_hw);
 254 #endif
 255
 256 /* API for BMAC driver (e.g. wlc_phy.c etc) */
 257
 258 extern void wlc_bmac_bw_set(wlc_hw_info_t *wlc_hw, uint16 bw);
 259 extern void wlc_bmac_pllreq(wlc_hw_info_t *wlc_hw, bool set, mbool req_bit);
 260 extern void wlc_bmac_set_clk(wlc_hw_info_t *wlc_hw, bool on);
 261 extern bool wlc_bmac_taclear(wlc_hw_info_t *wlc_hw, bool ta_ok);
 262 extern void wlc_bmac_hw_up(struct wlc_hw_info *wlc_hw);
 263
 264 extern void wlc_bmac_dump(wlc_hw_info_t *wlc_hw, struct bcmstrbuf *b,
 265                           wlc_bmac_dump_id_t dump_id);
 266 extern void wlc_gpio_fast_deinit(wlc_hw_info_t *wlc_hw);
 267
 268 extern bool wlc_bmac_radio_hw(wlc_hw_info_t *wlc_hw, bool enable);
 269 extern uint16 wlc_bmac_rate_shm_offset(wlc_hw_info_t *wlc_hw, u8 rate);
 270
 271 extern void wlc_bmac_assert_type_set(wlc_hw_info_t *wlc_hw, uint32 type);
 272 extern void wlc_bmac_set_txpwr_percent(wlc_hw_info_t *wlc_hw, u8 val);
 273 extern void wlc_bmac_blink_sync(wlc_hw_info_t *wlc_hw, uint32 led_pins);
 274 extern void wlc_bmac_ifsctl_edcrs_set(wlc_hw_info_t *wlc_hw, bool abie,
 275                                       bool isht);
 276
 277 extern void wlc_bmac_antsel_set(wlc_hw_info_t *wlc_hw, uint32 antsel_avail);